1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // max77686.c - mfd core driver for the Maxim 77686/802
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright (C) 2012 Samsung Electronics
6*4882a593Smuzhiyun // Chiwoong Byun <woong.byun@samsung.com>
7*4882a593Smuzhiyun // Jonghwa Lee <jonghwa3.lee@samsung.com>
8*4882a593Smuzhiyun //
9*4882a593Smuzhiyun //This driver is based on max8997.c
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/export.h>
12*4882a593Smuzhiyun #include <linux/slab.h>
13*4882a593Smuzhiyun #include <linux/i2c.h>
14*4882a593Smuzhiyun #include <linux/irq.h>
15*4882a593Smuzhiyun #include <linux/interrupt.h>
16*4882a593Smuzhiyun #include <linux/pm_runtime.h>
17*4882a593Smuzhiyun #include <linux/module.h>
18*4882a593Smuzhiyun #include <linux/mfd/core.h>
19*4882a593Smuzhiyun #include <linux/mfd/max77686.h>
20*4882a593Smuzhiyun #include <linux/mfd/max77686-private.h>
21*4882a593Smuzhiyun #include <linux/err.h>
22*4882a593Smuzhiyun #include <linux/of.h>
23*4882a593Smuzhiyun #include <linux/of_device.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun static const struct mfd_cell max77686_devs[] = {
26*4882a593Smuzhiyun { .name = "max77686-pmic", },
27*4882a593Smuzhiyun { .name = "max77686-rtc", },
28*4882a593Smuzhiyun { .name = "max77686-clk", },
29*4882a593Smuzhiyun };
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun static const struct mfd_cell max77802_devs[] = {
32*4882a593Smuzhiyun { .name = "max77802-pmic", },
33*4882a593Smuzhiyun { .name = "max77802-clk", },
34*4882a593Smuzhiyun { .name = "max77802-rtc", },
35*4882a593Smuzhiyun };
36*4882a593Smuzhiyun
max77802_pmic_is_accessible_reg(struct device * dev,unsigned int reg)37*4882a593Smuzhiyun static bool max77802_pmic_is_accessible_reg(struct device *dev,
38*4882a593Smuzhiyun unsigned int reg)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun return reg < MAX77802_REG_PMIC_END;
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
max77802_rtc_is_accessible_reg(struct device * dev,unsigned int reg)43*4882a593Smuzhiyun static bool max77802_rtc_is_accessible_reg(struct device *dev,
44*4882a593Smuzhiyun unsigned int reg)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun return (reg >= MAX77802_RTC_INT && reg < MAX77802_RTC_END);
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
max77802_is_accessible_reg(struct device * dev,unsigned int reg)49*4882a593Smuzhiyun static bool max77802_is_accessible_reg(struct device *dev, unsigned int reg)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun return (max77802_pmic_is_accessible_reg(dev, reg) ||
52*4882a593Smuzhiyun max77802_rtc_is_accessible_reg(dev, reg));
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun
max77802_pmic_is_precious_reg(struct device * dev,unsigned int reg)55*4882a593Smuzhiyun static bool max77802_pmic_is_precious_reg(struct device *dev, unsigned int reg)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun return (reg == MAX77802_REG_INTSRC || reg == MAX77802_REG_INT1 ||
58*4882a593Smuzhiyun reg == MAX77802_REG_INT2);
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun
max77802_rtc_is_precious_reg(struct device * dev,unsigned int reg)61*4882a593Smuzhiyun static bool max77802_rtc_is_precious_reg(struct device *dev, unsigned int reg)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun return (reg == MAX77802_RTC_INT ||
64*4882a593Smuzhiyun reg == MAX77802_RTC_UPDATE0 ||
65*4882a593Smuzhiyun reg == MAX77802_RTC_UPDATE1);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
max77802_is_precious_reg(struct device * dev,unsigned int reg)68*4882a593Smuzhiyun static bool max77802_is_precious_reg(struct device *dev, unsigned int reg)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun return (max77802_pmic_is_precious_reg(dev, reg) ||
71*4882a593Smuzhiyun max77802_rtc_is_precious_reg(dev, reg));
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
max77802_pmic_is_volatile_reg(struct device * dev,unsigned int reg)74*4882a593Smuzhiyun static bool max77802_pmic_is_volatile_reg(struct device *dev, unsigned int reg)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun return (max77802_is_precious_reg(dev, reg) ||
77*4882a593Smuzhiyun reg == MAX77802_REG_STATUS1 || reg == MAX77802_REG_STATUS2 ||
78*4882a593Smuzhiyun reg == MAX77802_REG_PWRON);
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
max77802_rtc_is_volatile_reg(struct device * dev,unsigned int reg)81*4882a593Smuzhiyun static bool max77802_rtc_is_volatile_reg(struct device *dev, unsigned int reg)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun return (max77802_rtc_is_precious_reg(dev, reg) ||
84*4882a593Smuzhiyun reg == MAX77802_RTC_SEC ||
85*4882a593Smuzhiyun reg == MAX77802_RTC_MIN ||
86*4882a593Smuzhiyun reg == MAX77802_RTC_HOUR ||
87*4882a593Smuzhiyun reg == MAX77802_RTC_WEEKDAY ||
88*4882a593Smuzhiyun reg == MAX77802_RTC_MONTH ||
89*4882a593Smuzhiyun reg == MAX77802_RTC_YEAR ||
90*4882a593Smuzhiyun reg == MAX77802_RTC_DATE);
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
max77802_is_volatile_reg(struct device * dev,unsigned int reg)93*4882a593Smuzhiyun static bool max77802_is_volatile_reg(struct device *dev, unsigned int reg)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun return (max77802_pmic_is_volatile_reg(dev, reg) ||
96*4882a593Smuzhiyun max77802_rtc_is_volatile_reg(dev, reg));
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun static const struct regmap_config max77686_regmap_config = {
100*4882a593Smuzhiyun .reg_bits = 8,
101*4882a593Smuzhiyun .val_bits = 8,
102*4882a593Smuzhiyun };
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun static const struct regmap_config max77802_regmap_config = {
105*4882a593Smuzhiyun .reg_bits = 8,
106*4882a593Smuzhiyun .val_bits = 8,
107*4882a593Smuzhiyun .writeable_reg = max77802_is_accessible_reg,
108*4882a593Smuzhiyun .readable_reg = max77802_is_accessible_reg,
109*4882a593Smuzhiyun .precious_reg = max77802_is_precious_reg,
110*4882a593Smuzhiyun .volatile_reg = max77802_is_volatile_reg,
111*4882a593Smuzhiyun .name = "max77802-pmic",
112*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
113*4882a593Smuzhiyun };
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun static const struct regmap_irq max77686_irqs[] = {
116*4882a593Smuzhiyun /* INT1 interrupts */
117*4882a593Smuzhiyun { .reg_offset = 0, .mask = MAX77686_INT1_PWRONF_MSK, },
118*4882a593Smuzhiyun { .reg_offset = 0, .mask = MAX77686_INT1_PWRONR_MSK, },
119*4882a593Smuzhiyun { .reg_offset = 0, .mask = MAX77686_INT1_JIGONBF_MSK, },
120*4882a593Smuzhiyun { .reg_offset = 0, .mask = MAX77686_INT1_JIGONBR_MSK, },
121*4882a593Smuzhiyun { .reg_offset = 0, .mask = MAX77686_INT1_ACOKBF_MSK, },
122*4882a593Smuzhiyun { .reg_offset = 0, .mask = MAX77686_INT1_ACOKBR_MSK, },
123*4882a593Smuzhiyun { .reg_offset = 0, .mask = MAX77686_INT1_ONKEY1S_MSK, },
124*4882a593Smuzhiyun { .reg_offset = 0, .mask = MAX77686_INT1_MRSTB_MSK, },
125*4882a593Smuzhiyun /* INT2 interrupts */
126*4882a593Smuzhiyun { .reg_offset = 1, .mask = MAX77686_INT2_140C_MSK, },
127*4882a593Smuzhiyun { .reg_offset = 1, .mask = MAX77686_INT2_120C_MSK, },
128*4882a593Smuzhiyun };
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun static const struct regmap_irq_chip max77686_irq_chip = {
131*4882a593Smuzhiyun .name = "max77686-pmic",
132*4882a593Smuzhiyun .status_base = MAX77686_REG_INT1,
133*4882a593Smuzhiyun .mask_base = MAX77686_REG_INT1MSK,
134*4882a593Smuzhiyun .num_regs = 2,
135*4882a593Smuzhiyun .irqs = max77686_irqs,
136*4882a593Smuzhiyun .num_irqs = ARRAY_SIZE(max77686_irqs),
137*4882a593Smuzhiyun };
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun static const struct regmap_irq_chip max77802_irq_chip = {
140*4882a593Smuzhiyun .name = "max77802-pmic",
141*4882a593Smuzhiyun .status_base = MAX77802_REG_INT1,
142*4882a593Smuzhiyun .mask_base = MAX77802_REG_INT1MSK,
143*4882a593Smuzhiyun .num_regs = 2,
144*4882a593Smuzhiyun .irqs = max77686_irqs, /* same masks as 77686 */
145*4882a593Smuzhiyun .num_irqs = ARRAY_SIZE(max77686_irqs),
146*4882a593Smuzhiyun };
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun static const struct of_device_id max77686_pmic_dt_match[] = {
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun .compatible = "maxim,max77686",
151*4882a593Smuzhiyun .data = (void *)TYPE_MAX77686,
152*4882a593Smuzhiyun },
153*4882a593Smuzhiyun {
154*4882a593Smuzhiyun .compatible = "maxim,max77802",
155*4882a593Smuzhiyun .data = (void *)TYPE_MAX77802,
156*4882a593Smuzhiyun },
157*4882a593Smuzhiyun { },
158*4882a593Smuzhiyun };
159*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, max77686_pmic_dt_match);
160*4882a593Smuzhiyun
max77686_i2c_probe(struct i2c_client * i2c)161*4882a593Smuzhiyun static int max77686_i2c_probe(struct i2c_client *i2c)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun struct max77686_dev *max77686 = NULL;
164*4882a593Smuzhiyun unsigned int data;
165*4882a593Smuzhiyun int ret = 0;
166*4882a593Smuzhiyun const struct regmap_config *config;
167*4882a593Smuzhiyun const struct regmap_irq_chip *irq_chip;
168*4882a593Smuzhiyun const struct mfd_cell *cells;
169*4882a593Smuzhiyun int n_devs;
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun max77686 = devm_kzalloc(&i2c->dev,
172*4882a593Smuzhiyun sizeof(struct max77686_dev), GFP_KERNEL);
173*4882a593Smuzhiyun if (!max77686)
174*4882a593Smuzhiyun return -ENOMEM;
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun i2c_set_clientdata(i2c, max77686);
177*4882a593Smuzhiyun max77686->type = (unsigned long)of_device_get_match_data(&i2c->dev);
178*4882a593Smuzhiyun max77686->dev = &i2c->dev;
179*4882a593Smuzhiyun max77686->i2c = i2c;
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun max77686->irq = i2c->irq;
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun if (max77686->type == TYPE_MAX77686) {
184*4882a593Smuzhiyun config = &max77686_regmap_config;
185*4882a593Smuzhiyun irq_chip = &max77686_irq_chip;
186*4882a593Smuzhiyun cells = max77686_devs;
187*4882a593Smuzhiyun n_devs = ARRAY_SIZE(max77686_devs);
188*4882a593Smuzhiyun } else {
189*4882a593Smuzhiyun config = &max77802_regmap_config;
190*4882a593Smuzhiyun irq_chip = &max77802_irq_chip;
191*4882a593Smuzhiyun cells = max77802_devs;
192*4882a593Smuzhiyun n_devs = ARRAY_SIZE(max77802_devs);
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun max77686->regmap = devm_regmap_init_i2c(i2c, config);
196*4882a593Smuzhiyun if (IS_ERR(max77686->regmap)) {
197*4882a593Smuzhiyun ret = PTR_ERR(max77686->regmap);
198*4882a593Smuzhiyun dev_err(max77686->dev, "Failed to allocate register map: %d\n",
199*4882a593Smuzhiyun ret);
200*4882a593Smuzhiyun return ret;
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun ret = regmap_read(max77686->regmap, MAX77686_REG_DEVICE_ID, &data);
204*4882a593Smuzhiyun if (ret < 0) {
205*4882a593Smuzhiyun dev_err(max77686->dev,
206*4882a593Smuzhiyun "device not found on this channel (this is not an error)\n");
207*4882a593Smuzhiyun return -ENODEV;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun ret = devm_regmap_add_irq_chip(&i2c->dev, max77686->regmap,
211*4882a593Smuzhiyun max77686->irq,
212*4882a593Smuzhiyun IRQF_TRIGGER_FALLING | IRQF_ONESHOT |
213*4882a593Smuzhiyun IRQF_SHARED, 0, irq_chip,
214*4882a593Smuzhiyun &max77686->irq_data);
215*4882a593Smuzhiyun if (ret < 0) {
216*4882a593Smuzhiyun dev_err(&i2c->dev, "failed to add PMIC irq chip: %d\n", ret);
217*4882a593Smuzhiyun return ret;
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun ret = devm_mfd_add_devices(max77686->dev, -1, cells, n_devs, NULL,
221*4882a593Smuzhiyun 0, NULL);
222*4882a593Smuzhiyun if (ret < 0) {
223*4882a593Smuzhiyun dev_err(&i2c->dev, "failed to add MFD devices: %d\n", ret);
224*4882a593Smuzhiyun return ret;
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun return 0;
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
max77686_suspend(struct device * dev)231*4882a593Smuzhiyun static int max77686_suspend(struct device *dev)
232*4882a593Smuzhiyun {
233*4882a593Smuzhiyun struct i2c_client *i2c = to_i2c_client(dev);
234*4882a593Smuzhiyun struct max77686_dev *max77686 = i2c_get_clientdata(i2c);
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun if (device_may_wakeup(dev))
237*4882a593Smuzhiyun enable_irq_wake(max77686->irq);
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun /*
240*4882a593Smuzhiyun * IRQ must be disabled during suspend because if it happens
241*4882a593Smuzhiyun * while suspended it will be handled before resuming I2C.
242*4882a593Smuzhiyun *
243*4882a593Smuzhiyun * When device is woken up from suspend (e.g. by RTC wake alarm),
244*4882a593Smuzhiyun * an interrupt occurs before resuming I2C bus controller.
245*4882a593Smuzhiyun * Interrupt handler tries to read registers but this read
246*4882a593Smuzhiyun * will fail because I2C is still suspended.
247*4882a593Smuzhiyun */
248*4882a593Smuzhiyun disable_irq(max77686->irq);
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun return 0;
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun
max77686_resume(struct device * dev)253*4882a593Smuzhiyun static int max77686_resume(struct device *dev)
254*4882a593Smuzhiyun {
255*4882a593Smuzhiyun struct i2c_client *i2c = to_i2c_client(dev);
256*4882a593Smuzhiyun struct max77686_dev *max77686 = i2c_get_clientdata(i2c);
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun if (device_may_wakeup(dev))
259*4882a593Smuzhiyun disable_irq_wake(max77686->irq);
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun enable_irq(max77686->irq);
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun return 0;
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun #endif /* CONFIG_PM_SLEEP */
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(max77686_pm, max77686_suspend, max77686_resume);
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun static struct i2c_driver max77686_i2c_driver = {
270*4882a593Smuzhiyun .driver = {
271*4882a593Smuzhiyun .name = "max77686",
272*4882a593Smuzhiyun .pm = &max77686_pm,
273*4882a593Smuzhiyun .of_match_table = of_match_ptr(max77686_pmic_dt_match),
274*4882a593Smuzhiyun },
275*4882a593Smuzhiyun .probe_new = max77686_i2c_probe,
276*4882a593Smuzhiyun };
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun module_i2c_driver(max77686_i2c_driver);
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun MODULE_DESCRIPTION("MAXIM 77686/802 multi-function core driver");
281*4882a593Smuzhiyun MODULE_AUTHOR("Chiwoong Byun <woong.byun@samsung.com>");
282*4882a593Smuzhiyun MODULE_LICENSE("GPL");
283