1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * TI LP8788 MFD - interrupt handler
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2012 Texas Instruments
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Author: Milo(Woogyom) Kim <milo.kim@ti.com>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/delay.h>
11*4882a593Smuzhiyun #include <linux/err.h>
12*4882a593Smuzhiyun #include <linux/interrupt.h>
13*4882a593Smuzhiyun #include <linux/irq.h>
14*4882a593Smuzhiyun #include <linux/irqdomain.h>
15*4882a593Smuzhiyun #include <linux/device.h>
16*4882a593Smuzhiyun #include <linux/mfd/lp8788.h>
17*4882a593Smuzhiyun #include <linux/module.h>
18*4882a593Smuzhiyun #include <linux/slab.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun /* register address */
21*4882a593Smuzhiyun #define LP8788_INT_1 0x00
22*4882a593Smuzhiyun #define LP8788_INTEN_1 0x03
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #define BASE_INTEN_ADDR LP8788_INTEN_1
25*4882a593Smuzhiyun #define SIZE_REG 8
26*4882a593Smuzhiyun #define NUM_REGS 3
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun /*
29*4882a593Smuzhiyun * struct lp8788_irq_data
30*4882a593Smuzhiyun * @lp : used for accessing to lp8788 registers
31*4882a593Smuzhiyun * @irq_lock : mutex for enabling/disabling the interrupt
32*4882a593Smuzhiyun * @domain : IRQ domain for handling nested interrupt
33*4882a593Smuzhiyun * @enabled : status of enabled interrupt
34*4882a593Smuzhiyun */
35*4882a593Smuzhiyun struct lp8788_irq_data {
36*4882a593Smuzhiyun struct lp8788 *lp;
37*4882a593Smuzhiyun struct mutex irq_lock;
38*4882a593Smuzhiyun struct irq_domain *domain;
39*4882a593Smuzhiyun int enabled[LP8788_INT_MAX];
40*4882a593Smuzhiyun };
41*4882a593Smuzhiyun
_irq_to_addr(enum lp8788_int_id id)42*4882a593Smuzhiyun static inline u8 _irq_to_addr(enum lp8788_int_id id)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun return id / SIZE_REG;
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun
_irq_to_enable_addr(enum lp8788_int_id id)47*4882a593Smuzhiyun static inline u8 _irq_to_enable_addr(enum lp8788_int_id id)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun return _irq_to_addr(id) + BASE_INTEN_ADDR;
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
_irq_to_mask(enum lp8788_int_id id)52*4882a593Smuzhiyun static inline u8 _irq_to_mask(enum lp8788_int_id id)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun return 1 << (id % SIZE_REG);
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun
_irq_to_val(enum lp8788_int_id id,int enable)57*4882a593Smuzhiyun static inline u8 _irq_to_val(enum lp8788_int_id id, int enable)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun return enable << (id % SIZE_REG);
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
lp8788_irq_enable(struct irq_data * data)62*4882a593Smuzhiyun static void lp8788_irq_enable(struct irq_data *data)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun struct lp8788_irq_data *irqd = irq_data_get_irq_chip_data(data);
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun irqd->enabled[data->hwirq] = 1;
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun
lp8788_irq_disable(struct irq_data * data)69*4882a593Smuzhiyun static void lp8788_irq_disable(struct irq_data *data)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun struct lp8788_irq_data *irqd = irq_data_get_irq_chip_data(data);
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun irqd->enabled[data->hwirq] = 0;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
lp8788_irq_bus_lock(struct irq_data * data)76*4882a593Smuzhiyun static void lp8788_irq_bus_lock(struct irq_data *data)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun struct lp8788_irq_data *irqd = irq_data_get_irq_chip_data(data);
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun mutex_lock(&irqd->irq_lock);
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
lp8788_irq_bus_sync_unlock(struct irq_data * data)83*4882a593Smuzhiyun static void lp8788_irq_bus_sync_unlock(struct irq_data *data)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun struct lp8788_irq_data *irqd = irq_data_get_irq_chip_data(data);
86*4882a593Smuzhiyun enum lp8788_int_id irq = data->hwirq;
87*4882a593Smuzhiyun u8 addr, mask, val;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun addr = _irq_to_enable_addr(irq);
90*4882a593Smuzhiyun mask = _irq_to_mask(irq);
91*4882a593Smuzhiyun val = _irq_to_val(irq, irqd->enabled[irq]);
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun lp8788_update_bits(irqd->lp, addr, mask, val);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun mutex_unlock(&irqd->irq_lock);
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun static struct irq_chip lp8788_irq_chip = {
99*4882a593Smuzhiyun .name = "lp8788",
100*4882a593Smuzhiyun .irq_enable = lp8788_irq_enable,
101*4882a593Smuzhiyun .irq_disable = lp8788_irq_disable,
102*4882a593Smuzhiyun .irq_bus_lock = lp8788_irq_bus_lock,
103*4882a593Smuzhiyun .irq_bus_sync_unlock = lp8788_irq_bus_sync_unlock,
104*4882a593Smuzhiyun };
105*4882a593Smuzhiyun
lp8788_irq_handler(int irq,void * ptr)106*4882a593Smuzhiyun static irqreturn_t lp8788_irq_handler(int irq, void *ptr)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun struct lp8788_irq_data *irqd = ptr;
109*4882a593Smuzhiyun struct lp8788 *lp = irqd->lp;
110*4882a593Smuzhiyun u8 status[NUM_REGS], addr, mask;
111*4882a593Smuzhiyun bool handled = false;
112*4882a593Smuzhiyun int i;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun if (lp8788_read_multi_bytes(lp, LP8788_INT_1, status, NUM_REGS))
115*4882a593Smuzhiyun return IRQ_NONE;
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun for (i = 0 ; i < LP8788_INT_MAX ; i++) {
118*4882a593Smuzhiyun addr = _irq_to_addr(i);
119*4882a593Smuzhiyun mask = _irq_to_mask(i);
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun /* reporting only if the irq is enabled */
122*4882a593Smuzhiyun if (status[addr] & mask) {
123*4882a593Smuzhiyun handle_nested_irq(irq_find_mapping(irqd->domain, i));
124*4882a593Smuzhiyun handled = true;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun return handled ? IRQ_HANDLED : IRQ_NONE;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
lp8788_irq_map(struct irq_domain * d,unsigned int virq,irq_hw_number_t hwirq)131*4882a593Smuzhiyun static int lp8788_irq_map(struct irq_domain *d, unsigned int virq,
132*4882a593Smuzhiyun irq_hw_number_t hwirq)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun struct lp8788_irq_data *irqd = d->host_data;
135*4882a593Smuzhiyun struct irq_chip *chip = &lp8788_irq_chip;
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun irq_set_chip_data(virq, irqd);
138*4882a593Smuzhiyun irq_set_chip_and_handler(virq, chip, handle_edge_irq);
139*4882a593Smuzhiyun irq_set_nested_thread(virq, 1);
140*4882a593Smuzhiyun irq_set_noprobe(virq);
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun return 0;
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun static const struct irq_domain_ops lp8788_domain_ops = {
146*4882a593Smuzhiyun .map = lp8788_irq_map,
147*4882a593Smuzhiyun };
148*4882a593Smuzhiyun
lp8788_irq_init(struct lp8788 * lp,int irq)149*4882a593Smuzhiyun int lp8788_irq_init(struct lp8788 *lp, int irq)
150*4882a593Smuzhiyun {
151*4882a593Smuzhiyun struct lp8788_irq_data *irqd;
152*4882a593Smuzhiyun int ret;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun if (irq <= 0) {
155*4882a593Smuzhiyun dev_warn(lp->dev, "invalid irq number: %d\n", irq);
156*4882a593Smuzhiyun return 0;
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun irqd = devm_kzalloc(lp->dev, sizeof(*irqd), GFP_KERNEL);
160*4882a593Smuzhiyun if (!irqd)
161*4882a593Smuzhiyun return -ENOMEM;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun irqd->lp = lp;
164*4882a593Smuzhiyun irqd->domain = irq_domain_add_linear(lp->dev->of_node, LP8788_INT_MAX,
165*4882a593Smuzhiyun &lp8788_domain_ops, irqd);
166*4882a593Smuzhiyun if (!irqd->domain) {
167*4882a593Smuzhiyun dev_err(lp->dev, "failed to add irq domain err\n");
168*4882a593Smuzhiyun return -EINVAL;
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun lp->irqdm = irqd->domain;
172*4882a593Smuzhiyun mutex_init(&irqd->irq_lock);
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun ret = request_threaded_irq(irq, NULL, lp8788_irq_handler,
175*4882a593Smuzhiyun IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
176*4882a593Smuzhiyun "lp8788-irq", irqd);
177*4882a593Smuzhiyun if (ret) {
178*4882a593Smuzhiyun irq_domain_remove(lp->irqdm);
179*4882a593Smuzhiyun dev_err(lp->dev, "failed to create a thread for IRQ_N\n");
180*4882a593Smuzhiyun return ret;
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun lp->irq = irq;
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun return 0;
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun
lp8788_irq_exit(struct lp8788 * lp)188*4882a593Smuzhiyun void lp8788_irq_exit(struct lp8788 *lp)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun if (lp->irq)
191*4882a593Smuzhiyun free_irq(lp->irq, lp->irqdm);
192*4882a593Smuzhiyun if (lp->irqdm)
193*4882a593Smuzhiyun irq_domain_remove(lp->irqdm);
194*4882a593Smuzhiyun }
195