1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Lochnagar I2C bus interface
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2012-2018 Cirrus Logic, Inc. and
6*4882a593Smuzhiyun * Cirrus Logic International Semiconductor Ltd.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Author: Charles Keepax <ckeepax@opensource.cirrus.com>
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <linux/device.h>
13*4882a593Smuzhiyun #include <linux/err.h>
14*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
15*4882a593Smuzhiyun #include <linux/i2c.h>
16*4882a593Smuzhiyun #include <linux/lockdep.h>
17*4882a593Smuzhiyun #include <linux/mfd/core.h>
18*4882a593Smuzhiyun #include <linux/mutex.h>
19*4882a593Smuzhiyun #include <linux/of.h>
20*4882a593Smuzhiyun #include <linux/of_platform.h>
21*4882a593Smuzhiyun #include <linux/regmap.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #include <linux/mfd/lochnagar.h>
24*4882a593Smuzhiyun #include <linux/mfd/lochnagar1_regs.h>
25*4882a593Smuzhiyun #include <linux/mfd/lochnagar2_regs.h>
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #define LOCHNAGAR_BOOT_RETRIES 10
28*4882a593Smuzhiyun #define LOCHNAGAR_BOOT_DELAY_MS 350
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #define LOCHNAGAR_CONFIG_POLL_US 10000
31*4882a593Smuzhiyun
lochnagar1_readable_register(struct device * dev,unsigned int reg)32*4882a593Smuzhiyun static bool lochnagar1_readable_register(struct device *dev, unsigned int reg)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun switch (reg) {
35*4882a593Smuzhiyun case LOCHNAGAR_SOFTWARE_RESET:
36*4882a593Smuzhiyun case LOCHNAGAR_FIRMWARE_ID1...LOCHNAGAR_FIRMWARE_ID2:
37*4882a593Smuzhiyun case LOCHNAGAR1_CDC_AIF1_SEL...LOCHNAGAR1_CDC_AIF3_SEL:
38*4882a593Smuzhiyun case LOCHNAGAR1_CDC_MCLK1_SEL...LOCHNAGAR1_CDC_MCLK2_SEL:
39*4882a593Smuzhiyun case LOCHNAGAR1_CDC_AIF_CTRL1...LOCHNAGAR1_CDC_AIF_CTRL2:
40*4882a593Smuzhiyun case LOCHNAGAR1_EXT_AIF_CTRL:
41*4882a593Smuzhiyun case LOCHNAGAR1_DSP_AIF1_SEL...LOCHNAGAR1_DSP_AIF2_SEL:
42*4882a593Smuzhiyun case LOCHNAGAR1_DSP_CLKIN_SEL:
43*4882a593Smuzhiyun case LOCHNAGAR1_DSP_AIF:
44*4882a593Smuzhiyun case LOCHNAGAR1_GF_AIF1...LOCHNAGAR1_GF_AIF2:
45*4882a593Smuzhiyun case LOCHNAGAR1_PSIA_AIF:
46*4882a593Smuzhiyun case LOCHNAGAR1_PSIA1_SEL...LOCHNAGAR1_PSIA2_SEL:
47*4882a593Smuzhiyun case LOCHNAGAR1_SPDIF_AIF_SEL:
48*4882a593Smuzhiyun case LOCHNAGAR1_GF_AIF3_SEL...LOCHNAGAR1_GF_AIF4_SEL:
49*4882a593Smuzhiyun case LOCHNAGAR1_GF_CLKOUT1_SEL:
50*4882a593Smuzhiyun case LOCHNAGAR1_GF_AIF1_SEL...LOCHNAGAR1_GF_AIF2_SEL:
51*4882a593Smuzhiyun case LOCHNAGAR1_GF_GPIO2...LOCHNAGAR1_GF_GPIO7:
52*4882a593Smuzhiyun case LOCHNAGAR1_RST:
53*4882a593Smuzhiyun case LOCHNAGAR1_LED1...LOCHNAGAR1_LED2:
54*4882a593Smuzhiyun case LOCHNAGAR1_I2C_CTRL:
55*4882a593Smuzhiyun return true;
56*4882a593Smuzhiyun default:
57*4882a593Smuzhiyun return false;
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun static const struct regmap_config lochnagar1_i2c_regmap = {
62*4882a593Smuzhiyun .reg_bits = 8,
63*4882a593Smuzhiyun .val_bits = 8,
64*4882a593Smuzhiyun .reg_format_endian = REGMAP_ENDIAN_BIG,
65*4882a593Smuzhiyun .val_format_endian = REGMAP_ENDIAN_BIG,
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun .max_register = 0x50,
68*4882a593Smuzhiyun .readable_reg = lochnagar1_readable_register,
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun .use_single_read = true,
71*4882a593Smuzhiyun .use_single_write = true,
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
74*4882a593Smuzhiyun };
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun static const struct reg_sequence lochnagar1_patch[] = {
77*4882a593Smuzhiyun { 0x40, 0x0083 },
78*4882a593Smuzhiyun { 0x47, 0x0018 },
79*4882a593Smuzhiyun { 0x50, 0x0000 },
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun
lochnagar2_readable_register(struct device * dev,unsigned int reg)82*4882a593Smuzhiyun static bool lochnagar2_readable_register(struct device *dev, unsigned int reg)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun switch (reg) {
85*4882a593Smuzhiyun case LOCHNAGAR_SOFTWARE_RESET:
86*4882a593Smuzhiyun case LOCHNAGAR_FIRMWARE_ID1...LOCHNAGAR_FIRMWARE_ID2:
87*4882a593Smuzhiyun case LOCHNAGAR2_CDC_AIF1_CTRL...LOCHNAGAR2_CDC_AIF3_CTRL:
88*4882a593Smuzhiyun case LOCHNAGAR2_DSP_AIF1_CTRL...LOCHNAGAR2_DSP_AIF2_CTRL:
89*4882a593Smuzhiyun case LOCHNAGAR2_PSIA1_CTRL...LOCHNAGAR2_PSIA2_CTRL:
90*4882a593Smuzhiyun case LOCHNAGAR2_GF_AIF3_CTRL...LOCHNAGAR2_GF_AIF4_CTRL:
91*4882a593Smuzhiyun case LOCHNAGAR2_GF_AIF1_CTRL...LOCHNAGAR2_GF_AIF2_CTRL:
92*4882a593Smuzhiyun case LOCHNAGAR2_SPDIF_AIF_CTRL:
93*4882a593Smuzhiyun case LOCHNAGAR2_USB_AIF1_CTRL...LOCHNAGAR2_USB_AIF2_CTRL:
94*4882a593Smuzhiyun case LOCHNAGAR2_ADAT_AIF_CTRL:
95*4882a593Smuzhiyun case LOCHNAGAR2_CDC_MCLK1_CTRL...LOCHNAGAR2_CDC_MCLK2_CTRL:
96*4882a593Smuzhiyun case LOCHNAGAR2_DSP_CLKIN_CTRL:
97*4882a593Smuzhiyun case LOCHNAGAR2_PSIA1_MCLK_CTRL...LOCHNAGAR2_PSIA2_MCLK_CTRL:
98*4882a593Smuzhiyun case LOCHNAGAR2_SPDIF_MCLK_CTRL:
99*4882a593Smuzhiyun case LOCHNAGAR2_GF_CLKOUT1_CTRL...LOCHNAGAR2_GF_CLKOUT2_CTRL:
100*4882a593Smuzhiyun case LOCHNAGAR2_ADAT_MCLK_CTRL:
101*4882a593Smuzhiyun case LOCHNAGAR2_SOUNDCARD_MCLK_CTRL:
102*4882a593Smuzhiyun case LOCHNAGAR2_GPIO_FPGA_GPIO1...LOCHNAGAR2_GPIO_FPGA_GPIO6:
103*4882a593Smuzhiyun case LOCHNAGAR2_GPIO_CDC_GPIO1...LOCHNAGAR2_GPIO_CDC_GPIO8:
104*4882a593Smuzhiyun case LOCHNAGAR2_GPIO_DSP_GPIO1...LOCHNAGAR2_GPIO_DSP_GPIO6:
105*4882a593Smuzhiyun case LOCHNAGAR2_GPIO_GF_GPIO2...LOCHNAGAR2_GPIO_GF_GPIO7:
106*4882a593Smuzhiyun case LOCHNAGAR2_GPIO_CDC_AIF1_BCLK...LOCHNAGAR2_GPIO_CDC_AIF3_TXDAT:
107*4882a593Smuzhiyun case LOCHNAGAR2_GPIO_DSP_AIF1_BCLK...LOCHNAGAR2_GPIO_DSP_AIF2_TXDAT:
108*4882a593Smuzhiyun case LOCHNAGAR2_GPIO_PSIA1_BCLK...LOCHNAGAR2_GPIO_PSIA2_TXDAT:
109*4882a593Smuzhiyun case LOCHNAGAR2_GPIO_GF_AIF3_BCLK...LOCHNAGAR2_GPIO_GF_AIF4_TXDAT:
110*4882a593Smuzhiyun case LOCHNAGAR2_GPIO_GF_AIF1_BCLK...LOCHNAGAR2_GPIO_GF_AIF2_TXDAT:
111*4882a593Smuzhiyun case LOCHNAGAR2_GPIO_DSP_UART1_RX...LOCHNAGAR2_GPIO_DSP_UART2_TX:
112*4882a593Smuzhiyun case LOCHNAGAR2_GPIO_GF_UART2_RX...LOCHNAGAR2_GPIO_GF_UART2_TX:
113*4882a593Smuzhiyun case LOCHNAGAR2_GPIO_USB_UART_RX:
114*4882a593Smuzhiyun case LOCHNAGAR2_GPIO_CDC_PDMCLK1...LOCHNAGAR2_GPIO_CDC_PDMDAT2:
115*4882a593Smuzhiyun case LOCHNAGAR2_GPIO_CDC_DMICCLK1...LOCHNAGAR2_GPIO_CDC_DMICDAT4:
116*4882a593Smuzhiyun case LOCHNAGAR2_GPIO_DSP_DMICCLK1...LOCHNAGAR2_GPIO_DSP_DMICDAT2:
117*4882a593Smuzhiyun case LOCHNAGAR2_GPIO_I2C2_SCL...LOCHNAGAR2_GPIO_I2C4_SDA:
118*4882a593Smuzhiyun case LOCHNAGAR2_GPIO_DSP_STANDBY:
119*4882a593Smuzhiyun case LOCHNAGAR2_GPIO_CDC_MCLK1...LOCHNAGAR2_GPIO_CDC_MCLK2:
120*4882a593Smuzhiyun case LOCHNAGAR2_GPIO_DSP_CLKIN:
121*4882a593Smuzhiyun case LOCHNAGAR2_GPIO_PSIA1_MCLK...LOCHNAGAR2_GPIO_PSIA2_MCLK:
122*4882a593Smuzhiyun case LOCHNAGAR2_GPIO_GF_GPIO1...LOCHNAGAR2_GPIO_GF_GPIO5:
123*4882a593Smuzhiyun case LOCHNAGAR2_GPIO_DSP_GPIO20:
124*4882a593Smuzhiyun case LOCHNAGAR2_GPIO_CHANNEL1...LOCHNAGAR2_GPIO_CHANNEL16:
125*4882a593Smuzhiyun case LOCHNAGAR2_MINICARD_RESETS:
126*4882a593Smuzhiyun case LOCHNAGAR2_ANALOGUE_PATH_CTRL1...LOCHNAGAR2_ANALOGUE_PATH_CTRL2:
127*4882a593Smuzhiyun case LOCHNAGAR2_COMMS_CTRL4:
128*4882a593Smuzhiyun case LOCHNAGAR2_SPDIF_CTRL:
129*4882a593Smuzhiyun case LOCHNAGAR2_IMON_CTRL1...LOCHNAGAR2_IMON_CTRL4:
130*4882a593Smuzhiyun case LOCHNAGAR2_IMON_DATA1...LOCHNAGAR2_IMON_DATA2:
131*4882a593Smuzhiyun case LOCHNAGAR2_POWER_CTRL:
132*4882a593Smuzhiyun case LOCHNAGAR2_MICVDD_CTRL1:
133*4882a593Smuzhiyun case LOCHNAGAR2_MICVDD_CTRL2:
134*4882a593Smuzhiyun case LOCHNAGAR2_VDDCORE_CDC_CTRL1:
135*4882a593Smuzhiyun case LOCHNAGAR2_VDDCORE_CDC_CTRL2:
136*4882a593Smuzhiyun case LOCHNAGAR2_SOUNDCARD_AIF_CTRL:
137*4882a593Smuzhiyun return true;
138*4882a593Smuzhiyun default:
139*4882a593Smuzhiyun return false;
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun
lochnagar2_volatile_register(struct device * dev,unsigned int reg)143*4882a593Smuzhiyun static bool lochnagar2_volatile_register(struct device *dev, unsigned int reg)
144*4882a593Smuzhiyun {
145*4882a593Smuzhiyun switch (reg) {
146*4882a593Smuzhiyun case LOCHNAGAR2_GPIO_CHANNEL1...LOCHNAGAR2_GPIO_CHANNEL16:
147*4882a593Smuzhiyun case LOCHNAGAR2_ANALOGUE_PATH_CTRL1:
148*4882a593Smuzhiyun case LOCHNAGAR2_IMON_CTRL3...LOCHNAGAR2_IMON_CTRL4:
149*4882a593Smuzhiyun case LOCHNAGAR2_IMON_DATA1...LOCHNAGAR2_IMON_DATA2:
150*4882a593Smuzhiyun return true;
151*4882a593Smuzhiyun default:
152*4882a593Smuzhiyun return false;
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun static const struct regmap_config lochnagar2_i2c_regmap = {
157*4882a593Smuzhiyun .reg_bits = 16,
158*4882a593Smuzhiyun .val_bits = 16,
159*4882a593Smuzhiyun .reg_format_endian = REGMAP_ENDIAN_BIG,
160*4882a593Smuzhiyun .val_format_endian = REGMAP_ENDIAN_BIG,
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun .max_register = 0x1F1F,
163*4882a593Smuzhiyun .readable_reg = lochnagar2_readable_register,
164*4882a593Smuzhiyun .volatile_reg = lochnagar2_volatile_register,
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
167*4882a593Smuzhiyun };
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun static const struct reg_sequence lochnagar2_patch[] = {
170*4882a593Smuzhiyun { 0x00EE, 0x0000 },
171*4882a593Smuzhiyun };
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun struct lochnagar_config {
174*4882a593Smuzhiyun int id;
175*4882a593Smuzhiyun const char * const name;
176*4882a593Smuzhiyun enum lochnagar_type type;
177*4882a593Smuzhiyun const struct regmap_config *regmap;
178*4882a593Smuzhiyun const struct reg_sequence *patch;
179*4882a593Smuzhiyun int npatch;
180*4882a593Smuzhiyun };
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun static struct lochnagar_config lochnagar_configs[] = {
183*4882a593Smuzhiyun {
184*4882a593Smuzhiyun .id = 0x50,
185*4882a593Smuzhiyun .name = "lochnagar1",
186*4882a593Smuzhiyun .type = LOCHNAGAR1,
187*4882a593Smuzhiyun .regmap = &lochnagar1_i2c_regmap,
188*4882a593Smuzhiyun .patch = lochnagar1_patch,
189*4882a593Smuzhiyun .npatch = ARRAY_SIZE(lochnagar1_patch),
190*4882a593Smuzhiyun },
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun .id = 0xCB58,
193*4882a593Smuzhiyun .name = "lochnagar2",
194*4882a593Smuzhiyun .type = LOCHNAGAR2,
195*4882a593Smuzhiyun .regmap = &lochnagar2_i2c_regmap,
196*4882a593Smuzhiyun .patch = lochnagar2_patch,
197*4882a593Smuzhiyun .npatch = ARRAY_SIZE(lochnagar2_patch),
198*4882a593Smuzhiyun },
199*4882a593Smuzhiyun };
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun static const struct of_device_id lochnagar_of_match[] = {
202*4882a593Smuzhiyun { .compatible = "cirrus,lochnagar1", .data = &lochnagar_configs[0] },
203*4882a593Smuzhiyun { .compatible = "cirrus,lochnagar2", .data = &lochnagar_configs[1] },
204*4882a593Smuzhiyun {},
205*4882a593Smuzhiyun };
206*4882a593Smuzhiyun
lochnagar_wait_for_boot(struct regmap * regmap,unsigned int * id)207*4882a593Smuzhiyun static int lochnagar_wait_for_boot(struct regmap *regmap, unsigned int *id)
208*4882a593Smuzhiyun {
209*4882a593Smuzhiyun int i, ret;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun for (i = 0; i < LOCHNAGAR_BOOT_RETRIES; ++i) {
212*4882a593Smuzhiyun msleep(LOCHNAGAR_BOOT_DELAY_MS);
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun /* The reset register will return the device ID when read */
215*4882a593Smuzhiyun ret = regmap_read(regmap, LOCHNAGAR_SOFTWARE_RESET, id);
216*4882a593Smuzhiyun if (!ret)
217*4882a593Smuzhiyun return ret;
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun return -ETIMEDOUT;
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun /**
224*4882a593Smuzhiyun * lochnagar_update_config - Synchronise the boards analogue configuration to
225*4882a593Smuzhiyun * the hardware.
226*4882a593Smuzhiyun *
227*4882a593Smuzhiyun * @lochnagar: A pointer to the primary core data structure.
228*4882a593Smuzhiyun *
229*4882a593Smuzhiyun * Return: Zero on success or an appropriate negative error code on failure.
230*4882a593Smuzhiyun */
lochnagar_update_config(struct lochnagar * lochnagar)231*4882a593Smuzhiyun int lochnagar_update_config(struct lochnagar *lochnagar)
232*4882a593Smuzhiyun {
233*4882a593Smuzhiyun struct regmap *regmap = lochnagar->regmap;
234*4882a593Smuzhiyun unsigned int done = LOCHNAGAR2_ANALOGUE_PATH_UPDATE_STS_MASK;
235*4882a593Smuzhiyun int timeout_ms = LOCHNAGAR_BOOT_DELAY_MS * LOCHNAGAR_BOOT_RETRIES;
236*4882a593Smuzhiyun unsigned int val = 0;
237*4882a593Smuzhiyun int ret;
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun lockdep_assert_held(&lochnagar->analogue_config_lock);
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun if (lochnagar->type != LOCHNAGAR2)
242*4882a593Smuzhiyun return 0;
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun /*
245*4882a593Smuzhiyun * Toggle the ANALOGUE_PATH_UPDATE bit and wait for the device to
246*4882a593Smuzhiyun * acknowledge that any outstanding changes to the analogue
247*4882a593Smuzhiyun * configuration have been applied.
248*4882a593Smuzhiyun */
249*4882a593Smuzhiyun ret = regmap_write(regmap, LOCHNAGAR2_ANALOGUE_PATH_CTRL1, 0);
250*4882a593Smuzhiyun if (ret < 0)
251*4882a593Smuzhiyun return ret;
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun ret = regmap_write(regmap, LOCHNAGAR2_ANALOGUE_PATH_CTRL1,
254*4882a593Smuzhiyun LOCHNAGAR2_ANALOGUE_PATH_UPDATE_MASK);
255*4882a593Smuzhiyun if (ret < 0)
256*4882a593Smuzhiyun return ret;
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun ret = regmap_read_poll_timeout(regmap,
259*4882a593Smuzhiyun LOCHNAGAR2_ANALOGUE_PATH_CTRL1, val,
260*4882a593Smuzhiyun (val & done), LOCHNAGAR_CONFIG_POLL_US,
261*4882a593Smuzhiyun timeout_ms * 1000);
262*4882a593Smuzhiyun if (ret < 0)
263*4882a593Smuzhiyun return ret;
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun return 0;
266*4882a593Smuzhiyun }
267*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(lochnagar_update_config);
268*4882a593Smuzhiyun
lochnagar_i2c_probe(struct i2c_client * i2c)269*4882a593Smuzhiyun static int lochnagar_i2c_probe(struct i2c_client *i2c)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun struct device *dev = &i2c->dev;
272*4882a593Smuzhiyun const struct lochnagar_config *config = NULL;
273*4882a593Smuzhiyun const struct of_device_id *of_id;
274*4882a593Smuzhiyun struct lochnagar *lochnagar;
275*4882a593Smuzhiyun struct gpio_desc *reset, *present;
276*4882a593Smuzhiyun unsigned int val;
277*4882a593Smuzhiyun unsigned int firmwareid;
278*4882a593Smuzhiyun unsigned int devid, rev;
279*4882a593Smuzhiyun int ret;
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun lochnagar = devm_kzalloc(dev, sizeof(*lochnagar), GFP_KERNEL);
282*4882a593Smuzhiyun if (!lochnagar)
283*4882a593Smuzhiyun return -ENOMEM;
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun of_id = of_match_device(lochnagar_of_match, dev);
286*4882a593Smuzhiyun if (!of_id)
287*4882a593Smuzhiyun return -EINVAL;
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun config = of_id->data;
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun lochnagar->dev = dev;
292*4882a593Smuzhiyun mutex_init(&lochnagar->analogue_config_lock);
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun dev_set_drvdata(dev, lochnagar);
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
297*4882a593Smuzhiyun if (IS_ERR(reset)) {
298*4882a593Smuzhiyun ret = PTR_ERR(reset);
299*4882a593Smuzhiyun dev_err(dev, "Failed to get reset GPIO: %d\n", ret);
300*4882a593Smuzhiyun return ret;
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun present = devm_gpiod_get_optional(dev, "present", GPIOD_OUT_HIGH);
304*4882a593Smuzhiyun if (IS_ERR(present)) {
305*4882a593Smuzhiyun ret = PTR_ERR(present);
306*4882a593Smuzhiyun dev_err(dev, "Failed to get present GPIO: %d\n", ret);
307*4882a593Smuzhiyun return ret;
308*4882a593Smuzhiyun }
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun /* Leave the Lochnagar in reset for a reasonable amount of time */
311*4882a593Smuzhiyun msleep(20);
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun /* Bring Lochnagar out of reset */
314*4882a593Smuzhiyun gpiod_set_value_cansleep(reset, 1);
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun /* Identify Lochnagar */
317*4882a593Smuzhiyun lochnagar->type = config->type;
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun lochnagar->regmap = devm_regmap_init_i2c(i2c, config->regmap);
320*4882a593Smuzhiyun if (IS_ERR(lochnagar->regmap)) {
321*4882a593Smuzhiyun ret = PTR_ERR(lochnagar->regmap);
322*4882a593Smuzhiyun dev_err(dev, "Failed to allocate register map: %d\n", ret);
323*4882a593Smuzhiyun return ret;
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun /* Wait for Lochnagar to boot */
327*4882a593Smuzhiyun ret = lochnagar_wait_for_boot(lochnagar->regmap, &val);
328*4882a593Smuzhiyun if (ret < 0) {
329*4882a593Smuzhiyun dev_err(dev, "Failed to read device ID: %d\n", ret);
330*4882a593Smuzhiyun return ret;
331*4882a593Smuzhiyun }
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun devid = val & LOCHNAGAR_DEVICE_ID_MASK;
334*4882a593Smuzhiyun rev = val & LOCHNAGAR_REV_ID_MASK;
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun if (devid != config->id) {
337*4882a593Smuzhiyun dev_err(dev,
338*4882a593Smuzhiyun "ID does not match %s (expected 0x%x got 0x%x)\n",
339*4882a593Smuzhiyun config->name, config->id, devid);
340*4882a593Smuzhiyun return -ENODEV;
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun /* Identify firmware */
344*4882a593Smuzhiyun ret = regmap_read(lochnagar->regmap, LOCHNAGAR_FIRMWARE_ID1, &val);
345*4882a593Smuzhiyun if (ret < 0) {
346*4882a593Smuzhiyun dev_err(dev, "Failed to read firmware id 1: %d\n", ret);
347*4882a593Smuzhiyun return ret;
348*4882a593Smuzhiyun }
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun firmwareid = val;
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun ret = regmap_read(lochnagar->regmap, LOCHNAGAR_FIRMWARE_ID2, &val);
353*4882a593Smuzhiyun if (ret < 0) {
354*4882a593Smuzhiyun dev_err(dev, "Failed to read firmware id 2: %d\n", ret);
355*4882a593Smuzhiyun return ret;
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun firmwareid |= (val << config->regmap->val_bits);
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun dev_info(dev, "Found %s (0x%x) revision %u firmware 0x%.6x\n",
361*4882a593Smuzhiyun config->name, devid, rev + 1, firmwareid);
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun ret = regmap_register_patch(lochnagar->regmap, config->patch,
364*4882a593Smuzhiyun config->npatch);
365*4882a593Smuzhiyun if (ret < 0) {
366*4882a593Smuzhiyun dev_err(dev, "Failed to register patch: %d\n", ret);
367*4882a593Smuzhiyun return ret;
368*4882a593Smuzhiyun }
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun ret = devm_of_platform_populate(dev);
371*4882a593Smuzhiyun if (ret < 0) {
372*4882a593Smuzhiyun dev_err(dev, "Failed to populate child nodes: %d\n", ret);
373*4882a593Smuzhiyun return ret;
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun return ret;
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun static struct i2c_driver lochnagar_i2c_driver = {
380*4882a593Smuzhiyun .driver = {
381*4882a593Smuzhiyun .name = "lochnagar",
382*4882a593Smuzhiyun .of_match_table = of_match_ptr(lochnagar_of_match),
383*4882a593Smuzhiyun .suppress_bind_attrs = true,
384*4882a593Smuzhiyun },
385*4882a593Smuzhiyun .probe_new = lochnagar_i2c_probe,
386*4882a593Smuzhiyun };
387*4882a593Smuzhiyun
lochnagar_i2c_init(void)388*4882a593Smuzhiyun static int __init lochnagar_i2c_init(void)
389*4882a593Smuzhiyun {
390*4882a593Smuzhiyun int ret;
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun ret = i2c_add_driver(&lochnagar_i2c_driver);
393*4882a593Smuzhiyun if (ret)
394*4882a593Smuzhiyun pr_err("Failed to register Lochnagar driver: %d\n", ret);
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun return ret;
397*4882a593Smuzhiyun }
398*4882a593Smuzhiyun subsys_initcall(lochnagar_i2c_init);
399