1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * I2C driver for Marvell 88PM80x
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2012 Marvell International Ltd.
6*4882a593Smuzhiyun * Haojian Zhuang <haojian.zhuang@marvell.com>
7*4882a593Smuzhiyun * Joseph(Yossi) Hanin <yhanin@marvell.com>
8*4882a593Smuzhiyun * Qiao Zhou <zhouqiao@marvell.com>
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/i2c.h>
13*4882a593Smuzhiyun #include <linux/mfd/88pm80x.h>
14*4882a593Smuzhiyun #include <linux/slab.h>
15*4882a593Smuzhiyun #include <linux/uaccess.h>
16*4882a593Smuzhiyun #include <linux/err.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun /* 88pm80x chips have same definition for chip id register. */
19*4882a593Smuzhiyun #define PM80X_CHIP_ID (0x00)
20*4882a593Smuzhiyun #define PM80X_CHIP_ID_NUM(x) (((x) >> 5) & 0x7)
21*4882a593Smuzhiyun #define PM80X_CHIP_ID_REVISION(x) ((x) & 0x1F)
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun struct pm80x_chip_mapping {
24*4882a593Smuzhiyun unsigned int id;
25*4882a593Smuzhiyun int type;
26*4882a593Smuzhiyun };
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun static struct pm80x_chip_mapping chip_mapping[] = {
29*4882a593Smuzhiyun /* 88PM800 chip id number */
30*4882a593Smuzhiyun {0x3, CHIP_PM800},
31*4882a593Smuzhiyun /* 88PM805 chip id number */
32*4882a593Smuzhiyun {0x0, CHIP_PM805},
33*4882a593Smuzhiyun /* 88PM860 chip id number */
34*4882a593Smuzhiyun {0x4, CHIP_PM860},
35*4882a593Smuzhiyun };
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun /*
38*4882a593Smuzhiyun * workaround: some registers needed by pm805 are defined in pm800, so
39*4882a593Smuzhiyun * need to use this global variable to maintain the relation between
40*4882a593Smuzhiyun * pm800 and pm805. would remove it after HW chip fixes the issue.
41*4882a593Smuzhiyun */
42*4882a593Smuzhiyun static struct pm80x_chip *g_pm80x_chip;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun const struct regmap_config pm80x_regmap_config = {
45*4882a593Smuzhiyun .reg_bits = 8,
46*4882a593Smuzhiyun .val_bits = 8,
47*4882a593Smuzhiyun };
48*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(pm80x_regmap_config);
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun
pm80x_init(struct i2c_client * client)51*4882a593Smuzhiyun int pm80x_init(struct i2c_client *client)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun struct pm80x_chip *chip;
54*4882a593Smuzhiyun struct regmap *map;
55*4882a593Smuzhiyun unsigned int val;
56*4882a593Smuzhiyun int i, ret = 0;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun chip =
59*4882a593Smuzhiyun devm_kzalloc(&client->dev, sizeof(struct pm80x_chip), GFP_KERNEL);
60*4882a593Smuzhiyun if (!chip)
61*4882a593Smuzhiyun return -ENOMEM;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun map = devm_regmap_init_i2c(client, &pm80x_regmap_config);
64*4882a593Smuzhiyun if (IS_ERR(map)) {
65*4882a593Smuzhiyun ret = PTR_ERR(map);
66*4882a593Smuzhiyun dev_err(&client->dev, "Failed to allocate register map: %d\n",
67*4882a593Smuzhiyun ret);
68*4882a593Smuzhiyun return ret;
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun chip->client = client;
72*4882a593Smuzhiyun chip->regmap = map;
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun chip->irq = client->irq;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun chip->dev = &client->dev;
77*4882a593Smuzhiyun dev_set_drvdata(chip->dev, chip);
78*4882a593Smuzhiyun i2c_set_clientdata(chip->client, chip);
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun ret = regmap_read(chip->regmap, PM80X_CHIP_ID, &val);
81*4882a593Smuzhiyun if (ret < 0) {
82*4882a593Smuzhiyun dev_err(chip->dev, "Failed to read CHIP ID: %d\n", ret);
83*4882a593Smuzhiyun return ret;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(chip_mapping); i++) {
87*4882a593Smuzhiyun if (chip_mapping[i].id == PM80X_CHIP_ID_NUM(val)) {
88*4882a593Smuzhiyun chip->type = chip_mapping[i].type;
89*4882a593Smuzhiyun break;
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun if (i == ARRAY_SIZE(chip_mapping)) {
94*4882a593Smuzhiyun dev_err(chip->dev,
95*4882a593Smuzhiyun "Failed to detect Marvell 88PM800:ChipID[0x%x]\n", val);
96*4882a593Smuzhiyun return -EINVAL;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun device_init_wakeup(&client->dev, 1);
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun /*
102*4882a593Smuzhiyun * workaround: set g_pm80x_chip to the first probed chip. if the
103*4882a593Smuzhiyun * second chip is probed, just point to the companion to each
104*4882a593Smuzhiyun * other so that pm805 can access those specific register. would
105*4882a593Smuzhiyun * remove it after HW chip fixes the issue.
106*4882a593Smuzhiyun */
107*4882a593Smuzhiyun if (!g_pm80x_chip)
108*4882a593Smuzhiyun g_pm80x_chip = chip;
109*4882a593Smuzhiyun else {
110*4882a593Smuzhiyun chip->companion = g_pm80x_chip->client;
111*4882a593Smuzhiyun g_pm80x_chip->companion = chip->client;
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun return 0;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(pm80x_init);
117*4882a593Smuzhiyun
pm80x_deinit(void)118*4882a593Smuzhiyun int pm80x_deinit(void)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun /*
121*4882a593Smuzhiyun * workaround: clear the dependency between pm800 and pm805.
122*4882a593Smuzhiyun * would remove it after HW chip fixes the issue.
123*4882a593Smuzhiyun */
124*4882a593Smuzhiyun if (g_pm80x_chip->companion)
125*4882a593Smuzhiyun g_pm80x_chip->companion = NULL;
126*4882a593Smuzhiyun else
127*4882a593Smuzhiyun g_pm80x_chip = NULL;
128*4882a593Smuzhiyun return 0;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(pm80x_deinit);
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
pm80x_suspend(struct device * dev)133*4882a593Smuzhiyun static int pm80x_suspend(struct device *dev)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun struct i2c_client *client = to_i2c_client(dev);
136*4882a593Smuzhiyun struct pm80x_chip *chip = i2c_get_clientdata(client);
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun if (chip && chip->wu_flag)
139*4882a593Smuzhiyun if (device_may_wakeup(chip->dev))
140*4882a593Smuzhiyun enable_irq_wake(chip->irq);
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun return 0;
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun
pm80x_resume(struct device * dev)145*4882a593Smuzhiyun static int pm80x_resume(struct device *dev)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun struct i2c_client *client = to_i2c_client(dev);
148*4882a593Smuzhiyun struct pm80x_chip *chip = i2c_get_clientdata(client);
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun if (chip && chip->wu_flag)
151*4882a593Smuzhiyun if (device_may_wakeup(chip->dev))
152*4882a593Smuzhiyun disable_irq_wake(chip->irq);
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun return 0;
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun #endif
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun SIMPLE_DEV_PM_OPS(pm80x_pm_ops, pm80x_suspend, pm80x_resume);
159*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(pm80x_pm_ops);
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun MODULE_DESCRIPTION("I2C Driver for Marvell 88PM80x");
162*4882a593Smuzhiyun MODULE_AUTHOR("Qiao Zhou <zhouqiao@marvell.com>");
163*4882a593Smuzhiyun MODULE_LICENSE("GPL");
164