1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * linux/drivers/message/fusion/mptbase.h 3*4882a593Smuzhiyun * High performance SCSI + LAN / Fibre Channel device drivers. 4*4882a593Smuzhiyun * For use with PCI chip/adapter(s): 5*4882a593Smuzhiyun * LSIFC9xx/LSI409xx Fibre Channel 6*4882a593Smuzhiyun * running LSI Fusion MPT (Message Passing Technology) firmware. 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Copyright (c) 1999-2008 LSI Corporation 9*4882a593Smuzhiyun * (mailto:DL-MPTFusionLinux@lsi.com) 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun */ 12*4882a593Smuzhiyun /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ 13*4882a593Smuzhiyun /* 14*4882a593Smuzhiyun This program is free software; you can redistribute it and/or modify 15*4882a593Smuzhiyun it under the terms of the GNU General Public License as published by 16*4882a593Smuzhiyun the Free Software Foundation; version 2 of the License. 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun This program is distributed in the hope that it will be useful, 19*4882a593Smuzhiyun but WITHOUT ANY WARRANTY; without even the implied warranty of 20*4882a593Smuzhiyun MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21*4882a593Smuzhiyun GNU General Public License for more details. 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun NO WARRANTY 24*4882a593Smuzhiyun THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 25*4882a593Smuzhiyun CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 26*4882a593Smuzhiyun LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 27*4882a593Smuzhiyun MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 28*4882a593Smuzhiyun solely responsible for determining the appropriateness of using and 29*4882a593Smuzhiyun distributing the Program and assumes all risks associated with its 30*4882a593Smuzhiyun exercise of rights under this Agreement, including but not limited to 31*4882a593Smuzhiyun the risks and costs of program errors, damage to or loss of data, 32*4882a593Smuzhiyun programs or equipment, and unavailability or interruption of operations. 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun DISCLAIMER OF LIABILITY 35*4882a593Smuzhiyun NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 36*4882a593Smuzhiyun DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 37*4882a593Smuzhiyun DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 38*4882a593Smuzhiyun ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 39*4882a593Smuzhiyun TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 40*4882a593Smuzhiyun USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 41*4882a593Smuzhiyun HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun You should have received a copy of the GNU General Public License 44*4882a593Smuzhiyun along with this program; if not, write to the Free Software 45*4882a593Smuzhiyun Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 46*4882a593Smuzhiyun */ 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun #ifndef MPTBASE_H_INCLUDED 49*4882a593Smuzhiyun #define MPTBASE_H_INCLUDED 50*4882a593Smuzhiyun /*{-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun #include <linux/kernel.h> 53*4882a593Smuzhiyun #include <linux/pci.h> 54*4882a593Smuzhiyun #include <linux/mutex.h> 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun #include "lsi/mpi_type.h" 57*4882a593Smuzhiyun #include "lsi/mpi.h" /* Fusion MPI(nterface) basic defs */ 58*4882a593Smuzhiyun #include "lsi/mpi_ioc.h" /* Fusion MPT IOC(ontroller) defs */ 59*4882a593Smuzhiyun #include "lsi/mpi_cnfg.h" /* IOC configuration support */ 60*4882a593Smuzhiyun #include "lsi/mpi_init.h" /* SCSI Host (initiator) protocol support */ 61*4882a593Smuzhiyun #include "lsi/mpi_lan.h" /* LAN over FC protocol support */ 62*4882a593Smuzhiyun #include "lsi/mpi_raid.h" /* Integrated Mirroring support */ 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun #include "lsi/mpi_fc.h" /* Fibre Channel (lowlevel) support */ 65*4882a593Smuzhiyun #include "lsi/mpi_targ.h" /* SCSI/FCP Target protcol support */ 66*4882a593Smuzhiyun #include "lsi/mpi_tool.h" /* Tools support */ 67*4882a593Smuzhiyun #include "lsi/mpi_sas.h" /* SAS support */ 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun #ifndef MODULEAUTHOR 72*4882a593Smuzhiyun #define MODULEAUTHOR "LSI Corporation" 73*4882a593Smuzhiyun #endif 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun #ifndef COPYRIGHT 76*4882a593Smuzhiyun #define COPYRIGHT "Copyright (c) 1999-2008 " MODULEAUTHOR 77*4882a593Smuzhiyun #endif 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun #define MPT_LINUX_VERSION_COMMON "3.04.20" 80*4882a593Smuzhiyun #define MPT_LINUX_PACKAGE_NAME "@(#)mptlinux-3.04.20" 81*4882a593Smuzhiyun #define WHAT_MAGIC_STRING "@" "(" "#" ")" 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun #define show_mptmod_ver(s,ver) \ 84*4882a593Smuzhiyun printk(KERN_INFO "%s %s\n", s, ver); 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ 87*4882a593Smuzhiyun /* 88*4882a593Smuzhiyun * Fusion MPT(linux) driver configurable stuff... 89*4882a593Smuzhiyun */ 90*4882a593Smuzhiyun #define MPT_MAX_ADAPTERS 18 91*4882a593Smuzhiyun #define MPT_MAX_PROTOCOL_DRIVERS 16 92*4882a593Smuzhiyun #define MPT_MAX_CALLBACKNAME_LEN 49 93*4882a593Smuzhiyun #define MPT_MAX_BUS 1 /* Do not change */ 94*4882a593Smuzhiyun #define MPT_MAX_FC_DEVICES 255 95*4882a593Smuzhiyun #define MPT_MAX_SCSI_DEVICES 16 96*4882a593Smuzhiyun #define MPT_LAST_LUN 255 97*4882a593Smuzhiyun #define MPT_SENSE_BUFFER_ALLOC 64 98*4882a593Smuzhiyun /* allow for 256 max sense alloc, but only 255 max request */ 99*4882a593Smuzhiyun #if MPT_SENSE_BUFFER_ALLOC >= 256 100*4882a593Smuzhiyun # undef MPT_SENSE_BUFFER_ALLOC 101*4882a593Smuzhiyun # define MPT_SENSE_BUFFER_ALLOC 256 102*4882a593Smuzhiyun # define MPT_SENSE_BUFFER_SIZE 255 103*4882a593Smuzhiyun #else 104*4882a593Smuzhiyun # define MPT_SENSE_BUFFER_SIZE MPT_SENSE_BUFFER_ALLOC 105*4882a593Smuzhiyun #endif 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun #define MPT_NAME_LENGTH 32 108*4882a593Smuzhiyun #define MPT_KOBJ_NAME_LEN 20 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun #define MPT_PROCFS_MPTBASEDIR "mpt" 111*4882a593Smuzhiyun /* chg it to "driver/fusion" ? */ 112*4882a593Smuzhiyun #define MPT_PROCFS_SUMMARY_ALL_NODE MPT_PROCFS_MPTBASEDIR "/summary" 113*4882a593Smuzhiyun #define MPT_PROCFS_SUMMARY_ALL_PATHNAME "/proc/" MPT_PROCFS_SUMMARY_ALL_NODE 114*4882a593Smuzhiyun #define MPT_FW_REV_MAGIC_ID_STRING "FwRev=" 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun #define MPT_MAX_REQ_DEPTH 1023 117*4882a593Smuzhiyun #define MPT_DEFAULT_REQ_DEPTH 256 118*4882a593Smuzhiyun #define MPT_MIN_REQ_DEPTH 128 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun #define MPT_MAX_REPLY_DEPTH MPT_MAX_REQ_DEPTH 121*4882a593Smuzhiyun #define MPT_DEFAULT_REPLY_DEPTH 128 122*4882a593Smuzhiyun #define MPT_MIN_REPLY_DEPTH 8 123*4882a593Smuzhiyun #define MPT_MAX_REPLIES_PER_ISR 32 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun #define MPT_MAX_FRAME_SIZE 128 126*4882a593Smuzhiyun #define MPT_DEFAULT_FRAME_SIZE 128 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun #define MPT_REPLY_FRAME_SIZE 0x50 /* Must be a multiple of 8 */ 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun #define MPT_SG_REQ_128_SCALE 1 131*4882a593Smuzhiyun #define MPT_SG_REQ_96_SCALE 2 132*4882a593Smuzhiyun #define MPT_SG_REQ_64_SCALE 4 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun #define CAN_SLEEP 1 135*4882a593Smuzhiyun #define NO_SLEEP 0 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun #define MPT_COALESCING_TIMEOUT 0x10 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun /* 141*4882a593Smuzhiyun * SCSI transfer rate defines. 142*4882a593Smuzhiyun */ 143*4882a593Smuzhiyun #define MPT_ULTRA320 0x08 144*4882a593Smuzhiyun #define MPT_ULTRA160 0x09 145*4882a593Smuzhiyun #define MPT_ULTRA2 0x0A 146*4882a593Smuzhiyun #define MPT_ULTRA 0x0C 147*4882a593Smuzhiyun #define MPT_FAST 0x19 148*4882a593Smuzhiyun #define MPT_SCSI 0x32 149*4882a593Smuzhiyun #define MPT_ASYNC 0xFF 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun #define MPT_NARROW 0 152*4882a593Smuzhiyun #define MPT_WIDE 1 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun #define C0_1030 0x08 155*4882a593Smuzhiyun #define XL_929 0x01 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun /* 159*4882a593Smuzhiyun * Try to keep these at 2^N-1 160*4882a593Smuzhiyun */ 161*4882a593Smuzhiyun #define MPT_FC_CAN_QUEUE 1024 162*4882a593Smuzhiyun #define MPT_SCSI_CAN_QUEUE 127 163*4882a593Smuzhiyun #define MPT_SAS_CAN_QUEUE 127 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun /* 166*4882a593Smuzhiyun * Set the MAX_SGE value based on user input. 167*4882a593Smuzhiyun */ 168*4882a593Smuzhiyun #ifdef CONFIG_FUSION_MAX_SGE 169*4882a593Smuzhiyun #if CONFIG_FUSION_MAX_SGE < 16 170*4882a593Smuzhiyun #define MPT_SCSI_SG_DEPTH 16 171*4882a593Smuzhiyun #elif CONFIG_FUSION_MAX_SGE > 128 172*4882a593Smuzhiyun #define MPT_SCSI_SG_DEPTH 128 173*4882a593Smuzhiyun #else 174*4882a593Smuzhiyun #define MPT_SCSI_SG_DEPTH CONFIG_FUSION_MAX_SGE 175*4882a593Smuzhiyun #endif 176*4882a593Smuzhiyun #else 177*4882a593Smuzhiyun #define MPT_SCSI_SG_DEPTH 40 178*4882a593Smuzhiyun #endif 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun #ifdef CONFIG_FUSION_MAX_FC_SGE 181*4882a593Smuzhiyun #if CONFIG_FUSION_MAX_FC_SGE < 16 182*4882a593Smuzhiyun #define MPT_SCSI_FC_SG_DEPTH 16 183*4882a593Smuzhiyun #elif CONFIG_FUSION_MAX_FC_SGE > 256 184*4882a593Smuzhiyun #define MPT_SCSI_FC_SG_DEPTH 256 185*4882a593Smuzhiyun #else 186*4882a593Smuzhiyun #define MPT_SCSI_FC_SG_DEPTH CONFIG_FUSION_MAX_FC_SGE 187*4882a593Smuzhiyun #endif 188*4882a593Smuzhiyun #else 189*4882a593Smuzhiyun #define MPT_SCSI_FC_SG_DEPTH 40 190*4882a593Smuzhiyun #endif 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun /* debug print string length used for events and iocstatus */ 193*4882a593Smuzhiyun # define EVENT_DESCR_STR_SZ 100 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun #define MPT_POLLING_INTERVAL 1000 /* in milliseconds */ 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun #ifdef __KERNEL__ /* { */ 198*4882a593Smuzhiyun /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun #include <linux/proc_fs.h> 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ 203*4882a593Smuzhiyun /* 204*4882a593Smuzhiyun * Attempt semi-consistent error & warning msgs across 205*4882a593Smuzhiyun * MPT drivers. NOTE: Users of these macro defs must 206*4882a593Smuzhiyun * themselves define their own MYNAM. 207*4882a593Smuzhiyun */ 208*4882a593Smuzhiyun #define MYIOC_s_FMT MYNAM ": %s: " 209*4882a593Smuzhiyun #define MYIOC_s_DEBUG_FMT KERN_DEBUG MYNAM ": %s: " 210*4882a593Smuzhiyun #define MYIOC_s_INFO_FMT KERN_INFO MYNAM ": %s: " 211*4882a593Smuzhiyun #define MYIOC_s_NOTE_FMT KERN_NOTICE MYNAM ": %s: " 212*4882a593Smuzhiyun #define MYIOC_s_WARN_FMT KERN_WARNING MYNAM ": %s: WARNING - " 213*4882a593Smuzhiyun #define MYIOC_s_ERR_FMT KERN_ERR MYNAM ": %s: ERROR - " 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ 216*4882a593Smuzhiyun /* 217*4882a593Smuzhiyun * ATTO UL4D associated structures and defines 218*4882a593Smuzhiyun */ 219*4882a593Smuzhiyun #define ATTOFLAG_DISC 0x0001 220*4882a593Smuzhiyun #define ATTOFLAG_TAGGED 0x0002 221*4882a593Smuzhiyun #define ATTOFLAG_WIDE_ENB 0x0008 222*4882a593Smuzhiyun #define ATTOFLAG_ID_ENB 0x0010 223*4882a593Smuzhiyun #define ATTOFLAG_LUN_ENB 0x0060 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun typedef struct _ATTO_DEVICE_INFO 226*4882a593Smuzhiyun { 227*4882a593Smuzhiyun u8 Offset; /* 00h */ 228*4882a593Smuzhiyun u8 Period; /* 01h */ 229*4882a593Smuzhiyun u16 ATTOFlags; /* 02h */ 230*4882a593Smuzhiyun } ATTO_DEVICE_INFO, MPI_POINTER PTR_ATTO_DEVICE_INFO, 231*4882a593Smuzhiyun ATTODeviceInfo_t, MPI_POINTER pATTODeviceInfo_t; 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun typedef struct _ATTO_CONFIG_PAGE_SCSI_PORT_2 234*4882a593Smuzhiyun { 235*4882a593Smuzhiyun CONFIG_PAGE_HEADER Header; /* 00h */ 236*4882a593Smuzhiyun u16 PortFlags; /* 04h */ 237*4882a593Smuzhiyun u16 Unused1; /* 06h */ 238*4882a593Smuzhiyun u32 Unused2; /* 08h */ 239*4882a593Smuzhiyun ATTO_DEVICE_INFO DeviceSettings[16]; /* 0Ch */ 240*4882a593Smuzhiyun } fATTO_CONFIG_PAGE_SCSI_PORT_2, MPI_POINTER PTR_ATTO_CONFIG_PAGE_SCSI_PORT_2, 241*4882a593Smuzhiyun ATTO_SCSIPortPage2_t, MPI_POINTER pATTO_SCSIPortPage2_t; 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun 244*4882a593Smuzhiyun /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ 245*4882a593Smuzhiyun /* 246*4882a593Smuzhiyun * MPT protocol driver defs... 247*4882a593Smuzhiyun */ 248*4882a593Smuzhiyun typedef enum { 249*4882a593Smuzhiyun MPTBASE_DRIVER, /* MPT base class */ 250*4882a593Smuzhiyun MPTCTL_DRIVER, /* MPT ioctl class */ 251*4882a593Smuzhiyun MPTSPI_DRIVER, /* MPT SPI host class */ 252*4882a593Smuzhiyun MPTFC_DRIVER, /* MPT FC host class */ 253*4882a593Smuzhiyun MPTSAS_DRIVER, /* MPT SAS host class */ 254*4882a593Smuzhiyun MPTLAN_DRIVER, /* MPT LAN class */ 255*4882a593Smuzhiyun MPTSTM_DRIVER, /* MPT SCSI target mode class */ 256*4882a593Smuzhiyun MPTUNKNOWN_DRIVER 257*4882a593Smuzhiyun } MPT_DRIVER_CLASS; 258*4882a593Smuzhiyun 259*4882a593Smuzhiyun struct mpt_pci_driver{ 260*4882a593Smuzhiyun int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); 261*4882a593Smuzhiyun void (*remove) (struct pci_dev *dev); 262*4882a593Smuzhiyun }; 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun /* 265*4882a593Smuzhiyun * MPT adapter / port / bus / device info structures... 266*4882a593Smuzhiyun */ 267*4882a593Smuzhiyun 268*4882a593Smuzhiyun typedef union _MPT_FRAME_TRACKER { 269*4882a593Smuzhiyun struct { 270*4882a593Smuzhiyun struct list_head list; 271*4882a593Smuzhiyun u32 arg1; 272*4882a593Smuzhiyun u32 pad; 273*4882a593Smuzhiyun void *argp1; 274*4882a593Smuzhiyun } linkage; 275*4882a593Smuzhiyun /* 276*4882a593Smuzhiyun * NOTE: When request frames are free, on the linkage structure 277*4882a593Smuzhiyun * contets are valid. All other values are invalid. 278*4882a593Smuzhiyun * In particular, do NOT reply on offset [2] 279*4882a593Smuzhiyun * (in words) being the * message context. 280*4882a593Smuzhiyun * The message context must be reset (computed via base address 281*4882a593Smuzhiyun * + an offset) prior to issuing any command. 282*4882a593Smuzhiyun * 283*4882a593Smuzhiyun * NOTE2: On non-32-bit systems, where pointers are LARGE, 284*4882a593Smuzhiyun * using the linkage pointers destroys our sacred MsgContext 285*4882a593Smuzhiyun * field contents. But we don't care anymore because these 286*4882a593Smuzhiyun * are now reset in mpt_put_msg_frame() just prior to sending 287*4882a593Smuzhiyun * a request off to the IOC. 288*4882a593Smuzhiyun */ 289*4882a593Smuzhiyun struct { 290*4882a593Smuzhiyun u32 __hdr[2]; 291*4882a593Smuzhiyun /* 292*4882a593Smuzhiyun * The following _MUST_ match the location of the 293*4882a593Smuzhiyun * MsgContext field in the MPT message headers. 294*4882a593Smuzhiyun */ 295*4882a593Smuzhiyun union { 296*4882a593Smuzhiyun u32 MsgContext; 297*4882a593Smuzhiyun struct { 298*4882a593Smuzhiyun u16 req_idx; /* Request index */ 299*4882a593Smuzhiyun u8 cb_idx; /* callback function index */ 300*4882a593Smuzhiyun u8 rsvd; 301*4882a593Smuzhiyun } fld; 302*4882a593Smuzhiyun } msgctxu; 303*4882a593Smuzhiyun } hwhdr; 304*4882a593Smuzhiyun /* 305*4882a593Smuzhiyun * Remark: 32 bit identifier: 306*4882a593Smuzhiyun * 31-24: reserved 307*4882a593Smuzhiyun * 23-16: call back index 308*4882a593Smuzhiyun * 15-0 : request index 309*4882a593Smuzhiyun */ 310*4882a593Smuzhiyun } MPT_FRAME_TRACKER; 311*4882a593Smuzhiyun 312*4882a593Smuzhiyun /* 313*4882a593Smuzhiyun * We might want to view/access a frame as: 314*4882a593Smuzhiyun * 1) generic request header 315*4882a593Smuzhiyun * 2) SCSIIORequest 316*4882a593Smuzhiyun * 3) SCSIIOReply 317*4882a593Smuzhiyun * 4) MPIDefaultReply 318*4882a593Smuzhiyun * 5) frame tracker 319*4882a593Smuzhiyun */ 320*4882a593Smuzhiyun typedef struct _MPT_FRAME_HDR { 321*4882a593Smuzhiyun union { 322*4882a593Smuzhiyun MPIHeader_t hdr; 323*4882a593Smuzhiyun SCSIIORequest_t scsireq; 324*4882a593Smuzhiyun SCSIIOReply_t sreply; 325*4882a593Smuzhiyun ConfigReply_t configreply; 326*4882a593Smuzhiyun MPIDefaultReply_t reply; 327*4882a593Smuzhiyun MPT_FRAME_TRACKER frame; 328*4882a593Smuzhiyun } u; 329*4882a593Smuzhiyun } MPT_FRAME_HDR; 330*4882a593Smuzhiyun 331*4882a593Smuzhiyun #define MPT_REQ_MSGFLAGS_DROPME 0x80 332*4882a593Smuzhiyun 333*4882a593Smuzhiyun typedef struct _MPT_SGL_HDR { 334*4882a593Smuzhiyun SGESimple32_t sge[1]; 335*4882a593Smuzhiyun } MPT_SGL_HDR; 336*4882a593Smuzhiyun 337*4882a593Smuzhiyun typedef struct _MPT_SGL64_HDR { 338*4882a593Smuzhiyun SGESimple64_t sge[1]; 339*4882a593Smuzhiyun } MPT_SGL64_HDR; 340*4882a593Smuzhiyun 341*4882a593Smuzhiyun /* 342*4882a593Smuzhiyun * System interface register set 343*4882a593Smuzhiyun */ 344*4882a593Smuzhiyun 345*4882a593Smuzhiyun typedef struct _SYSIF_REGS 346*4882a593Smuzhiyun { 347*4882a593Smuzhiyun u32 Doorbell; /* 00 System<->IOC Doorbell reg */ 348*4882a593Smuzhiyun u32 WriteSequence; /* 04 Write Sequence register */ 349*4882a593Smuzhiyun u32 Diagnostic; /* 08 Diagnostic register */ 350*4882a593Smuzhiyun u32 TestBase; /* 0C Test Base Address */ 351*4882a593Smuzhiyun u32 DiagRwData; /* 10 Read Write Data (fw download) */ 352*4882a593Smuzhiyun u32 DiagRwAddress; /* 14 Read Write Address (fw download)*/ 353*4882a593Smuzhiyun u32 Reserved1[6]; /* 18-2F reserved for future use */ 354*4882a593Smuzhiyun u32 IntStatus; /* 30 Interrupt Status */ 355*4882a593Smuzhiyun u32 IntMask; /* 34 Interrupt Mask */ 356*4882a593Smuzhiyun u32 Reserved2[2]; /* 38-3F reserved for future use */ 357*4882a593Smuzhiyun u32 RequestFifo; /* 40 Request Post/Free FIFO */ 358*4882a593Smuzhiyun u32 ReplyFifo; /* 44 Reply Post/Free FIFO */ 359*4882a593Smuzhiyun u32 RequestHiPriFifo; /* 48 Hi Priority Request FIFO */ 360*4882a593Smuzhiyun u32 Reserved3; /* 4C-4F reserved for future use */ 361*4882a593Smuzhiyun u32 HostIndex; /* 50 Host Index register */ 362*4882a593Smuzhiyun u32 Reserved4[15]; /* 54-8F */ 363*4882a593Smuzhiyun u32 Fubar; /* 90 For Fubar usage */ 364*4882a593Smuzhiyun u32 Reserved5[1050];/* 94-10F8 */ 365*4882a593Smuzhiyun u32 Reset_1078; /* 10FC Reset 1078 */ 366*4882a593Smuzhiyun } SYSIF_REGS; 367*4882a593Smuzhiyun 368*4882a593Smuzhiyun /* 369*4882a593Smuzhiyun * NOTE: Use MPI_{DOORBELL,WRITESEQ,DIAG}_xxx defs in lsi/mpi.h 370*4882a593Smuzhiyun * in conjunction with SYSIF_REGS accesses! 371*4882a593Smuzhiyun */ 372*4882a593Smuzhiyun 373*4882a593Smuzhiyun 374*4882a593Smuzhiyun /* 375*4882a593Smuzhiyun * Dynamic Multi-Pathing specific stuff... 376*4882a593Smuzhiyun */ 377*4882a593Smuzhiyun 378*4882a593Smuzhiyun /* VirtTarget negoFlags field */ 379*4882a593Smuzhiyun #define MPT_TARGET_NO_NEGO_WIDE 0x01 380*4882a593Smuzhiyun #define MPT_TARGET_NO_NEGO_SYNC 0x02 381*4882a593Smuzhiyun #define MPT_TARGET_NO_NEGO_QAS 0x04 382*4882a593Smuzhiyun #define MPT_TAPE_NEGO_IDP 0x08 383*4882a593Smuzhiyun 384*4882a593Smuzhiyun /* 385*4882a593Smuzhiyun * VirtDevice - FC LUN device or SCSI target device 386*4882a593Smuzhiyun */ 387*4882a593Smuzhiyun typedef struct _VirtTarget { 388*4882a593Smuzhiyun struct scsi_target *starget; 389*4882a593Smuzhiyun u8 tflags; 390*4882a593Smuzhiyun u8 ioc_id; 391*4882a593Smuzhiyun u8 id; 392*4882a593Smuzhiyun u8 channel; 393*4882a593Smuzhiyun u8 minSyncFactor; /* 0xFF is async */ 394*4882a593Smuzhiyun u8 maxOffset; /* 0 if async */ 395*4882a593Smuzhiyun u8 maxWidth; /* 0 if narrow, 1 if wide */ 396*4882a593Smuzhiyun u8 negoFlags; /* bit field, see above */ 397*4882a593Smuzhiyun u8 raidVolume; /* set, if RAID Volume */ 398*4882a593Smuzhiyun u8 type; /* byte 0 of Inquiry data */ 399*4882a593Smuzhiyun u8 deleted; /* target in process of being removed */ 400*4882a593Smuzhiyun u8 inDMD; /* currently in the device 401*4882a593Smuzhiyun removal delay timer */ 402*4882a593Smuzhiyun u32 num_luns; 403*4882a593Smuzhiyun } VirtTarget; 404*4882a593Smuzhiyun 405*4882a593Smuzhiyun typedef struct _VirtDevice { 406*4882a593Smuzhiyun VirtTarget *vtarget; 407*4882a593Smuzhiyun u8 configured_lun; 408*4882a593Smuzhiyun u64 lun; 409*4882a593Smuzhiyun } VirtDevice; 410*4882a593Smuzhiyun 411*4882a593Smuzhiyun /* 412*4882a593Smuzhiyun * Fibre Channel (SCSI) target device and associated defines... 413*4882a593Smuzhiyun */ 414*4882a593Smuzhiyun #define MPT_TARGET_DEFAULT_DV_STATUS 0x00 415*4882a593Smuzhiyun #define MPT_TARGET_FLAGS_VALID_NEGO 0x01 416*4882a593Smuzhiyun #define MPT_TARGET_FLAGS_VALID_INQUIRY 0x02 417*4882a593Smuzhiyun #define MPT_TARGET_FLAGS_Q_YES 0x08 418*4882a593Smuzhiyun #define MPT_TARGET_FLAGS_VALID_56 0x10 419*4882a593Smuzhiyun #define MPT_TARGET_FLAGS_SAF_TE_ISSUED 0x20 420*4882a593Smuzhiyun #define MPT_TARGET_FLAGS_RAID_COMPONENT 0x40 421*4882a593Smuzhiyun #define MPT_TARGET_FLAGS_LED_ON 0x80 422*4882a593Smuzhiyun 423*4882a593Smuzhiyun /* 424*4882a593Smuzhiyun * IOCTL structure and associated defines 425*4882a593Smuzhiyun */ 426*4882a593Smuzhiyun 427*4882a593Smuzhiyun #define MPTCTL_RESET_OK 0x01 /* Issue Bus Reset */ 428*4882a593Smuzhiyun 429*4882a593Smuzhiyun #define MPT_MGMT_STATUS_RF_VALID 0x01 /* The Reply Frame is VALID */ 430*4882a593Smuzhiyun #define MPT_MGMT_STATUS_COMMAND_GOOD 0x02 /* Command Status GOOD */ 431*4882a593Smuzhiyun #define MPT_MGMT_STATUS_PENDING 0x04 /* command is pending */ 432*4882a593Smuzhiyun #define MPT_MGMT_STATUS_DID_IOCRESET 0x08 /* IOC Reset occurred 433*4882a593Smuzhiyun on the current*/ 434*4882a593Smuzhiyun #define MPT_MGMT_STATUS_SENSE_VALID 0x10 /* valid sense info */ 435*4882a593Smuzhiyun #define MPT_MGMT_STATUS_TIMER_ACTIVE 0x20 /* obsolete */ 436*4882a593Smuzhiyun #define MPT_MGMT_STATUS_FREE_MF 0x40 /* free the mf from 437*4882a593Smuzhiyun complete routine */ 438*4882a593Smuzhiyun 439*4882a593Smuzhiyun #define INITIALIZE_MGMT_STATUS(status) \ 440*4882a593Smuzhiyun status = MPT_MGMT_STATUS_PENDING; 441*4882a593Smuzhiyun #define CLEAR_MGMT_STATUS(status) \ 442*4882a593Smuzhiyun status = 0; 443*4882a593Smuzhiyun #define CLEAR_MGMT_PENDING_STATUS(status) \ 444*4882a593Smuzhiyun status &= ~MPT_MGMT_STATUS_PENDING; 445*4882a593Smuzhiyun #define SET_MGMT_MSG_CONTEXT(msg_context, value) \ 446*4882a593Smuzhiyun msg_context = value; 447*4882a593Smuzhiyun 448*4882a593Smuzhiyun typedef struct _MPT_MGMT { 449*4882a593Smuzhiyun struct mutex mutex; 450*4882a593Smuzhiyun struct completion done; 451*4882a593Smuzhiyun u8 reply[MPT_DEFAULT_FRAME_SIZE]; /* reply frame data */ 452*4882a593Smuzhiyun u8 sense[MPT_SENSE_BUFFER_ALLOC]; 453*4882a593Smuzhiyun u8 status; /* current command status */ 454*4882a593Smuzhiyun int completion_code; 455*4882a593Smuzhiyun u32 msg_context; 456*4882a593Smuzhiyun } MPT_MGMT; 457*4882a593Smuzhiyun 458*4882a593Smuzhiyun /* 459*4882a593Smuzhiyun * Event Structure and define 460*4882a593Smuzhiyun */ 461*4882a593Smuzhiyun #define MPTCTL_EVENT_LOG_SIZE (0x000000032) 462*4882a593Smuzhiyun typedef struct _mpt_ioctl_events { 463*4882a593Smuzhiyun u32 event; /* Specified by define above */ 464*4882a593Smuzhiyun u32 eventContext; /* Index or counter */ 465*4882a593Smuzhiyun u32 data[2]; /* First 8 bytes of Event Data */ 466*4882a593Smuzhiyun } MPT_IOCTL_EVENTS; 467*4882a593Smuzhiyun 468*4882a593Smuzhiyun /* 469*4882a593Smuzhiyun * CONFIGPARM status defines 470*4882a593Smuzhiyun */ 471*4882a593Smuzhiyun #define MPT_CONFIG_GOOD MPI_IOCSTATUS_SUCCESS 472*4882a593Smuzhiyun #define MPT_CONFIG_ERROR 0x002F 473*4882a593Smuzhiyun 474*4882a593Smuzhiyun /* 475*4882a593Smuzhiyun * Substructure to store SCSI specific configuration page data 476*4882a593Smuzhiyun */ 477*4882a593Smuzhiyun /* dvStatus defines: */ 478*4882a593Smuzhiyun #define MPT_SCSICFG_USE_NVRAM 0x01 /* WriteSDP1 using NVRAM */ 479*4882a593Smuzhiyun #define MPT_SCSICFG_ALL_IDS 0x02 /* WriteSDP1 to all IDS */ 480*4882a593Smuzhiyun /* #define MPT_SCSICFG_BLK_NEGO 0x10 WriteSDP1 with WDTR and SDTR disabled */ 481*4882a593Smuzhiyun 482*4882a593Smuzhiyun typedef struct _SpiCfgData { 483*4882a593Smuzhiyun u32 PortFlags; 484*4882a593Smuzhiyun int *nvram; /* table of device NVRAM values */ 485*4882a593Smuzhiyun IOCPage4_t *pIocPg4; /* SEP devices addressing */ 486*4882a593Smuzhiyun dma_addr_t IocPg4_dma; /* Phys Addr of IOCPage4 data */ 487*4882a593Smuzhiyun int IocPg4Sz; /* IOCPage4 size */ 488*4882a593Smuzhiyun u8 minSyncFactor; /* 0xFF if async */ 489*4882a593Smuzhiyun u8 maxSyncOffset; /* 0 if async */ 490*4882a593Smuzhiyun u8 maxBusWidth; /* 0 if narrow, 1 if wide */ 491*4882a593Smuzhiyun u8 busType; /* SE, LVD, HD */ 492*4882a593Smuzhiyun u8 sdp1version; /* SDP1 version */ 493*4882a593Smuzhiyun u8 sdp1length; /* SDP1 length */ 494*4882a593Smuzhiyun u8 sdp0version; /* SDP0 version */ 495*4882a593Smuzhiyun u8 sdp0length; /* SDP0 length */ 496*4882a593Smuzhiyun u8 dvScheduled; /* 1 if scheduled */ 497*4882a593Smuzhiyun u8 noQas; /* Disable QAS for this adapter */ 498*4882a593Smuzhiyun u8 Saf_Te; /* 1 to force all Processors as 499*4882a593Smuzhiyun * SAF-TE if Inquiry data length 500*4882a593Smuzhiyun * is too short to check for SAF-TE 501*4882a593Smuzhiyun */ 502*4882a593Smuzhiyun u8 bus_reset; /* 1 to allow bus reset */ 503*4882a593Smuzhiyun u8 rsvd[1]; 504*4882a593Smuzhiyun }SpiCfgData; 505*4882a593Smuzhiyun 506*4882a593Smuzhiyun typedef struct _SasCfgData { 507*4882a593Smuzhiyun u8 ptClear; /* 1 to automatically clear the 508*4882a593Smuzhiyun * persistent table. 509*4882a593Smuzhiyun * 0 to disable 510*4882a593Smuzhiyun * automatic clearing. 511*4882a593Smuzhiyun */ 512*4882a593Smuzhiyun }SasCfgData; 513*4882a593Smuzhiyun 514*4882a593Smuzhiyun /* 515*4882a593Smuzhiyun * Inactive volume link list of raid component data 516*4882a593Smuzhiyun * @inactive_list 517*4882a593Smuzhiyun */ 518*4882a593Smuzhiyun struct inactive_raid_component_info { 519*4882a593Smuzhiyun struct list_head list; 520*4882a593Smuzhiyun u8 volumeID; /* volume target id */ 521*4882a593Smuzhiyun u8 volumeBus; /* volume channel */ 522*4882a593Smuzhiyun IOC_3_PHYS_DISK d; /* phys disk info */ 523*4882a593Smuzhiyun }; 524*4882a593Smuzhiyun 525*4882a593Smuzhiyun typedef struct _RaidCfgData { 526*4882a593Smuzhiyun IOCPage2_t *pIocPg2; /* table of Raid Volumes */ 527*4882a593Smuzhiyun IOCPage3_t *pIocPg3; /* table of physical disks */ 528*4882a593Smuzhiyun struct mutex inactive_list_mutex; 529*4882a593Smuzhiyun struct list_head inactive_list; /* link list for physical 530*4882a593Smuzhiyun disk that belong in 531*4882a593Smuzhiyun inactive volumes */ 532*4882a593Smuzhiyun }RaidCfgData; 533*4882a593Smuzhiyun 534*4882a593Smuzhiyun typedef struct _FcCfgData { 535*4882a593Smuzhiyun /* will ultimately hold fc_port_page0 also */ 536*4882a593Smuzhiyun struct { 537*4882a593Smuzhiyun FCPortPage1_t *data; 538*4882a593Smuzhiyun dma_addr_t dma; 539*4882a593Smuzhiyun int pg_sz; 540*4882a593Smuzhiyun } fc_port_page1[2]; 541*4882a593Smuzhiyun } FcCfgData; 542*4882a593Smuzhiyun 543*4882a593Smuzhiyun #define MPT_RPORT_INFO_FLAGS_REGISTERED 0x01 /* rport registered */ 544*4882a593Smuzhiyun #define MPT_RPORT_INFO_FLAGS_MISSING 0x02 /* missing from DevPage0 scan */ 545*4882a593Smuzhiyun 546*4882a593Smuzhiyun /* 547*4882a593Smuzhiyun * data allocated for each fc rport device 548*4882a593Smuzhiyun */ 549*4882a593Smuzhiyun struct mptfc_rport_info 550*4882a593Smuzhiyun { 551*4882a593Smuzhiyun struct list_head list; 552*4882a593Smuzhiyun struct fc_rport *rport; 553*4882a593Smuzhiyun struct scsi_target *starget; 554*4882a593Smuzhiyun FCDevicePage0_t pg0; 555*4882a593Smuzhiyun u8 flags; 556*4882a593Smuzhiyun }; 557*4882a593Smuzhiyun 558*4882a593Smuzhiyun /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ 559*4882a593Smuzhiyun 560*4882a593Smuzhiyun /* 561*4882a593Smuzhiyun * MPT_SCSI_HOST defines - Used by the IOCTL and the SCSI drivers 562*4882a593Smuzhiyun * Private to the driver. 563*4882a593Smuzhiyun */ 564*4882a593Smuzhiyun 565*4882a593Smuzhiyun #define MPT_HOST_BUS_UNKNOWN (0xFF) 566*4882a593Smuzhiyun #define MPT_HOST_TOO_MANY_TM (0x05) 567*4882a593Smuzhiyun #define MPT_HOST_NVRAM_INVALID (0xFFFFFFFF) 568*4882a593Smuzhiyun #define MPT_HOST_NO_CHAIN (0xFFFFFFFF) 569*4882a593Smuzhiyun #define MPT_NVRAM_MASK_TIMEOUT (0x000000FF) 570*4882a593Smuzhiyun #define MPT_NVRAM_SYNC_MASK (0x0000FF00) 571*4882a593Smuzhiyun #define MPT_NVRAM_SYNC_SHIFT (8) 572*4882a593Smuzhiyun #define MPT_NVRAM_DISCONNECT_ENABLE (0x00010000) 573*4882a593Smuzhiyun #define MPT_NVRAM_ID_SCAN_ENABLE (0x00020000) 574*4882a593Smuzhiyun #define MPT_NVRAM_LUN_SCAN_ENABLE (0x00040000) 575*4882a593Smuzhiyun #define MPT_NVRAM_TAG_QUEUE_ENABLE (0x00080000) 576*4882a593Smuzhiyun #define MPT_NVRAM_WIDE_DISABLE (0x00100000) 577*4882a593Smuzhiyun #define MPT_NVRAM_BOOT_CHOICE (0x00200000) 578*4882a593Smuzhiyun 579*4882a593Smuzhiyun typedef enum { 580*4882a593Smuzhiyun FC, 581*4882a593Smuzhiyun SPI, 582*4882a593Smuzhiyun SAS 583*4882a593Smuzhiyun } BUS_TYPE; 584*4882a593Smuzhiyun 585*4882a593Smuzhiyun typedef struct _MPT_SCSI_HOST { 586*4882a593Smuzhiyun struct _MPT_ADAPTER *ioc; 587*4882a593Smuzhiyun ushort sel_timeout[MPT_MAX_FC_DEVICES]; 588*4882a593Smuzhiyun char *info_kbuf; 589*4882a593Smuzhiyun long last_queue_full; 590*4882a593Smuzhiyun u16 spi_pending; 591*4882a593Smuzhiyun struct list_head target_reset_list; 592*4882a593Smuzhiyun } MPT_SCSI_HOST; 593*4882a593Smuzhiyun 594*4882a593Smuzhiyun typedef void (*MPT_ADD_SGE)(void *pAddr, u32 flagslength, dma_addr_t dma_addr); 595*4882a593Smuzhiyun typedef void (*MPT_ADD_CHAIN)(void *pAddr, u8 next, u16 length, 596*4882a593Smuzhiyun dma_addr_t dma_addr); 597*4882a593Smuzhiyun typedef void (*MPT_SCHEDULE_TARGET_RESET)(void *ioc); 598*4882a593Smuzhiyun typedef void (*MPT_FLUSH_RUNNING_CMDS)(MPT_SCSI_HOST *hd); 599*4882a593Smuzhiyun 600*4882a593Smuzhiyun /* 601*4882a593Smuzhiyun * Adapter Structure - pci_dev specific. Maximum: MPT_MAX_ADAPTERS 602*4882a593Smuzhiyun */ 603*4882a593Smuzhiyun typedef struct _MPT_ADAPTER 604*4882a593Smuzhiyun { 605*4882a593Smuzhiyun int id; /* Unique adapter id N {0,1,2,...} */ 606*4882a593Smuzhiyun int pci_irq; /* This irq */ 607*4882a593Smuzhiyun char name[MPT_NAME_LENGTH]; /* "iocN" */ 608*4882a593Smuzhiyun const char *prod_name; /* "LSIFC9x9" */ 609*4882a593Smuzhiyun #ifdef CONFIG_FUSION_LOGGING 610*4882a593Smuzhiyun /* used in mpt_display_event_info */ 611*4882a593Smuzhiyun char evStr[EVENT_DESCR_STR_SZ]; 612*4882a593Smuzhiyun #endif 613*4882a593Smuzhiyun char board_name[16]; 614*4882a593Smuzhiyun char board_assembly[16]; 615*4882a593Smuzhiyun char board_tracer[16]; 616*4882a593Smuzhiyun u16 nvdata_version_persistent; 617*4882a593Smuzhiyun u16 nvdata_version_default; 618*4882a593Smuzhiyun int debug_level; 619*4882a593Smuzhiyun u8 io_missing_delay; 620*4882a593Smuzhiyun u16 device_missing_delay; 621*4882a593Smuzhiyun SYSIF_REGS __iomem *chip; /* == c8817000 (mmap) */ 622*4882a593Smuzhiyun SYSIF_REGS __iomem *pio_chip; /* Programmed IO (downloadboot) */ 623*4882a593Smuzhiyun u8 bus_type; 624*4882a593Smuzhiyun u32 mem_phys; /* == f4020000 (mmap) */ 625*4882a593Smuzhiyun u32 pio_mem_phys; /* Programmed IO (downloadboot) */ 626*4882a593Smuzhiyun int mem_size; /* mmap memory size */ 627*4882a593Smuzhiyun int number_of_buses; 628*4882a593Smuzhiyun int devices_per_bus; 629*4882a593Smuzhiyun int alloc_total; 630*4882a593Smuzhiyun u32 last_state; 631*4882a593Smuzhiyun int active; 632*4882a593Smuzhiyun u8 *alloc; /* frames alloc ptr */ 633*4882a593Smuzhiyun dma_addr_t alloc_dma; 634*4882a593Smuzhiyun u32 alloc_sz; 635*4882a593Smuzhiyun MPT_FRAME_HDR *reply_frames; /* Reply msg frames - rounded up! */ 636*4882a593Smuzhiyun u32 reply_frames_low_dma; 637*4882a593Smuzhiyun int reply_depth; /* Num Allocated reply frames */ 638*4882a593Smuzhiyun int reply_sz; /* Reply frame size */ 639*4882a593Smuzhiyun int num_chain; /* Number of chain buffers */ 640*4882a593Smuzhiyun MPT_ADD_SGE add_sge; /* Pointer to add_sge 641*4882a593Smuzhiyun function */ 642*4882a593Smuzhiyun MPT_ADD_CHAIN add_chain; /* Pointer to add_chain 643*4882a593Smuzhiyun function */ 644*4882a593Smuzhiyun /* Pool of buffers for chaining. ReqToChain 645*4882a593Smuzhiyun * and ChainToChain track index of chain buffers. 646*4882a593Smuzhiyun * ChainBuffer (DMA) virt/phys addresses. 647*4882a593Smuzhiyun * FreeChainQ (lock) locking mechanisms. 648*4882a593Smuzhiyun */ 649*4882a593Smuzhiyun int *ReqToChain; 650*4882a593Smuzhiyun int *RequestNB; 651*4882a593Smuzhiyun int *ChainToChain; 652*4882a593Smuzhiyun u8 *ChainBuffer; 653*4882a593Smuzhiyun dma_addr_t ChainBufferDMA; 654*4882a593Smuzhiyun struct list_head FreeChainQ; 655*4882a593Smuzhiyun spinlock_t FreeChainQlock; 656*4882a593Smuzhiyun /* We (host driver) get to manage our own RequestQueue! */ 657*4882a593Smuzhiyun dma_addr_t req_frames_dma; 658*4882a593Smuzhiyun MPT_FRAME_HDR *req_frames; /* Request msg frames - rounded up! */ 659*4882a593Smuzhiyun u32 req_frames_low_dma; 660*4882a593Smuzhiyun int req_depth; /* Number of request frames */ 661*4882a593Smuzhiyun int req_sz; /* Request frame size (bytes) */ 662*4882a593Smuzhiyun spinlock_t FreeQlock; 663*4882a593Smuzhiyun struct list_head FreeQ; 664*4882a593Smuzhiyun /* Pool of SCSI sense buffers for commands coming from 665*4882a593Smuzhiyun * the SCSI mid-layer. We have one 256 byte sense buffer 666*4882a593Smuzhiyun * for each REQ entry. 667*4882a593Smuzhiyun */ 668*4882a593Smuzhiyun u8 *sense_buf_pool; 669*4882a593Smuzhiyun dma_addr_t sense_buf_pool_dma; 670*4882a593Smuzhiyun u32 sense_buf_low_dma; 671*4882a593Smuzhiyun u8 *HostPageBuffer; /* SAS - host page buffer support */ 672*4882a593Smuzhiyun u32 HostPageBuffer_sz; 673*4882a593Smuzhiyun dma_addr_t HostPageBuffer_dma; 674*4882a593Smuzhiyun struct pci_dev *pcidev; /* struct pci_dev pointer */ 675*4882a593Smuzhiyun int bars; /* bitmask of BAR's that must be configured */ 676*4882a593Smuzhiyun int msi_enable; 677*4882a593Smuzhiyun u8 __iomem *memmap; /* mmap address */ 678*4882a593Smuzhiyun struct Scsi_Host *sh; /* Scsi Host pointer */ 679*4882a593Smuzhiyun SpiCfgData spi_data; /* Scsi config. data */ 680*4882a593Smuzhiyun RaidCfgData raid_data; /* Raid config. data */ 681*4882a593Smuzhiyun SasCfgData sas_data; /* Sas config. data */ 682*4882a593Smuzhiyun FcCfgData fc_data; /* Fc config. data */ 683*4882a593Smuzhiyun struct proc_dir_entry *ioc_dentry; 684*4882a593Smuzhiyun struct _MPT_ADAPTER *alt_ioc; /* ptr to 929 bound adapter port */ 685*4882a593Smuzhiyun u32 biosVersion; /* BIOS version from IO Unit Page 2 */ 686*4882a593Smuzhiyun int eventTypes; /* Event logging parameters */ 687*4882a593Smuzhiyun int eventContext; /* Next event context */ 688*4882a593Smuzhiyun int eventLogSize; /* Max number of cached events */ 689*4882a593Smuzhiyun struct _mpt_ioctl_events *events; /* pointer to event log */ 690*4882a593Smuzhiyun u8 *cached_fw; /* Pointer to FW */ 691*4882a593Smuzhiyun dma_addr_t cached_fw_dma; 692*4882a593Smuzhiyun int hs_reply_idx; 693*4882a593Smuzhiyun #ifndef MFCNT 694*4882a593Smuzhiyun u32 pad0; 695*4882a593Smuzhiyun #else 696*4882a593Smuzhiyun u32 mfcnt; 697*4882a593Smuzhiyun #endif 698*4882a593Smuzhiyun u32 NB_for_64_byte_frame; 699*4882a593Smuzhiyun u32 hs_req[MPT_MAX_FRAME_SIZE/sizeof(u32)]; 700*4882a593Smuzhiyun u16 hs_reply[MPT_MAX_FRAME_SIZE/sizeof(u16)]; 701*4882a593Smuzhiyun IOCFactsReply_t facts; 702*4882a593Smuzhiyun PortFactsReply_t pfacts[2]; 703*4882a593Smuzhiyun FCPortPage0_t fc_port_page0[2]; 704*4882a593Smuzhiyun LANPage0_t lan_cnfg_page0; 705*4882a593Smuzhiyun LANPage1_t lan_cnfg_page1; 706*4882a593Smuzhiyun 707*4882a593Smuzhiyun u8 ir_firmware; /* =1 if IR firmware detected */ 708*4882a593Smuzhiyun /* 709*4882a593Smuzhiyun * Description: errata_flag_1064 710*4882a593Smuzhiyun * If a PCIX read occurs within 1 or 2 cycles after the chip receives 711*4882a593Smuzhiyun * a split completion for a read data, an internal address pointer incorrectly 712*4882a593Smuzhiyun * increments by 32 bytes 713*4882a593Smuzhiyun */ 714*4882a593Smuzhiyun int errata_flag_1064; 715*4882a593Smuzhiyun int aen_event_read_flag; /* flag to indicate event log was read*/ 716*4882a593Smuzhiyun u8 FirstWhoInit; 717*4882a593Smuzhiyun u8 upload_fw; /* If set, do a fw upload */ 718*4882a593Smuzhiyun u8 NBShiftFactor; /* NB Shift Factor based on Block Size (Facts) */ 719*4882a593Smuzhiyun u8 pad1[4]; 720*4882a593Smuzhiyun u8 DoneCtx; 721*4882a593Smuzhiyun u8 TaskCtx; 722*4882a593Smuzhiyun u8 InternalCtx; 723*4882a593Smuzhiyun struct list_head list; 724*4882a593Smuzhiyun struct net_device *netdev; 725*4882a593Smuzhiyun struct list_head sas_topology; 726*4882a593Smuzhiyun struct mutex sas_topology_mutex; 727*4882a593Smuzhiyun 728*4882a593Smuzhiyun struct workqueue_struct *fw_event_q; 729*4882a593Smuzhiyun struct list_head fw_event_list; 730*4882a593Smuzhiyun spinlock_t fw_event_lock; 731*4882a593Smuzhiyun u8 fw_events_off; /* if '1', then ignore events */ 732*4882a593Smuzhiyun char fw_event_q_name[MPT_KOBJ_NAME_LEN]; 733*4882a593Smuzhiyun 734*4882a593Smuzhiyun struct mutex sas_discovery_mutex; 735*4882a593Smuzhiyun u8 sas_discovery_runtime; 736*4882a593Smuzhiyun u8 sas_discovery_ignore_events; 737*4882a593Smuzhiyun 738*4882a593Smuzhiyun /* port_info object for the host */ 739*4882a593Smuzhiyun struct mptsas_portinfo *hba_port_info; 740*4882a593Smuzhiyun u64 hba_port_sas_addr; 741*4882a593Smuzhiyun u16 hba_port_num_phy; 742*4882a593Smuzhiyun struct list_head sas_device_info_list; 743*4882a593Smuzhiyun struct mutex sas_device_info_mutex; 744*4882a593Smuzhiyun u8 old_sas_discovery_protocal; 745*4882a593Smuzhiyun u8 sas_discovery_quiesce_io; 746*4882a593Smuzhiyun int sas_index; /* index refrencing */ 747*4882a593Smuzhiyun MPT_MGMT sas_mgmt; 748*4882a593Smuzhiyun MPT_MGMT mptbase_cmds; /* for sending config pages */ 749*4882a593Smuzhiyun MPT_MGMT internal_cmds; 750*4882a593Smuzhiyun MPT_MGMT taskmgmt_cmds; 751*4882a593Smuzhiyun MPT_MGMT ioctl_cmds; 752*4882a593Smuzhiyun spinlock_t taskmgmt_lock; /* diagnostic reset lock */ 753*4882a593Smuzhiyun int taskmgmt_in_progress; 754*4882a593Smuzhiyun u8 taskmgmt_quiesce_io; 755*4882a593Smuzhiyun u8 ioc_reset_in_progress; 756*4882a593Smuzhiyun u8 reset_status; 757*4882a593Smuzhiyun u8 wait_on_reset_completion; 758*4882a593Smuzhiyun MPT_SCHEDULE_TARGET_RESET schedule_target_reset; 759*4882a593Smuzhiyun MPT_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds; 760*4882a593Smuzhiyun struct work_struct sas_persist_task; 761*4882a593Smuzhiyun 762*4882a593Smuzhiyun struct work_struct fc_setup_reset_work; 763*4882a593Smuzhiyun struct list_head fc_rports; 764*4882a593Smuzhiyun struct work_struct fc_lsc_work; 765*4882a593Smuzhiyun u8 fc_link_speed[2]; 766*4882a593Smuzhiyun spinlock_t fc_rescan_work_lock; 767*4882a593Smuzhiyun struct work_struct fc_rescan_work; 768*4882a593Smuzhiyun char fc_rescan_work_q_name[MPT_KOBJ_NAME_LEN]; 769*4882a593Smuzhiyun struct workqueue_struct *fc_rescan_work_q; 770*4882a593Smuzhiyun 771*4882a593Smuzhiyun /* driver forced bus resets count */ 772*4882a593Smuzhiyun unsigned long hard_resets; 773*4882a593Smuzhiyun /* fw/external bus resets count */ 774*4882a593Smuzhiyun unsigned long soft_resets; 775*4882a593Smuzhiyun /* cmd timeouts */ 776*4882a593Smuzhiyun unsigned long timeouts; 777*4882a593Smuzhiyun 778*4882a593Smuzhiyun struct scsi_cmnd **ScsiLookup; 779*4882a593Smuzhiyun spinlock_t scsi_lookup_lock; 780*4882a593Smuzhiyun u64 dma_mask; 781*4882a593Smuzhiyun u32 broadcast_aen_busy; 782*4882a593Smuzhiyun char reset_work_q_name[MPT_KOBJ_NAME_LEN]; 783*4882a593Smuzhiyun struct workqueue_struct *reset_work_q; 784*4882a593Smuzhiyun struct delayed_work fault_reset_work; 785*4882a593Smuzhiyun 786*4882a593Smuzhiyun u8 sg_addr_size; 787*4882a593Smuzhiyun u8 in_rescan; 788*4882a593Smuzhiyun u8 SGE_size; 789*4882a593Smuzhiyun 790*4882a593Smuzhiyun } MPT_ADAPTER; 791*4882a593Smuzhiyun 792*4882a593Smuzhiyun /* 793*4882a593Smuzhiyun * New return value convention: 794*4882a593Smuzhiyun * 1 = Ok to free associated request frame 795*4882a593Smuzhiyun * 0 = not Ok ... 796*4882a593Smuzhiyun */ 797*4882a593Smuzhiyun typedef int (*MPT_CALLBACK)(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req, MPT_FRAME_HDR *reply); 798*4882a593Smuzhiyun typedef int (*MPT_EVHANDLER)(MPT_ADAPTER *ioc, EventNotificationReply_t *evReply); 799*4882a593Smuzhiyun typedef int (*MPT_RESETHANDLER)(MPT_ADAPTER *ioc, int reset_phase); 800*4882a593Smuzhiyun /* reset_phase defs */ 801*4882a593Smuzhiyun #define MPT_IOC_PRE_RESET 0 802*4882a593Smuzhiyun #define MPT_IOC_POST_RESET 1 803*4882a593Smuzhiyun #define MPT_IOC_SETUP_RESET 2 804*4882a593Smuzhiyun 805*4882a593Smuzhiyun /* 806*4882a593Smuzhiyun * Invent MPT host event (super-set of MPI Events) 807*4882a593Smuzhiyun * Fitted to 1030's 64-byte [max] request frame size 808*4882a593Smuzhiyun */ 809*4882a593Smuzhiyun typedef struct _MPT_HOST_EVENT { 810*4882a593Smuzhiyun EventNotificationReply_t MpiEvent; /* 8 32-bit words! */ 811*4882a593Smuzhiyun u32 pad[6]; 812*4882a593Smuzhiyun void *next; 813*4882a593Smuzhiyun } MPT_HOST_EVENT; 814*4882a593Smuzhiyun 815*4882a593Smuzhiyun #define MPT_HOSTEVENT_IOC_BRINGUP 0x91 816*4882a593Smuzhiyun #define MPT_HOSTEVENT_IOC_RECOVER 0x92 817*4882a593Smuzhiyun 818*4882a593Smuzhiyun /* Define the generic types based on the size 819*4882a593Smuzhiyun * of the dma_addr_t type. 820*4882a593Smuzhiyun */ 821*4882a593Smuzhiyun typedef struct _mpt_sge { 822*4882a593Smuzhiyun u32 FlagsLength; 823*4882a593Smuzhiyun dma_addr_t Address; 824*4882a593Smuzhiyun } MptSge_t; 825*4882a593Smuzhiyun 826*4882a593Smuzhiyun 827*4882a593Smuzhiyun #define mpt_msg_flags(ioc) \ 828*4882a593Smuzhiyun (ioc->sg_addr_size == sizeof(u64)) ? \ 829*4882a593Smuzhiyun MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_64 : \ 830*4882a593Smuzhiyun MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_32 831*4882a593Smuzhiyun 832*4882a593Smuzhiyun #define MPT_SGE_FLAGS_64_BIT_ADDRESSING \ 833*4882a593Smuzhiyun (MPI_SGE_FLAGS_64_BIT_ADDRESSING << MPI_SGE_FLAGS_SHIFT) 834*4882a593Smuzhiyun 835*4882a593Smuzhiyun /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ 836*4882a593Smuzhiyun /* 837*4882a593Smuzhiyun * Funky (private) macros... 838*4882a593Smuzhiyun */ 839*4882a593Smuzhiyun #include "mptdebug.h" 840*4882a593Smuzhiyun 841*4882a593Smuzhiyun #define MPT_INDEX_2_MFPTR(ioc,idx) \ 842*4882a593Smuzhiyun (MPT_FRAME_HDR*)( (u8*)(ioc)->req_frames + (ioc)->req_sz * (idx) ) 843*4882a593Smuzhiyun 844*4882a593Smuzhiyun #define MFPTR_2_MPT_INDEX(ioc,mf) \ 845*4882a593Smuzhiyun (int)( ((u8*)mf - (u8*)(ioc)->req_frames) / (ioc)->req_sz ) 846*4882a593Smuzhiyun 847*4882a593Smuzhiyun #define MPT_INDEX_2_RFPTR(ioc,idx) \ 848*4882a593Smuzhiyun (MPT_FRAME_HDR*)( (u8*)(ioc)->reply_frames + (ioc)->req_sz * (idx) ) 849*4882a593Smuzhiyun 850*4882a593Smuzhiyun /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ 851*4882a593Smuzhiyun 852*4882a593Smuzhiyun #define SCSI_STD_SENSE_BYTES 18 853*4882a593Smuzhiyun #define SCSI_STD_INQUIRY_BYTES 36 854*4882a593Smuzhiyun #define SCSI_MAX_INQUIRY_BYTES 96 855*4882a593Smuzhiyun 856*4882a593Smuzhiyun /* 857*4882a593Smuzhiyun * MPT_SCSI_HOST defines - Used by the IOCTL and the SCSI drivers 858*4882a593Smuzhiyun * Private to the driver. 859*4882a593Smuzhiyun */ 860*4882a593Smuzhiyun /* LOCAL structure and fields used when processing 861*4882a593Smuzhiyun * internally generated commands. These include: 862*4882a593Smuzhiyun * bus scan, dv and config requests. 863*4882a593Smuzhiyun */ 864*4882a593Smuzhiyun typedef struct _MPT_LOCAL_REPLY { 865*4882a593Smuzhiyun ConfigPageHeader_t header; 866*4882a593Smuzhiyun int completion; 867*4882a593Smuzhiyun u8 sense[SCSI_STD_SENSE_BYTES]; 868*4882a593Smuzhiyun u8 scsiStatus; 869*4882a593Smuzhiyun u8 skip; 870*4882a593Smuzhiyun u32 pad; 871*4882a593Smuzhiyun } MPT_LOCAL_REPLY; 872*4882a593Smuzhiyun 873*4882a593Smuzhiyun 874*4882a593Smuzhiyun /* The TM_STATE variable is used to provide strict single threading of TM 875*4882a593Smuzhiyun * requests as well as communicate TM error conditions. 876*4882a593Smuzhiyun */ 877*4882a593Smuzhiyun #define TM_STATE_NONE (0) 878*4882a593Smuzhiyun #define TM_STATE_IN_PROGRESS (1) 879*4882a593Smuzhiyun #define TM_STATE_ERROR (2) 880*4882a593Smuzhiyun 881*4882a593Smuzhiyun /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ 882*4882a593Smuzhiyun /* 883*4882a593Smuzhiyun * More Dynamic Multi-Pathing stuff... 884*4882a593Smuzhiyun */ 885*4882a593Smuzhiyun 886*4882a593Smuzhiyun /* Forward decl, a strange C thing, to prevent gcc compiler warnings */ 887*4882a593Smuzhiyun struct scsi_cmnd; 888*4882a593Smuzhiyun 889*4882a593Smuzhiyun /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ 890*4882a593Smuzhiyun /* 891*4882a593Smuzhiyun * Generic structure passed to the base mpt_config function. 892*4882a593Smuzhiyun */ 893*4882a593Smuzhiyun typedef struct _x_config_parms { 894*4882a593Smuzhiyun union { 895*4882a593Smuzhiyun ConfigExtendedPageHeader_t *ehdr; 896*4882a593Smuzhiyun ConfigPageHeader_t *hdr; 897*4882a593Smuzhiyun } cfghdr; 898*4882a593Smuzhiyun dma_addr_t physAddr; 899*4882a593Smuzhiyun u32 pageAddr; /* properly formatted */ 900*4882a593Smuzhiyun u16 status; 901*4882a593Smuzhiyun u8 action; 902*4882a593Smuzhiyun u8 dir; 903*4882a593Smuzhiyun u8 timeout; /* seconds */ 904*4882a593Smuzhiyun } CONFIGPARMS; 905*4882a593Smuzhiyun 906*4882a593Smuzhiyun /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ 907*4882a593Smuzhiyun /* 908*4882a593Smuzhiyun * Public entry points... 909*4882a593Smuzhiyun */ 910*4882a593Smuzhiyun extern int mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id); 911*4882a593Smuzhiyun extern void mpt_detach(struct pci_dev *pdev); 912*4882a593Smuzhiyun #ifdef CONFIG_PM 913*4882a593Smuzhiyun extern int mpt_suspend(struct pci_dev *pdev, pm_message_t state); 914*4882a593Smuzhiyun extern int mpt_resume(struct pci_dev *pdev); 915*4882a593Smuzhiyun #endif 916*4882a593Smuzhiyun extern u8 mpt_register(MPT_CALLBACK cbfunc, MPT_DRIVER_CLASS dclass, 917*4882a593Smuzhiyun char *func_name); 918*4882a593Smuzhiyun extern void mpt_deregister(u8 cb_idx); 919*4882a593Smuzhiyun extern int mpt_event_register(u8 cb_idx, MPT_EVHANDLER ev_cbfunc); 920*4882a593Smuzhiyun extern void mpt_event_deregister(u8 cb_idx); 921*4882a593Smuzhiyun extern int mpt_reset_register(u8 cb_idx, MPT_RESETHANDLER reset_func); 922*4882a593Smuzhiyun extern void mpt_reset_deregister(u8 cb_idx); 923*4882a593Smuzhiyun extern int mpt_device_driver_register(struct mpt_pci_driver * dd_cbfunc, u8 cb_idx); 924*4882a593Smuzhiyun extern void mpt_device_driver_deregister(u8 cb_idx); 925*4882a593Smuzhiyun extern MPT_FRAME_HDR *mpt_get_msg_frame(u8 cb_idx, MPT_ADAPTER *ioc); 926*4882a593Smuzhiyun extern void mpt_free_msg_frame(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf); 927*4882a593Smuzhiyun extern void mpt_put_msg_frame(u8 cb_idx, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf); 928*4882a593Smuzhiyun extern void mpt_put_msg_frame_hi_pri(u8 cb_idx, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf); 929*4882a593Smuzhiyun 930*4882a593Smuzhiyun extern int mpt_send_handshake_request(u8 cb_idx, MPT_ADAPTER *ioc, int reqBytes, u32 *req, int sleepFlag); 931*4882a593Smuzhiyun extern int mpt_verify_adapter(int iocid, MPT_ADAPTER **iocpp); 932*4882a593Smuzhiyun extern u32 mpt_GetIocState(MPT_ADAPTER *ioc, int cooked); 933*4882a593Smuzhiyun extern void mpt_print_ioc_summary(MPT_ADAPTER *ioc, char *buf, int *size, int len, int showlan); 934*4882a593Smuzhiyun extern int mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag); 935*4882a593Smuzhiyun extern int mpt_Soft_Hard_ResetHandler(MPT_ADAPTER *ioc, int sleepFlag); 936*4882a593Smuzhiyun extern int mpt_config(MPT_ADAPTER *ioc, CONFIGPARMS *cfg); 937*4882a593Smuzhiyun extern int mpt_alloc_fw_memory(MPT_ADAPTER *ioc, int size); 938*4882a593Smuzhiyun extern void mpt_free_fw_memory(MPT_ADAPTER *ioc); 939*4882a593Smuzhiyun extern int mpt_findImVolumes(MPT_ADAPTER *ioc); 940*4882a593Smuzhiyun extern int mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode); 941*4882a593Smuzhiyun extern int mpt_raid_phys_disk_pg0(MPT_ADAPTER *ioc, u8 phys_disk_num, pRaidPhysDiskPage0_t phys_disk); 942*4882a593Smuzhiyun extern int mpt_raid_phys_disk_pg1(MPT_ADAPTER *ioc, u8 phys_disk_num, 943*4882a593Smuzhiyun pRaidPhysDiskPage1_t phys_disk); 944*4882a593Smuzhiyun extern int mpt_raid_phys_disk_get_num_paths(MPT_ADAPTER *ioc, 945*4882a593Smuzhiyun u8 phys_disk_num); 946*4882a593Smuzhiyun extern int mpt_set_taskmgmt_in_progress_flag(MPT_ADAPTER *ioc); 947*4882a593Smuzhiyun extern void mpt_clear_taskmgmt_in_progress_flag(MPT_ADAPTER *ioc); 948*4882a593Smuzhiyun extern void mpt_halt_firmware(MPT_ADAPTER *ioc); 949*4882a593Smuzhiyun 950*4882a593Smuzhiyun 951*4882a593Smuzhiyun /* 952*4882a593Smuzhiyun * Public data decl's... 953*4882a593Smuzhiyun */ 954*4882a593Smuzhiyun extern struct list_head ioc_list; 955*4882a593Smuzhiyun extern int mpt_fwfault_debug; 956*4882a593Smuzhiyun 957*4882a593Smuzhiyun /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ 958*4882a593Smuzhiyun #endif /* } __KERNEL__ */ 959*4882a593Smuzhiyun 960*4882a593Smuzhiyun #ifdef CONFIG_64BIT 961*4882a593Smuzhiyun #define CAST_U32_TO_PTR(x) ((void *)(u64)x) 962*4882a593Smuzhiyun #define CAST_PTR_TO_U32(x) ((u32)(u64)x) 963*4882a593Smuzhiyun #else 964*4882a593Smuzhiyun #define CAST_U32_TO_PTR(x) ((void *)x) 965*4882a593Smuzhiyun #define CAST_PTR_TO_U32(x) ((u32)x) 966*4882a593Smuzhiyun #endif 967*4882a593Smuzhiyun 968*4882a593Smuzhiyun #define MPT_PROTOCOL_FLAGS_c_c_c_c(pflags) \ 969*4882a593Smuzhiyun ((pflags) & MPI_PORTFACTS_PROTOCOL_INITIATOR) ? 'I' : 'i', \ 970*4882a593Smuzhiyun ((pflags) & MPI_PORTFACTS_PROTOCOL_TARGET) ? 'T' : 't', \ 971*4882a593Smuzhiyun ((pflags) & MPI_PORTFACTS_PROTOCOL_LAN) ? 'L' : 'l', \ 972*4882a593Smuzhiyun ((pflags) & MPI_PORTFACTS_PROTOCOL_LOGBUSADDR) ? 'B' : 'b' 973*4882a593Smuzhiyun 974*4882a593Smuzhiyun /* 975*4882a593Smuzhiyun * Shifted SGE Defines - Use in SGE with FlagsLength member. 976*4882a593Smuzhiyun * Otherwise, use MPI_xxx defines (refer to "lsi/mpi.h" header). 977*4882a593Smuzhiyun * Defaults: 32 bit SGE, SYSTEM_ADDRESS if direction bit is 0, read 978*4882a593Smuzhiyun */ 979*4882a593Smuzhiyun #define MPT_TRANSFER_IOC_TO_HOST (0x00000000) 980*4882a593Smuzhiyun #define MPT_TRANSFER_HOST_TO_IOC (0x04000000) 981*4882a593Smuzhiyun #define MPT_SGE_FLAGS_LAST_ELEMENT (0x80000000) 982*4882a593Smuzhiyun #define MPT_SGE_FLAGS_END_OF_BUFFER (0x40000000) 983*4882a593Smuzhiyun #define MPT_SGE_FLAGS_LOCAL_ADDRESS (0x08000000) 984*4882a593Smuzhiyun #define MPT_SGE_FLAGS_DIRECTION (0x04000000) 985*4882a593Smuzhiyun #define MPT_SGE_FLAGS_END_OF_LIST (0x01000000) 986*4882a593Smuzhiyun 987*4882a593Smuzhiyun #define MPT_SGE_FLAGS_TRANSACTION_ELEMENT (0x00000000) 988*4882a593Smuzhiyun #define MPT_SGE_FLAGS_SIMPLE_ELEMENT (0x10000000) 989*4882a593Smuzhiyun #define MPT_SGE_FLAGS_CHAIN_ELEMENT (0x30000000) 990*4882a593Smuzhiyun #define MPT_SGE_FLAGS_ELEMENT_MASK (0x30000000) 991*4882a593Smuzhiyun 992*4882a593Smuzhiyun #define MPT_SGE_FLAGS_SSIMPLE_READ \ 993*4882a593Smuzhiyun (MPT_SGE_FLAGS_LAST_ELEMENT | \ 994*4882a593Smuzhiyun MPT_SGE_FLAGS_END_OF_BUFFER | \ 995*4882a593Smuzhiyun MPT_SGE_FLAGS_END_OF_LIST | \ 996*4882a593Smuzhiyun MPT_SGE_FLAGS_SIMPLE_ELEMENT | \ 997*4882a593Smuzhiyun MPT_TRANSFER_IOC_TO_HOST) 998*4882a593Smuzhiyun #define MPT_SGE_FLAGS_SSIMPLE_WRITE \ 999*4882a593Smuzhiyun (MPT_SGE_FLAGS_LAST_ELEMENT | \ 1000*4882a593Smuzhiyun MPT_SGE_FLAGS_END_OF_BUFFER | \ 1001*4882a593Smuzhiyun MPT_SGE_FLAGS_END_OF_LIST | \ 1002*4882a593Smuzhiyun MPT_SGE_FLAGS_SIMPLE_ELEMENT | \ 1003*4882a593Smuzhiyun MPT_TRANSFER_HOST_TO_IOC) 1004*4882a593Smuzhiyun 1005*4882a593Smuzhiyun /*}-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ 1006*4882a593Smuzhiyun #endif 1007*4882a593Smuzhiyun 1008