1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2000-2008 LSI Corporation. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Name: mpi_targ.h 7*4882a593Smuzhiyun * Title: MPI Target mode messages and structures 8*4882a593Smuzhiyun * Creation Date: June 22, 2000 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * mpi_targ.h Version: 01.05.06 11*4882a593Smuzhiyun * 12*4882a593Smuzhiyun * Version History 13*4882a593Smuzhiyun * --------------- 14*4882a593Smuzhiyun * 15*4882a593Smuzhiyun * Date Version Description 16*4882a593Smuzhiyun * -------- -------- ------------------------------------------------------ 17*4882a593Smuzhiyun * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000. 18*4882a593Smuzhiyun * 06-06-00 01.00.01 Update version number for 1.0 release. 19*4882a593Smuzhiyun * 06-22-00 01.00.02 Added _MSG_TARGET_CMD_BUFFER_POST_REPLY structure. 20*4882a593Smuzhiyun * Corrected DECSRIPTOR typo to DESCRIPTOR. 21*4882a593Smuzhiyun * 11-02-00 01.01.01 Original release for post 1.0 work 22*4882a593Smuzhiyun * Modified target mode to use IoIndex instead of 23*4882a593Smuzhiyun * HostIndex and IocIndex. Added Alias. 24*4882a593Smuzhiyun * 01-09-01 01.01.02 Added defines for TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER 25*4882a593Smuzhiyun * and TARGET_STATUS_SEND_FLAGS_REPOST_CMD_BUFFER. 26*4882a593Smuzhiyun * 02-20-01 01.01.03 Started using MPI_POINTER. 27*4882a593Smuzhiyun * Added structures for MPI_TARGET_SCSI_SPI_CMD_BUFFER and 28*4882a593Smuzhiyun * MPI_TARGET_FCP_CMD_BUFFER. 29*4882a593Smuzhiyun * 03-27-01 01.01.04 Added structure offset comments. 30*4882a593Smuzhiyun * 08-08-01 01.02.01 Original release for v1.2 work. 31*4882a593Smuzhiyun * 09-28-01 01.02.02 Added structure for MPI_TARGET_SCSI_SPI_STATUS_IU. 32*4882a593Smuzhiyun * Added PriorityReason field to some replies and 33*4882a593Smuzhiyun * defined more PriorityReason codes. 34*4882a593Smuzhiyun * Added some defines for to support previous version 35*4882a593Smuzhiyun * of MPI. 36*4882a593Smuzhiyun * 10-04-01 01.02.03 Added PriorityReason to MSG_TARGET_ERROR_REPLY. 37*4882a593Smuzhiyun * 11-01-01 01.02.04 Added define for TARGET_STATUS_SEND_FLAGS_HIGH_PRIORITY. 38*4882a593Smuzhiyun * 03-14-02 01.02.05 Modified MPI_TARGET_FCP_RSP_BUFFER to get the proper 39*4882a593Smuzhiyun * byte ordering. 40*4882a593Smuzhiyun * 05-31-02 01.02.06 Modified TARGET_MODE_REPLY_ALIAS_MASK to only include 41*4882a593Smuzhiyun * one bit. 42*4882a593Smuzhiyun * Added AliasIndex field to MPI_TARGET_FCP_CMD_BUFFER. 43*4882a593Smuzhiyun * 09-16-02 01.02.07 Added flags for confirmed completion. 44*4882a593Smuzhiyun * Added PRIORITY_REASON_TARGET_BUSY. 45*4882a593Smuzhiyun * 11-15-02 01.02.08 Added AliasID field to MPI_TARGET_SCSI_SPI_CMD_BUFFER. 46*4882a593Smuzhiyun * 04-01-03 01.02.09 Added OptionalOxid field to MPI_TARGET_FCP_CMD_BUFFER. 47*4882a593Smuzhiyun * 05-11-04 01.03.01 Original release for MPI v1.3. 48*4882a593Smuzhiyun * 08-19-04 01.05.01 Added new request message structures for 49*4882a593Smuzhiyun * MSG_TARGET_CMD_BUF_POST_BASE_REQUEST, 50*4882a593Smuzhiyun * MSG_TARGET_CMD_BUF_POST_LIST_REQUEST, and 51*4882a593Smuzhiyun * MSG_TARGET_ASSIST_EXT_REQUEST. 52*4882a593Smuzhiyun * Added new structures for SAS SSP Command buffer, SSP 53*4882a593Smuzhiyun * Task buffer, and SSP Status IU. 54*4882a593Smuzhiyun * 10-05-04 01.05.02 MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY added. 55*4882a593Smuzhiyun * 02-22-05 01.05.03 Changed a comment. 56*4882a593Smuzhiyun * 03-11-05 01.05.04 Removed TargetAssistExtended Request. 57*4882a593Smuzhiyun * 06-24-05 01.05.05 Added TargetAssistExtended structures and defines. 58*4882a593Smuzhiyun * 03-27-06 01.05.06 Added a comment. 59*4882a593Smuzhiyun * -------------------------------------------------------------------------- 60*4882a593Smuzhiyun */ 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun #ifndef MPI_TARG_H 63*4882a593Smuzhiyun #define MPI_TARG_H 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun /****************************************************************************** 67*4882a593Smuzhiyun * 68*4882a593Smuzhiyun * S C S I T a r g e t M e s s a g e s 69*4882a593Smuzhiyun * 70*4882a593Smuzhiyun *******************************************************************************/ 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun typedef struct _CMD_BUFFER_DESCRIPTOR 73*4882a593Smuzhiyun { 74*4882a593Smuzhiyun U16 IoIndex; /* 00h */ 75*4882a593Smuzhiyun U16 Reserved; /* 02h */ 76*4882a593Smuzhiyun union /* 04h */ 77*4882a593Smuzhiyun { 78*4882a593Smuzhiyun U32 PhysicalAddress32; 79*4882a593Smuzhiyun U64 PhysicalAddress64; 80*4882a593Smuzhiyun } u; 81*4882a593Smuzhiyun } CMD_BUFFER_DESCRIPTOR, MPI_POINTER PTR_CMD_BUFFER_DESCRIPTOR, 82*4882a593Smuzhiyun CmdBufferDescriptor_t, MPI_POINTER pCmdBufferDescriptor_t; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun /****************************************************************************/ 86*4882a593Smuzhiyun /* Target Command Buffer Post Request */ 87*4882a593Smuzhiyun /****************************************************************************/ 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun typedef struct _MSG_TARGET_CMD_BUFFER_POST_REQUEST 90*4882a593Smuzhiyun { 91*4882a593Smuzhiyun U8 BufferPostFlags; /* 00h */ 92*4882a593Smuzhiyun U8 BufferCount; /* 01h */ 93*4882a593Smuzhiyun U8 ChainOffset; /* 02h */ 94*4882a593Smuzhiyun U8 Function; /* 03h */ 95*4882a593Smuzhiyun U8 BufferLength; /* 04h */ 96*4882a593Smuzhiyun U8 Reserved; /* 05h */ 97*4882a593Smuzhiyun U8 Reserved1; /* 06h */ 98*4882a593Smuzhiyun U8 MsgFlags; /* 07h */ 99*4882a593Smuzhiyun U32 MsgContext; /* 08h */ 100*4882a593Smuzhiyun CMD_BUFFER_DESCRIPTOR Buffer[1]; /* 0Ch */ 101*4882a593Smuzhiyun } MSG_TARGET_CMD_BUFFER_POST_REQUEST, MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_REQUEST, 102*4882a593Smuzhiyun TargetCmdBufferPostRequest_t, MPI_POINTER pTargetCmdBufferPostRequest_t; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun #define CMD_BUFFER_POST_FLAGS_PORT_MASK (0x01) 105*4882a593Smuzhiyun #define CMD_BUFFER_POST_FLAGS_ADDR_MODE_MASK (0x80) 106*4882a593Smuzhiyun #define CMD_BUFFER_POST_FLAGS_ADDR_MODE_32 (0) 107*4882a593Smuzhiyun #define CMD_BUFFER_POST_FLAGS_ADDR_MODE_64 (1) 108*4882a593Smuzhiyun #define CMD_BUFFER_POST_FLAGS_64_BIT_ADDR (0x80) 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun #define CMD_BUFFER_POST_IO_INDEX_MASK (0x00003FFF) 111*4882a593Smuzhiyun #define CMD_BUFFER_POST_IO_INDEX_MASK_0100 (0x000003FF) /* obsolete */ 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun typedef struct _MSG_TARGET_CMD_BUFFER_POST_REPLY 115*4882a593Smuzhiyun { 116*4882a593Smuzhiyun U8 BufferPostFlags; /* 00h */ 117*4882a593Smuzhiyun U8 BufferCount; /* 01h */ 118*4882a593Smuzhiyun U8 MsgLength; /* 02h */ 119*4882a593Smuzhiyun U8 Function; /* 03h */ 120*4882a593Smuzhiyun U8 BufferLength; /* 04h */ 121*4882a593Smuzhiyun U8 Reserved; /* 05h */ 122*4882a593Smuzhiyun U8 Reserved1; /* 06h */ 123*4882a593Smuzhiyun U8 MsgFlags; /* 07h */ 124*4882a593Smuzhiyun U32 MsgContext; /* 08h */ 125*4882a593Smuzhiyun U16 Reserved2; /* 0Ch */ 126*4882a593Smuzhiyun U16 IOCStatus; /* 0Eh */ 127*4882a593Smuzhiyun U32 IOCLogInfo; /* 10h */ 128*4882a593Smuzhiyun } MSG_TARGET_CMD_BUFFER_POST_REPLY, MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_REPLY, 129*4882a593Smuzhiyun TargetCmdBufferPostReply_t, MPI_POINTER pTargetCmdBufferPostReply_t; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun /* the following structure is obsolete as of MPI v1.2 */ 132*4882a593Smuzhiyun typedef struct _MSG_PRIORITY_CMD_RECEIVED_REPLY 133*4882a593Smuzhiyun { 134*4882a593Smuzhiyun U16 Reserved; /* 00h */ 135*4882a593Smuzhiyun U8 MsgLength; /* 02h */ 136*4882a593Smuzhiyun U8 Function; /* 03h */ 137*4882a593Smuzhiyun U16 Reserved1; /* 04h */ 138*4882a593Smuzhiyun U8 Reserved2; /* 06h */ 139*4882a593Smuzhiyun U8 MsgFlags; /* 07h */ 140*4882a593Smuzhiyun U32 MsgContext; /* 08h */ 141*4882a593Smuzhiyun U8 PriorityReason; /* 0Ch */ 142*4882a593Smuzhiyun U8 Reserved3; /* 0Dh */ 143*4882a593Smuzhiyun U16 IOCStatus; /* 0Eh */ 144*4882a593Smuzhiyun U32 IOCLogInfo; /* 10h */ 145*4882a593Smuzhiyun U32 ReplyWord; /* 14h */ 146*4882a593Smuzhiyun } MSG_PRIORITY_CMD_RECEIVED_REPLY, MPI_POINTER PTR_MSG_PRIORITY_CMD_RECEIVED_REPLY, 147*4882a593Smuzhiyun PriorityCommandReceivedReply_t, MPI_POINTER pPriorityCommandReceivedReply_t; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun typedef struct _MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY 151*4882a593Smuzhiyun { 152*4882a593Smuzhiyun U16 Reserved; /* 00h */ 153*4882a593Smuzhiyun U8 MsgLength; /* 02h */ 154*4882a593Smuzhiyun U8 Function; /* 03h */ 155*4882a593Smuzhiyun U16 Reserved1; /* 04h */ 156*4882a593Smuzhiyun U8 Reserved2; /* 06h */ 157*4882a593Smuzhiyun U8 MsgFlags; /* 07h */ 158*4882a593Smuzhiyun U32 MsgContext; /* 08h */ 159*4882a593Smuzhiyun U8 PriorityReason; /* 0Ch */ 160*4882a593Smuzhiyun U8 Reserved3; /* 0Dh */ 161*4882a593Smuzhiyun U16 IOCStatus; /* 0Eh */ 162*4882a593Smuzhiyun U32 IOCLogInfo; /* 10h */ 163*4882a593Smuzhiyun U32 ReplyWord; /* 14h */ 164*4882a593Smuzhiyun } MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY, 165*4882a593Smuzhiyun MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY, 166*4882a593Smuzhiyun TargetCmdBufferPostErrorReply_t, MPI_POINTER pTargetCmdBufferPostErrorReply_t; 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun #define PRIORITY_REASON_NO_DISCONNECT (0x00) 169*4882a593Smuzhiyun #define PRIORITY_REASON_SCSI_TASK_MANAGEMENT (0x01) 170*4882a593Smuzhiyun #define PRIORITY_REASON_CMD_PARITY_ERR (0x02) 171*4882a593Smuzhiyun #define PRIORITY_REASON_MSG_OUT_PARITY_ERR (0x03) 172*4882a593Smuzhiyun #define PRIORITY_REASON_LQ_CRC_ERR (0x04) 173*4882a593Smuzhiyun #define PRIORITY_REASON_CMD_CRC_ERR (0x05) 174*4882a593Smuzhiyun #define PRIORITY_REASON_PROTOCOL_ERR (0x06) 175*4882a593Smuzhiyun #define PRIORITY_REASON_DATA_OUT_PARITY_ERR (0x07) 176*4882a593Smuzhiyun #define PRIORITY_REASON_DATA_OUT_CRC_ERR (0x08) 177*4882a593Smuzhiyun #define PRIORITY_REASON_TARGET_BUSY (0x09) 178*4882a593Smuzhiyun #define PRIORITY_REASON_UNKNOWN (0xFF) 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun /****************************************************************************/ 182*4882a593Smuzhiyun /* Target Command Buffer Post Base Request */ 183*4882a593Smuzhiyun /****************************************************************************/ 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun typedef struct _MSG_TARGET_CMD_BUF_POST_BASE_REQUEST 186*4882a593Smuzhiyun { 187*4882a593Smuzhiyun U8 BufferPostFlags; /* 00h */ 188*4882a593Smuzhiyun U8 PortNumber; /* 01h */ 189*4882a593Smuzhiyun U8 ChainOffset; /* 02h */ 190*4882a593Smuzhiyun U8 Function; /* 03h */ 191*4882a593Smuzhiyun U16 TotalCmdBuffers; /* 04h */ 192*4882a593Smuzhiyun U8 Reserved; /* 06h */ 193*4882a593Smuzhiyun U8 MsgFlags; /* 07h */ 194*4882a593Smuzhiyun U32 MsgContext; /* 08h */ 195*4882a593Smuzhiyun U32 Reserved1; /* 0Ch */ 196*4882a593Smuzhiyun U16 CmdBufferLength; /* 10h */ 197*4882a593Smuzhiyun U16 NextCmdBufferOffset; /* 12h */ 198*4882a593Smuzhiyun U32 BaseAddressLow; /* 14h */ 199*4882a593Smuzhiyun U32 BaseAddressHigh; /* 18h */ 200*4882a593Smuzhiyun } MSG_TARGET_CMD_BUF_POST_BASE_REQUEST, 201*4882a593Smuzhiyun MPI_POINTER PTR__MSG_TARGET_CMD_BUF_POST_BASE_REQUEST, 202*4882a593Smuzhiyun TargetCmdBufferPostBaseRequest_t, 203*4882a593Smuzhiyun MPI_POINTER pTargetCmdBufferPostBaseRequest_t; 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun #define CMD_BUFFER_POST_BASE_FLAGS_AUTO_POST_ALL (0x01) 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun typedef struct _MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY 209*4882a593Smuzhiyun { 210*4882a593Smuzhiyun U16 Reserved; /* 00h */ 211*4882a593Smuzhiyun U8 MsgLength; /* 02h */ 212*4882a593Smuzhiyun U8 Function; /* 03h */ 213*4882a593Smuzhiyun U16 Reserved1; /* 04h */ 214*4882a593Smuzhiyun U8 Reserved2; /* 06h */ 215*4882a593Smuzhiyun U8 MsgFlags; /* 07h */ 216*4882a593Smuzhiyun U32 MsgContext; /* 08h */ 217*4882a593Smuzhiyun U16 Reserved3; /* 0Ch */ 218*4882a593Smuzhiyun U16 IOCStatus; /* 0Eh */ 219*4882a593Smuzhiyun U32 IOCLogInfo; /* 10h */ 220*4882a593Smuzhiyun } MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY, 221*4882a593Smuzhiyun MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY, 222*4882a593Smuzhiyun TargetCmdBufferPostBaseListReply_t, 223*4882a593Smuzhiyun MPI_POINTER pTargetCmdBufferPostBaseListReply_t; 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun /****************************************************************************/ 227*4882a593Smuzhiyun /* Target Command Buffer Post List Request */ 228*4882a593Smuzhiyun /****************************************************************************/ 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun typedef struct _MSG_TARGET_CMD_BUF_POST_LIST_REQUEST 231*4882a593Smuzhiyun { 232*4882a593Smuzhiyun U8 Reserved; /* 00h */ 233*4882a593Smuzhiyun U8 PortNumber; /* 01h */ 234*4882a593Smuzhiyun U8 ChainOffset; /* 02h */ 235*4882a593Smuzhiyun U8 Function; /* 03h */ 236*4882a593Smuzhiyun U16 CmdBufferCount; /* 04h */ 237*4882a593Smuzhiyun U8 Reserved1; /* 06h */ 238*4882a593Smuzhiyun U8 MsgFlags; /* 07h */ 239*4882a593Smuzhiyun U32 MsgContext; /* 08h */ 240*4882a593Smuzhiyun U32 Reserved2; /* 0Ch */ 241*4882a593Smuzhiyun U16 IoIndex[2]; /* 10h */ 242*4882a593Smuzhiyun } MSG_TARGET_CMD_BUF_POST_LIST_REQUEST, 243*4882a593Smuzhiyun MPI_POINTER PTR_MSG_TARGET_CMD_BUF_POST_LIST_REQUEST, 244*4882a593Smuzhiyun TargetCmdBufferPostListRequest_t, 245*4882a593Smuzhiyun MPI_POINTER pTargetCmdBufferPostListRequest_t; 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun /****************************************************************************/ 249*4882a593Smuzhiyun /* Command Buffer Formats (with 16 byte CDB) */ 250*4882a593Smuzhiyun /****************************************************************************/ 251*4882a593Smuzhiyun 252*4882a593Smuzhiyun typedef struct _MPI_TARGET_FCP_CMD_BUFFER 253*4882a593Smuzhiyun { 254*4882a593Smuzhiyun U8 FcpLun[8]; /* 00h */ 255*4882a593Smuzhiyun U8 FcpCntl[4]; /* 08h */ 256*4882a593Smuzhiyun U8 FcpCdb[16]; /* 0Ch */ 257*4882a593Smuzhiyun U32 FcpDl; /* 1Ch */ 258*4882a593Smuzhiyun U8 AliasIndex; /* 20h */ 259*4882a593Smuzhiyun U8 Reserved1; /* 21h */ 260*4882a593Smuzhiyun U16 OptionalOxid; /* 22h */ 261*4882a593Smuzhiyun } MPI_TARGET_FCP_CMD_BUFFER, MPI_POINTER PTR_MPI_TARGET_FCP_CMD_BUFFER, 262*4882a593Smuzhiyun MpiTargetFcpCmdBuffer, MPI_POINTER pMpiTargetFcpCmdBuffer; 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun typedef struct _MPI_TARGET_SCSI_SPI_CMD_BUFFER 266*4882a593Smuzhiyun { 267*4882a593Smuzhiyun /* SPI L_Q information unit */ 268*4882a593Smuzhiyun U8 L_QType; /* 00h */ 269*4882a593Smuzhiyun U8 Reserved; /* 01h */ 270*4882a593Smuzhiyun U16 Tag; /* 02h */ 271*4882a593Smuzhiyun U8 LogicalUnitNumber[8]; /* 04h */ 272*4882a593Smuzhiyun U32 DataLength; /* 0Ch */ 273*4882a593Smuzhiyun /* SPI command information unit */ 274*4882a593Smuzhiyun U8 ReservedFirstByteOfCommandIU; /* 10h */ 275*4882a593Smuzhiyun U8 TaskAttribute; /* 11h */ 276*4882a593Smuzhiyun U8 TaskManagementFlags; /* 12h */ 277*4882a593Smuzhiyun U8 AdditionalCDBLength; /* 13h */ 278*4882a593Smuzhiyun U8 CDB[16]; /* 14h */ 279*4882a593Smuzhiyun /* Alias ID */ 280*4882a593Smuzhiyun U8 AliasID; /* 24h */ 281*4882a593Smuzhiyun U8 Reserved1; /* 25h */ 282*4882a593Smuzhiyun U16 Reserved2; /* 26h */ 283*4882a593Smuzhiyun } MPI_TARGET_SCSI_SPI_CMD_BUFFER, 284*4882a593Smuzhiyun MPI_POINTER PTR_MPI_TARGET_SCSI_SPI_CMD_BUFFER, 285*4882a593Smuzhiyun MpiTargetScsiSpiCmdBuffer, MPI_POINTER pMpiTargetScsiSpiCmdBuffer; 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun typedef struct _MPI_TARGET_SSP_CMD_BUFFER 289*4882a593Smuzhiyun { 290*4882a593Smuzhiyun U8 FrameType; /* 00h */ 291*4882a593Smuzhiyun U8 Reserved1; /* 01h */ 292*4882a593Smuzhiyun U16 Reserved2; /* 02h */ 293*4882a593Smuzhiyun U16 InitiatorTag; /* 04h */ 294*4882a593Smuzhiyun U16 DevHandle; /* 06h */ 295*4882a593Smuzhiyun /* COMMAND information unit starts here */ 296*4882a593Smuzhiyun U8 LogicalUnitNumber[8]; /* 08h */ 297*4882a593Smuzhiyun U8 Reserved3; /* 10h */ 298*4882a593Smuzhiyun U8 TaskAttribute; /* lower 3 bits */ /* 11h */ 299*4882a593Smuzhiyun U8 Reserved4; /* 12h */ 300*4882a593Smuzhiyun U8 AdditionalCDBLength; /* upper 5 bits */ /* 13h */ 301*4882a593Smuzhiyun U8 CDB[16]; /* 14h */ 302*4882a593Smuzhiyun /* Additional CDB bytes extend past the CDB field */ 303*4882a593Smuzhiyun } MPI_TARGET_SSP_CMD_BUFFER, MPI_POINTER PTR_MPI_TARGET_SSP_CMD_BUFFER, 304*4882a593Smuzhiyun MpiTargetSspCmdBuffer, MPI_POINTER pMpiTargetSspCmdBuffer; 305*4882a593Smuzhiyun 306*4882a593Smuzhiyun typedef struct _MPI_TARGET_SSP_TASK_BUFFER 307*4882a593Smuzhiyun { 308*4882a593Smuzhiyun U8 FrameType; /* 00h */ 309*4882a593Smuzhiyun U8 Reserved1; /* 01h */ 310*4882a593Smuzhiyun U16 Reserved2; /* 02h */ 311*4882a593Smuzhiyun U16 InitiatorTag; /* 04h */ 312*4882a593Smuzhiyun U16 DevHandle; /* 06h */ 313*4882a593Smuzhiyun /* TASK information unit starts here */ 314*4882a593Smuzhiyun U8 LogicalUnitNumber[8]; /* 08h */ 315*4882a593Smuzhiyun U8 Reserved3; /* 10h */ 316*4882a593Smuzhiyun U8 Reserved4; /* 11h */ 317*4882a593Smuzhiyun U8 TaskManagementFunction; /* 12h */ 318*4882a593Smuzhiyun U8 Reserved5; /* 13h */ 319*4882a593Smuzhiyun U16 ManagedTaskTag; /* 14h */ 320*4882a593Smuzhiyun U16 Reserved6; /* 16h */ 321*4882a593Smuzhiyun U32 Reserved7; /* 18h */ 322*4882a593Smuzhiyun U32 Reserved8; /* 1Ch */ 323*4882a593Smuzhiyun U32 Reserved9; /* 20h */ 324*4882a593Smuzhiyun } MPI_TARGET_SSP_TASK_BUFFER, MPI_POINTER PTR_MPI_TARGET_SSP_TASK_BUFFER, 325*4882a593Smuzhiyun MpiTargetSspTaskBuffer, MPI_POINTER pMpiTargetSspTaskBuffer; 326*4882a593Smuzhiyun 327*4882a593Smuzhiyun 328*4882a593Smuzhiyun /****************************************************************************/ 329*4882a593Smuzhiyun /* Target Assist Request */ 330*4882a593Smuzhiyun /****************************************************************************/ 331*4882a593Smuzhiyun 332*4882a593Smuzhiyun typedef struct _MSG_TARGET_ASSIST_REQUEST 333*4882a593Smuzhiyun { 334*4882a593Smuzhiyun U8 StatusCode; /* 00h */ 335*4882a593Smuzhiyun U8 TargetAssistFlags; /* 01h */ 336*4882a593Smuzhiyun U8 ChainOffset; /* 02h */ 337*4882a593Smuzhiyun U8 Function; /* 03h */ 338*4882a593Smuzhiyun U16 QueueTag; /* 04h */ 339*4882a593Smuzhiyun U8 Reserved; /* 06h */ 340*4882a593Smuzhiyun U8 MsgFlags; /* 07h */ 341*4882a593Smuzhiyun U32 MsgContext; /* 08h */ 342*4882a593Smuzhiyun U32 ReplyWord; /* 0Ch */ 343*4882a593Smuzhiyun U8 LUN[8]; /* 10h */ 344*4882a593Smuzhiyun U32 RelativeOffset; /* 18h */ 345*4882a593Smuzhiyun U32 DataLength; /* 1Ch */ 346*4882a593Smuzhiyun SGE_IO_UNION SGL[1]; /* 20h */ 347*4882a593Smuzhiyun } MSG_TARGET_ASSIST_REQUEST, MPI_POINTER PTR_MSG_TARGET_ASSIST_REQUEST, 348*4882a593Smuzhiyun TargetAssistRequest_t, MPI_POINTER pTargetAssistRequest_t; 349*4882a593Smuzhiyun 350*4882a593Smuzhiyun #define TARGET_ASSIST_FLAGS_DATA_DIRECTION (0x01) 351*4882a593Smuzhiyun #define TARGET_ASSIST_FLAGS_AUTO_STATUS (0x02) 352*4882a593Smuzhiyun #define TARGET_ASSIST_FLAGS_HIGH_PRIORITY (0x04) 353*4882a593Smuzhiyun #define TARGET_ASSIST_FLAGS_CONFIRMED (0x08) 354*4882a593Smuzhiyun #define TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER (0x80) 355*4882a593Smuzhiyun 356*4882a593Smuzhiyun /* Standard Target Mode Reply message */ 357*4882a593Smuzhiyun typedef struct _MSG_TARGET_ERROR_REPLY 358*4882a593Smuzhiyun { 359*4882a593Smuzhiyun U16 Reserved; /* 00h */ 360*4882a593Smuzhiyun U8 MsgLength; /* 02h */ 361*4882a593Smuzhiyun U8 Function; /* 03h */ 362*4882a593Smuzhiyun U16 Reserved1; /* 04h */ 363*4882a593Smuzhiyun U8 Reserved2; /* 06h */ 364*4882a593Smuzhiyun U8 MsgFlags; /* 07h */ 365*4882a593Smuzhiyun U32 MsgContext; /* 08h */ 366*4882a593Smuzhiyun U8 PriorityReason; /* 0Ch */ 367*4882a593Smuzhiyun U8 Reserved3; /* 0Dh */ 368*4882a593Smuzhiyun U16 IOCStatus; /* 0Eh */ 369*4882a593Smuzhiyun U32 IOCLogInfo; /* 10h */ 370*4882a593Smuzhiyun U32 ReplyWord; /* 14h */ 371*4882a593Smuzhiyun U32 TransferCount; /* 18h */ 372*4882a593Smuzhiyun } MSG_TARGET_ERROR_REPLY, MPI_POINTER PTR_MSG_TARGET_ERROR_REPLY, 373*4882a593Smuzhiyun TargetErrorReply_t, MPI_POINTER pTargetErrorReply_t; 374*4882a593Smuzhiyun 375*4882a593Smuzhiyun 376*4882a593Smuzhiyun /****************************************************************************/ 377*4882a593Smuzhiyun /* Target Assist Extended Request */ 378*4882a593Smuzhiyun /****************************************************************************/ 379*4882a593Smuzhiyun 380*4882a593Smuzhiyun typedef struct _MSG_TARGET_ASSIST_EXT_REQUEST 381*4882a593Smuzhiyun { 382*4882a593Smuzhiyun U8 StatusCode; /* 00h */ 383*4882a593Smuzhiyun U8 TargetAssistFlags; /* 01h */ 384*4882a593Smuzhiyun U8 ChainOffset; /* 02h */ 385*4882a593Smuzhiyun U8 Function; /* 03h */ 386*4882a593Smuzhiyun U16 QueueTag; /* 04h */ 387*4882a593Smuzhiyun U8 Reserved1; /* 06h */ 388*4882a593Smuzhiyun U8 MsgFlags; /* 07h */ 389*4882a593Smuzhiyun U32 MsgContext; /* 08h */ 390*4882a593Smuzhiyun U32 ReplyWord; /* 0Ch */ 391*4882a593Smuzhiyun U8 LUN[8]; /* 10h */ 392*4882a593Smuzhiyun U32 RelativeOffset; /* 18h */ 393*4882a593Smuzhiyun U32 Reserved2; /* 1Ch */ 394*4882a593Smuzhiyun U32 Reserved3; /* 20h */ 395*4882a593Smuzhiyun U32 PrimaryReferenceTag; /* 24h */ 396*4882a593Smuzhiyun U16 PrimaryApplicationTag; /* 28h */ 397*4882a593Smuzhiyun U16 PrimaryApplicationTagMask; /* 2Ah */ 398*4882a593Smuzhiyun U32 Reserved4; /* 2Ch */ 399*4882a593Smuzhiyun U32 DataLength; /* 30h */ 400*4882a593Smuzhiyun U32 BidirectionalDataLength; /* 34h */ 401*4882a593Smuzhiyun U32 SecondaryReferenceTag; /* 38h */ 402*4882a593Smuzhiyun U16 SecondaryApplicationTag; /* 3Ch */ 403*4882a593Smuzhiyun U16 Reserved5; /* 3Eh */ 404*4882a593Smuzhiyun U16 EEDPFlags; /* 40h */ 405*4882a593Smuzhiyun U16 ApplicationTagTranslationMask; /* 42h */ 406*4882a593Smuzhiyun U32 EEDPBlockSize; /* 44h */ 407*4882a593Smuzhiyun U8 SGLOffset0; /* 48h */ 408*4882a593Smuzhiyun U8 SGLOffset1; /* 49h */ 409*4882a593Smuzhiyun U8 SGLOffset2; /* 4Ah */ 410*4882a593Smuzhiyun U8 SGLOffset3; /* 4Bh */ 411*4882a593Smuzhiyun U32 Reserved6; /* 4Ch */ 412*4882a593Smuzhiyun SGE_IO_UNION SGL[1]; /* 50h */ 413*4882a593Smuzhiyun } MSG_TARGET_ASSIST_EXT_REQUEST, MPI_POINTER PTR_MSG_TARGET_ASSIST_EXT_REQUEST, 414*4882a593Smuzhiyun TargetAssistExtRequest_t, MPI_POINTER pTargetAssistExtRequest_t; 415*4882a593Smuzhiyun 416*4882a593Smuzhiyun /* see the defines after MSG_TARGET_ASSIST_REQUEST for TargetAssistFlags */ 417*4882a593Smuzhiyun 418*4882a593Smuzhiyun /* defines for the MsgFlags field */ 419*4882a593Smuzhiyun #define TARGET_ASSIST_EXT_MSGFLAGS_BIDIRECTIONAL (0x20) 420*4882a593Smuzhiyun #define TARGET_ASSIST_EXT_MSGFLAGS_MULTICAST (0x10) 421*4882a593Smuzhiyun #define TARGET_ASSIST_EXT_MSGFLAGS_SGL_OFFSET_CHAINS (0x08) 422*4882a593Smuzhiyun 423*4882a593Smuzhiyun /* defines for the EEDPFlags field */ 424*4882a593Smuzhiyun #define TARGET_ASSIST_EXT_EEDP_MASK_OP (0x0007) 425*4882a593Smuzhiyun #define TARGET_ASSIST_EXT_EEDP_NOOP_OP (0x0000) 426*4882a593Smuzhiyun #define TARGET_ASSIST_EXT_EEDP_CHK_OP (0x0001) 427*4882a593Smuzhiyun #define TARGET_ASSIST_EXT_EEDP_STRIP_OP (0x0002) 428*4882a593Smuzhiyun #define TARGET_ASSIST_EXT_EEDP_CHKRM_OP (0x0003) 429*4882a593Smuzhiyun #define TARGET_ASSIST_EXT_EEDP_INSERT_OP (0x0004) 430*4882a593Smuzhiyun #define TARGET_ASSIST_EXT_EEDP_REPLACE_OP (0x0006) 431*4882a593Smuzhiyun #define TARGET_ASSIST_EXT_EEDP_CHKREGEN_OP (0x0007) 432*4882a593Smuzhiyun 433*4882a593Smuzhiyun #define TARGET_ASSIST_EXT_EEDP_PASS_REF_TAG (0x0008) 434*4882a593Smuzhiyun 435*4882a593Smuzhiyun #define TARGET_ASSIST_EXT_EEDP_T10_CHK_MASK (0x0700) 436*4882a593Smuzhiyun #define TARGET_ASSIST_EXT_EEDP_T10_CHK_GUARD (0x0100) 437*4882a593Smuzhiyun #define TARGET_ASSIST_EXT_EEDP_T10_CHK_APPTAG (0x0200) 438*4882a593Smuzhiyun #define TARGET_ASSIST_EXT_EEDP_T10_CHK_REFTAG (0x0400) 439*4882a593Smuzhiyun #define TARGET_ASSIST_EXT_EEDP_T10_CHK_SHIFT (8) 440*4882a593Smuzhiyun 441*4882a593Smuzhiyun #define TARGET_ASSIST_EXT_EEDP_INC_SEC_APPTAG (0x1000) 442*4882a593Smuzhiyun #define TARGET_ASSIST_EXT_EEDP_INC_PRI_APPTAG (0x2000) 443*4882a593Smuzhiyun #define TARGET_ASSIST_EXT_EEDP_INC_SEC_REFTAG (0x4000) 444*4882a593Smuzhiyun #define TARGET_ASSIST_EXT_EEDP_INC_PRI_REFTAG (0x8000) 445*4882a593Smuzhiyun 446*4882a593Smuzhiyun 447*4882a593Smuzhiyun /****************************************************************************/ 448*4882a593Smuzhiyun /* Target Status Send Request */ 449*4882a593Smuzhiyun /****************************************************************************/ 450*4882a593Smuzhiyun 451*4882a593Smuzhiyun typedef struct _MSG_TARGET_STATUS_SEND_REQUEST 452*4882a593Smuzhiyun { 453*4882a593Smuzhiyun U8 StatusCode; /* 00h */ 454*4882a593Smuzhiyun U8 StatusFlags; /* 01h */ 455*4882a593Smuzhiyun U8 ChainOffset; /* 02h */ 456*4882a593Smuzhiyun U8 Function; /* 03h */ 457*4882a593Smuzhiyun U16 QueueTag; /* 04h */ 458*4882a593Smuzhiyun U8 Reserved; /* 06h */ 459*4882a593Smuzhiyun U8 MsgFlags; /* 07h */ 460*4882a593Smuzhiyun U32 MsgContext; /* 08h */ 461*4882a593Smuzhiyun U32 ReplyWord; /* 0Ch */ 462*4882a593Smuzhiyun U8 LUN[8]; /* 10h */ 463*4882a593Smuzhiyun SGE_SIMPLE_UNION StatusDataSGE; /* 18h */ 464*4882a593Smuzhiyun } MSG_TARGET_STATUS_SEND_REQUEST, MPI_POINTER PTR_MSG_TARGET_STATUS_SEND_REQUEST, 465*4882a593Smuzhiyun TargetStatusSendRequest_t, MPI_POINTER pTargetStatusSendRequest_t; 466*4882a593Smuzhiyun 467*4882a593Smuzhiyun #define TARGET_STATUS_SEND_FLAGS_AUTO_GOOD_STATUS (0x01) 468*4882a593Smuzhiyun #define TARGET_STATUS_SEND_FLAGS_HIGH_PRIORITY (0x04) 469*4882a593Smuzhiyun #define TARGET_STATUS_SEND_FLAGS_CONFIRMED (0x08) 470*4882a593Smuzhiyun #define TARGET_STATUS_SEND_FLAGS_REPOST_CMD_BUFFER (0x80) 471*4882a593Smuzhiyun 472*4882a593Smuzhiyun /* 473*4882a593Smuzhiyun * NOTE: FCP_RSP data is big-endian. When used on a little-endian system, this 474*4882a593Smuzhiyun * structure properly orders the bytes. 475*4882a593Smuzhiyun */ 476*4882a593Smuzhiyun typedef struct _MPI_TARGET_FCP_RSP_BUFFER 477*4882a593Smuzhiyun { 478*4882a593Smuzhiyun U8 Reserved0[8]; /* 00h */ 479*4882a593Smuzhiyun U8 Reserved1[2]; /* 08h */ 480*4882a593Smuzhiyun U8 FcpFlags; /* 0Ah */ 481*4882a593Smuzhiyun U8 FcpStatus; /* 0Bh */ 482*4882a593Smuzhiyun U32 FcpResid; /* 0Ch */ 483*4882a593Smuzhiyun U32 FcpSenseLength; /* 10h */ 484*4882a593Smuzhiyun U32 FcpResponseLength; /* 14h */ 485*4882a593Smuzhiyun U8 FcpResponseData[8]; /* 18h */ 486*4882a593Smuzhiyun U8 FcpSenseData[32]; /* Pad to 64 bytes */ /* 20h */ 487*4882a593Smuzhiyun } MPI_TARGET_FCP_RSP_BUFFER, MPI_POINTER PTR_MPI_TARGET_FCP_RSP_BUFFER, 488*4882a593Smuzhiyun MpiTargetFcpRspBuffer, MPI_POINTER pMpiTargetFcpRspBuffer; 489*4882a593Smuzhiyun 490*4882a593Smuzhiyun /* 491*4882a593Smuzhiyun * NOTE: The SPI status IU is big-endian. When used on a little-endian system, 492*4882a593Smuzhiyun * this structure properly orders the bytes. 493*4882a593Smuzhiyun */ 494*4882a593Smuzhiyun typedef struct _MPI_TARGET_SCSI_SPI_STATUS_IU 495*4882a593Smuzhiyun { 496*4882a593Smuzhiyun U8 Reserved0; /* 00h */ 497*4882a593Smuzhiyun U8 Reserved1; /* 01h */ 498*4882a593Smuzhiyun U8 Valid; /* 02h */ 499*4882a593Smuzhiyun U8 Status; /* 03h */ 500*4882a593Smuzhiyun U32 SenseDataListLength; /* 04h */ 501*4882a593Smuzhiyun U32 PktFailuresListLength; /* 08h */ 502*4882a593Smuzhiyun U8 SenseData[52]; /* Pad the IU to 64 bytes */ /* 0Ch */ 503*4882a593Smuzhiyun } MPI_TARGET_SCSI_SPI_STATUS_IU, MPI_POINTER PTR_MPI_TARGET_SCSI_SPI_STATUS_IU, 504*4882a593Smuzhiyun TargetScsiSpiStatusIU_t, MPI_POINTER pTargetScsiSpiStatusIU_t; 505*4882a593Smuzhiyun 506*4882a593Smuzhiyun /* 507*4882a593Smuzhiyun * NOTE: The SSP status IU is big-endian. When used on a little-endian system, 508*4882a593Smuzhiyun * this structure properly orders the bytes. 509*4882a593Smuzhiyun */ 510*4882a593Smuzhiyun typedef struct _MPI_TARGET_SSP_RSP_IU 511*4882a593Smuzhiyun { 512*4882a593Smuzhiyun U32 Reserved0[6]; /* reserved for SSP header */ /* 00h */ 513*4882a593Smuzhiyun /* start of RESPONSE information unit */ 514*4882a593Smuzhiyun U32 Reserved1; /* 18h */ 515*4882a593Smuzhiyun U32 Reserved2; /* 1Ch */ 516*4882a593Smuzhiyun U16 Reserved3; /* 20h */ 517*4882a593Smuzhiyun U8 DataPres; /* lower 2 bits */ /* 22h */ 518*4882a593Smuzhiyun U8 Status; /* 23h */ 519*4882a593Smuzhiyun U32 Reserved4; /* 24h */ 520*4882a593Smuzhiyun U32 SenseDataLength; /* 28h */ 521*4882a593Smuzhiyun U32 ResponseDataLength; /* 2Ch */ 522*4882a593Smuzhiyun U8 ResponseSenseData[4]; /* 30h */ 523*4882a593Smuzhiyun } MPI_TARGET_SSP_RSP_IU, MPI_POINTER PTR_MPI_TARGET_SSP_RSP_IU, 524*4882a593Smuzhiyun MpiTargetSspRspIu_t, MPI_POINTER pMpiTargetSspRspIu_t; 525*4882a593Smuzhiyun 526*4882a593Smuzhiyun 527*4882a593Smuzhiyun /****************************************************************************/ 528*4882a593Smuzhiyun /* Target Mode Abort Request */ 529*4882a593Smuzhiyun /****************************************************************************/ 530*4882a593Smuzhiyun 531*4882a593Smuzhiyun typedef struct _MSG_TARGET_MODE_ABORT_REQUEST 532*4882a593Smuzhiyun { 533*4882a593Smuzhiyun U8 AbortType; /* 00h */ 534*4882a593Smuzhiyun U8 Reserved; /* 01h */ 535*4882a593Smuzhiyun U8 ChainOffset; /* 02h */ 536*4882a593Smuzhiyun U8 Function; /* 03h */ 537*4882a593Smuzhiyun U16 Reserved1; /* 04h */ 538*4882a593Smuzhiyun U8 Reserved2; /* 06h */ 539*4882a593Smuzhiyun U8 MsgFlags; /* 07h */ 540*4882a593Smuzhiyun U32 MsgContext; /* 08h */ 541*4882a593Smuzhiyun U32 ReplyWord; /* 0Ch */ 542*4882a593Smuzhiyun U32 MsgContextToAbort; /* 10h */ 543*4882a593Smuzhiyun } MSG_TARGET_MODE_ABORT, MPI_POINTER PTR_MSG_TARGET_MODE_ABORT, 544*4882a593Smuzhiyun TargetModeAbort_t, MPI_POINTER pTargetModeAbort_t; 545*4882a593Smuzhiyun 546*4882a593Smuzhiyun #define TARGET_MODE_ABORT_TYPE_ALL_CMD_BUFFERS (0x00) 547*4882a593Smuzhiyun #define TARGET_MODE_ABORT_TYPE_ALL_IO (0x01) 548*4882a593Smuzhiyun #define TARGET_MODE_ABORT_TYPE_EXACT_IO (0x02) 549*4882a593Smuzhiyun #define TARGET_MODE_ABORT_TYPE_EXACT_IO_REQUEST (0x03) 550*4882a593Smuzhiyun 551*4882a593Smuzhiyun /* Target Mode Abort Reply */ 552*4882a593Smuzhiyun 553*4882a593Smuzhiyun typedef struct _MSG_TARGET_MODE_ABORT_REPLY 554*4882a593Smuzhiyun { 555*4882a593Smuzhiyun U16 Reserved; /* 00h */ 556*4882a593Smuzhiyun U8 MsgLength; /* 02h */ 557*4882a593Smuzhiyun U8 Function; /* 03h */ 558*4882a593Smuzhiyun U16 Reserved1; /* 04h */ 559*4882a593Smuzhiyun U8 Reserved2; /* 06h */ 560*4882a593Smuzhiyun U8 MsgFlags; /* 07h */ 561*4882a593Smuzhiyun U32 MsgContext; /* 08h */ 562*4882a593Smuzhiyun U16 Reserved3; /* 0Ch */ 563*4882a593Smuzhiyun U16 IOCStatus; /* 0Eh */ 564*4882a593Smuzhiyun U32 IOCLogInfo; /* 10h */ 565*4882a593Smuzhiyun U32 AbortCount; /* 14h */ 566*4882a593Smuzhiyun } MSG_TARGET_MODE_ABORT_REPLY, MPI_POINTER PTR_MSG_TARGET_MODE_ABORT_REPLY, 567*4882a593Smuzhiyun TargetModeAbortReply_t, MPI_POINTER pTargetModeAbortReply_t; 568*4882a593Smuzhiyun 569*4882a593Smuzhiyun 570*4882a593Smuzhiyun /****************************************************************************/ 571*4882a593Smuzhiyun /* Target Mode Context Reply */ 572*4882a593Smuzhiyun /****************************************************************************/ 573*4882a593Smuzhiyun 574*4882a593Smuzhiyun #define TARGET_MODE_REPLY_IO_INDEX_MASK (0x00003FFF) 575*4882a593Smuzhiyun #define TARGET_MODE_REPLY_IO_INDEX_SHIFT (0) 576*4882a593Smuzhiyun #define TARGET_MODE_REPLY_INITIATOR_INDEX_MASK (0x03FFC000) 577*4882a593Smuzhiyun #define TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT (14) 578*4882a593Smuzhiyun #define TARGET_MODE_REPLY_ALIAS_MASK (0x04000000) 579*4882a593Smuzhiyun #define TARGET_MODE_REPLY_ALIAS_SHIFT (26) 580*4882a593Smuzhiyun #define TARGET_MODE_REPLY_PORT_MASK (0x10000000) 581*4882a593Smuzhiyun #define TARGET_MODE_REPLY_PORT_SHIFT (28) 582*4882a593Smuzhiyun 583*4882a593Smuzhiyun 584*4882a593Smuzhiyun #define GET_IO_INDEX(x) (((x) & TARGET_MODE_REPLY_IO_INDEX_MASK) \ 585*4882a593Smuzhiyun >> TARGET_MODE_REPLY_IO_INDEX_SHIFT) 586*4882a593Smuzhiyun 587*4882a593Smuzhiyun #define SET_IO_INDEX(t, i) \ 588*4882a593Smuzhiyun ((t) = ((t) & ~TARGET_MODE_REPLY_IO_INDEX_MASK) | \ 589*4882a593Smuzhiyun (((i) << TARGET_MODE_REPLY_IO_INDEX_SHIFT) & \ 590*4882a593Smuzhiyun TARGET_MODE_REPLY_IO_INDEX_MASK)) 591*4882a593Smuzhiyun 592*4882a593Smuzhiyun #define GET_INITIATOR_INDEX(x) (((x) & TARGET_MODE_REPLY_INITIATOR_INDEX_MASK) \ 593*4882a593Smuzhiyun >> TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT) 594*4882a593Smuzhiyun 595*4882a593Smuzhiyun #define SET_INITIATOR_INDEX(t, ii) \ 596*4882a593Smuzhiyun ((t) = ((t) & ~TARGET_MODE_REPLY_INITIATOR_INDEX_MASK) | \ 597*4882a593Smuzhiyun (((ii) << TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT) & \ 598*4882a593Smuzhiyun TARGET_MODE_REPLY_INITIATOR_INDEX_MASK)) 599*4882a593Smuzhiyun 600*4882a593Smuzhiyun #define GET_ALIAS(x) (((x) & TARGET_MODE_REPLY_ALIAS_MASK) \ 601*4882a593Smuzhiyun >> TARGET_MODE_REPLY_ALIAS_SHIFT) 602*4882a593Smuzhiyun 603*4882a593Smuzhiyun #define SET_ALIAS(t, a) ((t) = ((t) & ~TARGET_MODE_REPLY_ALIAS_MASK) | \ 604*4882a593Smuzhiyun (((a) << TARGET_MODE_REPLY_ALIAS_SHIFT) & \ 605*4882a593Smuzhiyun TARGET_MODE_REPLY_ALIAS_MASK)) 606*4882a593Smuzhiyun 607*4882a593Smuzhiyun #define GET_PORT(x) (((x) & TARGET_MODE_REPLY_PORT_MASK) \ 608*4882a593Smuzhiyun >> TARGET_MODE_REPLY_PORT_SHIFT) 609*4882a593Smuzhiyun 610*4882a593Smuzhiyun #define SET_PORT(t, p) ((t) = ((t) & ~TARGET_MODE_REPLY_PORT_MASK) | \ 611*4882a593Smuzhiyun (((p) << TARGET_MODE_REPLY_PORT_SHIFT) & \ 612*4882a593Smuzhiyun TARGET_MODE_REPLY_PORT_MASK)) 613*4882a593Smuzhiyun 614*4882a593Smuzhiyun /* the following obsolete values are for MPI v1.0 support */ 615*4882a593Smuzhiyun #define TARGET_MODE_REPLY_0100_MASK_HOST_INDEX (0x000003FF) 616*4882a593Smuzhiyun #define TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX (0) 617*4882a593Smuzhiyun #define TARGET_MODE_REPLY_0100_MASK_IOC_INDEX (0x001FF800) 618*4882a593Smuzhiyun #define TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX (11) 619*4882a593Smuzhiyun #define TARGET_MODE_REPLY_0100_PORT_MASK (0x00400000) 620*4882a593Smuzhiyun #define TARGET_MODE_REPLY_0100_PORT_SHIFT (22) 621*4882a593Smuzhiyun #define TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX (0x1F800000) 622*4882a593Smuzhiyun #define TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX (23) 623*4882a593Smuzhiyun 624*4882a593Smuzhiyun #define GET_HOST_INDEX_0100(x) (((x) & TARGET_MODE_REPLY_0100_MASK_HOST_INDEX) \ 625*4882a593Smuzhiyun >> TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX) 626*4882a593Smuzhiyun 627*4882a593Smuzhiyun #define SET_HOST_INDEX_0100(t, hi) \ 628*4882a593Smuzhiyun ((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_HOST_INDEX) | \ 629*4882a593Smuzhiyun (((hi) << TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX) & \ 630*4882a593Smuzhiyun TARGET_MODE_REPLY_0100_MASK_HOST_INDEX)) 631*4882a593Smuzhiyun 632*4882a593Smuzhiyun #define GET_IOC_INDEX_0100(x) (((x) & TARGET_MODE_REPLY_0100_MASK_IOC_INDEX) \ 633*4882a593Smuzhiyun >> TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX) 634*4882a593Smuzhiyun 635*4882a593Smuzhiyun #define SET_IOC_INDEX_0100(t, ii) \ 636*4882a593Smuzhiyun ((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_IOC_INDEX) | \ 637*4882a593Smuzhiyun (((ii) << TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX) & \ 638*4882a593Smuzhiyun TARGET_MODE_REPLY_0100_MASK_IOC_INDEX)) 639*4882a593Smuzhiyun 640*4882a593Smuzhiyun #define GET_INITIATOR_INDEX_0100(x) \ 641*4882a593Smuzhiyun (((x) & TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX) \ 642*4882a593Smuzhiyun >> TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX) 643*4882a593Smuzhiyun 644*4882a593Smuzhiyun #define SET_INITIATOR_INDEX_0100(t, ii) \ 645*4882a593Smuzhiyun ((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX) | \ 646*4882a593Smuzhiyun (((ii) << TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX) & \ 647*4882a593Smuzhiyun TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX)) 648*4882a593Smuzhiyun 649*4882a593Smuzhiyun 650*4882a593Smuzhiyun #endif 651*4882a593Smuzhiyun 652