xref: /OK3568_Linux_fs/kernel/drivers/message/fusion/lsi/mpi.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *  Copyright (c) 2000-2008 LSI Corporation.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  *           Name:  mpi.h
7*4882a593Smuzhiyun  *          Title:  MPI Message independent structures and definitions
8*4882a593Smuzhiyun  *  Creation Date:  July 27, 2000
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  *    mpi.h Version:  01.05.16
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  *  Version History
13*4882a593Smuzhiyun  *  ---------------
14*4882a593Smuzhiyun  *
15*4882a593Smuzhiyun  *  Date      Version   Description
16*4882a593Smuzhiyun  *  --------  --------  ------------------------------------------------------
17*4882a593Smuzhiyun  *  05-08-00  00.10.01  Original release for 0.10 spec dated 4/26/2000.
18*4882a593Smuzhiyun  *  05-24-00  00.10.02  Added MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH definition.
19*4882a593Smuzhiyun  *  06-06-00  01.00.01  Update MPI_VERSION_MAJOR and MPI_VERSION_MINOR.
20*4882a593Smuzhiyun  *  06-22-00  01.00.02  Added MPI_IOCSTATUS_LAN_ definitions.
21*4882a593Smuzhiyun  *                      Removed LAN_SUSPEND function definition.
22*4882a593Smuzhiyun  *                      Added MPI_MSGFLAGS_CONTINUATION_REPLY definition.
23*4882a593Smuzhiyun  *  06-30-00  01.00.03  Added MPI_CONTEXT_REPLY_TYPE_LAN definition.
24*4882a593Smuzhiyun  *                      Added MPI_GET/SET_CONTEXT_REPLY_TYPE macros.
25*4882a593Smuzhiyun  *  07-27-00  01.00.04  Added MPI_FAULT_ definitions.
26*4882a593Smuzhiyun  *                      Removed MPI_IOCSTATUS_MSG/DATA_XFER_ERROR definitions.
27*4882a593Smuzhiyun  *                      Added MPI_IOCSTATUS_INTERNAL_ERROR definition.
28*4882a593Smuzhiyun  *                      Added MPI_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH.
29*4882a593Smuzhiyun  *  11-02-00  01.01.01  Original release for post 1.0 work.
30*4882a593Smuzhiyun  *  12-04-00  01.01.02  Added new function codes.
31*4882a593Smuzhiyun  *  01-09-01  01.01.03  Added more definitions to the system interface section
32*4882a593Smuzhiyun  *                      Added MPI_IOCSTATUS_TARGET_STS_DATA_NOT_SENT.
33*4882a593Smuzhiyun  *  01-25-01  01.01.04  Changed MPI_VERSION_MINOR from 0x00 to 0x01.
34*4882a593Smuzhiyun  *  02-20-01  01.01.05  Started using MPI_POINTER.
35*4882a593Smuzhiyun  *                      Fixed value for MPI_DIAG_RW_ENABLE.
36*4882a593Smuzhiyun  *                      Added defines for MPI_DIAG_PREVENT_IOC_BOOT and
37*4882a593Smuzhiyun  *                      MPI_DIAG_CLEAR_FLASH_BAD_SIG.
38*4882a593Smuzhiyun  *                      Obsoleted MPI_IOCSTATUS_TARGET_FC_ defines.
39*4882a593Smuzhiyun  *  02-27-01  01.01.06  Removed MPI_HOST_INDEX_REGISTER define.
40*4882a593Smuzhiyun  *                      Added function codes for RAID.
41*4882a593Smuzhiyun  *  04-09-01  01.01.07  Added alternate define for MPI_DOORBELL_ACTIVE,
42*4882a593Smuzhiyun  *                      MPI_DOORBELL_USED, to better match the spec.
43*4882a593Smuzhiyun  *  08-08-01  01.02.01  Original release for v1.2 work.
44*4882a593Smuzhiyun  *                      Changed MPI_VERSION_MINOR from 0x01 to 0x02.
45*4882a593Smuzhiyun  *                      Added define MPI_FUNCTION_TOOLBOX.
46*4882a593Smuzhiyun  *  09-28-01  01.02.02  New function code MPI_SCSI_ENCLOSURE_PROCESSOR.
47*4882a593Smuzhiyun  *  11-01-01  01.02.03  Changed name to MPI_FUNCTION_SCSI_ENCLOSURE_PROCESSOR.
48*4882a593Smuzhiyun  *  03-14-02  01.02.04  Added MPI_HEADER_VERSION_ defines.
49*4882a593Smuzhiyun  *  05-31-02  01.02.05  Bumped MPI_HEADER_VERSION_UNIT.
50*4882a593Smuzhiyun  *  07-12-02  01.02.06  Added define for MPI_FUNCTION_MAILBOX.
51*4882a593Smuzhiyun  *  09-16-02  01.02.07  Bumped value for MPI_HEADER_VERSION_UNIT.
52*4882a593Smuzhiyun  *  11-15-02  01.02.08  Added define MPI_IOCSTATUS_TARGET_INVALID_IO_INDEX and
53*4882a593Smuzhiyun  *                      obsoleted define MPI_IOCSTATUS_TARGET_INVALID_IOCINDEX.
54*4882a593Smuzhiyun  *  04-01-03  01.02.09  New IOCStatus code: MPI_IOCSTATUS_FC_EXCHANGE_CANCELED
55*4882a593Smuzhiyun  *  06-26-03  01.02.10  Bumped MPI_HEADER_VERSION_UNIT value.
56*4882a593Smuzhiyun  *  01-16-04  01.02.11  Added define for MPI_IOCLOGINFO_TYPE_SHIFT.
57*4882a593Smuzhiyun  *  04-29-04  01.02.12  Added function codes for MPI_FUNCTION_DIAG_BUFFER_POST
58*4882a593Smuzhiyun  *                      and MPI_FUNCTION_DIAG_RELEASE.
59*4882a593Smuzhiyun  *                      Added MPI_IOCSTATUS_DIAGNOSTIC_RELEASED define.
60*4882a593Smuzhiyun  *                      Bumped MPI_HEADER_VERSION_UNIT value.
61*4882a593Smuzhiyun  *  05-11-04  01.03.01  Bumped MPI_VERSION_MINOR for MPI v1.3.
62*4882a593Smuzhiyun  *                      Added codes for Inband.
63*4882a593Smuzhiyun  *  08-19-04  01.05.01  Added defines for Host Buffer Access Control doorbell.
64*4882a593Smuzhiyun  *                      Added define for offset of High Priority Request Queue.
65*4882a593Smuzhiyun  *                      Added new function codes and new IOCStatus codes.
66*4882a593Smuzhiyun  *                      Added a IOCLogInfo type of SAS.
67*4882a593Smuzhiyun  *  12-07-04  01.05.02  Bumped MPI_HEADER_VERSION_UNIT.
68*4882a593Smuzhiyun  *  12-09-04  01.05.03  Bumped MPI_HEADER_VERSION_UNIT.
69*4882a593Smuzhiyun  *  01-15-05  01.05.04  Bumped MPI_HEADER_VERSION_UNIT.
70*4882a593Smuzhiyun  *  02-09-05  01.05.05  Bumped MPI_HEADER_VERSION_UNIT.
71*4882a593Smuzhiyun  *  02-22-05  01.05.06  Bumped MPI_HEADER_VERSION_UNIT.
72*4882a593Smuzhiyun  *  03-11-05  01.05.07  Removed function codes for SCSI IO 32 and
73*4882a593Smuzhiyun  *                      TargetAssistExtended requests.
74*4882a593Smuzhiyun  *                      Removed EEDP IOCStatus codes.
75*4882a593Smuzhiyun  *  06-24-05  01.05.08  Added function codes for SCSI IO 32 and
76*4882a593Smuzhiyun  *                      TargetAssistExtended requests.
77*4882a593Smuzhiyun  *                      Added EEDP IOCStatus codes.
78*4882a593Smuzhiyun  *  08-03-05  01.05.09  Bumped MPI_HEADER_VERSION_UNIT.
79*4882a593Smuzhiyun  *  08-30-05  01.05.10  Added 2 new IOCStatus codes for Target.
80*4882a593Smuzhiyun  *  03-27-06  01.05.11  Bumped MPI_HEADER_VERSION_UNIT.
81*4882a593Smuzhiyun  *  10-11-06  01.05.12  Bumped MPI_HEADER_VERSION_UNIT.
82*4882a593Smuzhiyun  *  05-24-07  01.05.13  Bumped MPI_HEADER_VERSION_UNIT.
83*4882a593Smuzhiyun  *  08-07-07  01.05.14  Bumped MPI_HEADER_VERSION_UNIT.
84*4882a593Smuzhiyun  *  01-15-08  01.05.15  Bumped MPI_HEADER_VERSION_UNIT.
85*4882a593Smuzhiyun  *  03-28-08  01.05.16  Bumped MPI_HEADER_VERSION_UNIT.
86*4882a593Smuzhiyun  *  --------------------------------------------------------------------------
87*4882a593Smuzhiyun  */
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun #ifndef MPI_H
90*4882a593Smuzhiyun #define MPI_H
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun /*****************************************************************************
94*4882a593Smuzhiyun *
95*4882a593Smuzhiyun *        M P I    V e r s i o n    D e f i n i t i o n s
96*4882a593Smuzhiyun *
97*4882a593Smuzhiyun *****************************************************************************/
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun #define MPI_VERSION_MAJOR                   (0x01)
100*4882a593Smuzhiyun #define MPI_VERSION_MINOR                   (0x05)
101*4882a593Smuzhiyun #define MPI_VERSION_MAJOR_MASK              (0xFF00)
102*4882a593Smuzhiyun #define MPI_VERSION_MAJOR_SHIFT             (8)
103*4882a593Smuzhiyun #define MPI_VERSION_MINOR_MASK              (0x00FF)
104*4882a593Smuzhiyun #define MPI_VERSION_MINOR_SHIFT             (0)
105*4882a593Smuzhiyun #define MPI_VERSION ((MPI_VERSION_MAJOR << MPI_VERSION_MAJOR_SHIFT) |   \
106*4882a593Smuzhiyun                                       MPI_VERSION_MINOR)
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun #define MPI_VERSION_01_00                   (0x0100)
109*4882a593Smuzhiyun #define MPI_VERSION_01_01                   (0x0101)
110*4882a593Smuzhiyun #define MPI_VERSION_01_02                   (0x0102)
111*4882a593Smuzhiyun #define MPI_VERSION_01_03                   (0x0103)
112*4882a593Smuzhiyun #define MPI_VERSION_01_05                   (0x0105)
113*4882a593Smuzhiyun /* Note: The major versions of 0xe0 through 0xff are reserved */
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun /* versioning for this MPI header set */
116*4882a593Smuzhiyun #define MPI_HEADER_VERSION_UNIT             (0x13)
117*4882a593Smuzhiyun #define MPI_HEADER_VERSION_DEV              (0x00)
118*4882a593Smuzhiyun #define MPI_HEADER_VERSION_UNIT_MASK        (0xFF00)
119*4882a593Smuzhiyun #define MPI_HEADER_VERSION_UNIT_SHIFT       (8)
120*4882a593Smuzhiyun #define MPI_HEADER_VERSION_DEV_MASK         (0x00FF)
121*4882a593Smuzhiyun #define MPI_HEADER_VERSION_DEV_SHIFT        (0)
122*4882a593Smuzhiyun #define MPI_HEADER_VERSION ((MPI_HEADER_VERSION_UNIT << 8) | MPI_HEADER_VERSION_DEV)
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun /*****************************************************************************
125*4882a593Smuzhiyun *
126*4882a593Smuzhiyun *        I O C    S t a t e    D e f i n i t i o n s
127*4882a593Smuzhiyun *
128*4882a593Smuzhiyun *****************************************************************************/
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun #define MPI_IOC_STATE_RESET                 (0x00000000)
131*4882a593Smuzhiyun #define MPI_IOC_STATE_READY                 (0x10000000)
132*4882a593Smuzhiyun #define MPI_IOC_STATE_OPERATIONAL           (0x20000000)
133*4882a593Smuzhiyun #define MPI_IOC_STATE_FAULT                 (0x40000000)
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun #define MPI_IOC_STATE_MASK                  (0xF0000000)
136*4882a593Smuzhiyun #define MPI_IOC_STATE_SHIFT                 (28)
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun /* Fault state codes (product independent range 0x8000-0xFFFF) */
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun #define MPI_FAULT_REQUEST_MESSAGE_PCI_PARITY_ERROR  (0x8111)
141*4882a593Smuzhiyun #define MPI_FAULT_REQUEST_MESSAGE_PCI_BUS_FAULT     (0x8112)
142*4882a593Smuzhiyun #define MPI_FAULT_REPLY_MESSAGE_PCI_PARITY_ERROR    (0x8113)
143*4882a593Smuzhiyun #define MPI_FAULT_REPLY_MESSAGE_PCI_BUS_FAULT       (0x8114)
144*4882a593Smuzhiyun #define MPI_FAULT_DATA_SEND_PCI_PARITY_ERROR        (0x8115)
145*4882a593Smuzhiyun #define MPI_FAULT_DATA_SEND_PCI_BUS_FAULT           (0x8116)
146*4882a593Smuzhiyun #define MPI_FAULT_DATA_RECEIVE_PCI_PARITY_ERROR     (0x8117)
147*4882a593Smuzhiyun #define MPI_FAULT_DATA_RECEIVE_PCI_BUS_FAULT        (0x8118)
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun /*****************************************************************************
151*4882a593Smuzhiyun *
152*4882a593Smuzhiyun *        P C I    S y s t e m    I n t e r f a c e    R e g i s t e r s
153*4882a593Smuzhiyun *
154*4882a593Smuzhiyun *****************************************************************************/
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun /*
157*4882a593Smuzhiyun  * Defines for working with the System Doorbell register.
158*4882a593Smuzhiyun  * Values for doorbell function codes are included in the section that defines
159*4882a593Smuzhiyun  * all the function codes (further on in this file).
160*4882a593Smuzhiyun  */
161*4882a593Smuzhiyun #define MPI_DOORBELL_OFFSET                 (0x00000000)
162*4882a593Smuzhiyun #define MPI_DOORBELL_ACTIVE                 (0x08000000) /* DoorbellUsed */
163*4882a593Smuzhiyun #define MPI_DOORBELL_USED                   (MPI_DOORBELL_ACTIVE)
164*4882a593Smuzhiyun #define MPI_DOORBELL_ACTIVE_SHIFT           (27)
165*4882a593Smuzhiyun #define MPI_DOORBELL_WHO_INIT_MASK          (0x07000000)
166*4882a593Smuzhiyun #define MPI_DOORBELL_WHO_INIT_SHIFT         (24)
167*4882a593Smuzhiyun #define MPI_DOORBELL_FUNCTION_MASK          (0xFF000000)
168*4882a593Smuzhiyun #define MPI_DOORBELL_FUNCTION_SHIFT         (24)
169*4882a593Smuzhiyun #define MPI_DOORBELL_ADD_DWORDS_MASK        (0x00FF0000)
170*4882a593Smuzhiyun #define MPI_DOORBELL_ADD_DWORDS_SHIFT       (16)
171*4882a593Smuzhiyun #define MPI_DOORBELL_DATA_MASK              (0x0000FFFF)
172*4882a593Smuzhiyun #define MPI_DOORBELL_FUNCTION_SPECIFIC_MASK (0x0000FFFF)
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun /* values for Host Buffer Access Control doorbell function */
175*4882a593Smuzhiyun #define MPI_DB_HPBAC_VALUE_MASK             (0x0000F000)
176*4882a593Smuzhiyun #define MPI_DB_HPBAC_ENABLE_ACCESS          (0x01)
177*4882a593Smuzhiyun #define MPI_DB_HPBAC_DISABLE_ACCESS         (0x02)
178*4882a593Smuzhiyun #define MPI_DB_HPBAC_FREE_BUFFER            (0x03)
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun #define MPI_WRITE_SEQUENCE_OFFSET           (0x00000004)
182*4882a593Smuzhiyun #define MPI_WRSEQ_KEY_VALUE_MASK            (0x0000000F)
183*4882a593Smuzhiyun #define MPI_WRSEQ_1ST_KEY_VALUE             (0x04)
184*4882a593Smuzhiyun #define MPI_WRSEQ_2ND_KEY_VALUE             (0x0B)
185*4882a593Smuzhiyun #define MPI_WRSEQ_3RD_KEY_VALUE             (0x02)
186*4882a593Smuzhiyun #define MPI_WRSEQ_4TH_KEY_VALUE             (0x07)
187*4882a593Smuzhiyun #define MPI_WRSEQ_5TH_KEY_VALUE             (0x0D)
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun #define MPI_DIAGNOSTIC_OFFSET               (0x00000008)
190*4882a593Smuzhiyun #define MPI_DIAG_CLEAR_FLASH_BAD_SIG        (0x00000400)
191*4882a593Smuzhiyun #define MPI_DIAG_PREVENT_IOC_BOOT           (0x00000200)
192*4882a593Smuzhiyun #define MPI_DIAG_DRWE                       (0x00000080)
193*4882a593Smuzhiyun #define MPI_DIAG_FLASH_BAD_SIG              (0x00000040)
194*4882a593Smuzhiyun #define MPI_DIAG_RESET_HISTORY              (0x00000020)
195*4882a593Smuzhiyun #define MPI_DIAG_RW_ENABLE                  (0x00000010)
196*4882a593Smuzhiyun #define MPI_DIAG_RESET_ADAPTER              (0x00000004)
197*4882a593Smuzhiyun #define MPI_DIAG_DISABLE_ARM                (0x00000002)
198*4882a593Smuzhiyun #define MPI_DIAG_MEM_ENABLE                 (0x00000001)
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun #define MPI_TEST_BASE_ADDRESS_OFFSET        (0x0000000C)
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun #define MPI_DIAG_RW_DATA_OFFSET             (0x00000010)
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun #define MPI_DIAG_RW_ADDRESS_OFFSET          (0x00000014)
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun #define MPI_HOST_INTERRUPT_STATUS_OFFSET    (0x00000030)
207*4882a593Smuzhiyun #define MPI_HIS_IOP_DOORBELL_STATUS         (0x80000000)
208*4882a593Smuzhiyun #define MPI_HIS_REPLY_MESSAGE_INTERRUPT     (0x00000008)
209*4882a593Smuzhiyun #define MPI_HIS_DOORBELL_INTERRUPT          (0x00000001)
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun #define MPI_HOST_INTERRUPT_MASK_OFFSET      (0x00000034)
212*4882a593Smuzhiyun #define MPI_HIM_RIM                         (0x00000008)
213*4882a593Smuzhiyun #define MPI_HIM_DIM                         (0x00000001)
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun #define MPI_REQUEST_QUEUE_OFFSET            (0x00000040)
216*4882a593Smuzhiyun #define MPI_REQUEST_POST_FIFO_OFFSET        (0x00000040)
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun #define MPI_REPLY_QUEUE_OFFSET              (0x00000044)
219*4882a593Smuzhiyun #define MPI_REPLY_POST_FIFO_OFFSET          (0x00000044)
220*4882a593Smuzhiyun #define MPI_REPLY_FREE_FIFO_OFFSET          (0x00000044)
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun #define MPI_HI_PRI_REQUEST_QUEUE_OFFSET     (0x00000048)
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun /*****************************************************************************
227*4882a593Smuzhiyun *
228*4882a593Smuzhiyun *        M e s s a g e    F r a m e    D e s c r i p t o r s
229*4882a593Smuzhiyun *
230*4882a593Smuzhiyun *****************************************************************************/
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun #define MPI_REQ_MF_DESCRIPTOR_NB_MASK       (0x00000003)
233*4882a593Smuzhiyun #define MPI_REQ_MF_DESCRIPTOR_F_BIT         (0x00000004)
234*4882a593Smuzhiyun #define MPI_REQ_MF_DESCRIPTOR_ADDRESS_MASK  (0xFFFFFFF8)
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun #define MPI_ADDRESS_REPLY_A_BIT             (0x80000000)
237*4882a593Smuzhiyun #define MPI_ADDRESS_REPLY_ADDRESS_MASK      (0x7FFFFFFF)
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun #define MPI_CONTEXT_REPLY_A_BIT             (0x80000000)
240*4882a593Smuzhiyun #define MPI_CONTEXT_REPLY_TYPE_MASK         (0x60000000)
241*4882a593Smuzhiyun #define MPI_CONTEXT_REPLY_TYPE_SCSI_INIT    (0x00)
242*4882a593Smuzhiyun #define MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET  (0x01)
243*4882a593Smuzhiyun #define MPI_CONTEXT_REPLY_TYPE_LAN          (0x02)
244*4882a593Smuzhiyun #define MPI_CONTEXT_REPLY_TYPE_SHIFT        (29)
245*4882a593Smuzhiyun #define MPI_CONTEXT_REPLY_CONTEXT_MASK      (0x1FFFFFFF)
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun /****************************************************************************/
249*4882a593Smuzhiyun /* Context Reply macros                                                     */
250*4882a593Smuzhiyun /****************************************************************************/
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun #define MPI_GET_CONTEXT_REPLY_TYPE(x)  (((x) & MPI_CONTEXT_REPLY_TYPE_MASK) \
253*4882a593Smuzhiyun                                           >> MPI_CONTEXT_REPLY_TYPE_SHIFT)
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun #define MPI_SET_CONTEXT_REPLY_TYPE(x, typ)                                  \
256*4882a593Smuzhiyun             ((x) = ((x) & ~MPI_CONTEXT_REPLY_TYPE_MASK) |                   \
257*4882a593Smuzhiyun                             (((typ) << MPI_CONTEXT_REPLY_TYPE_SHIFT) &      \
258*4882a593Smuzhiyun                                         MPI_CONTEXT_REPLY_TYPE_MASK))
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun /*****************************************************************************
262*4882a593Smuzhiyun *
263*4882a593Smuzhiyun *        M e s s a g e    F u n c t i o n s
264*4882a593Smuzhiyun *              0x80 -> 0x8F reserved for private message use per product
265*4882a593Smuzhiyun *
266*4882a593Smuzhiyun *
267*4882a593Smuzhiyun *****************************************************************************/
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun #define MPI_FUNCTION_SCSI_IO_REQUEST                (0x00)
270*4882a593Smuzhiyun #define MPI_FUNCTION_SCSI_TASK_MGMT                 (0x01)
271*4882a593Smuzhiyun #define MPI_FUNCTION_IOC_INIT                       (0x02)
272*4882a593Smuzhiyun #define MPI_FUNCTION_IOC_FACTS                      (0x03)
273*4882a593Smuzhiyun #define MPI_FUNCTION_CONFIG                         (0x04)
274*4882a593Smuzhiyun #define MPI_FUNCTION_PORT_FACTS                     (0x05)
275*4882a593Smuzhiyun #define MPI_FUNCTION_PORT_ENABLE                    (0x06)
276*4882a593Smuzhiyun #define MPI_FUNCTION_EVENT_NOTIFICATION             (0x07)
277*4882a593Smuzhiyun #define MPI_FUNCTION_EVENT_ACK                      (0x08)
278*4882a593Smuzhiyun #define MPI_FUNCTION_FW_DOWNLOAD                    (0x09)
279*4882a593Smuzhiyun #define MPI_FUNCTION_TARGET_CMD_BUFFER_POST         (0x0A)
280*4882a593Smuzhiyun #define MPI_FUNCTION_TARGET_ASSIST                  (0x0B)
281*4882a593Smuzhiyun #define MPI_FUNCTION_TARGET_STATUS_SEND             (0x0C)
282*4882a593Smuzhiyun #define MPI_FUNCTION_TARGET_MODE_ABORT              (0x0D)
283*4882a593Smuzhiyun #define MPI_FUNCTION_FC_LINK_SRVC_BUF_POST          (0x0E)
284*4882a593Smuzhiyun #define MPI_FUNCTION_FC_LINK_SRVC_RSP               (0x0F)
285*4882a593Smuzhiyun #define MPI_FUNCTION_FC_EX_LINK_SRVC_SEND           (0x10)
286*4882a593Smuzhiyun #define MPI_FUNCTION_FC_ABORT                       (0x11)
287*4882a593Smuzhiyun #define MPI_FUNCTION_FW_UPLOAD                      (0x12)
288*4882a593Smuzhiyun #define MPI_FUNCTION_FC_COMMON_TRANSPORT_SEND       (0x13)
289*4882a593Smuzhiyun #define MPI_FUNCTION_FC_PRIMITIVE_SEND              (0x14)
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun #define MPI_FUNCTION_RAID_ACTION                    (0x15)
292*4882a593Smuzhiyun #define MPI_FUNCTION_RAID_SCSI_IO_PASSTHROUGH       (0x16)
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun #define MPI_FUNCTION_TOOLBOX                        (0x17)
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun #define MPI_FUNCTION_SCSI_ENCLOSURE_PROCESSOR       (0x18)
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun #define MPI_FUNCTION_MAILBOX                        (0x19)
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun #define MPI_FUNCTION_SMP_PASSTHROUGH                (0x1A)
301*4882a593Smuzhiyun #define MPI_FUNCTION_SAS_IO_UNIT_CONTROL            (0x1B)
302*4882a593Smuzhiyun #define MPI_FUNCTION_SATA_PASSTHROUGH               (0x1C)
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun #define MPI_FUNCTION_DIAG_BUFFER_POST               (0x1D)
305*4882a593Smuzhiyun #define MPI_FUNCTION_DIAG_RELEASE                   (0x1E)
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun #define MPI_FUNCTION_SCSI_IO_32                     (0x1F)
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun #define MPI_FUNCTION_LAN_SEND                       (0x20)
310*4882a593Smuzhiyun #define MPI_FUNCTION_LAN_RECEIVE                    (0x21)
311*4882a593Smuzhiyun #define MPI_FUNCTION_LAN_RESET                      (0x22)
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun #define MPI_FUNCTION_TARGET_ASSIST_EXTENDED         (0x23)
314*4882a593Smuzhiyun #define MPI_FUNCTION_TARGET_CMD_BUF_BASE_POST       (0x24)
315*4882a593Smuzhiyun #define MPI_FUNCTION_TARGET_CMD_BUF_LIST_POST       (0x25)
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun #define MPI_FUNCTION_INBAND_BUFFER_POST             (0x28)
318*4882a593Smuzhiyun #define MPI_FUNCTION_INBAND_SEND                    (0x29)
319*4882a593Smuzhiyun #define MPI_FUNCTION_INBAND_RSP                     (0x2A)
320*4882a593Smuzhiyun #define MPI_FUNCTION_INBAND_ABORT                   (0x2B)
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun #define MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET         (0x40)
323*4882a593Smuzhiyun #define MPI_FUNCTION_IO_UNIT_RESET                  (0x41)
324*4882a593Smuzhiyun #define MPI_FUNCTION_HANDSHAKE                      (0x42)
325*4882a593Smuzhiyun #define MPI_FUNCTION_REPLY_FRAME_REMOVAL            (0x43)
326*4882a593Smuzhiyun #define MPI_FUNCTION_HOST_PAGEBUF_ACCESS_CONTROL    (0x44)
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 
329*4882a593Smuzhiyun /* standard version format */
330*4882a593Smuzhiyun typedef struct _MPI_VERSION_STRUCT
331*4882a593Smuzhiyun {
332*4882a593Smuzhiyun     U8                      Dev;                        /* 00h */
333*4882a593Smuzhiyun     U8                      Unit;                       /* 01h */
334*4882a593Smuzhiyun     U8                      Minor;                      /* 02h */
335*4882a593Smuzhiyun     U8                      Major;                      /* 03h */
336*4882a593Smuzhiyun } MPI_VERSION_STRUCT, MPI_POINTER PTR_MPI_VERSION_STRUCT,
337*4882a593Smuzhiyun   MpiVersionStruct_t, MPI_POINTER pMpiVersionStruct;
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun typedef union _MPI_VERSION_FORMAT
340*4882a593Smuzhiyun {
341*4882a593Smuzhiyun     MPI_VERSION_STRUCT      Struct;
342*4882a593Smuzhiyun     U32                     Word;
343*4882a593Smuzhiyun } MPI_VERSION_FORMAT, MPI_POINTER PTR_MPI_VERSION_FORMAT,
344*4882a593Smuzhiyun   MpiVersionFormat_t, MPI_POINTER pMpiVersionFormat_t;
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun 
347*4882a593Smuzhiyun /*****************************************************************************
348*4882a593Smuzhiyun *
349*4882a593Smuzhiyun *        S c a t t e r    G a t h e r    E l e m e n t s
350*4882a593Smuzhiyun *
351*4882a593Smuzhiyun *****************************************************************************/
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun /****************************************************************************/
354*4882a593Smuzhiyun /*  Simple element structures                                               */
355*4882a593Smuzhiyun /****************************************************************************/
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun typedef struct _SGE_SIMPLE32
358*4882a593Smuzhiyun {
359*4882a593Smuzhiyun     U32                     FlagsLength;
360*4882a593Smuzhiyun     U32                     Address;
361*4882a593Smuzhiyun } SGE_SIMPLE32, MPI_POINTER PTR_SGE_SIMPLE32,
362*4882a593Smuzhiyun   SGESimple32_t, MPI_POINTER pSGESimple32_t;
363*4882a593Smuzhiyun 
364*4882a593Smuzhiyun typedef struct _SGE_SIMPLE64
365*4882a593Smuzhiyun {
366*4882a593Smuzhiyun     U32                     FlagsLength;
367*4882a593Smuzhiyun     U64                     Address;
368*4882a593Smuzhiyun } SGE_SIMPLE64, MPI_POINTER PTR_SGE_SIMPLE64,
369*4882a593Smuzhiyun   SGESimple64_t, MPI_POINTER pSGESimple64_t;
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun typedef struct _SGE_SIMPLE_UNION
372*4882a593Smuzhiyun {
373*4882a593Smuzhiyun     U32                     FlagsLength;
374*4882a593Smuzhiyun     union
375*4882a593Smuzhiyun     {
376*4882a593Smuzhiyun         U32                 Address32;
377*4882a593Smuzhiyun         U64                 Address64;
378*4882a593Smuzhiyun     }u;
379*4882a593Smuzhiyun } SGE_SIMPLE_UNION, MPI_POINTER PTR_SGE_SIMPLE_UNION,
380*4882a593Smuzhiyun   SGESimpleUnion_t, MPI_POINTER pSGESimpleUnion_t;
381*4882a593Smuzhiyun 
382*4882a593Smuzhiyun /****************************************************************************/
383*4882a593Smuzhiyun /*  Chain element structures                                                */
384*4882a593Smuzhiyun /****************************************************************************/
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun typedef struct _SGE_CHAIN32
387*4882a593Smuzhiyun {
388*4882a593Smuzhiyun     U16                     Length;
389*4882a593Smuzhiyun     U8                      NextChainOffset;
390*4882a593Smuzhiyun     U8                      Flags;
391*4882a593Smuzhiyun     U32                     Address;
392*4882a593Smuzhiyun } SGE_CHAIN32, MPI_POINTER PTR_SGE_CHAIN32,
393*4882a593Smuzhiyun   SGEChain32_t, MPI_POINTER pSGEChain32_t;
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun typedef struct _SGE_CHAIN64
396*4882a593Smuzhiyun {
397*4882a593Smuzhiyun     U16                     Length;
398*4882a593Smuzhiyun     U8                      NextChainOffset;
399*4882a593Smuzhiyun     U8                      Flags;
400*4882a593Smuzhiyun     U64                     Address;
401*4882a593Smuzhiyun } SGE_CHAIN64, MPI_POINTER PTR_SGE_CHAIN64,
402*4882a593Smuzhiyun   SGEChain64_t, MPI_POINTER pSGEChain64_t;
403*4882a593Smuzhiyun 
404*4882a593Smuzhiyun typedef struct _SGE_CHAIN_UNION
405*4882a593Smuzhiyun {
406*4882a593Smuzhiyun     U16                     Length;
407*4882a593Smuzhiyun     U8                      NextChainOffset;
408*4882a593Smuzhiyun     U8                      Flags;
409*4882a593Smuzhiyun     union
410*4882a593Smuzhiyun     {
411*4882a593Smuzhiyun         U32                 Address32;
412*4882a593Smuzhiyun         U64                 Address64;
413*4882a593Smuzhiyun     }u;
414*4882a593Smuzhiyun } SGE_CHAIN_UNION, MPI_POINTER PTR_SGE_CHAIN_UNION,
415*4882a593Smuzhiyun   SGEChainUnion_t, MPI_POINTER pSGEChainUnion_t;
416*4882a593Smuzhiyun 
417*4882a593Smuzhiyun /****************************************************************************/
418*4882a593Smuzhiyun /*  Transaction Context element                                             */
419*4882a593Smuzhiyun /****************************************************************************/
420*4882a593Smuzhiyun 
421*4882a593Smuzhiyun typedef struct _SGE_TRANSACTION32
422*4882a593Smuzhiyun {
423*4882a593Smuzhiyun     U8                      Reserved;
424*4882a593Smuzhiyun     U8                      ContextSize;
425*4882a593Smuzhiyun     U8                      DetailsLength;
426*4882a593Smuzhiyun     U8                      Flags;
427*4882a593Smuzhiyun     U32                     TransactionContext[1];
428*4882a593Smuzhiyun     U32                     TransactionDetails[1];
429*4882a593Smuzhiyun } SGE_TRANSACTION32, MPI_POINTER PTR_SGE_TRANSACTION32,
430*4882a593Smuzhiyun   SGETransaction32_t, MPI_POINTER pSGETransaction32_t;
431*4882a593Smuzhiyun 
432*4882a593Smuzhiyun typedef struct _SGE_TRANSACTION64
433*4882a593Smuzhiyun {
434*4882a593Smuzhiyun     U8                      Reserved;
435*4882a593Smuzhiyun     U8                      ContextSize;
436*4882a593Smuzhiyun     U8                      DetailsLength;
437*4882a593Smuzhiyun     U8                      Flags;
438*4882a593Smuzhiyun     U32                     TransactionContext[2];
439*4882a593Smuzhiyun     U32                     TransactionDetails[1];
440*4882a593Smuzhiyun } SGE_TRANSACTION64, MPI_POINTER PTR_SGE_TRANSACTION64,
441*4882a593Smuzhiyun   SGETransaction64_t, MPI_POINTER pSGETransaction64_t;
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun typedef struct _SGE_TRANSACTION96
444*4882a593Smuzhiyun {
445*4882a593Smuzhiyun     U8                      Reserved;
446*4882a593Smuzhiyun     U8                      ContextSize;
447*4882a593Smuzhiyun     U8                      DetailsLength;
448*4882a593Smuzhiyun     U8                      Flags;
449*4882a593Smuzhiyun     U32                     TransactionContext[3];
450*4882a593Smuzhiyun     U32                     TransactionDetails[1];
451*4882a593Smuzhiyun } SGE_TRANSACTION96, MPI_POINTER PTR_SGE_TRANSACTION96,
452*4882a593Smuzhiyun   SGETransaction96_t, MPI_POINTER pSGETransaction96_t;
453*4882a593Smuzhiyun 
454*4882a593Smuzhiyun typedef struct _SGE_TRANSACTION128
455*4882a593Smuzhiyun {
456*4882a593Smuzhiyun     U8                      Reserved;
457*4882a593Smuzhiyun     U8                      ContextSize;
458*4882a593Smuzhiyun     U8                      DetailsLength;
459*4882a593Smuzhiyun     U8                      Flags;
460*4882a593Smuzhiyun     U32                     TransactionContext[4];
461*4882a593Smuzhiyun     U32                     TransactionDetails[1];
462*4882a593Smuzhiyun } SGE_TRANSACTION128, MPI_POINTER PTR_SGE_TRANSACTION128,
463*4882a593Smuzhiyun   SGETransaction_t128, MPI_POINTER pSGETransaction_t128;
464*4882a593Smuzhiyun 
465*4882a593Smuzhiyun typedef struct _SGE_TRANSACTION_UNION
466*4882a593Smuzhiyun {
467*4882a593Smuzhiyun     U8                      Reserved;
468*4882a593Smuzhiyun     U8                      ContextSize;
469*4882a593Smuzhiyun     U8                      DetailsLength;
470*4882a593Smuzhiyun     U8                      Flags;
471*4882a593Smuzhiyun     union
472*4882a593Smuzhiyun     {
473*4882a593Smuzhiyun         U32                 TransactionContext32[1];
474*4882a593Smuzhiyun         U32                 TransactionContext64[2];
475*4882a593Smuzhiyun         U32                 TransactionContext96[3];
476*4882a593Smuzhiyun         U32                 TransactionContext128[4];
477*4882a593Smuzhiyun     }u;
478*4882a593Smuzhiyun     U32                     TransactionDetails[1];
479*4882a593Smuzhiyun } SGE_TRANSACTION_UNION, MPI_POINTER PTR_SGE_TRANSACTION_UNION,
480*4882a593Smuzhiyun   SGETransactionUnion_t, MPI_POINTER pSGETransactionUnion_t;
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun /****************************************************************************/
484*4882a593Smuzhiyun /*  SGE IO types union  for IO SGL's                                        */
485*4882a593Smuzhiyun /****************************************************************************/
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun typedef struct _SGE_IO_UNION
488*4882a593Smuzhiyun {
489*4882a593Smuzhiyun     union
490*4882a593Smuzhiyun     {
491*4882a593Smuzhiyun         SGE_SIMPLE_UNION    Simple;
492*4882a593Smuzhiyun         SGE_CHAIN_UNION     Chain;
493*4882a593Smuzhiyun     } u;
494*4882a593Smuzhiyun } SGE_IO_UNION, MPI_POINTER PTR_SGE_IO_UNION,
495*4882a593Smuzhiyun   SGEIOUnion_t, MPI_POINTER pSGEIOUnion_t;
496*4882a593Smuzhiyun 
497*4882a593Smuzhiyun /****************************************************************************/
498*4882a593Smuzhiyun /*  SGE union for SGL's with Simple and Transaction elements                */
499*4882a593Smuzhiyun /****************************************************************************/
500*4882a593Smuzhiyun 
501*4882a593Smuzhiyun typedef struct _SGE_TRANS_SIMPLE_UNION
502*4882a593Smuzhiyun {
503*4882a593Smuzhiyun     union
504*4882a593Smuzhiyun     {
505*4882a593Smuzhiyun         SGE_SIMPLE_UNION        Simple;
506*4882a593Smuzhiyun         SGE_TRANSACTION_UNION   Transaction;
507*4882a593Smuzhiyun     } u;
508*4882a593Smuzhiyun } SGE_TRANS_SIMPLE_UNION, MPI_POINTER PTR_SGE_TRANS_SIMPLE_UNION,
509*4882a593Smuzhiyun   SGETransSimpleUnion_t, MPI_POINTER pSGETransSimpleUnion_t;
510*4882a593Smuzhiyun 
511*4882a593Smuzhiyun /****************************************************************************/
512*4882a593Smuzhiyun /*  All SGE types union                                                     */
513*4882a593Smuzhiyun /****************************************************************************/
514*4882a593Smuzhiyun 
515*4882a593Smuzhiyun typedef struct _SGE_MPI_UNION
516*4882a593Smuzhiyun {
517*4882a593Smuzhiyun     union
518*4882a593Smuzhiyun     {
519*4882a593Smuzhiyun         SGE_SIMPLE_UNION        Simple;
520*4882a593Smuzhiyun         SGE_CHAIN_UNION         Chain;
521*4882a593Smuzhiyun         SGE_TRANSACTION_UNION   Transaction;
522*4882a593Smuzhiyun     } u;
523*4882a593Smuzhiyun } SGE_MPI_UNION, MPI_POINTER PTR_SGE_MPI_UNION,
524*4882a593Smuzhiyun   MPI_SGE_UNION_t, MPI_POINTER pMPI_SGE_UNION_t,
525*4882a593Smuzhiyun   SGEAllUnion_t, MPI_POINTER pSGEAllUnion_t;
526*4882a593Smuzhiyun 
527*4882a593Smuzhiyun 
528*4882a593Smuzhiyun /****************************************************************************/
529*4882a593Smuzhiyun /*  SGE field definition and masks                                          */
530*4882a593Smuzhiyun /****************************************************************************/
531*4882a593Smuzhiyun 
532*4882a593Smuzhiyun /* Flags field bit definitions */
533*4882a593Smuzhiyun 
534*4882a593Smuzhiyun #define MPI_SGE_FLAGS_LAST_ELEMENT              (0x80)
535*4882a593Smuzhiyun #define MPI_SGE_FLAGS_END_OF_BUFFER             (0x40)
536*4882a593Smuzhiyun #define MPI_SGE_FLAGS_ELEMENT_TYPE_MASK         (0x30)
537*4882a593Smuzhiyun #define MPI_SGE_FLAGS_LOCAL_ADDRESS             (0x08)
538*4882a593Smuzhiyun #define MPI_SGE_FLAGS_DIRECTION                 (0x04)
539*4882a593Smuzhiyun #define MPI_SGE_FLAGS_ADDRESS_SIZE              (0x02)
540*4882a593Smuzhiyun #define MPI_SGE_FLAGS_END_OF_LIST               (0x01)
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun #define MPI_SGE_FLAGS_SHIFT                     (24)
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun #define MPI_SGE_LENGTH_MASK                     (0x00FFFFFF)
545*4882a593Smuzhiyun #define MPI_SGE_CHAIN_LENGTH_MASK               (0x0000FFFF)
546*4882a593Smuzhiyun 
547*4882a593Smuzhiyun /* Element Type */
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun #define MPI_SGE_FLAGS_TRANSACTION_ELEMENT       (0x00)
550*4882a593Smuzhiyun #define MPI_SGE_FLAGS_SIMPLE_ELEMENT            (0x10)
551*4882a593Smuzhiyun #define MPI_SGE_FLAGS_CHAIN_ELEMENT             (0x30)
552*4882a593Smuzhiyun #define MPI_SGE_FLAGS_ELEMENT_MASK              (0x30)
553*4882a593Smuzhiyun 
554*4882a593Smuzhiyun /* Address location */
555*4882a593Smuzhiyun 
556*4882a593Smuzhiyun #define MPI_SGE_FLAGS_SYSTEM_ADDRESS            (0x00)
557*4882a593Smuzhiyun 
558*4882a593Smuzhiyun /* Direction */
559*4882a593Smuzhiyun 
560*4882a593Smuzhiyun #define MPI_SGE_FLAGS_IOC_TO_HOST               (0x00)
561*4882a593Smuzhiyun #define MPI_SGE_FLAGS_HOST_TO_IOC               (0x04)
562*4882a593Smuzhiyun 
563*4882a593Smuzhiyun /* Address Size */
564*4882a593Smuzhiyun 
565*4882a593Smuzhiyun #define MPI_SGE_FLAGS_32_BIT_ADDRESSING         (0x00)
566*4882a593Smuzhiyun #define MPI_SGE_FLAGS_64_BIT_ADDRESSING         (0x02)
567*4882a593Smuzhiyun 
568*4882a593Smuzhiyun /* Context Size */
569*4882a593Smuzhiyun 
570*4882a593Smuzhiyun #define MPI_SGE_FLAGS_32_BIT_CONTEXT            (0x00)
571*4882a593Smuzhiyun #define MPI_SGE_FLAGS_64_BIT_CONTEXT            (0x02)
572*4882a593Smuzhiyun #define MPI_SGE_FLAGS_96_BIT_CONTEXT            (0x04)
573*4882a593Smuzhiyun #define MPI_SGE_FLAGS_128_BIT_CONTEXT           (0x06)
574*4882a593Smuzhiyun 
575*4882a593Smuzhiyun #define MPI_SGE_CHAIN_OFFSET_MASK               (0x00FF0000)
576*4882a593Smuzhiyun #define MPI_SGE_CHAIN_OFFSET_SHIFT              (16)
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun 
579*4882a593Smuzhiyun /****************************************************************************/
580*4882a593Smuzhiyun /*  SGE operation Macros                                                    */
581*4882a593Smuzhiyun /****************************************************************************/
582*4882a593Smuzhiyun 
583*4882a593Smuzhiyun          /* SIMPLE FlagsLength manipulations... */
584*4882a593Smuzhiyun #define  MPI_SGE_SET_FLAGS(f)           ((U32)(f) << MPI_SGE_FLAGS_SHIFT)
585*4882a593Smuzhiyun #define  MPI_SGE_GET_FLAGS(fl)          (((fl) & ~MPI_SGE_LENGTH_MASK) >> MPI_SGE_FLAGS_SHIFT)
586*4882a593Smuzhiyun #define  MPI_SGE_LENGTH(fl)             ((fl) & MPI_SGE_LENGTH_MASK)
587*4882a593Smuzhiyun #define  MPI_SGE_CHAIN_LENGTH(fl)       ((fl) & MPI_SGE_CHAIN_LENGTH_MASK)
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun #define  MPI_SGE_SET_FLAGS_LENGTH(f,l)  (MPI_SGE_SET_FLAGS(f) | MPI_SGE_LENGTH(l))
590*4882a593Smuzhiyun 
591*4882a593Smuzhiyun #define  MPI_pSGE_GET_FLAGS(psg)        MPI_SGE_GET_FLAGS((psg)->FlagsLength)
592*4882a593Smuzhiyun #define  MPI_pSGE_GET_LENGTH(psg)       MPI_SGE_LENGTH((psg)->FlagsLength)
593*4882a593Smuzhiyun #define  MPI_pSGE_SET_FLAGS_LENGTH(psg,f,l)  (psg)->FlagsLength = MPI_SGE_SET_FLAGS_LENGTH(f,l)
594*4882a593Smuzhiyun          /* CAUTION - The following are READ-MODIFY-WRITE! */
595*4882a593Smuzhiyun #define  MPI_pSGE_SET_FLAGS(psg,f)      (psg)->FlagsLength |= MPI_SGE_SET_FLAGS(f)
596*4882a593Smuzhiyun #define  MPI_pSGE_SET_LENGTH(psg,l)     (psg)->FlagsLength |= MPI_SGE_LENGTH(l)
597*4882a593Smuzhiyun 
598*4882a593Smuzhiyun #define  MPI_GET_CHAIN_OFFSET(x) ((x&MPI_SGE_CHAIN_OFFSET_MASK)>>MPI_SGE_CHAIN_OFFSET_SHIFT)
599*4882a593Smuzhiyun 
600*4882a593Smuzhiyun 
601*4882a593Smuzhiyun 
602*4882a593Smuzhiyun /*****************************************************************************
603*4882a593Smuzhiyun *
604*4882a593Smuzhiyun *        S t a n d a r d    M e s s a g e    S t r u c t u r e s
605*4882a593Smuzhiyun *
606*4882a593Smuzhiyun *****************************************************************************/
607*4882a593Smuzhiyun 
608*4882a593Smuzhiyun /****************************************************************************/
609*4882a593Smuzhiyun /* Standard message request header for all request messages                 */
610*4882a593Smuzhiyun /****************************************************************************/
611*4882a593Smuzhiyun 
612*4882a593Smuzhiyun typedef struct _MSG_REQUEST_HEADER
613*4882a593Smuzhiyun {
614*4882a593Smuzhiyun     U8                      Reserved[2];      /* function specific */
615*4882a593Smuzhiyun     U8                      ChainOffset;
616*4882a593Smuzhiyun     U8                      Function;
617*4882a593Smuzhiyun     U8                      Reserved1[3];     /* function specific */
618*4882a593Smuzhiyun     U8                      MsgFlags;
619*4882a593Smuzhiyun     U32                     MsgContext;
620*4882a593Smuzhiyun } MSG_REQUEST_HEADER, MPI_POINTER PTR_MSG_REQUEST_HEADER,
621*4882a593Smuzhiyun   MPIHeader_t, MPI_POINTER pMPIHeader_t;
622*4882a593Smuzhiyun 
623*4882a593Smuzhiyun 
624*4882a593Smuzhiyun /****************************************************************************/
625*4882a593Smuzhiyun /*  Default Reply                                                           */
626*4882a593Smuzhiyun /****************************************************************************/
627*4882a593Smuzhiyun 
628*4882a593Smuzhiyun typedef struct _MSG_DEFAULT_REPLY
629*4882a593Smuzhiyun {
630*4882a593Smuzhiyun     U8                      Reserved[2];      /* function specific */
631*4882a593Smuzhiyun     U8                      MsgLength;
632*4882a593Smuzhiyun     U8                      Function;
633*4882a593Smuzhiyun     U8                      Reserved1[3];     /* function specific */
634*4882a593Smuzhiyun     U8                      MsgFlags;
635*4882a593Smuzhiyun     U32                     MsgContext;
636*4882a593Smuzhiyun     U8                      Reserved2[2];     /* function specific */
637*4882a593Smuzhiyun     U16                     IOCStatus;
638*4882a593Smuzhiyun     U32                     IOCLogInfo;
639*4882a593Smuzhiyun } MSG_DEFAULT_REPLY, MPI_POINTER PTR_MSG_DEFAULT_REPLY,
640*4882a593Smuzhiyun   MPIDefaultReply_t, MPI_POINTER pMPIDefaultReply_t;
641*4882a593Smuzhiyun 
642*4882a593Smuzhiyun 
643*4882a593Smuzhiyun /* MsgFlags definition for all replies */
644*4882a593Smuzhiyun 
645*4882a593Smuzhiyun #define MPI_MSGFLAGS_CONTINUATION_REPLY         (0x80)
646*4882a593Smuzhiyun 
647*4882a593Smuzhiyun 
648*4882a593Smuzhiyun /*****************************************************************************
649*4882a593Smuzhiyun *
650*4882a593Smuzhiyun *               I O C    S t a t u s   V a l u e s
651*4882a593Smuzhiyun *
652*4882a593Smuzhiyun *****************************************************************************/
653*4882a593Smuzhiyun 
654*4882a593Smuzhiyun /****************************************************************************/
655*4882a593Smuzhiyun /*  Common IOCStatus values for all replies                                 */
656*4882a593Smuzhiyun /****************************************************************************/
657*4882a593Smuzhiyun 
658*4882a593Smuzhiyun #define MPI_IOCSTATUS_SUCCESS                   (0x0000)
659*4882a593Smuzhiyun #define MPI_IOCSTATUS_INVALID_FUNCTION          (0x0001)
660*4882a593Smuzhiyun #define MPI_IOCSTATUS_BUSY                      (0x0002)
661*4882a593Smuzhiyun #define MPI_IOCSTATUS_INVALID_SGL               (0x0003)
662*4882a593Smuzhiyun #define MPI_IOCSTATUS_INTERNAL_ERROR            (0x0004)
663*4882a593Smuzhiyun #define MPI_IOCSTATUS_RESERVED                  (0x0005)
664*4882a593Smuzhiyun #define MPI_IOCSTATUS_INSUFFICIENT_RESOURCES    (0x0006)
665*4882a593Smuzhiyun #define MPI_IOCSTATUS_INVALID_FIELD             (0x0007)
666*4882a593Smuzhiyun #define MPI_IOCSTATUS_INVALID_STATE             (0x0008)
667*4882a593Smuzhiyun #define MPI_IOCSTATUS_OP_STATE_NOT_SUPPORTED    (0x0009)
668*4882a593Smuzhiyun 
669*4882a593Smuzhiyun /****************************************************************************/
670*4882a593Smuzhiyun /*  Config IOCStatus values                                                 */
671*4882a593Smuzhiyun /****************************************************************************/
672*4882a593Smuzhiyun 
673*4882a593Smuzhiyun #define MPI_IOCSTATUS_CONFIG_INVALID_ACTION     (0x0020)
674*4882a593Smuzhiyun #define MPI_IOCSTATUS_CONFIG_INVALID_TYPE       (0x0021)
675*4882a593Smuzhiyun #define MPI_IOCSTATUS_CONFIG_INVALID_PAGE       (0x0022)
676*4882a593Smuzhiyun #define MPI_IOCSTATUS_CONFIG_INVALID_DATA       (0x0023)
677*4882a593Smuzhiyun #define MPI_IOCSTATUS_CONFIG_NO_DEFAULTS        (0x0024)
678*4882a593Smuzhiyun #define MPI_IOCSTATUS_CONFIG_CANT_COMMIT        (0x0025)
679*4882a593Smuzhiyun 
680*4882a593Smuzhiyun /****************************************************************************/
681*4882a593Smuzhiyun /*  SCSIIO Reply (SPI & FCP) initiator values                               */
682*4882a593Smuzhiyun /****************************************************************************/
683*4882a593Smuzhiyun 
684*4882a593Smuzhiyun #define MPI_IOCSTATUS_SCSI_RECOVERED_ERROR      (0x0040)
685*4882a593Smuzhiyun #define MPI_IOCSTATUS_SCSI_INVALID_BUS          (0x0041)
686*4882a593Smuzhiyun #define MPI_IOCSTATUS_SCSI_INVALID_TARGETID     (0x0042)
687*4882a593Smuzhiyun #define MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE     (0x0043)
688*4882a593Smuzhiyun #define MPI_IOCSTATUS_SCSI_DATA_OVERRUN         (0x0044)
689*4882a593Smuzhiyun #define MPI_IOCSTATUS_SCSI_DATA_UNDERRUN        (0x0045)
690*4882a593Smuzhiyun #define MPI_IOCSTATUS_SCSI_IO_DATA_ERROR        (0x0046)
691*4882a593Smuzhiyun #define MPI_IOCSTATUS_SCSI_PROTOCOL_ERROR       (0x0047)
692*4882a593Smuzhiyun #define MPI_IOCSTATUS_SCSI_TASK_TERMINATED      (0x0048)
693*4882a593Smuzhiyun #define MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH    (0x0049)
694*4882a593Smuzhiyun #define MPI_IOCSTATUS_SCSI_TASK_MGMT_FAILED     (0x004A)
695*4882a593Smuzhiyun #define MPI_IOCSTATUS_SCSI_IOC_TERMINATED       (0x004B)
696*4882a593Smuzhiyun #define MPI_IOCSTATUS_SCSI_EXT_TERMINATED       (0x004C)
697*4882a593Smuzhiyun 
698*4882a593Smuzhiyun /****************************************************************************/
699*4882a593Smuzhiyun /*  For use by SCSI Initiator and SCSI Target end-to-end data protection    */
700*4882a593Smuzhiyun /****************************************************************************/
701*4882a593Smuzhiyun 
702*4882a593Smuzhiyun #define MPI_IOCSTATUS_EEDP_GUARD_ERROR          (0x004D)
703*4882a593Smuzhiyun #define MPI_IOCSTATUS_EEDP_REF_TAG_ERROR        (0x004E)
704*4882a593Smuzhiyun #define MPI_IOCSTATUS_EEDP_APP_TAG_ERROR        (0x004F)
705*4882a593Smuzhiyun 
706*4882a593Smuzhiyun 
707*4882a593Smuzhiyun /****************************************************************************/
708*4882a593Smuzhiyun /*  SCSI Target values                                                      */
709*4882a593Smuzhiyun /****************************************************************************/
710*4882a593Smuzhiyun 
711*4882a593Smuzhiyun #define MPI_IOCSTATUS_TARGET_PRIORITY_IO         (0x0060)
712*4882a593Smuzhiyun #define MPI_IOCSTATUS_TARGET_INVALID_PORT        (0x0061)
713*4882a593Smuzhiyun #define MPI_IOCSTATUS_TARGET_INVALID_IOCINDEX    (0x0062)   /* obsolete name */
714*4882a593Smuzhiyun #define MPI_IOCSTATUS_TARGET_INVALID_IO_INDEX    (0x0062)
715*4882a593Smuzhiyun #define MPI_IOCSTATUS_TARGET_ABORTED             (0x0063)
716*4882a593Smuzhiyun #define MPI_IOCSTATUS_TARGET_NO_CONN_RETRYABLE   (0x0064)
717*4882a593Smuzhiyun #define MPI_IOCSTATUS_TARGET_NO_CONNECTION       (0x0065)
718*4882a593Smuzhiyun #define MPI_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH (0x006A)
719*4882a593Smuzhiyun #define MPI_IOCSTATUS_TARGET_STS_DATA_NOT_SENT   (0x006B)
720*4882a593Smuzhiyun #define MPI_IOCSTATUS_TARGET_DATA_OFFSET_ERROR   (0x006D)
721*4882a593Smuzhiyun #define MPI_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA (0x006E)
722*4882a593Smuzhiyun #define MPI_IOCSTATUS_TARGET_IU_TOO_SHORT        (0x006F)
723*4882a593Smuzhiyun #define MPI_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT     (0x0070)
724*4882a593Smuzhiyun #define MPI_IOCSTATUS_TARGET_NAK_RECEIVED        (0x0071)
725*4882a593Smuzhiyun 
726*4882a593Smuzhiyun /****************************************************************************/
727*4882a593Smuzhiyun /*  Additional FCP target values (obsolete)                                 */
728*4882a593Smuzhiyun /****************************************************************************/
729*4882a593Smuzhiyun 
730*4882a593Smuzhiyun #define MPI_IOCSTATUS_TARGET_FC_ABORTED         (0x0066)    /* obsolete */
731*4882a593Smuzhiyun #define MPI_IOCSTATUS_TARGET_FC_RX_ID_INVALID   (0x0067)    /* obsolete */
732*4882a593Smuzhiyun #define MPI_IOCSTATUS_TARGET_FC_DID_INVALID     (0x0068)    /* obsolete */
733*4882a593Smuzhiyun #define MPI_IOCSTATUS_TARGET_FC_NODE_LOGGED_OUT (0x0069)    /* obsolete */
734*4882a593Smuzhiyun 
735*4882a593Smuzhiyun /****************************************************************************/
736*4882a593Smuzhiyun /*  Fibre Channel Direct Access values                                      */
737*4882a593Smuzhiyun /****************************************************************************/
738*4882a593Smuzhiyun 
739*4882a593Smuzhiyun #define MPI_IOCSTATUS_FC_ABORTED                (0x0066)
740*4882a593Smuzhiyun #define MPI_IOCSTATUS_FC_RX_ID_INVALID          (0x0067)
741*4882a593Smuzhiyun #define MPI_IOCSTATUS_FC_DID_INVALID            (0x0068)
742*4882a593Smuzhiyun #define MPI_IOCSTATUS_FC_NODE_LOGGED_OUT        (0x0069)
743*4882a593Smuzhiyun #define MPI_IOCSTATUS_FC_EXCHANGE_CANCELED      (0x006C)
744*4882a593Smuzhiyun 
745*4882a593Smuzhiyun /****************************************************************************/
746*4882a593Smuzhiyun /*  LAN values                                                              */
747*4882a593Smuzhiyun /****************************************************************************/
748*4882a593Smuzhiyun 
749*4882a593Smuzhiyun #define MPI_IOCSTATUS_LAN_DEVICE_NOT_FOUND      (0x0080)
750*4882a593Smuzhiyun #define MPI_IOCSTATUS_LAN_DEVICE_FAILURE        (0x0081)
751*4882a593Smuzhiyun #define MPI_IOCSTATUS_LAN_TRANSMIT_ERROR        (0x0082)
752*4882a593Smuzhiyun #define MPI_IOCSTATUS_LAN_TRANSMIT_ABORTED      (0x0083)
753*4882a593Smuzhiyun #define MPI_IOCSTATUS_LAN_RECEIVE_ERROR         (0x0084)
754*4882a593Smuzhiyun #define MPI_IOCSTATUS_LAN_RECEIVE_ABORTED       (0x0085)
755*4882a593Smuzhiyun #define MPI_IOCSTATUS_LAN_PARTIAL_PACKET        (0x0086)
756*4882a593Smuzhiyun #define MPI_IOCSTATUS_LAN_CANCELED              (0x0087)
757*4882a593Smuzhiyun 
758*4882a593Smuzhiyun /****************************************************************************/
759*4882a593Smuzhiyun /*  Serial Attached SCSI values                                             */
760*4882a593Smuzhiyun /****************************************************************************/
761*4882a593Smuzhiyun 
762*4882a593Smuzhiyun #define MPI_IOCSTATUS_SAS_SMP_REQUEST_FAILED    (0x0090)
763*4882a593Smuzhiyun #define MPI_IOCSTATUS_SAS_SMP_DATA_OVERRUN      (0x0091)
764*4882a593Smuzhiyun 
765*4882a593Smuzhiyun /****************************************************************************/
766*4882a593Smuzhiyun /*  Inband values                                                           */
767*4882a593Smuzhiyun /****************************************************************************/
768*4882a593Smuzhiyun 
769*4882a593Smuzhiyun #define MPI_IOCSTATUS_INBAND_ABORTED            (0x0098)
770*4882a593Smuzhiyun #define MPI_IOCSTATUS_INBAND_NO_CONNECTION      (0x0099)
771*4882a593Smuzhiyun 
772*4882a593Smuzhiyun /****************************************************************************/
773*4882a593Smuzhiyun /*  Diagnostic Tools values                                                 */
774*4882a593Smuzhiyun /****************************************************************************/
775*4882a593Smuzhiyun 
776*4882a593Smuzhiyun #define MPI_IOCSTATUS_DIAGNOSTIC_RELEASED       (0x00A0)
777*4882a593Smuzhiyun 
778*4882a593Smuzhiyun 
779*4882a593Smuzhiyun /****************************************************************************/
780*4882a593Smuzhiyun /*  IOCStatus flag to indicate that log info is available                   */
781*4882a593Smuzhiyun /****************************************************************************/
782*4882a593Smuzhiyun 
783*4882a593Smuzhiyun #define MPI_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE   (0x8000)
784*4882a593Smuzhiyun #define MPI_IOCSTATUS_MASK                      (0x7FFF)
785*4882a593Smuzhiyun 
786*4882a593Smuzhiyun /****************************************************************************/
787*4882a593Smuzhiyun /*  LogInfo Types                                                           */
788*4882a593Smuzhiyun /****************************************************************************/
789*4882a593Smuzhiyun 
790*4882a593Smuzhiyun #define MPI_IOCLOGINFO_TYPE_MASK                (0xF0000000)
791*4882a593Smuzhiyun #define MPI_IOCLOGINFO_TYPE_SHIFT               (28)
792*4882a593Smuzhiyun #define MPI_IOCLOGINFO_TYPE_NONE                (0x0)
793*4882a593Smuzhiyun #define MPI_IOCLOGINFO_TYPE_SCSI                (0x1)
794*4882a593Smuzhiyun #define MPI_IOCLOGINFO_TYPE_FC                  (0x2)
795*4882a593Smuzhiyun #define MPI_IOCLOGINFO_TYPE_SAS                 (0x3)
796*4882a593Smuzhiyun #define MPI_IOCLOGINFO_TYPE_ISCSI               (0x4)
797*4882a593Smuzhiyun #define MPI_IOCLOGINFO_LOG_DATA_MASK            (0x0FFFFFFF)
798*4882a593Smuzhiyun 
799*4882a593Smuzhiyun 
800*4882a593Smuzhiyun #endif
801