1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2005 Mike Isely <isely@pobox.com> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun #ifndef __PVRUSB2_HDW_H 7*4882a593Smuzhiyun #define __PVRUSB2_HDW_H 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <linux/usb.h> 10*4882a593Smuzhiyun #include <linux/videodev2.h> 11*4882a593Smuzhiyun #include <media/v4l2-dev.h> 12*4882a593Smuzhiyun #include "pvrusb2-io.h" 13*4882a593Smuzhiyun #include "pvrusb2-ctrl.h" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* Private internal control ids, look these up with 17*4882a593Smuzhiyun pvr2_hdw_get_ctrl_by_id() - these are NOT visible in V4L */ 18*4882a593Smuzhiyun #define PVR2_CID_STDCUR 2 19*4882a593Smuzhiyun #define PVR2_CID_STDAVAIL 3 20*4882a593Smuzhiyun #define PVR2_CID_INPUT 4 21*4882a593Smuzhiyun #define PVR2_CID_AUDIOMODE 5 22*4882a593Smuzhiyun #define PVR2_CID_FREQUENCY 6 23*4882a593Smuzhiyun #define PVR2_CID_HRES 7 24*4882a593Smuzhiyun #define PVR2_CID_VRES 8 25*4882a593Smuzhiyun #define PVR2_CID_CROPL 9 26*4882a593Smuzhiyun #define PVR2_CID_CROPT 10 27*4882a593Smuzhiyun #define PVR2_CID_CROPW 11 28*4882a593Smuzhiyun #define PVR2_CID_CROPH 12 29*4882a593Smuzhiyun #define PVR2_CID_CROPCAPPAN 13 30*4882a593Smuzhiyun #define PVR2_CID_CROPCAPPAD 14 31*4882a593Smuzhiyun #define PVR2_CID_CROPCAPBL 15 32*4882a593Smuzhiyun #define PVR2_CID_CROPCAPBT 16 33*4882a593Smuzhiyun #define PVR2_CID_CROPCAPBW 17 34*4882a593Smuzhiyun #define PVR2_CID_CROPCAPBH 18 35*4882a593Smuzhiyun #define PVR2_CID_STDDETECT 19 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /* Legal values for the INPUT state variable */ 38*4882a593Smuzhiyun #define PVR2_CVAL_INPUT_TV 0 39*4882a593Smuzhiyun #define PVR2_CVAL_INPUT_DTV 1 40*4882a593Smuzhiyun #define PVR2_CVAL_INPUT_COMPOSITE 2 41*4882a593Smuzhiyun #define PVR2_CVAL_INPUT_SVIDEO 3 42*4882a593Smuzhiyun #define PVR2_CVAL_INPUT_RADIO 4 43*4882a593Smuzhiyun #define PVR2_CVAL_INPUT_MAX PVR2_CVAL_INPUT_RADIO 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun enum pvr2_config { 46*4882a593Smuzhiyun pvr2_config_empty, /* No configuration */ 47*4882a593Smuzhiyun pvr2_config_mpeg, /* Encoded / compressed video */ 48*4882a593Smuzhiyun pvr2_config_vbi, /* Standard vbi info */ 49*4882a593Smuzhiyun pvr2_config_pcm, /* Audio raw pcm stream */ 50*4882a593Smuzhiyun pvr2_config_rawvideo, /* Video raw frames */ 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun enum pvr2_v4l_type { 54*4882a593Smuzhiyun pvr2_v4l_type_video, 55*4882a593Smuzhiyun pvr2_v4l_type_vbi, 56*4882a593Smuzhiyun pvr2_v4l_type_radio, 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* Major states that we can be in: 60*4882a593Smuzhiyun * 61*4882a593Smuzhiyun * DEAD - Device is in an unusable state and cannot be recovered. This 62*4882a593Smuzhiyun * can happen if we completely lose the ability to communicate with it 63*4882a593Smuzhiyun * (but it might still on the bus). In this state there's nothing we can 64*4882a593Smuzhiyun * do; it must be replugged in order to recover. 65*4882a593Smuzhiyun * 66*4882a593Smuzhiyun * COLD - Device is in an unusable state, needs microcontroller firmware. 67*4882a593Smuzhiyun * 68*4882a593Smuzhiyun * WARM - We can communicate with the device and the proper 69*4882a593Smuzhiyun * microcontroller firmware is running, but other device initialization is 70*4882a593Smuzhiyun * still needed (e.g. encoder firmware). 71*4882a593Smuzhiyun * 72*4882a593Smuzhiyun * ERROR - A problem prevents capture operation (e.g. encoder firmware 73*4882a593Smuzhiyun * missing). 74*4882a593Smuzhiyun * 75*4882a593Smuzhiyun * READY - Device is operational, but not streaming. 76*4882a593Smuzhiyun * 77*4882a593Smuzhiyun * RUN - Device is streaming. 78*4882a593Smuzhiyun * 79*4882a593Smuzhiyun */ 80*4882a593Smuzhiyun #define PVR2_STATE_NONE 0 81*4882a593Smuzhiyun #define PVR2_STATE_DEAD 1 82*4882a593Smuzhiyun #define PVR2_STATE_COLD 2 83*4882a593Smuzhiyun #define PVR2_STATE_WARM 3 84*4882a593Smuzhiyun #define PVR2_STATE_ERROR 4 85*4882a593Smuzhiyun #define PVR2_STATE_READY 5 86*4882a593Smuzhiyun #define PVR2_STATE_RUN 6 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun /* Translate configuration enum to a string label */ 89*4882a593Smuzhiyun const char *pvr2_config_get_name(enum pvr2_config); 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun struct pvr2_hdw; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun /* Create and return a structure for interacting with the underlying 94*4882a593Smuzhiyun hardware */ 95*4882a593Smuzhiyun struct pvr2_hdw *pvr2_hdw_create(struct usb_interface *intf, 96*4882a593Smuzhiyun const struct usb_device_id *devid); 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun /* Perform second stage initialization, passing in a notification callback 99*4882a593Smuzhiyun for when the master state changes. */ 100*4882a593Smuzhiyun int pvr2_hdw_initialize(struct pvr2_hdw *, 101*4882a593Smuzhiyun void (*callback_func)(void *), 102*4882a593Smuzhiyun void *callback_data); 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun /* Destroy hardware interaction structure */ 105*4882a593Smuzhiyun void pvr2_hdw_destroy(struct pvr2_hdw *); 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun /* Return true if in the ready (normal) state */ 108*4882a593Smuzhiyun int pvr2_hdw_dev_ok(struct pvr2_hdw *); 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun /* Return small integer number [1..N] for logical instance number of this 111*4882a593Smuzhiyun device. This is useful for indexing array-valued module parameters. */ 112*4882a593Smuzhiyun int pvr2_hdw_get_unit_number(struct pvr2_hdw *); 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun /* Get pointer to underlying USB device */ 115*4882a593Smuzhiyun struct usb_device *pvr2_hdw_get_dev(struct pvr2_hdw *); 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun /* Retrieve serial number of device */ 118*4882a593Smuzhiyun unsigned long pvr2_hdw_get_sn(struct pvr2_hdw *); 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun /* Retrieve bus location info of device */ 121*4882a593Smuzhiyun const char *pvr2_hdw_get_bus_info(struct pvr2_hdw *); 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun /* Retrieve per-instance string identifier for this specific device */ 124*4882a593Smuzhiyun const char *pvr2_hdw_get_device_identifier(struct pvr2_hdw *); 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun /* Called when hardware has been unplugged */ 127*4882a593Smuzhiyun void pvr2_hdw_disconnect(struct pvr2_hdw *); 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun /* Sets v4l2_dev of a video_device struct */ 130*4882a593Smuzhiyun void pvr2_hdw_set_v4l2_dev(struct pvr2_hdw *, struct video_device *); 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun /* Get the number of defined controls */ 133*4882a593Smuzhiyun unsigned int pvr2_hdw_get_ctrl_count(struct pvr2_hdw *); 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun /* Retrieve a control handle given its index (0..count-1) */ 136*4882a593Smuzhiyun struct pvr2_ctrl *pvr2_hdw_get_ctrl_by_index(struct pvr2_hdw *,unsigned int); 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun /* Retrieve a control handle given its internal ID (if any) */ 139*4882a593Smuzhiyun struct pvr2_ctrl *pvr2_hdw_get_ctrl_by_id(struct pvr2_hdw *,unsigned int); 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun /* Retrieve a control handle given its V4L ID (if any) */ 142*4882a593Smuzhiyun struct pvr2_ctrl *pvr2_hdw_get_ctrl_v4l(struct pvr2_hdw *,unsigned int ctl_id); 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun /* Retrieve a control handle given its immediate predecessor V4L ID (if any) */ 145*4882a593Smuzhiyun struct pvr2_ctrl *pvr2_hdw_get_ctrl_nextv4l(struct pvr2_hdw *, 146*4882a593Smuzhiyun unsigned int ctl_id); 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun /* Commit all control changes made up to this point */ 149*4882a593Smuzhiyun int pvr2_hdw_commit_ctl(struct pvr2_hdw *); 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun /* Return a bit mask of valid input selections for this device. Mask bits 152*4882a593Smuzhiyun * will be according to PVR_CVAL_INPUT_xxxx definitions. */ 153*4882a593Smuzhiyun unsigned int pvr2_hdw_get_input_available(struct pvr2_hdw *); 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun /* Return a bit mask of allowed input selections for this device. Mask bits 156*4882a593Smuzhiyun * will be according to PVR_CVAL_INPUT_xxxx definitions. */ 157*4882a593Smuzhiyun unsigned int pvr2_hdw_get_input_allowed(struct pvr2_hdw *); 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun /* Change the set of allowed input selections for this device. Both 160*4882a593Smuzhiyun change_mask and change_valu are mask bits according to 161*4882a593Smuzhiyun PVR_CVAL_INPUT_xxxx definitions. The change_mask parameter indicate 162*4882a593Smuzhiyun which settings are being changed and the change_val parameter indicates 163*4882a593Smuzhiyun whether corresponding settings are being set or cleared. */ 164*4882a593Smuzhiyun int pvr2_hdw_set_input_allowed(struct pvr2_hdw *, 165*4882a593Smuzhiyun unsigned int change_mask, 166*4882a593Smuzhiyun unsigned int change_val); 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun /* Return name for this driver instance */ 169*4882a593Smuzhiyun const char *pvr2_hdw_get_driver_name(struct pvr2_hdw *); 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun /* Mark tuner status stale so that it will be re-fetched */ 172*4882a593Smuzhiyun void pvr2_hdw_execute_tuner_poll(struct pvr2_hdw *); 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun /* Return information about the tuner */ 175*4882a593Smuzhiyun int pvr2_hdw_get_tuner_status(struct pvr2_hdw *,struct v4l2_tuner *); 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun /* Return information about cropping capabilities */ 178*4882a593Smuzhiyun int pvr2_hdw_get_cropcap(struct pvr2_hdw *, struct v4l2_cropcap *); 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun /* Query device and see if it thinks it is on a high-speed USB link */ 181*4882a593Smuzhiyun int pvr2_hdw_is_hsm(struct pvr2_hdw *); 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun /* Return a string token representative of the hardware type */ 184*4882a593Smuzhiyun const char *pvr2_hdw_get_type(struct pvr2_hdw *); 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun /* Return a single line description of the hardware type */ 187*4882a593Smuzhiyun const char *pvr2_hdw_get_desc(struct pvr2_hdw *); 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun /* Turn streaming on/off */ 190*4882a593Smuzhiyun int pvr2_hdw_set_streaming(struct pvr2_hdw *,int); 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun /* Find out if streaming is on */ 193*4882a593Smuzhiyun int pvr2_hdw_get_streaming(struct pvr2_hdw *); 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun /* Retrieve driver overall state */ 196*4882a593Smuzhiyun int pvr2_hdw_get_state(struct pvr2_hdw *); 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun /* Configure the type of stream to generate */ 199*4882a593Smuzhiyun int pvr2_hdw_set_stream_type(struct pvr2_hdw *, enum pvr2_config); 200*4882a593Smuzhiyun 201*4882a593Smuzhiyun /* Get handle to video output stream */ 202*4882a593Smuzhiyun struct pvr2_stream *pvr2_hdw_get_video_stream(struct pvr2_hdw *); 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun /* Enable / disable retrieval of CPU firmware or prom contents. This must 205*4882a593Smuzhiyun be enabled before pvr2_hdw_cpufw_get() will function. Note that doing 206*4882a593Smuzhiyun this may prevent the device from running (and leaving this mode may 207*4882a593Smuzhiyun imply a device reset). */ 208*4882a593Smuzhiyun void pvr2_hdw_cpufw_set_enabled(struct pvr2_hdw *, 209*4882a593Smuzhiyun int mode, /* 0=8KB FX2, 1=16KB FX2, 2=PROM */ 210*4882a593Smuzhiyun int enable_flag); 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun /* Return true if we're in a mode for retrieval CPU firmware */ 213*4882a593Smuzhiyun int pvr2_hdw_cpufw_get_enabled(struct pvr2_hdw *); 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun /* Retrieve a piece of the CPU's firmware at the given offset. Return 216*4882a593Smuzhiyun value is the number of bytes retrieved or zero if we're past the end or 217*4882a593Smuzhiyun an error otherwise (e.g. if firmware retrieval is not enabled). */ 218*4882a593Smuzhiyun int pvr2_hdw_cpufw_get(struct pvr2_hdw *,unsigned int offs, 219*4882a593Smuzhiyun char *buf,unsigned int cnt); 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun /* Retrieve a previously stored v4l minor device number */ 222*4882a593Smuzhiyun int pvr2_hdw_v4l_get_minor_number(struct pvr2_hdw *,enum pvr2_v4l_type index); 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun /* Store a v4l minor device number */ 225*4882a593Smuzhiyun void pvr2_hdw_v4l_store_minor_number(struct pvr2_hdw *, 226*4882a593Smuzhiyun enum pvr2_v4l_type index,int); 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun /* The following entry points are all lower level things you normally don't 229*4882a593Smuzhiyun want to worry about. */ 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun /* Issue a command and get a response from the device. LOTS of higher 232*4882a593Smuzhiyun level stuff is built on this. */ 233*4882a593Smuzhiyun int pvr2_send_request(struct pvr2_hdw *, 234*4882a593Smuzhiyun void *write_ptr,unsigned int write_len, 235*4882a593Smuzhiyun void *read_ptr,unsigned int read_len); 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun /* Slightly higher level device communication functions. */ 238*4882a593Smuzhiyun int pvr2_write_register(struct pvr2_hdw *, u16, u32); 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun /* Call if for any reason we can't talk to the hardware anymore - this will 241*4882a593Smuzhiyun cause the driver to stop flailing on the device. */ 242*4882a593Smuzhiyun void pvr2_hdw_render_useless(struct pvr2_hdw *); 243*4882a593Smuzhiyun 244*4882a593Smuzhiyun /* Set / clear 8051's reset bit */ 245*4882a593Smuzhiyun void pvr2_hdw_cpureset_assert(struct pvr2_hdw *,int); 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun /* Execute a USB-commanded device reset */ 248*4882a593Smuzhiyun void pvr2_hdw_device_reset(struct pvr2_hdw *); 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun /* Reset worker's error trapping circuit breaker */ 251*4882a593Smuzhiyun int pvr2_hdw_untrip(struct pvr2_hdw *); 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun /* Execute hard reset command (after this point it's likely that the 254*4882a593Smuzhiyun encoder will have to be reconfigured). This also clears the "useless" 255*4882a593Smuzhiyun state. */ 256*4882a593Smuzhiyun int pvr2_hdw_cmd_deep_reset(struct pvr2_hdw *); 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun /* Execute simple reset command */ 259*4882a593Smuzhiyun int pvr2_hdw_cmd_powerup(struct pvr2_hdw *); 260*4882a593Smuzhiyun 261*4882a593Smuzhiyun /* Order decoder to reset */ 262*4882a593Smuzhiyun int pvr2_hdw_cmd_decoder_reset(struct pvr2_hdw *); 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun /* Direct manipulation of GPIO bits */ 265*4882a593Smuzhiyun int pvr2_hdw_gpio_get_dir(struct pvr2_hdw *hdw,u32 *); 266*4882a593Smuzhiyun int pvr2_hdw_gpio_get_out(struct pvr2_hdw *hdw,u32 *); 267*4882a593Smuzhiyun int pvr2_hdw_gpio_get_in(struct pvr2_hdw *hdw,u32 *); 268*4882a593Smuzhiyun int pvr2_hdw_gpio_chg_dir(struct pvr2_hdw *hdw,u32 msk,u32 val); 269*4882a593Smuzhiyun int pvr2_hdw_gpio_chg_out(struct pvr2_hdw *hdw,u32 msk,u32 val); 270*4882a593Smuzhiyun 271*4882a593Smuzhiyun /* This data structure is specifically for the next function... */ 272*4882a593Smuzhiyun struct pvr2_hdw_debug_info { 273*4882a593Smuzhiyun int big_lock_held; 274*4882a593Smuzhiyun int ctl_lock_held; 275*4882a593Smuzhiyun int flag_disconnected; 276*4882a593Smuzhiyun int flag_init_ok; 277*4882a593Smuzhiyun int flag_ok; 278*4882a593Smuzhiyun int fw1_state; 279*4882a593Smuzhiyun int flag_decoder_missed; 280*4882a593Smuzhiyun int flag_tripped; 281*4882a593Smuzhiyun int state_encoder_ok; 282*4882a593Smuzhiyun int state_encoder_run; 283*4882a593Smuzhiyun int state_decoder_run; 284*4882a593Smuzhiyun int state_decoder_ready; 285*4882a593Smuzhiyun int state_usbstream_run; 286*4882a593Smuzhiyun int state_decoder_quiescent; 287*4882a593Smuzhiyun int state_pipeline_config; 288*4882a593Smuzhiyun int state_pipeline_req; 289*4882a593Smuzhiyun int state_pipeline_pause; 290*4882a593Smuzhiyun int state_pipeline_idle; 291*4882a593Smuzhiyun int cmd_debug_state; 292*4882a593Smuzhiyun int cmd_debug_write_len; 293*4882a593Smuzhiyun int cmd_debug_read_len; 294*4882a593Smuzhiyun int cmd_debug_write_pend; 295*4882a593Smuzhiyun int cmd_debug_read_pend; 296*4882a593Smuzhiyun int cmd_debug_timeout; 297*4882a593Smuzhiyun int cmd_debug_rstatus; 298*4882a593Smuzhiyun int cmd_debug_wstatus; 299*4882a593Smuzhiyun unsigned char cmd_code; 300*4882a593Smuzhiyun }; 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun /* Non-intrusively retrieve internal state info - this is useful for 303*4882a593Smuzhiyun diagnosing lockups. Note that this operation is completed without any 304*4882a593Smuzhiyun kind of locking and so it is not atomic and may yield inconsistent 305*4882a593Smuzhiyun results. This is *purely* a debugging aid. */ 306*4882a593Smuzhiyun void pvr2_hdw_get_debug_info_unlocked(const struct pvr2_hdw *hdw, 307*4882a593Smuzhiyun struct pvr2_hdw_debug_info *); 308*4882a593Smuzhiyun 309*4882a593Smuzhiyun /* Intrusively retrieve internal state info - this is useful for 310*4882a593Smuzhiyun diagnosing overall driver state. This operation synchronizes against 311*4882a593Smuzhiyun the overall driver mutex - so if there are locking problems this will 312*4882a593Smuzhiyun likely hang! This is *purely* a debugging aid. */ 313*4882a593Smuzhiyun void pvr2_hdw_get_debug_info_locked(struct pvr2_hdw *hdw, 314*4882a593Smuzhiyun struct pvr2_hdw_debug_info *); 315*4882a593Smuzhiyun 316*4882a593Smuzhiyun /* Report out several lines of text that describes driver internal state. 317*4882a593Smuzhiyun Results are written into the passed-in buffer. */ 318*4882a593Smuzhiyun unsigned int pvr2_hdw_state_report(struct pvr2_hdw *hdw, 319*4882a593Smuzhiyun char *buf_ptr,unsigned int buf_size); 320*4882a593Smuzhiyun 321*4882a593Smuzhiyun /* Cause modules to log their state once */ 322*4882a593Smuzhiyun void pvr2_hdw_trigger_module_log(struct pvr2_hdw *hdw); 323*4882a593Smuzhiyun 324*4882a593Smuzhiyun /* Cause encoder firmware to be uploaded into the device. This is normally 325*4882a593Smuzhiyun done autonomously, but the interface is exported here because it is also 326*4882a593Smuzhiyun a debugging aid. */ 327*4882a593Smuzhiyun int pvr2_upload_firmware2(struct pvr2_hdw *hdw); 328*4882a593Smuzhiyun 329*4882a593Smuzhiyun #endif /* __PVRUSB2_HDW_H */ 330