1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2007 Michael Krufky <mkrufky@linuxtv.org> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef _PVRUSB2_FX2_CMD_H_ 8*4882a593Smuzhiyun #define _PVRUSB2_FX2_CMD_H_ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #define FX2CMD_MEM_WRITE_DWORD 0x01u 11*4882a593Smuzhiyun #define FX2CMD_MEM_READ_DWORD 0x02u 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define FX2CMD_HCW_ZILOG_RESET 0x10u /* 1=reset 0=release */ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define FX2CMD_MEM_READ_64BYTES 0x28u 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define FX2CMD_REG_WRITE 0x04u 18*4882a593Smuzhiyun #define FX2CMD_REG_READ 0x05u 19*4882a593Smuzhiyun #define FX2CMD_MEMSEL 0x06u 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define FX2CMD_I2C_WRITE 0x08u 22*4882a593Smuzhiyun #define FX2CMD_I2C_READ 0x09u 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #define FX2CMD_GET_USB_SPEED 0x0bu 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #define FX2CMD_STREAMING_ON 0x36u 27*4882a593Smuzhiyun #define FX2CMD_STREAMING_OFF 0x37u 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #define FX2CMD_FWPOST1 0x52u 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun /* These 2 only exist on Model 160xxx */ 32*4882a593Smuzhiyun #define FX2CMD_HCW_DEMOD_RESET_PIN 0xd4u 33*4882a593Smuzhiyun #define FX2CMD_HCW_MAKO_SLEEP_PIN 0xd5u 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #define FX2CMD_POWER_OFF 0xdcu 36*4882a593Smuzhiyun #define FX2CMD_POWER_ON 0xdeu 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #define FX2CMD_DEEP_RESET 0xddu 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun #define FX2CMD_GET_EEPROM_ADDR 0xebu 41*4882a593Smuzhiyun #define FX2CMD_GET_IR_CODE 0xecu 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #define FX2CMD_HCW_DEMOD_RESETIN 0xf0u 44*4882a593Smuzhiyun #define FX2CMD_HCW_DTV_STREAMING_ON 0xf1u 45*4882a593Smuzhiyun #define FX2CMD_HCW_DTV_STREAMING_OFF 0xf2u 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #define FX2CMD_ONAIR_DTV_STREAMING_ON 0xa0u 48*4882a593Smuzhiyun #define FX2CMD_ONAIR_DTV_STREAMING_OFF 0xa1u 49*4882a593Smuzhiyun #define FX2CMD_ONAIR_DTV_POWER_ON 0xa2u 50*4882a593Smuzhiyun #define FX2CMD_ONAIR_DTV_POWER_OFF 0xa3u 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun #endif /* _PVRUSB2_FX2_CMD_H_ */ 53