1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2001 Jean-Fredric Clere, Nikolas Zimmermann, Georg Acher
4*4882a593Smuzhiyun * Mark Cave-Ayland, Carlo E Prelz, Dick Streefland
5*4882a593Smuzhiyun * Copyright (c) 2002, 2003 Tuukka Toivonen
6*4882a593Smuzhiyun * Copyright (c) 2008 Erik Andrén
7*4882a593Smuzhiyun * Copyright (c) 2008 Chia-I Wu
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * P/N 861037: Sensor HDCS1000 ASIC STV0600
10*4882a593Smuzhiyun * P/N 861050-0010: Sensor HDCS1000 ASIC STV0600
11*4882a593Smuzhiyun * P/N 861050-0020: Sensor Photobit PB100 ASIC STV0600-1 - QuickCam Express
12*4882a593Smuzhiyun * P/N 861055: Sensor ST VV6410 ASIC STV0610 - LEGO cam
13*4882a593Smuzhiyun * P/N 861075-0040: Sensor HDCS1000 ASIC
14*4882a593Smuzhiyun * P/N 961179-0700: Sensor ST VV6410 ASIC STV0602 - Dexxa WebCam USB
15*4882a593Smuzhiyun * P/N 861040-0000: Sensor ST VV6410 ASIC STV0610 - QuickCam Web
16*4882a593Smuzhiyun */
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include "stv06xx_hdcs.h"
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun static struct v4l2_pix_format hdcs1x00_mode[] = {
23*4882a593Smuzhiyun {
24*4882a593Smuzhiyun HDCS_1X00_DEF_WIDTH,
25*4882a593Smuzhiyun HDCS_1X00_DEF_HEIGHT,
26*4882a593Smuzhiyun V4L2_PIX_FMT_SGRBG8,
27*4882a593Smuzhiyun V4L2_FIELD_NONE,
28*4882a593Smuzhiyun .sizeimage =
29*4882a593Smuzhiyun HDCS_1X00_DEF_WIDTH * HDCS_1X00_DEF_HEIGHT,
30*4882a593Smuzhiyun .bytesperline = HDCS_1X00_DEF_WIDTH,
31*4882a593Smuzhiyun .colorspace = V4L2_COLORSPACE_SRGB,
32*4882a593Smuzhiyun .priv = 1
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun static struct v4l2_pix_format hdcs1020_mode[] = {
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun HDCS_1020_DEF_WIDTH,
39*4882a593Smuzhiyun HDCS_1020_DEF_HEIGHT,
40*4882a593Smuzhiyun V4L2_PIX_FMT_SGRBG8,
41*4882a593Smuzhiyun V4L2_FIELD_NONE,
42*4882a593Smuzhiyun .sizeimage =
43*4882a593Smuzhiyun HDCS_1020_DEF_WIDTH * HDCS_1020_DEF_HEIGHT,
44*4882a593Smuzhiyun .bytesperline = HDCS_1020_DEF_WIDTH,
45*4882a593Smuzhiyun .colorspace = V4L2_COLORSPACE_SRGB,
46*4882a593Smuzhiyun .priv = 1
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun };
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun enum hdcs_power_state {
51*4882a593Smuzhiyun HDCS_STATE_SLEEP,
52*4882a593Smuzhiyun HDCS_STATE_IDLE,
53*4882a593Smuzhiyun HDCS_STATE_RUN
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun /* no lock? */
57*4882a593Smuzhiyun struct hdcs {
58*4882a593Smuzhiyun enum hdcs_power_state state;
59*4882a593Smuzhiyun int w, h;
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun /* visible area of the sensor array */
62*4882a593Smuzhiyun struct {
63*4882a593Smuzhiyun int left, top;
64*4882a593Smuzhiyun int width, height;
65*4882a593Smuzhiyun int border;
66*4882a593Smuzhiyun } array;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun struct {
69*4882a593Smuzhiyun /* Column timing overhead */
70*4882a593Smuzhiyun u8 cto;
71*4882a593Smuzhiyun /* Column processing overhead */
72*4882a593Smuzhiyun u8 cpo;
73*4882a593Smuzhiyun /* Row sample period constant */
74*4882a593Smuzhiyun u16 rs;
75*4882a593Smuzhiyun /* Exposure reset duration */
76*4882a593Smuzhiyun u16 er;
77*4882a593Smuzhiyun } exp;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun int psmp;
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun
hdcs_reg_write_seq(struct sd * sd,u8 reg,u8 * vals,u8 len)82*4882a593Smuzhiyun static int hdcs_reg_write_seq(struct sd *sd, u8 reg, u8 *vals, u8 len)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun u8 regs[I2C_MAX_BYTES * 2];
85*4882a593Smuzhiyun int i;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun if (unlikely((len <= 0) || (len >= I2C_MAX_BYTES) ||
88*4882a593Smuzhiyun (reg + len > 0xff)))
89*4882a593Smuzhiyun return -EINVAL;
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun for (i = 0; i < len; i++) {
92*4882a593Smuzhiyun regs[2 * i] = reg;
93*4882a593Smuzhiyun regs[2 * i + 1] = vals[i];
94*4882a593Smuzhiyun /* All addresses are shifted left one bit
95*4882a593Smuzhiyun * as bit 0 toggles r/w */
96*4882a593Smuzhiyun reg += 2;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun return stv06xx_write_sensor_bytes(sd, regs, len);
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
hdcs_set_state(struct sd * sd,enum hdcs_power_state state)102*4882a593Smuzhiyun static int hdcs_set_state(struct sd *sd, enum hdcs_power_state state)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun struct hdcs *hdcs = sd->sensor_priv;
105*4882a593Smuzhiyun u8 val;
106*4882a593Smuzhiyun int ret;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun if (hdcs->state == state)
109*4882a593Smuzhiyun return 0;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun /* we need to go idle before running or sleeping */
112*4882a593Smuzhiyun if (hdcs->state != HDCS_STATE_IDLE) {
113*4882a593Smuzhiyun ret = stv06xx_write_sensor(sd, HDCS_REG_CONTROL(sd), 0);
114*4882a593Smuzhiyun if (ret)
115*4882a593Smuzhiyun return ret;
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun hdcs->state = HDCS_STATE_IDLE;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun if (state == HDCS_STATE_IDLE)
121*4882a593Smuzhiyun return 0;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun switch (state) {
124*4882a593Smuzhiyun case HDCS_STATE_SLEEP:
125*4882a593Smuzhiyun val = HDCS_SLEEP_MODE;
126*4882a593Smuzhiyun break;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun case HDCS_STATE_RUN:
129*4882a593Smuzhiyun val = HDCS_RUN_ENABLE;
130*4882a593Smuzhiyun break;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun default:
133*4882a593Smuzhiyun return -EINVAL;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun ret = stv06xx_write_sensor(sd, HDCS_REG_CONTROL(sd), val);
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun /* Update the state if the write succeeded */
139*4882a593Smuzhiyun if (!ret)
140*4882a593Smuzhiyun hdcs->state = state;
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun return ret;
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun
hdcs_reset(struct sd * sd)145*4882a593Smuzhiyun static int hdcs_reset(struct sd *sd)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun struct hdcs *hdcs = sd->sensor_priv;
148*4882a593Smuzhiyun int err;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun err = stv06xx_write_sensor(sd, HDCS_REG_CONTROL(sd), 1);
151*4882a593Smuzhiyun if (err < 0)
152*4882a593Smuzhiyun return err;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun err = stv06xx_write_sensor(sd, HDCS_REG_CONTROL(sd), 0);
155*4882a593Smuzhiyun if (err < 0)
156*4882a593Smuzhiyun hdcs->state = HDCS_STATE_IDLE;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun return err;
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun
hdcs_set_exposure(struct gspca_dev * gspca_dev,__s32 val)161*4882a593Smuzhiyun static int hdcs_set_exposure(struct gspca_dev *gspca_dev, __s32 val)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun struct sd *sd = (struct sd *) gspca_dev;
164*4882a593Smuzhiyun struct hdcs *hdcs = sd->sensor_priv;
165*4882a593Smuzhiyun int rowexp, srowexp;
166*4882a593Smuzhiyun int max_srowexp;
167*4882a593Smuzhiyun /* Column time period */
168*4882a593Smuzhiyun int ct;
169*4882a593Smuzhiyun /* Column processing period */
170*4882a593Smuzhiyun int cp;
171*4882a593Smuzhiyun /* Row processing period */
172*4882a593Smuzhiyun int rp;
173*4882a593Smuzhiyun /* Minimum number of column timing periods
174*4882a593Smuzhiyun within the column processing period */
175*4882a593Smuzhiyun int mnct;
176*4882a593Smuzhiyun int cycles, err;
177*4882a593Smuzhiyun u8 exp[14];
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun cycles = val * HDCS_CLK_FREQ_MHZ * 257;
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun ct = hdcs->exp.cto + hdcs->psmp + (HDCS_ADC_START_SIG_DUR + 2);
182*4882a593Smuzhiyun cp = hdcs->exp.cto + (hdcs->w * ct / 2);
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun /* the cycles one row takes */
185*4882a593Smuzhiyun rp = hdcs->exp.rs + cp;
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun rowexp = cycles / rp;
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun /* the remaining cycles */
190*4882a593Smuzhiyun cycles -= rowexp * rp;
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun /* calculate sub-row exposure */
193*4882a593Smuzhiyun if (IS_1020(sd)) {
194*4882a593Smuzhiyun /* see HDCS-1020 datasheet 3.5.6.4, p. 63 */
195*4882a593Smuzhiyun srowexp = hdcs->w - (cycles + hdcs->exp.er + 13) / ct;
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun mnct = (hdcs->exp.er + 12 + ct - 1) / ct;
198*4882a593Smuzhiyun max_srowexp = hdcs->w - mnct;
199*4882a593Smuzhiyun } else {
200*4882a593Smuzhiyun /* see HDCS-1000 datasheet 3.4.5.5, p. 61 */
201*4882a593Smuzhiyun srowexp = cp - hdcs->exp.er - 6 - cycles;
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun mnct = (hdcs->exp.er + 5 + ct - 1) / ct;
204*4882a593Smuzhiyun max_srowexp = cp - mnct * ct - 1;
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun if (srowexp < 0)
208*4882a593Smuzhiyun srowexp = 0;
209*4882a593Smuzhiyun else if (srowexp > max_srowexp)
210*4882a593Smuzhiyun srowexp = max_srowexp;
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun if (IS_1020(sd)) {
213*4882a593Smuzhiyun exp[0] = HDCS20_CONTROL;
214*4882a593Smuzhiyun exp[1] = 0x00; /* Stop streaming */
215*4882a593Smuzhiyun exp[2] = HDCS_ROWEXPL;
216*4882a593Smuzhiyun exp[3] = rowexp & 0xff;
217*4882a593Smuzhiyun exp[4] = HDCS_ROWEXPH;
218*4882a593Smuzhiyun exp[5] = rowexp >> 8;
219*4882a593Smuzhiyun exp[6] = HDCS20_SROWEXP;
220*4882a593Smuzhiyun exp[7] = (srowexp >> 2) & 0xff;
221*4882a593Smuzhiyun exp[8] = HDCS20_ERROR;
222*4882a593Smuzhiyun exp[9] = 0x10; /* Clear exposure error flag*/
223*4882a593Smuzhiyun exp[10] = HDCS20_CONTROL;
224*4882a593Smuzhiyun exp[11] = 0x04; /* Restart streaming */
225*4882a593Smuzhiyun err = stv06xx_write_sensor_bytes(sd, exp, 6);
226*4882a593Smuzhiyun } else {
227*4882a593Smuzhiyun exp[0] = HDCS00_CONTROL;
228*4882a593Smuzhiyun exp[1] = 0x00; /* Stop streaming */
229*4882a593Smuzhiyun exp[2] = HDCS_ROWEXPL;
230*4882a593Smuzhiyun exp[3] = rowexp & 0xff;
231*4882a593Smuzhiyun exp[4] = HDCS_ROWEXPH;
232*4882a593Smuzhiyun exp[5] = rowexp >> 8;
233*4882a593Smuzhiyun exp[6] = HDCS00_SROWEXPL;
234*4882a593Smuzhiyun exp[7] = srowexp & 0xff;
235*4882a593Smuzhiyun exp[8] = HDCS00_SROWEXPH;
236*4882a593Smuzhiyun exp[9] = srowexp >> 8;
237*4882a593Smuzhiyun exp[10] = HDCS_STATUS;
238*4882a593Smuzhiyun exp[11] = 0x10; /* Clear exposure error flag*/
239*4882a593Smuzhiyun exp[12] = HDCS00_CONTROL;
240*4882a593Smuzhiyun exp[13] = 0x04; /* Restart streaming */
241*4882a593Smuzhiyun err = stv06xx_write_sensor_bytes(sd, exp, 7);
242*4882a593Smuzhiyun if (err < 0)
243*4882a593Smuzhiyun return err;
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun gspca_dbg(gspca_dev, D_CONF, "Writing exposure %d, rowexp %d, srowexp %d\n",
246*4882a593Smuzhiyun val, rowexp, srowexp);
247*4882a593Smuzhiyun return err;
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun
hdcs_set_gains(struct sd * sd,u8 g)250*4882a593Smuzhiyun static int hdcs_set_gains(struct sd *sd, u8 g)
251*4882a593Smuzhiyun {
252*4882a593Smuzhiyun int err;
253*4882a593Smuzhiyun u8 gains[4];
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun /* the voltage gain Av = (1 + 19 * val / 127) * (1 + bit7) */
256*4882a593Smuzhiyun if (g > 127)
257*4882a593Smuzhiyun g = 0x80 | (g / 2);
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun gains[0] = g;
260*4882a593Smuzhiyun gains[1] = g;
261*4882a593Smuzhiyun gains[2] = g;
262*4882a593Smuzhiyun gains[3] = g;
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun err = hdcs_reg_write_seq(sd, HDCS_ERECPGA, gains, 4);
265*4882a593Smuzhiyun return err;
266*4882a593Smuzhiyun }
267*4882a593Smuzhiyun
hdcs_set_gain(struct gspca_dev * gspca_dev,__s32 val)268*4882a593Smuzhiyun static int hdcs_set_gain(struct gspca_dev *gspca_dev, __s32 val)
269*4882a593Smuzhiyun {
270*4882a593Smuzhiyun gspca_dbg(gspca_dev, D_CONF, "Writing gain %d\n", val);
271*4882a593Smuzhiyun return hdcs_set_gains((struct sd *) gspca_dev,
272*4882a593Smuzhiyun val & 0xff);
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun
hdcs_set_size(struct sd * sd,unsigned int width,unsigned int height)275*4882a593Smuzhiyun static int hdcs_set_size(struct sd *sd,
276*4882a593Smuzhiyun unsigned int width, unsigned int height)
277*4882a593Smuzhiyun {
278*4882a593Smuzhiyun struct hdcs *hdcs = sd->sensor_priv;
279*4882a593Smuzhiyun u8 win[4];
280*4882a593Smuzhiyun unsigned int x, y;
281*4882a593Smuzhiyun int err;
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun /* must be multiple of 4 */
284*4882a593Smuzhiyun width = (width + 3) & ~0x3;
285*4882a593Smuzhiyun height = (height + 3) & ~0x3;
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun if (width > hdcs->array.width)
288*4882a593Smuzhiyun width = hdcs->array.width;
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun if (IS_1020(sd)) {
291*4882a593Smuzhiyun /* the borders are also invalid */
292*4882a593Smuzhiyun if (height + 2 * hdcs->array.border + HDCS_1020_BOTTOM_Y_SKIP
293*4882a593Smuzhiyun > hdcs->array.height)
294*4882a593Smuzhiyun height = hdcs->array.height - 2 * hdcs->array.border -
295*4882a593Smuzhiyun HDCS_1020_BOTTOM_Y_SKIP;
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun y = (hdcs->array.height - HDCS_1020_BOTTOM_Y_SKIP - height) / 2
298*4882a593Smuzhiyun + hdcs->array.top;
299*4882a593Smuzhiyun } else {
300*4882a593Smuzhiyun if (height > hdcs->array.height)
301*4882a593Smuzhiyun height = hdcs->array.height;
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun y = hdcs->array.top + (hdcs->array.height - height) / 2;
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun x = hdcs->array.left + (hdcs->array.width - width) / 2;
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun win[0] = y / 4;
309*4882a593Smuzhiyun win[1] = x / 4;
310*4882a593Smuzhiyun win[2] = (y + height) / 4 - 1;
311*4882a593Smuzhiyun win[3] = (x + width) / 4 - 1;
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun err = hdcs_reg_write_seq(sd, HDCS_FWROW, win, 4);
314*4882a593Smuzhiyun if (err < 0)
315*4882a593Smuzhiyun return err;
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun /* Update the current width and height */
318*4882a593Smuzhiyun hdcs->w = width;
319*4882a593Smuzhiyun hdcs->h = height;
320*4882a593Smuzhiyun return err;
321*4882a593Smuzhiyun }
322*4882a593Smuzhiyun
hdcs_s_ctrl(struct v4l2_ctrl * ctrl)323*4882a593Smuzhiyun static int hdcs_s_ctrl(struct v4l2_ctrl *ctrl)
324*4882a593Smuzhiyun {
325*4882a593Smuzhiyun struct gspca_dev *gspca_dev =
326*4882a593Smuzhiyun container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
327*4882a593Smuzhiyun int err = -EINVAL;
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun switch (ctrl->id) {
330*4882a593Smuzhiyun case V4L2_CID_GAIN:
331*4882a593Smuzhiyun err = hdcs_set_gain(gspca_dev, ctrl->val);
332*4882a593Smuzhiyun break;
333*4882a593Smuzhiyun case V4L2_CID_EXPOSURE:
334*4882a593Smuzhiyun err = hdcs_set_exposure(gspca_dev, ctrl->val);
335*4882a593Smuzhiyun break;
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun return err;
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun static const struct v4l2_ctrl_ops hdcs_ctrl_ops = {
341*4882a593Smuzhiyun .s_ctrl = hdcs_s_ctrl,
342*4882a593Smuzhiyun };
343*4882a593Smuzhiyun
hdcs_init_controls(struct sd * sd)344*4882a593Smuzhiyun static int hdcs_init_controls(struct sd *sd)
345*4882a593Smuzhiyun {
346*4882a593Smuzhiyun struct v4l2_ctrl_handler *hdl = &sd->gspca_dev.ctrl_handler;
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun v4l2_ctrl_handler_init(hdl, 2);
349*4882a593Smuzhiyun v4l2_ctrl_new_std(hdl, &hdcs_ctrl_ops,
350*4882a593Smuzhiyun V4L2_CID_EXPOSURE, 0, 0xff, 1, HDCS_DEFAULT_EXPOSURE);
351*4882a593Smuzhiyun v4l2_ctrl_new_std(hdl, &hdcs_ctrl_ops,
352*4882a593Smuzhiyun V4L2_CID_GAIN, 0, 0xff, 1, HDCS_DEFAULT_GAIN);
353*4882a593Smuzhiyun return hdl->error;
354*4882a593Smuzhiyun }
355*4882a593Smuzhiyun
hdcs_probe_1x00(struct sd * sd)356*4882a593Smuzhiyun static int hdcs_probe_1x00(struct sd *sd)
357*4882a593Smuzhiyun {
358*4882a593Smuzhiyun struct hdcs *hdcs;
359*4882a593Smuzhiyun u16 sensor;
360*4882a593Smuzhiyun int ret;
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun ret = stv06xx_read_sensor(sd, HDCS_IDENT, &sensor);
363*4882a593Smuzhiyun if (ret < 0 || sensor != 0x08)
364*4882a593Smuzhiyun return -ENODEV;
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun pr_info("HDCS-1000/1100 sensor detected\n");
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun sd->gspca_dev.cam.cam_mode = hdcs1x00_mode;
369*4882a593Smuzhiyun sd->gspca_dev.cam.nmodes = ARRAY_SIZE(hdcs1x00_mode);
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun hdcs = kmalloc(sizeof(struct hdcs), GFP_KERNEL);
372*4882a593Smuzhiyun if (!hdcs)
373*4882a593Smuzhiyun return -ENOMEM;
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun hdcs->array.left = 8;
376*4882a593Smuzhiyun hdcs->array.top = 8;
377*4882a593Smuzhiyun hdcs->array.width = HDCS_1X00_DEF_WIDTH;
378*4882a593Smuzhiyun hdcs->array.height = HDCS_1X00_DEF_HEIGHT;
379*4882a593Smuzhiyun hdcs->array.border = 4;
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun hdcs->exp.cto = 4;
382*4882a593Smuzhiyun hdcs->exp.cpo = 2;
383*4882a593Smuzhiyun hdcs->exp.rs = 186;
384*4882a593Smuzhiyun hdcs->exp.er = 100;
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun /*
387*4882a593Smuzhiyun * Frame rate on HDCS-1000 with STV600 depends on PSMP:
388*4882a593Smuzhiyun * 4 = doesn't work at all
389*4882a593Smuzhiyun * 5 = 7.8 fps,
390*4882a593Smuzhiyun * 6 = 6.9 fps,
391*4882a593Smuzhiyun * 8 = 6.3 fps,
392*4882a593Smuzhiyun * 10 = 5.5 fps,
393*4882a593Smuzhiyun * 15 = 4.4 fps,
394*4882a593Smuzhiyun * 31 = 2.8 fps
395*4882a593Smuzhiyun *
396*4882a593Smuzhiyun * Frame rate on HDCS-1000 with STV602 depends on PSMP:
397*4882a593Smuzhiyun * 15 = doesn't work at all
398*4882a593Smuzhiyun * 18 = doesn't work at all
399*4882a593Smuzhiyun * 19 = 7.3 fps
400*4882a593Smuzhiyun * 20 = 7.4 fps
401*4882a593Smuzhiyun * 21 = 7.4 fps
402*4882a593Smuzhiyun * 22 = 7.4 fps
403*4882a593Smuzhiyun * 24 = 6.3 fps
404*4882a593Smuzhiyun * 30 = 5.4 fps
405*4882a593Smuzhiyun */
406*4882a593Smuzhiyun hdcs->psmp = (sd->bridge == BRIDGE_STV602) ? 20 : 5;
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun sd->sensor_priv = hdcs;
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun return 0;
411*4882a593Smuzhiyun }
412*4882a593Smuzhiyun
hdcs_probe_1020(struct sd * sd)413*4882a593Smuzhiyun static int hdcs_probe_1020(struct sd *sd)
414*4882a593Smuzhiyun {
415*4882a593Smuzhiyun struct hdcs *hdcs;
416*4882a593Smuzhiyun u16 sensor;
417*4882a593Smuzhiyun int ret;
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun ret = stv06xx_read_sensor(sd, HDCS_IDENT, &sensor);
420*4882a593Smuzhiyun if (ret < 0 || sensor != 0x10)
421*4882a593Smuzhiyun return -ENODEV;
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun pr_info("HDCS-1020 sensor detected\n");
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun sd->gspca_dev.cam.cam_mode = hdcs1020_mode;
426*4882a593Smuzhiyun sd->gspca_dev.cam.nmodes = ARRAY_SIZE(hdcs1020_mode);
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun hdcs = kmalloc(sizeof(struct hdcs), GFP_KERNEL);
429*4882a593Smuzhiyun if (!hdcs)
430*4882a593Smuzhiyun return -ENOMEM;
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun /*
433*4882a593Smuzhiyun * From Andrey's test image: looks like HDCS-1020 upper-left
434*4882a593Smuzhiyun * visible pixel is at 24,8 (y maybe even smaller?) and lower-right
435*4882a593Smuzhiyun * visible pixel at 375,299 (x maybe even larger?)
436*4882a593Smuzhiyun */
437*4882a593Smuzhiyun hdcs->array.left = 24;
438*4882a593Smuzhiyun hdcs->array.top = 4;
439*4882a593Smuzhiyun hdcs->array.width = HDCS_1020_DEF_WIDTH;
440*4882a593Smuzhiyun hdcs->array.height = 304;
441*4882a593Smuzhiyun hdcs->array.border = 4;
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun hdcs->psmp = 6;
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun hdcs->exp.cto = 3;
446*4882a593Smuzhiyun hdcs->exp.cpo = 3;
447*4882a593Smuzhiyun hdcs->exp.rs = 155;
448*4882a593Smuzhiyun hdcs->exp.er = 96;
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun sd->sensor_priv = hdcs;
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun return 0;
453*4882a593Smuzhiyun }
454*4882a593Smuzhiyun
hdcs_start(struct sd * sd)455*4882a593Smuzhiyun static int hdcs_start(struct sd *sd)
456*4882a593Smuzhiyun {
457*4882a593Smuzhiyun struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun gspca_dbg(gspca_dev, D_STREAM, "Starting stream\n");
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun return hdcs_set_state(sd, HDCS_STATE_RUN);
462*4882a593Smuzhiyun }
463*4882a593Smuzhiyun
hdcs_stop(struct sd * sd)464*4882a593Smuzhiyun static int hdcs_stop(struct sd *sd)
465*4882a593Smuzhiyun {
466*4882a593Smuzhiyun struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun gspca_dbg(gspca_dev, D_STREAM, "Halting stream\n");
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun return hdcs_set_state(sd, HDCS_STATE_SLEEP);
471*4882a593Smuzhiyun }
472*4882a593Smuzhiyun
hdcs_init(struct sd * sd)473*4882a593Smuzhiyun static int hdcs_init(struct sd *sd)
474*4882a593Smuzhiyun {
475*4882a593Smuzhiyun struct hdcs *hdcs = sd->sensor_priv;
476*4882a593Smuzhiyun int i, err = 0;
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun /* Set the STV0602AA in STV0600 emulation mode */
479*4882a593Smuzhiyun if (sd->bridge == BRIDGE_STV602)
480*4882a593Smuzhiyun stv06xx_write_bridge(sd, STV_STV0600_EMULATION, 1);
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun /* Execute the bridge init */
483*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(stv_bridge_init) && !err; i++) {
484*4882a593Smuzhiyun err = stv06xx_write_bridge(sd, stv_bridge_init[i][0],
485*4882a593Smuzhiyun stv_bridge_init[i][1]);
486*4882a593Smuzhiyun }
487*4882a593Smuzhiyun if (err < 0)
488*4882a593Smuzhiyun return err;
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun /* sensor soft reset */
491*4882a593Smuzhiyun hdcs_reset(sd);
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun /* Execute the sensor init */
494*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(stv_sensor_init) && !err; i++) {
495*4882a593Smuzhiyun err = stv06xx_write_sensor(sd, stv_sensor_init[i][0],
496*4882a593Smuzhiyun stv_sensor_init[i][1]);
497*4882a593Smuzhiyun }
498*4882a593Smuzhiyun if (err < 0)
499*4882a593Smuzhiyun return err;
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun /* Enable continuous frame capture, bit 2: stop when frame complete */
502*4882a593Smuzhiyun err = stv06xx_write_sensor(sd, HDCS_REG_CONFIG(sd), BIT(3));
503*4882a593Smuzhiyun if (err < 0)
504*4882a593Smuzhiyun return err;
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun /* Set PGA sample duration
507*4882a593Smuzhiyun (was 0x7E for the STV602, but caused slow framerate with HDCS-1020) */
508*4882a593Smuzhiyun if (IS_1020(sd))
509*4882a593Smuzhiyun err = stv06xx_write_sensor(sd, HDCS_TCTRL,
510*4882a593Smuzhiyun (HDCS_ADC_START_SIG_DUR << 6) | hdcs->psmp);
511*4882a593Smuzhiyun else
512*4882a593Smuzhiyun err = stv06xx_write_sensor(sd, HDCS_TCTRL,
513*4882a593Smuzhiyun (HDCS_ADC_START_SIG_DUR << 5) | hdcs->psmp);
514*4882a593Smuzhiyun if (err < 0)
515*4882a593Smuzhiyun return err;
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun return hdcs_set_size(sd, hdcs->array.width, hdcs->array.height);
518*4882a593Smuzhiyun }
519*4882a593Smuzhiyun
hdcs_dump(struct sd * sd)520*4882a593Smuzhiyun static int hdcs_dump(struct sd *sd)
521*4882a593Smuzhiyun {
522*4882a593Smuzhiyun u16 reg, val;
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun pr_info("Dumping sensor registers:\n");
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun for (reg = HDCS_IDENT; reg <= HDCS_ROWEXPH; reg++) {
527*4882a593Smuzhiyun stv06xx_read_sensor(sd, reg, &val);
528*4882a593Smuzhiyun pr_info("reg 0x%02x = 0x%02x\n", reg, val);
529*4882a593Smuzhiyun }
530*4882a593Smuzhiyun return 0;
531*4882a593Smuzhiyun }
532