1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * STK1135 registers 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2013 Ondrej Zary 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #define STK1135_REG_GCTRL 0x000 /* GPIO control */ 9*4882a593Smuzhiyun #define STK1135_REG_ICTRL 0x004 /* Interrupt control */ 10*4882a593Smuzhiyun #define STK1135_REG_IDATA 0x008 /* Interrupt data */ 11*4882a593Smuzhiyun #define STK1135_REG_RMCTL 0x00c /* Remote wakeup control */ 12*4882a593Smuzhiyun #define STK1135_REG_POSVA 0x010 /* Power-on strapping data */ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define STK1135_REG_SENSO 0x018 /* Sensor select options */ 15*4882a593Smuzhiyun #define STK1135_REG_PLLFD 0x01c /* PLL frequency divider */ 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define STK1135_REG_SCTRL 0x100 /* Sensor control register */ 18*4882a593Smuzhiyun #define STK1135_REG_DCTRL 0x104 /* Decimation control register */ 19*4882a593Smuzhiyun #define STK1135_REG_CISPO 0x110 /* Capture image starting position */ 20*4882a593Smuzhiyun #define STK1135_REG_CIEPO 0x114 /* Capture image ending position */ 21*4882a593Smuzhiyun #define STK1135_REG_TCTRL 0x120 /* Test data control */ 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #define STK1135_REG_SICTL 0x200 /* Serial interface control register */ 24*4882a593Smuzhiyun #define STK1135_REG_SBUSW 0x204 /* Serial bus write */ 25*4882a593Smuzhiyun #define STK1135_REG_SBUSR 0x208 /* Serial bus read */ 26*4882a593Smuzhiyun #define STK1135_REG_SCSI 0x20c /* Software control serial interface */ 27*4882a593Smuzhiyun #define STK1135_REG_GSBWP 0x210 /* General serial bus write port */ 28*4882a593Smuzhiyun #define STK1135_REG_GSBRP 0x214 /* General serial bus read port */ 29*4882a593Smuzhiyun #define STK1135_REG_ASIC 0x2fc /* Alternate serial interface control */ 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define STK1135_REG_TMGEN 0x300 /* Timing generator */ 32*4882a593Smuzhiyun #define STK1135_REG_TCP1 0x350 /* Timing control parameter 1 */ 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun struct stk1135_pkt_header { 35*4882a593Smuzhiyun u8 flags; 36*4882a593Smuzhiyun u8 seq; 37*4882a593Smuzhiyun __le16 gpio; 38*4882a593Smuzhiyun } __packed; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun #define STK1135_HDR_FRAME_START (1 << 7) 41*4882a593Smuzhiyun #define STK1135_HDR_ODD (1 << 6) 42*4882a593Smuzhiyun #define STK1135_HDR_I2C_VBLANK (1 << 5) 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #define STK1135_HDR_SEQ_MASK 0x3f 45