1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Driver for the mt9m111 sensor
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2008 Erik Andrén
6*4882a593Smuzhiyun * Copyright (C) 2007 Ilyes Gouta. Based on the m5603x Linux Driver Project.
7*4882a593Smuzhiyun * Copyright (C) 2005 m5603x Linux Driver Project <m5602@x3ng.com.br>
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Portions of code to USB interface and ALi driver software,
10*4882a593Smuzhiyun * Copyright (c) 2006 Willem Duinker
11*4882a593Smuzhiyun * v4l2 interface modeled after the V4L2 driver
12*4882a593Smuzhiyun * for SN9C10x PC Camera Controllers
13*4882a593Smuzhiyun */
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include "m5602_mt9m111.h"
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun static int mt9m111_s_ctrl(struct v4l2_ctrl *ctrl);
20*4882a593Smuzhiyun static void mt9m111_dump_registers(struct sd *sd);
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun static const unsigned char preinit_mt9m111[][4] = {
23*4882a593Smuzhiyun {BRIDGE, M5602_XB_MCU_CLK_DIV, 0x02, 0x00},
24*4882a593Smuzhiyun {BRIDGE, M5602_XB_MCU_CLK_CTRL, 0xb0, 0x00},
25*4882a593Smuzhiyun {BRIDGE, M5602_XB_SEN_CLK_DIV, 0x00, 0x00},
26*4882a593Smuzhiyun {BRIDGE, M5602_XB_SEN_CLK_CTRL, 0xb0, 0x00},
27*4882a593Smuzhiyun {BRIDGE, M5602_XB_SENSOR_TYPE, 0x0d, 0x00},
28*4882a593Smuzhiyun {BRIDGE, M5602_XB_SENSOR_CTRL, 0x00, 0x00},
29*4882a593Smuzhiyun {BRIDGE, M5602_XB_ADC_CTRL, 0xc0, 0x00},
30*4882a593Smuzhiyun {BRIDGE, M5602_XB_SENSOR_TYPE, 0x09, 0x00},
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun {SENSOR, MT9M111_PAGE_MAP, 0x00, 0x00},
33*4882a593Smuzhiyun {SENSOR, MT9M111_SC_RESET,
34*4882a593Smuzhiyun MT9M111_RESET |
35*4882a593Smuzhiyun MT9M111_RESTART |
36*4882a593Smuzhiyun MT9M111_ANALOG_STANDBY |
37*4882a593Smuzhiyun MT9M111_CHIP_DISABLE,
38*4882a593Smuzhiyun MT9M111_SHOW_BAD_FRAMES |
39*4882a593Smuzhiyun MT9M111_RESTART_BAD_FRAMES |
40*4882a593Smuzhiyun MT9M111_SYNCHRONIZE_CHANGES},
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun {BRIDGE, M5602_XB_GPIO_DIR, 0x05, 0x00},
43*4882a593Smuzhiyun {BRIDGE, M5602_XB_GPIO_DAT, 0x04, 0x00},
44*4882a593Smuzhiyun {BRIDGE, M5602_XB_GPIO_EN_H, 0x3e, 0x00},
45*4882a593Smuzhiyun {BRIDGE, M5602_XB_GPIO_DIR_H, 0x3e, 0x00},
46*4882a593Smuzhiyun {BRIDGE, M5602_XB_GPIO_DAT_H, 0x02, 0x00},
47*4882a593Smuzhiyun {BRIDGE, M5602_XB_GPIO_EN_L, 0xff, 0x00},
48*4882a593Smuzhiyun {BRIDGE, M5602_XB_GPIO_DIR_L, 0xff, 0x00},
49*4882a593Smuzhiyun {BRIDGE, M5602_XB_GPIO_DAT_L, 0x00, 0x00},
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun {BRIDGE, M5602_XB_SEN_CLK_DIV, 0x00, 0x00},
52*4882a593Smuzhiyun {BRIDGE, M5602_XB_SEN_CLK_CTRL, 0xb0, 0x00},
53*4882a593Smuzhiyun {BRIDGE, M5602_XB_GPIO_DIR, 0x07, 0x00},
54*4882a593Smuzhiyun {BRIDGE, M5602_XB_GPIO_DAT, 0x0b, 0x00},
55*4882a593Smuzhiyun {BRIDGE, M5602_XB_GPIO_EN_H, 0x06, 0x00},
56*4882a593Smuzhiyun {BRIDGE, M5602_XB_GPIO_EN_L, 0x00, 0x00},
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun {BRIDGE, M5602_XB_I2C_CLK_DIV, 0x0a, 0x00}
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun static const unsigned char init_mt9m111[][4] = {
62*4882a593Smuzhiyun {BRIDGE, M5602_XB_MCU_CLK_DIV, 0x02, 0x00},
63*4882a593Smuzhiyun {BRIDGE, M5602_XB_MCU_CLK_CTRL, 0xb0, 0x00},
64*4882a593Smuzhiyun {BRIDGE, M5602_XB_SEN_CLK_DIV, 0x00, 0x00},
65*4882a593Smuzhiyun {BRIDGE, M5602_XB_SEN_CLK_CTRL, 0xb0, 0x00},
66*4882a593Smuzhiyun {BRIDGE, M5602_XB_ADC_CTRL, 0xc0, 0x00},
67*4882a593Smuzhiyun {BRIDGE, M5602_XB_SENSOR_TYPE, 0x09, 0x00},
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun {BRIDGE, M5602_XB_GPIO_EN_H, 0x06, 0x00},
70*4882a593Smuzhiyun {BRIDGE, M5602_XB_GPIO_EN_L, 0x00, 0x00},
71*4882a593Smuzhiyun {BRIDGE, M5602_XB_GPIO_DAT, 0x04, 0x00},
72*4882a593Smuzhiyun {BRIDGE, M5602_XB_GPIO_DIR_H, 0x3e, 0x00},
73*4882a593Smuzhiyun {BRIDGE, M5602_XB_GPIO_DIR_L, 0xff, 0x00},
74*4882a593Smuzhiyun {BRIDGE, M5602_XB_GPIO_DAT_H, 0x02, 0x00},
75*4882a593Smuzhiyun {BRIDGE, M5602_XB_GPIO_DAT_L, 0x00, 0x00},
76*4882a593Smuzhiyun {BRIDGE, M5602_XB_GPIO_DIR, 0x07, 0x00},
77*4882a593Smuzhiyun {BRIDGE, M5602_XB_GPIO_DAT, 0x0b, 0x00},
78*4882a593Smuzhiyun {BRIDGE, M5602_XB_I2C_CLK_DIV, 0x0a, 0x00},
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun {SENSOR, MT9M111_SC_RESET, 0x00, 0x29},
81*4882a593Smuzhiyun {SENSOR, MT9M111_PAGE_MAP, 0x00, 0x00},
82*4882a593Smuzhiyun {SENSOR, MT9M111_SC_RESET, 0x00, 0x08},
83*4882a593Smuzhiyun {SENSOR, MT9M111_PAGE_MAP, 0x00, 0x01},
84*4882a593Smuzhiyun {SENSOR, MT9M111_CP_OPERATING_MODE_CTL, 0x00,
85*4882a593Smuzhiyun MT9M111_CP_OPERATING_MODE_CTL},
86*4882a593Smuzhiyun {SENSOR, MT9M111_CP_LENS_CORRECTION_1, 0x04, 0x2a},
87*4882a593Smuzhiyun {SENSOR, MT9M111_CP_DEFECT_CORR_CONTEXT_A, 0x00,
88*4882a593Smuzhiyun MT9M111_2D_DEFECT_CORRECTION_ENABLE},
89*4882a593Smuzhiyun {SENSOR, MT9M111_CP_DEFECT_CORR_CONTEXT_B, 0x00,
90*4882a593Smuzhiyun MT9M111_2D_DEFECT_CORRECTION_ENABLE},
91*4882a593Smuzhiyun {SENSOR, MT9M111_CP_LUMA_OFFSET, 0x00, 0x00},
92*4882a593Smuzhiyun {SENSOR, MT9M111_CP_LUMA_CLIP, 0xff, 0x00},
93*4882a593Smuzhiyun {SENSOR, MT9M111_CP_OUTPUT_FORMAT_CTL2_CONTEXT_A, 0x14, 0x00},
94*4882a593Smuzhiyun {SENSOR, MT9M111_CP_OUTPUT_FORMAT_CTL2_CONTEXT_B, 0x14, 0x00},
95*4882a593Smuzhiyun {SENSOR, 0xcd, 0x00, 0x0e},
96*4882a593Smuzhiyun {SENSOR, 0xd0, 0x00, 0x40},
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun {SENSOR, MT9M111_PAGE_MAP, 0x00, 0x02},
99*4882a593Smuzhiyun {SENSOR, MT9M111_CC_AUTO_EXPOSURE_PARAMETER_18, 0x00, 0x00},
100*4882a593Smuzhiyun {SENSOR, MT9M111_CC_AWB_PARAMETER_7, 0xef, 0x03},
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun {SENSOR, MT9M111_PAGE_MAP, 0x00, 0x00},
103*4882a593Smuzhiyun {SENSOR, 0x33, 0x03, 0x49},
104*4882a593Smuzhiyun {SENSOR, 0x34, 0xc0, 0x19},
105*4882a593Smuzhiyun {SENSOR, 0x3f, 0x20, 0x20},
106*4882a593Smuzhiyun {SENSOR, 0x40, 0x20, 0x20},
107*4882a593Smuzhiyun {SENSOR, 0x5a, 0xc0, 0x0a},
108*4882a593Smuzhiyun {SENSOR, 0x70, 0x7b, 0x0a},
109*4882a593Smuzhiyun {SENSOR, 0x71, 0xff, 0x00},
110*4882a593Smuzhiyun {SENSOR, 0x72, 0x19, 0x0e},
111*4882a593Smuzhiyun {SENSOR, 0x73, 0x18, 0x0f},
112*4882a593Smuzhiyun {SENSOR, 0x74, 0x57, 0x32},
113*4882a593Smuzhiyun {SENSOR, 0x75, 0x56, 0x34},
114*4882a593Smuzhiyun {SENSOR, 0x76, 0x73, 0x35},
115*4882a593Smuzhiyun {SENSOR, 0x77, 0x30, 0x12},
116*4882a593Smuzhiyun {SENSOR, 0x78, 0x79, 0x02},
117*4882a593Smuzhiyun {SENSOR, 0x79, 0x75, 0x06},
118*4882a593Smuzhiyun {SENSOR, 0x7a, 0x77, 0x0a},
119*4882a593Smuzhiyun {SENSOR, 0x7b, 0x78, 0x09},
120*4882a593Smuzhiyun {SENSOR, 0x7c, 0x7d, 0x06},
121*4882a593Smuzhiyun {SENSOR, 0x7d, 0x31, 0x10},
122*4882a593Smuzhiyun {SENSOR, 0x7e, 0x00, 0x7e},
123*4882a593Smuzhiyun {SENSOR, 0x80, 0x59, 0x04},
124*4882a593Smuzhiyun {SENSOR, 0x81, 0x59, 0x04},
125*4882a593Smuzhiyun {SENSOR, 0x82, 0x57, 0x0a},
126*4882a593Smuzhiyun {SENSOR, 0x83, 0x58, 0x0b},
127*4882a593Smuzhiyun {SENSOR, 0x84, 0x47, 0x0c},
128*4882a593Smuzhiyun {SENSOR, 0x85, 0x48, 0x0e},
129*4882a593Smuzhiyun {SENSOR, 0x86, 0x5b, 0x02},
130*4882a593Smuzhiyun {SENSOR, 0x87, 0x00, 0x5c},
131*4882a593Smuzhiyun {SENSOR, MT9M111_CONTEXT_CONTROL, 0x00, MT9M111_SEL_CONTEXT_B},
132*4882a593Smuzhiyun {SENSOR, 0x60, 0x00, 0x80},
133*4882a593Smuzhiyun {SENSOR, 0x61, 0x00, 0x00},
134*4882a593Smuzhiyun {SENSOR, 0x62, 0x00, 0x00},
135*4882a593Smuzhiyun {SENSOR, 0x63, 0x00, 0x00},
136*4882a593Smuzhiyun {SENSOR, 0x64, 0x00, 0x00},
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun {SENSOR, MT9M111_SC_ROWSTART, 0x00, 0x0d}, /* 13 */
139*4882a593Smuzhiyun {SENSOR, MT9M111_SC_COLSTART, 0x00, 0x12}, /* 18 */
140*4882a593Smuzhiyun {SENSOR, MT9M111_SC_WINDOW_HEIGHT, 0x04, 0x00}, /* 1024 */
141*4882a593Smuzhiyun {SENSOR, MT9M111_SC_WINDOW_WIDTH, 0x05, 0x10}, /* 1296 */
142*4882a593Smuzhiyun {SENSOR, MT9M111_SC_HBLANK_CONTEXT_B, 0x01, 0x60}, /* 352 */
143*4882a593Smuzhiyun {SENSOR, MT9M111_SC_VBLANK_CONTEXT_B, 0x00, 0x11}, /* 17 */
144*4882a593Smuzhiyun {SENSOR, MT9M111_SC_HBLANK_CONTEXT_A, 0x01, 0x60}, /* 352 */
145*4882a593Smuzhiyun {SENSOR, MT9M111_SC_VBLANK_CONTEXT_A, 0x00, 0x11}, /* 17 */
146*4882a593Smuzhiyun {SENSOR, MT9M111_SC_R_MODE_CONTEXT_A, 0x01, 0x0f}, /* 271 */
147*4882a593Smuzhiyun {SENSOR, 0x30, 0x04, 0x00},
148*4882a593Smuzhiyun /* Set number of blank rows chosen to 400 */
149*4882a593Smuzhiyun {SENSOR, MT9M111_SC_SHUTTER_WIDTH, 0x01, 0x90},
150*4882a593Smuzhiyun };
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun static const unsigned char start_mt9m111[][4] = {
153*4882a593Smuzhiyun {BRIDGE, M5602_XB_SEN_CLK_DIV, 0x06, 0x00},
154*4882a593Smuzhiyun {BRIDGE, M5602_XB_SEN_CLK_CTRL, 0xb0, 0x00},
155*4882a593Smuzhiyun {BRIDGE, M5602_XB_ADC_CTRL, 0xc0, 0x00},
156*4882a593Smuzhiyun {BRIDGE, M5602_XB_SENSOR_TYPE, 0x09, 0x00},
157*4882a593Smuzhiyun {BRIDGE, M5602_XB_LINE_OF_FRAME_H, 0x81, 0x00},
158*4882a593Smuzhiyun {BRIDGE, M5602_XB_PIX_OF_LINE_H, 0x82, 0x00},
159*4882a593Smuzhiyun {BRIDGE, M5602_XB_SIG_INI, 0x01, 0x00},
160*4882a593Smuzhiyun {BRIDGE, M5602_XB_VSYNC_PARA, 0x00, 0x00},
161*4882a593Smuzhiyun {BRIDGE, M5602_XB_VSYNC_PARA, 0x00, 0x00},
162*4882a593Smuzhiyun {BRIDGE, M5602_XB_VSYNC_PARA, 0x00, 0x00},
163*4882a593Smuzhiyun {BRIDGE, M5602_XB_VSYNC_PARA, 0x00, 0x00},
164*4882a593Smuzhiyun };
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun static struct v4l2_pix_format mt9m111_modes[] = {
167*4882a593Smuzhiyun {
168*4882a593Smuzhiyun 640,
169*4882a593Smuzhiyun 480,
170*4882a593Smuzhiyun V4L2_PIX_FMT_SBGGR8,
171*4882a593Smuzhiyun V4L2_FIELD_NONE,
172*4882a593Smuzhiyun .sizeimage = 640 * 480,
173*4882a593Smuzhiyun .bytesperline = 640,
174*4882a593Smuzhiyun .colorspace = V4L2_COLORSPACE_SRGB,
175*4882a593Smuzhiyun .priv = 0
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun };
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun static const struct v4l2_ctrl_ops mt9m111_ctrl_ops = {
180*4882a593Smuzhiyun .s_ctrl = mt9m111_s_ctrl,
181*4882a593Smuzhiyun };
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun static const struct v4l2_ctrl_config mt9m111_greenbal_cfg = {
184*4882a593Smuzhiyun .ops = &mt9m111_ctrl_ops,
185*4882a593Smuzhiyun .id = M5602_V4L2_CID_GREEN_BALANCE,
186*4882a593Smuzhiyun .name = "Green Balance",
187*4882a593Smuzhiyun .type = V4L2_CTRL_TYPE_INTEGER,
188*4882a593Smuzhiyun .min = 0,
189*4882a593Smuzhiyun .max = 0x7ff,
190*4882a593Smuzhiyun .step = 1,
191*4882a593Smuzhiyun .def = MT9M111_GREEN_GAIN_DEFAULT,
192*4882a593Smuzhiyun .flags = V4L2_CTRL_FLAG_SLIDER,
193*4882a593Smuzhiyun };
194*4882a593Smuzhiyun
mt9m111_probe(struct sd * sd)195*4882a593Smuzhiyun int mt9m111_probe(struct sd *sd)
196*4882a593Smuzhiyun {
197*4882a593Smuzhiyun u8 data[2] = {0x00, 0x00};
198*4882a593Smuzhiyun int i, err;
199*4882a593Smuzhiyun struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun if (force_sensor) {
202*4882a593Smuzhiyun if (force_sensor == MT9M111_SENSOR) {
203*4882a593Smuzhiyun pr_info("Forcing a %s sensor\n", mt9m111.name);
204*4882a593Smuzhiyun goto sensor_found;
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun /* If we want to force another sensor, don't try to probe this
207*4882a593Smuzhiyun * one */
208*4882a593Smuzhiyun return -ENODEV;
209*4882a593Smuzhiyun }
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun gspca_dbg(gspca_dev, D_PROBE, "Probing for a mt9m111 sensor\n");
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun /* Do the preinit */
214*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(preinit_mt9m111); i++) {
215*4882a593Smuzhiyun if (preinit_mt9m111[i][0] == BRIDGE) {
216*4882a593Smuzhiyun err = m5602_write_bridge(sd,
217*4882a593Smuzhiyun preinit_mt9m111[i][1],
218*4882a593Smuzhiyun preinit_mt9m111[i][2]);
219*4882a593Smuzhiyun } else {
220*4882a593Smuzhiyun data[0] = preinit_mt9m111[i][2];
221*4882a593Smuzhiyun data[1] = preinit_mt9m111[i][3];
222*4882a593Smuzhiyun err = m5602_write_sensor(sd,
223*4882a593Smuzhiyun preinit_mt9m111[i][1], data, 2);
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun if (err < 0)
226*4882a593Smuzhiyun return err;
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun if (m5602_read_sensor(sd, MT9M111_SC_CHIPVER, data, 2))
230*4882a593Smuzhiyun return -ENODEV;
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun if ((data[0] == 0x14) && (data[1] == 0x3a)) {
233*4882a593Smuzhiyun pr_info("Detected a mt9m111 sensor\n");
234*4882a593Smuzhiyun goto sensor_found;
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun return -ENODEV;
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun sensor_found:
240*4882a593Smuzhiyun sd->gspca_dev.cam.cam_mode = mt9m111_modes;
241*4882a593Smuzhiyun sd->gspca_dev.cam.nmodes = ARRAY_SIZE(mt9m111_modes);
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun return 0;
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun
mt9m111_init(struct sd * sd)246*4882a593Smuzhiyun int mt9m111_init(struct sd *sd)
247*4882a593Smuzhiyun {
248*4882a593Smuzhiyun int i, err = 0;
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun /* Init the sensor */
251*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(init_mt9m111) && !err; i++) {
252*4882a593Smuzhiyun u8 data[2];
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun if (init_mt9m111[i][0] == BRIDGE) {
255*4882a593Smuzhiyun err = m5602_write_bridge(sd,
256*4882a593Smuzhiyun init_mt9m111[i][1],
257*4882a593Smuzhiyun init_mt9m111[i][2]);
258*4882a593Smuzhiyun } else {
259*4882a593Smuzhiyun data[0] = init_mt9m111[i][2];
260*4882a593Smuzhiyun data[1] = init_mt9m111[i][3];
261*4882a593Smuzhiyun err = m5602_write_sensor(sd,
262*4882a593Smuzhiyun init_mt9m111[i][1], data, 2);
263*4882a593Smuzhiyun }
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun if (dump_sensor)
267*4882a593Smuzhiyun mt9m111_dump_registers(sd);
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun return 0;
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun
mt9m111_init_controls(struct sd * sd)272*4882a593Smuzhiyun int mt9m111_init_controls(struct sd *sd)
273*4882a593Smuzhiyun {
274*4882a593Smuzhiyun struct v4l2_ctrl_handler *hdl = &sd->gspca_dev.ctrl_handler;
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun sd->gspca_dev.vdev.ctrl_handler = hdl;
277*4882a593Smuzhiyun v4l2_ctrl_handler_init(hdl, 7);
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun sd->auto_white_bal = v4l2_ctrl_new_std(hdl, &mt9m111_ctrl_ops,
280*4882a593Smuzhiyun V4L2_CID_AUTO_WHITE_BALANCE,
281*4882a593Smuzhiyun 0, 1, 1, 0);
282*4882a593Smuzhiyun sd->green_bal = v4l2_ctrl_new_custom(hdl, &mt9m111_greenbal_cfg, NULL);
283*4882a593Smuzhiyun sd->red_bal = v4l2_ctrl_new_std(hdl, &mt9m111_ctrl_ops,
284*4882a593Smuzhiyun V4L2_CID_RED_BALANCE, 0, 0x7ff, 1,
285*4882a593Smuzhiyun MT9M111_RED_GAIN_DEFAULT);
286*4882a593Smuzhiyun sd->blue_bal = v4l2_ctrl_new_std(hdl, &mt9m111_ctrl_ops,
287*4882a593Smuzhiyun V4L2_CID_BLUE_BALANCE, 0, 0x7ff, 1,
288*4882a593Smuzhiyun MT9M111_BLUE_GAIN_DEFAULT);
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun v4l2_ctrl_new_std(hdl, &mt9m111_ctrl_ops, V4L2_CID_GAIN, 0,
291*4882a593Smuzhiyun (INITIAL_MAX_GAIN - 1) * 2 * 2 * 2, 1,
292*4882a593Smuzhiyun MT9M111_DEFAULT_GAIN);
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun sd->hflip = v4l2_ctrl_new_std(hdl, &mt9m111_ctrl_ops, V4L2_CID_HFLIP,
295*4882a593Smuzhiyun 0, 1, 1, 0);
296*4882a593Smuzhiyun sd->vflip = v4l2_ctrl_new_std(hdl, &mt9m111_ctrl_ops, V4L2_CID_VFLIP,
297*4882a593Smuzhiyun 0, 1, 1, 0);
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun if (hdl->error) {
300*4882a593Smuzhiyun pr_err("Could not initialize controls\n");
301*4882a593Smuzhiyun return hdl->error;
302*4882a593Smuzhiyun }
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun v4l2_ctrl_auto_cluster(4, &sd->auto_white_bal, 0, false);
305*4882a593Smuzhiyun v4l2_ctrl_cluster(2, &sd->hflip);
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun return 0;
308*4882a593Smuzhiyun }
309*4882a593Smuzhiyun
mt9m111_start(struct sd * sd)310*4882a593Smuzhiyun int mt9m111_start(struct sd *sd)
311*4882a593Smuzhiyun {
312*4882a593Smuzhiyun int i, err = 0;
313*4882a593Smuzhiyun u8 data[2];
314*4882a593Smuzhiyun struct cam *cam = &sd->gspca_dev.cam;
315*4882a593Smuzhiyun struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun int width = cam->cam_mode[sd->gspca_dev.curr_mode].width - 1;
318*4882a593Smuzhiyun int height = cam->cam_mode[sd->gspca_dev.curr_mode].height;
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(start_mt9m111) && !err; i++) {
321*4882a593Smuzhiyun if (start_mt9m111[i][0] == BRIDGE) {
322*4882a593Smuzhiyun err = m5602_write_bridge(sd,
323*4882a593Smuzhiyun start_mt9m111[i][1],
324*4882a593Smuzhiyun start_mt9m111[i][2]);
325*4882a593Smuzhiyun } else {
326*4882a593Smuzhiyun data[0] = start_mt9m111[i][2];
327*4882a593Smuzhiyun data[1] = start_mt9m111[i][3];
328*4882a593Smuzhiyun err = m5602_write_sensor(sd,
329*4882a593Smuzhiyun start_mt9m111[i][1], data, 2);
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun }
332*4882a593Smuzhiyun if (err < 0)
333*4882a593Smuzhiyun return err;
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun err = m5602_write_bridge(sd, M5602_XB_VSYNC_PARA, (height >> 8) & 0xff);
336*4882a593Smuzhiyun if (err < 0)
337*4882a593Smuzhiyun return err;
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun err = m5602_write_bridge(sd, M5602_XB_VSYNC_PARA, (height & 0xff));
340*4882a593Smuzhiyun if (err < 0)
341*4882a593Smuzhiyun return err;
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun for (i = 0; i < 2 && !err; i++)
344*4882a593Smuzhiyun err = m5602_write_bridge(sd, M5602_XB_VSYNC_PARA, 0);
345*4882a593Smuzhiyun if (err < 0)
346*4882a593Smuzhiyun return err;
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun err = m5602_write_bridge(sd, M5602_XB_SIG_INI, 0);
349*4882a593Smuzhiyun if (err < 0)
350*4882a593Smuzhiyun return err;
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun err = m5602_write_bridge(sd, M5602_XB_SIG_INI, 2);
353*4882a593Smuzhiyun if (err < 0)
354*4882a593Smuzhiyun return err;
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun for (i = 0; i < 2 && !err; i++)
357*4882a593Smuzhiyun err = m5602_write_bridge(sd, M5602_XB_HSYNC_PARA, 0);
358*4882a593Smuzhiyun if (err < 0)
359*4882a593Smuzhiyun return err;
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun err = m5602_write_bridge(sd, M5602_XB_HSYNC_PARA,
362*4882a593Smuzhiyun (width >> 8) & 0xff);
363*4882a593Smuzhiyun if (err < 0)
364*4882a593Smuzhiyun return err;
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun err = m5602_write_bridge(sd, M5602_XB_HSYNC_PARA, width & 0xff);
367*4882a593Smuzhiyun if (err < 0)
368*4882a593Smuzhiyun return err;
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun err = m5602_write_bridge(sd, M5602_XB_SIG_INI, 0);
371*4882a593Smuzhiyun if (err < 0)
372*4882a593Smuzhiyun return err;
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun switch (width) {
375*4882a593Smuzhiyun case 640:
376*4882a593Smuzhiyun gspca_dbg(gspca_dev, D_CONF, "Configuring camera for VGA mode\n");
377*4882a593Smuzhiyun break;
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun case 320:
380*4882a593Smuzhiyun gspca_dbg(gspca_dev, D_CONF, "Configuring camera for QVGA mode\n");
381*4882a593Smuzhiyun break;
382*4882a593Smuzhiyun }
383*4882a593Smuzhiyun return err;
384*4882a593Smuzhiyun }
385*4882a593Smuzhiyun
mt9m111_disconnect(struct sd * sd)386*4882a593Smuzhiyun void mt9m111_disconnect(struct sd *sd)
387*4882a593Smuzhiyun {
388*4882a593Smuzhiyun sd->sensor = NULL;
389*4882a593Smuzhiyun }
390*4882a593Smuzhiyun
mt9m111_set_hvflip(struct gspca_dev * gspca_dev)391*4882a593Smuzhiyun static int mt9m111_set_hvflip(struct gspca_dev *gspca_dev)
392*4882a593Smuzhiyun {
393*4882a593Smuzhiyun int err;
394*4882a593Smuzhiyun u8 data[2] = {0x00, 0x00};
395*4882a593Smuzhiyun struct sd *sd = (struct sd *) gspca_dev;
396*4882a593Smuzhiyun int hflip;
397*4882a593Smuzhiyun int vflip;
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun gspca_dbg(gspca_dev, D_CONF, "Set hvflip to %d %d\n",
400*4882a593Smuzhiyun sd->hflip->val, sd->vflip->val);
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun /* The mt9m111 is flipped by default */
403*4882a593Smuzhiyun hflip = !sd->hflip->val;
404*4882a593Smuzhiyun vflip = !sd->vflip->val;
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun /* Set the correct page map */
407*4882a593Smuzhiyun err = m5602_write_sensor(sd, MT9M111_PAGE_MAP, data, 2);
408*4882a593Smuzhiyun if (err < 0)
409*4882a593Smuzhiyun return err;
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun data[0] = MT9M111_RMB_OVER_SIZED;
412*4882a593Smuzhiyun if (gspca_dev->pixfmt.width == 640) {
413*4882a593Smuzhiyun data[1] = MT9M111_RMB_ROW_SKIP_2X |
414*4882a593Smuzhiyun MT9M111_RMB_COLUMN_SKIP_2X |
415*4882a593Smuzhiyun (hflip << 1) | vflip;
416*4882a593Smuzhiyun } else {
417*4882a593Smuzhiyun data[1] = MT9M111_RMB_ROW_SKIP_4X |
418*4882a593Smuzhiyun MT9M111_RMB_COLUMN_SKIP_4X |
419*4882a593Smuzhiyun (hflip << 1) | vflip;
420*4882a593Smuzhiyun }
421*4882a593Smuzhiyun err = m5602_write_sensor(sd, MT9M111_SC_R_MODE_CONTEXT_B,
422*4882a593Smuzhiyun data, 2);
423*4882a593Smuzhiyun return err;
424*4882a593Smuzhiyun }
425*4882a593Smuzhiyun
mt9m111_set_auto_white_balance(struct gspca_dev * gspca_dev,__s32 val)426*4882a593Smuzhiyun static int mt9m111_set_auto_white_balance(struct gspca_dev *gspca_dev,
427*4882a593Smuzhiyun __s32 val)
428*4882a593Smuzhiyun {
429*4882a593Smuzhiyun struct sd *sd = (struct sd *) gspca_dev;
430*4882a593Smuzhiyun int err;
431*4882a593Smuzhiyun u8 data[2];
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun err = m5602_read_sensor(sd, MT9M111_CP_OPERATING_MODE_CTL, data, 2);
434*4882a593Smuzhiyun if (err < 0)
435*4882a593Smuzhiyun return err;
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun data[1] = ((data[1] & 0xfd) | ((val & 0x01) << 1));
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun err = m5602_write_sensor(sd, MT9M111_CP_OPERATING_MODE_CTL, data, 2);
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun gspca_dbg(gspca_dev, D_CONF, "Set auto white balance %d\n", val);
442*4882a593Smuzhiyun return err;
443*4882a593Smuzhiyun }
444*4882a593Smuzhiyun
mt9m111_set_gain(struct gspca_dev * gspca_dev,__s32 val)445*4882a593Smuzhiyun static int mt9m111_set_gain(struct gspca_dev *gspca_dev, __s32 val)
446*4882a593Smuzhiyun {
447*4882a593Smuzhiyun int err, tmp;
448*4882a593Smuzhiyun u8 data[2] = {0x00, 0x00};
449*4882a593Smuzhiyun struct sd *sd = (struct sd *) gspca_dev;
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun /* Set the correct page map */
452*4882a593Smuzhiyun err = m5602_write_sensor(sd, MT9M111_PAGE_MAP, data, 2);
453*4882a593Smuzhiyun if (err < 0)
454*4882a593Smuzhiyun return err;
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun if (val >= INITIAL_MAX_GAIN * 2 * 2 * 2)
457*4882a593Smuzhiyun return -EINVAL;
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun if ((val >= INITIAL_MAX_GAIN * 2 * 2) &&
460*4882a593Smuzhiyun (val < (INITIAL_MAX_GAIN - 1) * 2 * 2 * 2))
461*4882a593Smuzhiyun tmp = (1 << 10) | (val << 9) |
462*4882a593Smuzhiyun (val << 8) | (val / 8);
463*4882a593Smuzhiyun else if ((val >= INITIAL_MAX_GAIN * 2) &&
464*4882a593Smuzhiyun (val < INITIAL_MAX_GAIN * 2 * 2))
465*4882a593Smuzhiyun tmp = (1 << 9) | (1 << 8) | (val / 4);
466*4882a593Smuzhiyun else if ((val >= INITIAL_MAX_GAIN) &&
467*4882a593Smuzhiyun (val < INITIAL_MAX_GAIN * 2))
468*4882a593Smuzhiyun tmp = (1 << 8) | (val / 2);
469*4882a593Smuzhiyun else
470*4882a593Smuzhiyun tmp = val;
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun data[1] = (tmp & 0xff);
473*4882a593Smuzhiyun data[0] = (tmp & 0xff00) >> 8;
474*4882a593Smuzhiyun gspca_dbg(gspca_dev, D_CONF, "tmp=%d, data[1]=%d, data[0]=%d\n", tmp,
475*4882a593Smuzhiyun data[1], data[0]);
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun err = m5602_write_sensor(sd, MT9M111_SC_GLOBAL_GAIN,
478*4882a593Smuzhiyun data, 2);
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun return err;
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun
mt9m111_set_green_balance(struct gspca_dev * gspca_dev,__s32 val)483*4882a593Smuzhiyun static int mt9m111_set_green_balance(struct gspca_dev *gspca_dev, __s32 val)
484*4882a593Smuzhiyun {
485*4882a593Smuzhiyun int err;
486*4882a593Smuzhiyun u8 data[2];
487*4882a593Smuzhiyun struct sd *sd = (struct sd *) gspca_dev;
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun data[1] = (val & 0xff);
490*4882a593Smuzhiyun data[0] = (val & 0xff00) >> 8;
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun gspca_dbg(gspca_dev, D_CONF, "Set green balance %d\n", val);
493*4882a593Smuzhiyun err = m5602_write_sensor(sd, MT9M111_SC_GREEN_1_GAIN,
494*4882a593Smuzhiyun data, 2);
495*4882a593Smuzhiyun if (err < 0)
496*4882a593Smuzhiyun return err;
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun return m5602_write_sensor(sd, MT9M111_SC_GREEN_2_GAIN,
499*4882a593Smuzhiyun data, 2);
500*4882a593Smuzhiyun }
501*4882a593Smuzhiyun
mt9m111_set_blue_balance(struct gspca_dev * gspca_dev,__s32 val)502*4882a593Smuzhiyun static int mt9m111_set_blue_balance(struct gspca_dev *gspca_dev, __s32 val)
503*4882a593Smuzhiyun {
504*4882a593Smuzhiyun u8 data[2];
505*4882a593Smuzhiyun struct sd *sd = (struct sd *) gspca_dev;
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun data[1] = (val & 0xff);
508*4882a593Smuzhiyun data[0] = (val & 0xff00) >> 8;
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun gspca_dbg(gspca_dev, D_CONF, "Set blue balance %d\n", val);
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun return m5602_write_sensor(sd, MT9M111_SC_BLUE_GAIN,
513*4882a593Smuzhiyun data, 2);
514*4882a593Smuzhiyun }
515*4882a593Smuzhiyun
mt9m111_set_red_balance(struct gspca_dev * gspca_dev,__s32 val)516*4882a593Smuzhiyun static int mt9m111_set_red_balance(struct gspca_dev *gspca_dev, __s32 val)
517*4882a593Smuzhiyun {
518*4882a593Smuzhiyun u8 data[2];
519*4882a593Smuzhiyun struct sd *sd = (struct sd *) gspca_dev;
520*4882a593Smuzhiyun
521*4882a593Smuzhiyun data[1] = (val & 0xff);
522*4882a593Smuzhiyun data[0] = (val & 0xff00) >> 8;
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun gspca_dbg(gspca_dev, D_CONF, "Set red balance %d\n", val);
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun return m5602_write_sensor(sd, MT9M111_SC_RED_GAIN,
527*4882a593Smuzhiyun data, 2);
528*4882a593Smuzhiyun }
529*4882a593Smuzhiyun
mt9m111_s_ctrl(struct v4l2_ctrl * ctrl)530*4882a593Smuzhiyun static int mt9m111_s_ctrl(struct v4l2_ctrl *ctrl)
531*4882a593Smuzhiyun {
532*4882a593Smuzhiyun struct gspca_dev *gspca_dev =
533*4882a593Smuzhiyun container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
534*4882a593Smuzhiyun struct sd *sd = (struct sd *) gspca_dev;
535*4882a593Smuzhiyun int err;
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun if (!gspca_dev->streaming)
538*4882a593Smuzhiyun return 0;
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun switch (ctrl->id) {
541*4882a593Smuzhiyun case V4L2_CID_AUTO_WHITE_BALANCE:
542*4882a593Smuzhiyun err = mt9m111_set_auto_white_balance(gspca_dev, ctrl->val);
543*4882a593Smuzhiyun if (err || ctrl->val)
544*4882a593Smuzhiyun return err;
545*4882a593Smuzhiyun err = mt9m111_set_green_balance(gspca_dev, sd->green_bal->val);
546*4882a593Smuzhiyun if (err)
547*4882a593Smuzhiyun return err;
548*4882a593Smuzhiyun err = mt9m111_set_red_balance(gspca_dev, sd->red_bal->val);
549*4882a593Smuzhiyun if (err)
550*4882a593Smuzhiyun return err;
551*4882a593Smuzhiyun err = mt9m111_set_blue_balance(gspca_dev, sd->blue_bal->val);
552*4882a593Smuzhiyun break;
553*4882a593Smuzhiyun case V4L2_CID_GAIN:
554*4882a593Smuzhiyun err = mt9m111_set_gain(gspca_dev, ctrl->val);
555*4882a593Smuzhiyun break;
556*4882a593Smuzhiyun case V4L2_CID_HFLIP:
557*4882a593Smuzhiyun err = mt9m111_set_hvflip(gspca_dev);
558*4882a593Smuzhiyun break;
559*4882a593Smuzhiyun default:
560*4882a593Smuzhiyun return -EINVAL;
561*4882a593Smuzhiyun }
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun return err;
564*4882a593Smuzhiyun }
565*4882a593Smuzhiyun
mt9m111_dump_registers(struct sd * sd)566*4882a593Smuzhiyun static void mt9m111_dump_registers(struct sd *sd)
567*4882a593Smuzhiyun {
568*4882a593Smuzhiyun u8 address, value[2] = {0x00, 0x00};
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun pr_info("Dumping the mt9m111 register state\n");
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun pr_info("Dumping the mt9m111 sensor core registers\n");
573*4882a593Smuzhiyun value[1] = MT9M111_SENSOR_CORE;
574*4882a593Smuzhiyun m5602_write_sensor(sd, MT9M111_PAGE_MAP, value, 2);
575*4882a593Smuzhiyun for (address = 0; address < 0xff; address++) {
576*4882a593Smuzhiyun m5602_read_sensor(sd, address, value, 2);
577*4882a593Smuzhiyun pr_info("register 0x%x contains 0x%x%x\n",
578*4882a593Smuzhiyun address, value[0], value[1]);
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun pr_info("Dumping the mt9m111 color pipeline registers\n");
582*4882a593Smuzhiyun value[1] = MT9M111_COLORPIPE;
583*4882a593Smuzhiyun m5602_write_sensor(sd, MT9M111_PAGE_MAP, value, 2);
584*4882a593Smuzhiyun for (address = 0; address < 0xff; address++) {
585*4882a593Smuzhiyun m5602_read_sensor(sd, address, value, 2);
586*4882a593Smuzhiyun pr_info("register 0x%x contains 0x%x%x\n",
587*4882a593Smuzhiyun address, value[0], value[1]);
588*4882a593Smuzhiyun }
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun pr_info("Dumping the mt9m111 camera control registers\n");
591*4882a593Smuzhiyun value[1] = MT9M111_CAMERA_CONTROL;
592*4882a593Smuzhiyun m5602_write_sensor(sd, MT9M111_PAGE_MAP, value, 2);
593*4882a593Smuzhiyun for (address = 0; address < 0xff; address++) {
594*4882a593Smuzhiyun m5602_read_sensor(sd, address, value, 2);
595*4882a593Smuzhiyun pr_info("register 0x%x contains 0x%x%x\n",
596*4882a593Smuzhiyun address, value[0], value[1]);
597*4882a593Smuzhiyun }
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun pr_info("mt9m111 register state dump complete\n");
600*4882a593Smuzhiyun }
601