1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0+ */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * em28xx.h - driver for Empia EM2800/EM2820/2840 USB video capture devices
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2005 Markus Rechberger <mrechberger@gmail.com>
6*4882a593Smuzhiyun * Ludovico Cavedon <cavedon@sssup.it>
7*4882a593Smuzhiyun * Mauro Carvalho Chehab <mchehab@kernel.org>
8*4882a593Smuzhiyun * Copyright (C) 2012 Frank Schäfer <fschaefer.oss@googlemail.com>
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * Based on the em2800 driver from Sascha Sommer <saschasommer@freenet.de>
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify
13*4882a593Smuzhiyun * it under the terms of the GNU General Public License as published by
14*4882a593Smuzhiyun * the Free Software Foundation; either version 2 of the License, or
15*4882a593Smuzhiyun * (at your option) any later version.
16*4882a593Smuzhiyun *
17*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful,
18*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of
19*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20*4882a593Smuzhiyun * GNU General Public License for more details.
21*4882a593Smuzhiyun */
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #ifndef _EM28XX_H
24*4882a593Smuzhiyun #define _EM28XX_H
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #include <linux/bitfield.h>
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun #define EM28XX_VERSION "0.2.2"
29*4882a593Smuzhiyun #define DRIVER_DESC "Empia em28xx device driver"
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #include <linux/workqueue.h>
32*4882a593Smuzhiyun #include <linux/i2c.h>
33*4882a593Smuzhiyun #include <linux/mutex.h>
34*4882a593Smuzhiyun #include <linux/kref.h>
35*4882a593Smuzhiyun #include <linux/videodev2.h>
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #include <media/videobuf2-v4l2.h>
38*4882a593Smuzhiyun #include <media/videobuf2-vmalloc.h>
39*4882a593Smuzhiyun #include <media/v4l2-device.h>
40*4882a593Smuzhiyun #include <media/v4l2-ctrls.h>
41*4882a593Smuzhiyun #include <media/v4l2-fh.h>
42*4882a593Smuzhiyun #include <media/i2c/ir-kbd-i2c.h>
43*4882a593Smuzhiyun #include <media/rc-core.h>
44*4882a593Smuzhiyun #include "tuner-xc2028.h"
45*4882a593Smuzhiyun #include "xc5000.h"
46*4882a593Smuzhiyun #include "em28xx-reg.h"
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun /* Boards supported by driver */
49*4882a593Smuzhiyun #define EM2800_BOARD_UNKNOWN 0
50*4882a593Smuzhiyun #define EM2820_BOARD_UNKNOWN 1
51*4882a593Smuzhiyun #define EM2820_BOARD_TERRATEC_CINERGY_250 2
52*4882a593Smuzhiyun #define EM2820_BOARD_PINNACLE_USB_2 3
53*4882a593Smuzhiyun #define EM2820_BOARD_HAUPPAUGE_WINTV_USB_2 4
54*4882a593Smuzhiyun #define EM2820_BOARD_MSI_VOX_USB_2 5
55*4882a593Smuzhiyun #define EM2800_BOARD_TERRATEC_CINERGY_200 6
56*4882a593Smuzhiyun #define EM2800_BOARD_LEADTEK_WINFAST_USBII 7
57*4882a593Smuzhiyun #define EM2800_BOARD_KWORLD_USB2800 8
58*4882a593Smuzhiyun #define EM2820_BOARD_PINNACLE_DVC_90 9
59*4882a593Smuzhiyun #define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900 10
60*4882a593Smuzhiyun #define EM2880_BOARD_TERRATEC_HYBRID_XS 11
61*4882a593Smuzhiyun #define EM2820_BOARD_KWORLD_PVRTV2800RF 12
62*4882a593Smuzhiyun #define EM2880_BOARD_TERRATEC_PRODIGY_XS 13
63*4882a593Smuzhiyun #define EM2820_BOARD_PROLINK_PLAYTV_USB2 14
64*4882a593Smuzhiyun #define EM2800_BOARD_VGEAR_POCKETTV 15
65*4882a593Smuzhiyun #define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950 16
66*4882a593Smuzhiyun #define EM2880_BOARD_PINNACLE_PCTV_HD_PRO 17
67*4882a593Smuzhiyun #define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2 18
68*4882a593Smuzhiyun #define EM2860_BOARD_SAA711X_REFERENCE_DESIGN 19
69*4882a593Smuzhiyun #define EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600 20
70*4882a593Smuzhiyun #define EM2800_BOARD_GRABBEEX_USB2800 21
71*4882a593Smuzhiyun #define EM2750_BOARD_UNKNOWN 22
72*4882a593Smuzhiyun #define EM2750_BOARD_DLCW_130 23
73*4882a593Smuzhiyun #define EM2820_BOARD_DLINK_USB_TV 24
74*4882a593Smuzhiyun #define EM2820_BOARD_GADMEI_UTV310 25
75*4882a593Smuzhiyun #define EM2820_BOARD_HERCULES_SMART_TV_USB2 26
76*4882a593Smuzhiyun #define EM2820_BOARD_PINNACLE_USB_2_FM1216ME 27
77*4882a593Smuzhiyun #define EM2820_BOARD_LEADTEK_WINFAST_USBII_DELUXE 28
78*4882a593Smuzhiyun #define EM2860_BOARD_TVP5150_REFERENCE_DESIGN 29
79*4882a593Smuzhiyun #define EM2820_BOARD_VIDEOLOGY_20K14XUSB 30
80*4882a593Smuzhiyun #define EM2821_BOARD_USBGEAR_VD204 31
81*4882a593Smuzhiyun #define EM2821_BOARD_SUPERCOMP_USB_2 32
82*4882a593Smuzhiyun #define EM2860_BOARD_ELGATO_VIDEO_CAPTURE 33
83*4882a593Smuzhiyun #define EM2860_BOARD_TERRATEC_HYBRID_XS 34
84*4882a593Smuzhiyun #define EM2860_BOARD_TYPHOON_DVD_MAKER 35
85*4882a593Smuzhiyun #define EM2860_BOARD_NETGMBH_CAM 36
86*4882a593Smuzhiyun #define EM2860_BOARD_GADMEI_UTV330 37
87*4882a593Smuzhiyun #define EM2861_BOARD_YAKUMO_MOVIE_MIXER 38
88*4882a593Smuzhiyun #define EM2861_BOARD_KWORLD_PVRTV_300U 39
89*4882a593Smuzhiyun #define EM2861_BOARD_PLEXTOR_PX_TV100U 40
90*4882a593Smuzhiyun #define EM2870_BOARD_KWORLD_350U 41
91*4882a593Smuzhiyun #define EM2870_BOARD_KWORLD_355U 42
92*4882a593Smuzhiyun #define EM2870_BOARD_TERRATEC_XS 43
93*4882a593Smuzhiyun #define EM2870_BOARD_TERRATEC_XS_MT2060 44
94*4882a593Smuzhiyun #define EM2870_BOARD_PINNACLE_PCTV_DVB 45
95*4882a593Smuzhiyun #define EM2870_BOARD_COMPRO_VIDEOMATE 46
96*4882a593Smuzhiyun #define EM2880_BOARD_KWORLD_DVB_305U 47
97*4882a593Smuzhiyun #define EM2880_BOARD_KWORLD_DVB_310U 48
98*4882a593Smuzhiyun #define EM2880_BOARD_MSI_DIGIVOX_AD 49
99*4882a593Smuzhiyun #define EM2880_BOARD_MSI_DIGIVOX_AD_II 50
100*4882a593Smuzhiyun #define EM2880_BOARD_TERRATEC_HYBRID_XS_FR 51
101*4882a593Smuzhiyun #define EM2881_BOARD_DNT_DA2_HYBRID 52
102*4882a593Smuzhiyun #define EM2881_BOARD_PINNACLE_HYBRID_PRO 53
103*4882a593Smuzhiyun #define EM2882_BOARD_KWORLD_VS_DVBT 54
104*4882a593Smuzhiyun #define EM2882_BOARD_TERRATEC_HYBRID_XS 55
105*4882a593Smuzhiyun #define EM2882_BOARD_PINNACLE_HYBRID_PRO_330E 56
106*4882a593Smuzhiyun #define EM2883_BOARD_KWORLD_HYBRID_330U 57
107*4882a593Smuzhiyun #define EM2820_BOARD_COMPRO_VIDEOMATE_FORYOU 58
108*4882a593Smuzhiyun #define EM2874_BOARD_PCTV_HD_MINI_80E 59
109*4882a593Smuzhiyun #define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_850 60
110*4882a593Smuzhiyun #define EM2820_BOARD_PROLINK_PLAYTV_BOX4_USB2 61
111*4882a593Smuzhiyun #define EM2820_BOARD_GADMEI_TVR200 62
112*4882a593Smuzhiyun #define EM2860_BOARD_KAIOMY_TVNPC_U2 63
113*4882a593Smuzhiyun #define EM2860_BOARD_EASYCAP 64
114*4882a593Smuzhiyun #define EM2820_BOARD_IODATA_GVMVP_SZ 65
115*4882a593Smuzhiyun #define EM2880_BOARD_EMPIRE_DUAL_TV 66
116*4882a593Smuzhiyun #define EM2860_BOARD_TERRATEC_GRABBY 67
117*4882a593Smuzhiyun #define EM2860_BOARD_TERRATEC_AV350 68
118*4882a593Smuzhiyun #define EM2882_BOARD_KWORLD_ATSC_315U 69
119*4882a593Smuzhiyun #define EM2882_BOARD_EVGA_INDTUBE 70
120*4882a593Smuzhiyun #define EM2820_BOARD_SILVERCREST_WEBCAM 71
121*4882a593Smuzhiyun #define EM2861_BOARD_GADMEI_UTV330PLUS 72
122*4882a593Smuzhiyun #define EM2870_BOARD_REDDO_DVB_C_USB_BOX 73
123*4882a593Smuzhiyun #define EM2800_BOARD_VC211A 74
124*4882a593Smuzhiyun #define EM2882_BOARD_DIKOM_DK300 75
125*4882a593Smuzhiyun #define EM2870_BOARD_KWORLD_A340 76
126*4882a593Smuzhiyun #define EM2874_BOARD_LEADERSHIP_ISDBT 77
127*4882a593Smuzhiyun #define EM28174_BOARD_PCTV_290E 78
128*4882a593Smuzhiyun #define EM2884_BOARD_TERRATEC_H5 79
129*4882a593Smuzhiyun #define EM28174_BOARD_PCTV_460E 80
130*4882a593Smuzhiyun #define EM2884_BOARD_HAUPPAUGE_WINTV_HVR_930C 81
131*4882a593Smuzhiyun #define EM2884_BOARD_CINERGY_HTC_STICK 82
132*4882a593Smuzhiyun #define EM2860_BOARD_HT_VIDBOX_NW03 83
133*4882a593Smuzhiyun #define EM2874_BOARD_MAXMEDIA_UB425_TC 84
134*4882a593Smuzhiyun #define EM2884_BOARD_PCTV_510E 85
135*4882a593Smuzhiyun #define EM2884_BOARD_PCTV_520E 86
136*4882a593Smuzhiyun #define EM2884_BOARD_TERRATEC_HTC_USB_XS 87
137*4882a593Smuzhiyun #define EM2884_BOARD_C3TECH_DIGITAL_DUO 88
138*4882a593Smuzhiyun #define EM2874_BOARD_DELOCK_61959 89
139*4882a593Smuzhiyun #define EM2874_BOARD_KWORLD_UB435Q_V2 90
140*4882a593Smuzhiyun #define EM2765_BOARD_SPEEDLINK_VAD_LAPLACE 91
141*4882a593Smuzhiyun #define EM28178_BOARD_PCTV_461E 92
142*4882a593Smuzhiyun #define EM2874_BOARD_KWORLD_UB435Q_V3 93
143*4882a593Smuzhiyun #define EM28178_BOARD_PCTV_292E 94
144*4882a593Smuzhiyun #define EM2861_BOARD_LEADTEK_VC100 95
145*4882a593Smuzhiyun #define EM28178_BOARD_TERRATEC_T2_STICK_HD 96
146*4882a593Smuzhiyun #define EM2884_BOARD_ELGATO_EYETV_HYBRID_2008 97
147*4882a593Smuzhiyun #define EM28178_BOARD_PLEX_PX_BCUD 98
148*4882a593Smuzhiyun #define EM28174_BOARD_HAUPPAUGE_WINTV_DUALHD_DVB 99
149*4882a593Smuzhiyun #define EM28174_BOARD_HAUPPAUGE_WINTV_DUALHD_01595 100
150*4882a593Smuzhiyun #define EM2884_BOARD_TERRATEC_H6 101
151*4882a593Smuzhiyun #define EM2882_BOARD_ZOLID_HYBRID_TV_STICK 102
152*4882a593Smuzhiyun #define EM2861_BOARD_MAGIX_VIDEOWANDLER2 103
153*4882a593Smuzhiyun #define EM28178_BOARD_PCTV_461E_V2 104
154*4882a593Smuzhiyun #define EM2860_BOARD_MYGICA_IGRABBER 105
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun /* Limits minimum and default number of buffers */
157*4882a593Smuzhiyun #define EM28XX_MIN_BUF 4
158*4882a593Smuzhiyun #define EM28XX_DEF_BUF 8
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun /*Limits the max URB message size */
161*4882a593Smuzhiyun #define URB_MAX_CTRL_SIZE 80
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun /* Params for validated field */
164*4882a593Smuzhiyun #define EM28XX_BOARD_NOT_VALIDATED 1
165*4882a593Smuzhiyun #define EM28XX_BOARD_VALIDATED 0
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun /* Params for em28xx_cmd() audio */
168*4882a593Smuzhiyun #define EM28XX_START_AUDIO 1
169*4882a593Smuzhiyun #define EM28XX_STOP_AUDIO 0
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun /* maximum number of em28xx boards */
172*4882a593Smuzhiyun #define EM28XX_MAXBOARDS DVB_MAX_ADAPTERS /* All adapters could be em28xx */
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun /* maximum number of frames that can be queued */
175*4882a593Smuzhiyun #define EM28XX_NUM_FRAMES 5
176*4882a593Smuzhiyun /* number of frames that get used for v4l2_read() */
177*4882a593Smuzhiyun #define EM28XX_NUM_READ_FRAMES 2
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun /* number of buffers for isoc transfers */
180*4882a593Smuzhiyun #define EM28XX_NUM_BUFS 5
181*4882a593Smuzhiyun #define EM28XX_DVB_NUM_BUFS 5
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun /* max number of I2C buses on em28xx devices */
184*4882a593Smuzhiyun #define NUM_I2C_BUSES 2
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun /*
187*4882a593Smuzhiyun * isoc transfers: number of packets for each buffer
188*4882a593Smuzhiyun * windows requests only 64 packets .. so we better do the same
189*4882a593Smuzhiyun * this is what I found out for all alternate numbers there!
190*4882a593Smuzhiyun */
191*4882a593Smuzhiyun #define EM28XX_NUM_ISOC_PACKETS 64
192*4882a593Smuzhiyun #define EM28XX_DVB_NUM_ISOC_PACKETS 64
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun /*
195*4882a593Smuzhiyun * bulk transfers: transfer buffer size = packet size * packet multiplier
196*4882a593Smuzhiyun * USB 2.0 spec says bulk packet size is always 512 bytes
197*4882a593Smuzhiyun */
198*4882a593Smuzhiyun #define EM28XX_BULK_PACKET_MULTIPLIER 384
199*4882a593Smuzhiyun #define EM28XX_DVB_BULK_PACKET_MULTIPLIER 94
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun #define EM28XX_INTERLACED_DEFAULT 1
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun /* time in msecs to wait for AC97 xfers to finish */
204*4882a593Smuzhiyun #define EM28XX_AC97_XFER_TIMEOUT 100
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun /* max. number of button state polling addresses */
207*4882a593Smuzhiyun #define EM28XX_NUM_BUTTON_ADDRESSES_MAX 5
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun #define PRIMARY_TS 0
210*4882a593Smuzhiyun #define SECONDARY_TS 1
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun enum em28xx_mode {
213*4882a593Smuzhiyun EM28XX_SUSPEND,
214*4882a593Smuzhiyun EM28XX_ANALOG_MODE,
215*4882a593Smuzhiyun EM28XX_DIGITAL_MODE,
216*4882a593Smuzhiyun };
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun struct em28xx;
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun /**
221*4882a593Smuzhiyun * struct em28xx_usb_bufs - Contains URB-related buffer data
222*4882a593Smuzhiyun *
223*4882a593Smuzhiyun * @max_pkt_size: max packet size of isoc transaction
224*4882a593Smuzhiyun * @num_packets: number of packets in each buffer
225*4882a593Smuzhiyun * @num_bufs: number of allocated urb
226*4882a593Smuzhiyun * @urb: urb for isoc/bulk transfers
227*4882a593Smuzhiyun * @buf: transfer buffers for isoc/bulk transfer
228*4882a593Smuzhiyun */
229*4882a593Smuzhiyun struct em28xx_usb_bufs {
230*4882a593Smuzhiyun int max_pkt_size;
231*4882a593Smuzhiyun int num_packets;
232*4882a593Smuzhiyun int num_bufs;
233*4882a593Smuzhiyun struct urb **urb;
234*4882a593Smuzhiyun char **buf;
235*4882a593Smuzhiyun };
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun /**
238*4882a593Smuzhiyun * struct em28xx_usb_ctl - Contains URB-related buffer data
239*4882a593Smuzhiyun *
240*4882a593Smuzhiyun * @analog_bufs: isoc/bulk transfer buffers for analog mode
241*4882a593Smuzhiyun * @digital_bufs: isoc/bulk transfer buffers for digital mode
242*4882a593Smuzhiyun * @vid_buf: Stores already requested video buffers
243*4882a593Smuzhiyun * @vbi_buf: Stores already requested VBI buffers
244*4882a593Smuzhiyun * @urb_data_copy: copy data from URB
245*4882a593Smuzhiyun */
246*4882a593Smuzhiyun struct em28xx_usb_ctl {
247*4882a593Smuzhiyun struct em28xx_usb_bufs analog_bufs;
248*4882a593Smuzhiyun struct em28xx_usb_bufs digital_bufs;
249*4882a593Smuzhiyun struct em28xx_buffer *vid_buf;
250*4882a593Smuzhiyun struct em28xx_buffer *vbi_buf;
251*4882a593Smuzhiyun int (*urb_data_copy)(struct em28xx *dev, struct urb *urb);
252*4882a593Smuzhiyun };
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun /**
255*4882a593Smuzhiyun * struct em28xx_fmt - Struct to enumberate video formats
256*4882a593Smuzhiyun *
257*4882a593Smuzhiyun * @fourcc: v4l2 format id
258*4882a593Smuzhiyun * @depth: mean number of bits to represent a pixel
259*4882a593Smuzhiyun * @reg: em28xx register value to set it
260*4882a593Smuzhiyun */
261*4882a593Smuzhiyun struct em28xx_fmt {
262*4882a593Smuzhiyun u32 fourcc;
263*4882a593Smuzhiyun int depth;
264*4882a593Smuzhiyun int reg;
265*4882a593Smuzhiyun };
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun /**
268*4882a593Smuzhiyun * struct em28xx_buffer- buffer for storing one video frame
269*4882a593Smuzhiyun *
270*4882a593Smuzhiyun * @vb: common v4l buffer stuff
271*4882a593Smuzhiyun * @list: List to associate it with the other buffers
272*4882a593Smuzhiyun * @mem: pointer to the buffer, as returned by vb2_plane_vaddr()
273*4882a593Smuzhiyun * @length: length of the buffer, as returned by vb2_plane_size()
274*4882a593Smuzhiyun * @top_field: If non-zero, indicate that the buffer is the top field
275*4882a593Smuzhiyun * @pos: Indicate the next position of the buffer to be filled.
276*4882a593Smuzhiyun * @vb_buf: pointer to vmalloc memory address in vb
277*4882a593Smuzhiyun *
278*4882a593Smuzhiyun * .. note::
279*4882a593Smuzhiyun *
280*4882a593Smuzhiyun * in interlaced mode, @pos is reset to zero at the start of each new
281*4882a593Smuzhiyun * field (not frame !)
282*4882a593Smuzhiyun */
283*4882a593Smuzhiyun struct em28xx_buffer {
284*4882a593Smuzhiyun struct vb2_v4l2_buffer vb; /* must be first */
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun struct list_head list;
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun void *mem;
289*4882a593Smuzhiyun unsigned int length;
290*4882a593Smuzhiyun int top_field;
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun unsigned int pos;
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun char *vb_buf;
295*4882a593Smuzhiyun };
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun struct em28xx_dmaqueue {
298*4882a593Smuzhiyun struct list_head active;
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun wait_queue_head_t wq;
301*4882a593Smuzhiyun };
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun /* inputs */
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun #define MAX_EM28XX_INPUT 4
306*4882a593Smuzhiyun enum enum28xx_itype {
307*4882a593Smuzhiyun EM28XX_VMUX_COMPOSITE = 1,
308*4882a593Smuzhiyun EM28XX_VMUX_SVIDEO,
309*4882a593Smuzhiyun EM28XX_VMUX_TELEVISION,
310*4882a593Smuzhiyun EM28XX_RADIO,
311*4882a593Smuzhiyun };
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun enum em28xx_ac97_mode {
314*4882a593Smuzhiyun EM28XX_NO_AC97 = 0,
315*4882a593Smuzhiyun EM28XX_AC97_EM202,
316*4882a593Smuzhiyun EM28XX_AC97_SIGMATEL,
317*4882a593Smuzhiyun EM28XX_AC97_OTHER,
318*4882a593Smuzhiyun };
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun struct em28xx_audio_mode {
321*4882a593Smuzhiyun enum em28xx_ac97_mode ac97;
322*4882a593Smuzhiyun };
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun enum em28xx_int_audio_type {
325*4882a593Smuzhiyun EM28XX_INT_AUDIO_NONE = 0,
326*4882a593Smuzhiyun EM28XX_INT_AUDIO_AC97,
327*4882a593Smuzhiyun EM28XX_INT_AUDIO_I2S,
328*4882a593Smuzhiyun };
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun enum em28xx_usb_audio_type {
331*4882a593Smuzhiyun EM28XX_USB_AUDIO_NONE = 0,
332*4882a593Smuzhiyun EM28XX_USB_AUDIO_CLASS,
333*4882a593Smuzhiyun EM28XX_USB_AUDIO_VENDOR,
334*4882a593Smuzhiyun };
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun /**
337*4882a593Smuzhiyun * em28xx_amux - describes the type of audio input used by em28xx
338*4882a593Smuzhiyun *
339*4882a593Smuzhiyun * @EM28XX_AMUX_UNUSED:
340*4882a593Smuzhiyun * Used only on em28xx dev->map field, in order to mark an entry
341*4882a593Smuzhiyun * as unused.
342*4882a593Smuzhiyun * @EM28XX_AMUX_VIDEO:
343*4882a593Smuzhiyun * On devices without AC97, this is the only value that it is currently
344*4882a593Smuzhiyun * allowed.
345*4882a593Smuzhiyun * On devices with AC97, it corresponds to the AC97 mixer "Video" control.
346*4882a593Smuzhiyun * @EM28XX_AMUX_LINE_IN:
347*4882a593Smuzhiyun * Only for devices with AC97. Corresponds to AC97 mixer "Line In".
348*4882a593Smuzhiyun * @EM28XX_AMUX_VIDEO2:
349*4882a593Smuzhiyun * Only for devices with AC97. It means that em28xx should use "Line In"
350*4882a593Smuzhiyun * And AC97 should use the "Video" mixer control.
351*4882a593Smuzhiyun * @EM28XX_AMUX_PHONE:
352*4882a593Smuzhiyun * Only for devices with AC97. Corresponds to AC97 mixer "Phone".
353*4882a593Smuzhiyun * @EM28XX_AMUX_MIC:
354*4882a593Smuzhiyun * Only for devices with AC97. Corresponds to AC97 mixer "Mic".
355*4882a593Smuzhiyun * @EM28XX_AMUX_CD:
356*4882a593Smuzhiyun * Only for devices with AC97. Corresponds to AC97 mixer "CD".
357*4882a593Smuzhiyun * @EM28XX_AMUX_AUX:
358*4882a593Smuzhiyun * Only for devices with AC97. Corresponds to AC97 mixer "Aux".
359*4882a593Smuzhiyun * @EM28XX_AMUX_PCM_OUT:
360*4882a593Smuzhiyun * Only for devices with AC97. Corresponds to AC97 mixer "PCM out".
361*4882a593Smuzhiyun *
362*4882a593Smuzhiyun * The em28xx chip itself has only two audio inputs: tuner and line in.
363*4882a593Smuzhiyun * On almost all devices, only the tuner input is used.
364*4882a593Smuzhiyun *
365*4882a593Smuzhiyun * However, on most devices, an auxiliary AC97 codec device is used,
366*4882a593Smuzhiyun * usually connected to the em28xx tuner input (except for
367*4882a593Smuzhiyun * @EM28XX_AMUX_LINE_IN).
368*4882a593Smuzhiyun *
369*4882a593Smuzhiyun * The AC97 device typically have several different inputs and outputs.
370*4882a593Smuzhiyun * The exact number and description depends on their model.
371*4882a593Smuzhiyun *
372*4882a593Smuzhiyun * It is possible to AC97 to mixer more than one different entries at the
373*4882a593Smuzhiyun * same time, via the alsa mux.
374*4882a593Smuzhiyun */
375*4882a593Smuzhiyun enum em28xx_amux {
376*4882a593Smuzhiyun EM28XX_AMUX_UNUSED = -1,
377*4882a593Smuzhiyun EM28XX_AMUX_VIDEO = 0,
378*4882a593Smuzhiyun EM28XX_AMUX_LINE_IN,
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun /* Some less-common mixer setups */
381*4882a593Smuzhiyun EM28XX_AMUX_VIDEO2,
382*4882a593Smuzhiyun EM28XX_AMUX_PHONE,
383*4882a593Smuzhiyun EM28XX_AMUX_MIC,
384*4882a593Smuzhiyun EM28XX_AMUX_CD,
385*4882a593Smuzhiyun EM28XX_AMUX_AUX,
386*4882a593Smuzhiyun EM28XX_AMUX_PCM_OUT,
387*4882a593Smuzhiyun };
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun enum em28xx_aout {
390*4882a593Smuzhiyun /* AC97 outputs */
391*4882a593Smuzhiyun EM28XX_AOUT_MASTER = BIT(0),
392*4882a593Smuzhiyun EM28XX_AOUT_LINE = BIT(1),
393*4882a593Smuzhiyun EM28XX_AOUT_MONO = BIT(2),
394*4882a593Smuzhiyun EM28XX_AOUT_LFE = BIT(3),
395*4882a593Smuzhiyun EM28XX_AOUT_SURR = BIT(4),
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun /* PCM IN Mixer - used by AC97_RECORD_SELECT register */
398*4882a593Smuzhiyun EM28XX_AOUT_PCM_IN = BIT(7),
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun /* Bits 10-8 are used to indicate the PCM IN record select */
401*4882a593Smuzhiyun EM28XX_AOUT_PCM_MIC_PCM = 0 << 8,
402*4882a593Smuzhiyun EM28XX_AOUT_PCM_CD = 1 << 8,
403*4882a593Smuzhiyun EM28XX_AOUT_PCM_VIDEO = 2 << 8,
404*4882a593Smuzhiyun EM28XX_AOUT_PCM_AUX = 3 << 8,
405*4882a593Smuzhiyun EM28XX_AOUT_PCM_LINE = 4 << 8,
406*4882a593Smuzhiyun EM28XX_AOUT_PCM_STEREO = 5 << 8,
407*4882a593Smuzhiyun EM28XX_AOUT_PCM_MONO = 6 << 8,
408*4882a593Smuzhiyun EM28XX_AOUT_PCM_PHONE = 7 << 8,
409*4882a593Smuzhiyun };
410*4882a593Smuzhiyun
ac97_return_record_select(int a_out)411*4882a593Smuzhiyun static inline int ac97_return_record_select(int a_out)
412*4882a593Smuzhiyun {
413*4882a593Smuzhiyun return (a_out & 0x700) >> 8;
414*4882a593Smuzhiyun }
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun struct em28xx_reg_seq {
417*4882a593Smuzhiyun int reg;
418*4882a593Smuzhiyun unsigned char val, mask;
419*4882a593Smuzhiyun int sleep;
420*4882a593Smuzhiyun };
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun struct em28xx_input {
423*4882a593Smuzhiyun enum enum28xx_itype type;
424*4882a593Smuzhiyun unsigned int vmux;
425*4882a593Smuzhiyun enum em28xx_amux amux;
426*4882a593Smuzhiyun enum em28xx_aout aout;
427*4882a593Smuzhiyun const struct em28xx_reg_seq *gpio;
428*4882a593Smuzhiyun };
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun #define INPUT(nr) (&em28xx_boards[dev->model].input[nr])
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun enum em28xx_decoder {
433*4882a593Smuzhiyun EM28XX_NODECODER = 0,
434*4882a593Smuzhiyun EM28XX_TVP5150,
435*4882a593Smuzhiyun EM28XX_SAA711X,
436*4882a593Smuzhiyun };
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun enum em28xx_sensor {
439*4882a593Smuzhiyun EM28XX_NOSENSOR = 0,
440*4882a593Smuzhiyun EM28XX_MT9V011,
441*4882a593Smuzhiyun EM28XX_MT9M001,
442*4882a593Smuzhiyun EM28XX_MT9M111,
443*4882a593Smuzhiyun EM28XX_OV2640,
444*4882a593Smuzhiyun };
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun enum em28xx_adecoder {
447*4882a593Smuzhiyun EM28XX_NOADECODER = 0,
448*4882a593Smuzhiyun EM28XX_TVAUDIO,
449*4882a593Smuzhiyun };
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun enum em28xx_led_role {
452*4882a593Smuzhiyun EM28XX_LED_ANALOG_CAPTURING = 0,
453*4882a593Smuzhiyun EM28XX_LED_DIGITAL_CAPTURING,
454*4882a593Smuzhiyun EM28XX_LED_DIGITAL_CAPTURING_TS2,
455*4882a593Smuzhiyun EM28XX_LED_ILLUMINATION,
456*4882a593Smuzhiyun EM28XX_NUM_LED_ROLES, /* must be the last */
457*4882a593Smuzhiyun };
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun struct em28xx_led {
460*4882a593Smuzhiyun enum em28xx_led_role role;
461*4882a593Smuzhiyun u8 gpio_reg;
462*4882a593Smuzhiyun u8 gpio_mask;
463*4882a593Smuzhiyun bool inverted;
464*4882a593Smuzhiyun };
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun enum em28xx_button_role {
467*4882a593Smuzhiyun EM28XX_BUTTON_SNAPSHOT = 0,
468*4882a593Smuzhiyun EM28XX_BUTTON_ILLUMINATION,
469*4882a593Smuzhiyun EM28XX_NUM_BUTTON_ROLES, /* must be the last */
470*4882a593Smuzhiyun };
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun struct em28xx_button {
473*4882a593Smuzhiyun enum em28xx_button_role role;
474*4882a593Smuzhiyun u8 reg_r;
475*4882a593Smuzhiyun u8 reg_clearing;
476*4882a593Smuzhiyun u8 mask;
477*4882a593Smuzhiyun bool inverted;
478*4882a593Smuzhiyun };
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun struct em28xx_board {
481*4882a593Smuzhiyun char *name;
482*4882a593Smuzhiyun int vchannels;
483*4882a593Smuzhiyun int tuner_type;
484*4882a593Smuzhiyun int tuner_addr;
485*4882a593Smuzhiyun unsigned int def_i2c_bus; /* Default I2C bus */
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun /* i2c flags */
488*4882a593Smuzhiyun unsigned int tda9887_conf;
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun /* GPIO sequences */
491*4882a593Smuzhiyun const struct em28xx_reg_seq *dvb_gpio;
492*4882a593Smuzhiyun const struct em28xx_reg_seq *suspend_gpio;
493*4882a593Smuzhiyun const struct em28xx_reg_seq *tuner_gpio;
494*4882a593Smuzhiyun const struct em28xx_reg_seq *mute_gpio;
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun unsigned int is_em2800:1;
497*4882a593Smuzhiyun unsigned int has_msp34xx:1;
498*4882a593Smuzhiyun unsigned int mts_firmware:1;
499*4882a593Smuzhiyun unsigned int max_range_640_480:1;
500*4882a593Smuzhiyun unsigned int has_dvb:1;
501*4882a593Smuzhiyun unsigned int has_dual_ts:1;
502*4882a593Smuzhiyun unsigned int is_webcam:1;
503*4882a593Smuzhiyun unsigned int valid:1;
504*4882a593Smuzhiyun unsigned int has_ir_i2c:1;
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun unsigned char xclk, i2c_speed;
507*4882a593Smuzhiyun unsigned char radio_addr;
508*4882a593Smuzhiyun unsigned short tvaudio_addr;
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun enum em28xx_decoder decoder;
511*4882a593Smuzhiyun enum em28xx_adecoder adecoder;
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun struct em28xx_input input[MAX_EM28XX_INPUT];
514*4882a593Smuzhiyun struct em28xx_input radio;
515*4882a593Smuzhiyun char *ir_codes;
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun /* LEDs that need to be controlled explicitly */
518*4882a593Smuzhiyun struct em28xx_led *leds;
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun /* Buttons */
521*4882a593Smuzhiyun const struct em28xx_button *buttons;
522*4882a593Smuzhiyun };
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun struct em28xx_eeprom {
525*4882a593Smuzhiyun u8 id[4]; /* 1a eb 67 95 */
526*4882a593Smuzhiyun __le16 vendor_ID;
527*4882a593Smuzhiyun __le16 product_ID;
528*4882a593Smuzhiyun
529*4882a593Smuzhiyun __le16 chip_conf;
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun __le16 board_conf;
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun __le16 string1, string2, string3;
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun u8 string_idx_table;
536*4882a593Smuzhiyun };
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun #define EM28XX_CAPTURE_STREAM_EN 1
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun /* em28xx extensions */
541*4882a593Smuzhiyun #define EM28XX_AUDIO 0x10
542*4882a593Smuzhiyun #define EM28XX_DVB 0x20
543*4882a593Smuzhiyun #define EM28XX_RC 0x30
544*4882a593Smuzhiyun #define EM28XX_V4L2 0x40
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun /* em28xx resource types (used for res_get/res_lock etc */
547*4882a593Smuzhiyun #define EM28XX_RESOURCE_VIDEO 0x01
548*4882a593Smuzhiyun #define EM28XX_RESOURCE_VBI 0x02
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun struct em28xx_v4l2 {
551*4882a593Smuzhiyun struct kref ref;
552*4882a593Smuzhiyun struct em28xx *dev;
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun struct v4l2_device v4l2_dev;
555*4882a593Smuzhiyun struct v4l2_ctrl_handler ctrl_handler;
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun struct video_device vdev;
558*4882a593Smuzhiyun struct video_device vbi_dev;
559*4882a593Smuzhiyun struct video_device radio_dev;
560*4882a593Smuzhiyun
561*4882a593Smuzhiyun /* Videobuf2 */
562*4882a593Smuzhiyun struct vb2_queue vb_vidq;
563*4882a593Smuzhiyun struct vb2_queue vb_vbiq;
564*4882a593Smuzhiyun struct mutex vb_queue_lock; /* Protects vb_vidq */
565*4882a593Smuzhiyun struct mutex vb_vbi_queue_lock; /* Protects vb_vbiq */
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun u8 vinmode;
568*4882a593Smuzhiyun u8 vinctl;
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun /* Camera specific fields */
571*4882a593Smuzhiyun int sensor_xres;
572*4882a593Smuzhiyun int sensor_yres;
573*4882a593Smuzhiyun int sensor_xtal;
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun int users; /* user count for exclusive use */
576*4882a593Smuzhiyun int streaming_users; /* number of actively streaming users */
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun u32 frequency; /* selected tuner frequency */
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun struct em28xx_fmt *format;
581*4882a593Smuzhiyun v4l2_std_id norm; /* selected tv norm */
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun /* Progressive/interlaced mode */
584*4882a593Smuzhiyun bool progressive;
585*4882a593Smuzhiyun int interlaced_fieldmode; /* 1=interlaced fields, 0=just top fields */
586*4882a593Smuzhiyun /* FIXME: everything else than interlaced_fieldmode=1 doesn't work */
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun /* Frame properties */
589*4882a593Smuzhiyun int width; /* current frame width */
590*4882a593Smuzhiyun int height; /* current frame height */
591*4882a593Smuzhiyun unsigned int hscale; /* horizontal scale factor (see datasheet) */
592*4882a593Smuzhiyun unsigned int vscale; /* vertical scale factor (see datasheet) */
593*4882a593Smuzhiyun unsigned int vbi_width;
594*4882a593Smuzhiyun unsigned int vbi_height; /* lines per field */
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun /* Capture state tracking */
597*4882a593Smuzhiyun int capture_type;
598*4882a593Smuzhiyun bool top_field;
599*4882a593Smuzhiyun int vbi_read;
600*4882a593Smuzhiyun unsigned int field_count;
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun #ifdef CONFIG_MEDIA_CONTROLLER
603*4882a593Smuzhiyun struct media_pad video_pad, vbi_pad;
604*4882a593Smuzhiyun struct media_entity *decoder;
605*4882a593Smuzhiyun #endif
606*4882a593Smuzhiyun };
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun struct em28xx_audio {
609*4882a593Smuzhiyun char name[50];
610*4882a593Smuzhiyun unsigned int num_urb;
611*4882a593Smuzhiyun char **transfer_buffer;
612*4882a593Smuzhiyun struct urb **urb;
613*4882a593Smuzhiyun struct usb_device *udev;
614*4882a593Smuzhiyun unsigned int capture_transfer_done;
615*4882a593Smuzhiyun struct snd_pcm_substream *capture_pcm_substream;
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun unsigned int hwptr_done_capture;
618*4882a593Smuzhiyun struct snd_card *sndcard;
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun size_t period;
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun int users;
623*4882a593Smuzhiyun spinlock_t slock; /* Protects struct em28xx_audio */
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun /* Controls streaming */
626*4882a593Smuzhiyun struct work_struct wq_trigger; /* trigger to start/stop audio */
627*4882a593Smuzhiyun atomic_t stream_started; /* stream should be running if true */
628*4882a593Smuzhiyun };
629*4882a593Smuzhiyun
630*4882a593Smuzhiyun struct em28xx;
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun enum em28xx_i2c_algo_type {
633*4882a593Smuzhiyun EM28XX_I2C_ALGO_EM28XX = 0,
634*4882a593Smuzhiyun EM28XX_I2C_ALGO_EM2800,
635*4882a593Smuzhiyun EM28XX_I2C_ALGO_EM25XX_BUS_B,
636*4882a593Smuzhiyun };
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun struct em28xx_i2c_bus {
639*4882a593Smuzhiyun struct em28xx *dev;
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun unsigned int bus;
642*4882a593Smuzhiyun enum em28xx_i2c_algo_type algo_type;
643*4882a593Smuzhiyun };
644*4882a593Smuzhiyun
645*4882a593Smuzhiyun /* main device struct */
646*4882a593Smuzhiyun struct em28xx {
647*4882a593Smuzhiyun struct kref ref;
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun // Sub-module data
650*4882a593Smuzhiyun struct em28xx_v4l2 *v4l2;
651*4882a593Smuzhiyun struct em28xx_dvb *dvb;
652*4882a593Smuzhiyun struct em28xx_audio adev;
653*4882a593Smuzhiyun struct em28xx_IR *ir;
654*4882a593Smuzhiyun
655*4882a593Smuzhiyun // generic device properties
656*4882a593Smuzhiyun int model; // index in the device_data struct
657*4882a593Smuzhiyun int devno; // marks the number of this device
658*4882a593Smuzhiyun enum em28xx_chip_id chip_id;
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun unsigned int is_em25xx:1; // em25xx/em276x/7x/8x family bridge
661*4882a593Smuzhiyun unsigned int disconnected:1; // device has been disconnected
662*4882a593Smuzhiyun unsigned int has_video:1;
663*4882a593Smuzhiyun unsigned int is_audio_only:1;
664*4882a593Smuzhiyun unsigned int is_webcam:1;
665*4882a593Smuzhiyun unsigned int has_msp34xx:1;
666*4882a593Smuzhiyun unsigned int i2c_speed:2;
667*4882a593Smuzhiyun enum em28xx_int_audio_type int_audio_type;
668*4882a593Smuzhiyun enum em28xx_usb_audio_type usb_audio_type;
669*4882a593Smuzhiyun unsigned char name[32];
670*4882a593Smuzhiyun
671*4882a593Smuzhiyun struct em28xx_board board;
672*4882a593Smuzhiyun
673*4882a593Smuzhiyun enum em28xx_sensor em28xx_sensor; // camera specific
674*4882a593Smuzhiyun
675*4882a593Smuzhiyun // Some older em28xx chips needs a waiting time after writing
676*4882a593Smuzhiyun unsigned int wait_after_write;
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun struct list_head devlist;
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun u32 i2s_speed; // I2S speed for audio digital stream
681*4882a593Smuzhiyun
682*4882a593Smuzhiyun struct em28xx_audio_mode audio_mode;
683*4882a593Smuzhiyun
684*4882a593Smuzhiyun int tuner_type; // type of the tuner
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun // i2c i/o
687*4882a593Smuzhiyun struct i2c_adapter i2c_adap[NUM_I2C_BUSES];
688*4882a593Smuzhiyun struct i2c_client i2c_client[NUM_I2C_BUSES];
689*4882a593Smuzhiyun struct em28xx_i2c_bus i2c_bus[NUM_I2C_BUSES];
690*4882a593Smuzhiyun
691*4882a593Smuzhiyun unsigned char eeprom_addrwidth_16bit:1;
692*4882a593Smuzhiyun unsigned int def_i2c_bus; // Default I2C bus
693*4882a593Smuzhiyun unsigned int cur_i2c_bus; // Current I2C bus
694*4882a593Smuzhiyun struct rt_mutex i2c_bus_lock;
695*4882a593Smuzhiyun
696*4882a593Smuzhiyun // video for linux
697*4882a593Smuzhiyun unsigned int ctl_input; // selected input
698*4882a593Smuzhiyun unsigned int ctl_ainput;// selected audio input
699*4882a593Smuzhiyun unsigned int ctl_aoutput;// selected audio output
700*4882a593Smuzhiyun enum em28xx_amux amux_map[MAX_EM28XX_INPUT];
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun int mute;
703*4882a593Smuzhiyun int volume;
704*4882a593Smuzhiyun
705*4882a593Smuzhiyun unsigned long hash; // eeprom hash - for boards with generic ID
706*4882a593Smuzhiyun unsigned long i2c_hash; // i2c devicelist hash -
707*4882a593Smuzhiyun // for boards with generic ID
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun struct work_struct request_module_wk;
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun // locks
712*4882a593Smuzhiyun struct mutex lock; /* protects em28xx struct */
713*4882a593Smuzhiyun struct mutex ctrl_urb_lock; /* protects urb_buf */
714*4882a593Smuzhiyun
715*4882a593Smuzhiyun // resources in use
716*4882a593Smuzhiyun unsigned int resources;
717*4882a593Smuzhiyun
718*4882a593Smuzhiyun // eeprom content
719*4882a593Smuzhiyun u8 *eedata;
720*4882a593Smuzhiyun u16 eedata_len;
721*4882a593Smuzhiyun
722*4882a593Smuzhiyun // Isoc control struct
723*4882a593Smuzhiyun struct em28xx_dmaqueue vidq;
724*4882a593Smuzhiyun struct em28xx_dmaqueue vbiq;
725*4882a593Smuzhiyun struct em28xx_usb_ctl usb_ctl;
726*4882a593Smuzhiyun
727*4882a593Smuzhiyun spinlock_t slock; /* Protects em28xx video/vbi/dvb IRQ stream data */
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun // usb transfer
730*4882a593Smuzhiyun struct usb_interface *intf; // the usb interface
731*4882a593Smuzhiyun u8 ifnum; // number of the assigned usb interface
732*4882a593Smuzhiyun u8 analog_ep_isoc; // address of isoc endpoint for analog
733*4882a593Smuzhiyun u8 analog_ep_bulk; // address of bulk endpoint for analog
734*4882a593Smuzhiyun u8 dvb_ep_isoc_ts2; // address of isoc endpoint for DVB TS2
735*4882a593Smuzhiyun u8 dvb_ep_bulk_ts2; // address of bulk endpoint for DVB TS2
736*4882a593Smuzhiyun u8 dvb_ep_isoc; // address of isoc endpoint for DVB
737*4882a593Smuzhiyun u8 dvb_ep_bulk; // address of bulk endpoint for DVB
738*4882a593Smuzhiyun int alt; // alternate setting
739*4882a593Smuzhiyun int max_pkt_size; // max packet size of the selected ep at alt
740*4882a593Smuzhiyun int packet_multiplier; // multiplier for wMaxPacketSize, used for
741*4882a593Smuzhiyun // URB buffer size definition
742*4882a593Smuzhiyun int num_alt; // number of alternative settings
743*4882a593Smuzhiyun unsigned int *alt_max_pkt_size_isoc; // array of isoc wMaxPacketSize
744*4882a593Smuzhiyun unsigned int analog_xfer_bulk:1; // use bulk instead of isoc
745*4882a593Smuzhiyun // transfers for analog
746*4882a593Smuzhiyun int dvb_alt_isoc; // alternate setting for DVB isoc transfers
747*4882a593Smuzhiyun unsigned int dvb_max_pkt_size_isoc; // isoc max packet size of the
748*4882a593Smuzhiyun // selected DVB ep at dvb_alt
749*4882a593Smuzhiyun unsigned int dvb_max_pkt_size_isoc_ts2; // isoc max packet size of the
750*4882a593Smuzhiyun // selected DVB ep at dvb_alt
751*4882a593Smuzhiyun unsigned int dvb_xfer_bulk:1; // use bulk instead of isoc
752*4882a593Smuzhiyun // transfers for DVB
753*4882a593Smuzhiyun char urb_buf[URB_MAX_CTRL_SIZE]; // urb control msg buffer
754*4882a593Smuzhiyun
755*4882a593Smuzhiyun // helper funcs that call usb_control_msg
756*4882a593Smuzhiyun int (*em28xx_write_regs)(struct em28xx *dev, u16 reg,
757*4882a593Smuzhiyun char *buf, int len);
758*4882a593Smuzhiyun int (*em28xx_read_reg)(struct em28xx *dev, u16 reg);
759*4882a593Smuzhiyun int (*em28xx_read_reg_req_len)(struct em28xx *dev, u8 req, u16 reg,
760*4882a593Smuzhiyun char *buf, int len);
761*4882a593Smuzhiyun int (*em28xx_write_regs_req)(struct em28xx *dev, u8 req, u16 reg,
762*4882a593Smuzhiyun char *buf, int len);
763*4882a593Smuzhiyun int (*em28xx_read_reg_req)(struct em28xx *dev, u8 req, u16 reg);
764*4882a593Smuzhiyun
765*4882a593Smuzhiyun enum em28xx_mode mode;
766*4882a593Smuzhiyun
767*4882a593Smuzhiyun // Button state polling
768*4882a593Smuzhiyun struct delayed_work buttons_query_work;
769*4882a593Smuzhiyun u8 button_polling_addresses[EM28XX_NUM_BUTTON_ADDRESSES_MAX];
770*4882a593Smuzhiyun u8 button_polling_last_values[EM28XX_NUM_BUTTON_ADDRESSES_MAX];
771*4882a593Smuzhiyun u8 num_button_polling_addresses;
772*4882a593Smuzhiyun u16 button_polling_interval; // [ms]
773*4882a593Smuzhiyun // Snapshot button input device
774*4882a593Smuzhiyun char snapshot_button_path[30]; // path of the input dev
775*4882a593Smuzhiyun struct input_dev *sbutton_input_dev;
776*4882a593Smuzhiyun
777*4882a593Smuzhiyun #ifdef CONFIG_MEDIA_CONTROLLER
778*4882a593Smuzhiyun struct media_device *media_dev;
779*4882a593Smuzhiyun struct media_entity input_ent[MAX_EM28XX_INPUT];
780*4882a593Smuzhiyun struct media_pad input_pad[MAX_EM28XX_INPUT];
781*4882a593Smuzhiyun #endif
782*4882a593Smuzhiyun
783*4882a593Smuzhiyun struct em28xx *dev_next;
784*4882a593Smuzhiyun int ts;
785*4882a593Smuzhiyun };
786*4882a593Smuzhiyun
787*4882a593Smuzhiyun #define kref_to_dev(d) container_of(d, struct em28xx, ref)
788*4882a593Smuzhiyun
789*4882a593Smuzhiyun struct em28xx_ops {
790*4882a593Smuzhiyun struct list_head next;
791*4882a593Smuzhiyun char *name;
792*4882a593Smuzhiyun int id;
793*4882a593Smuzhiyun int (*init)(struct em28xx *dev);
794*4882a593Smuzhiyun int (*fini)(struct em28xx *dev);
795*4882a593Smuzhiyun int (*suspend)(struct em28xx *dev);
796*4882a593Smuzhiyun int (*resume)(struct em28xx *dev);
797*4882a593Smuzhiyun };
798*4882a593Smuzhiyun
799*4882a593Smuzhiyun /* Provided by em28xx-i2c.c */
800*4882a593Smuzhiyun void em28xx_do_i2c_scan(struct em28xx *dev, unsigned int bus);
801*4882a593Smuzhiyun int em28xx_i2c_register(struct em28xx *dev, unsigned int bus,
802*4882a593Smuzhiyun enum em28xx_i2c_algo_type algo_type);
803*4882a593Smuzhiyun int em28xx_i2c_unregister(struct em28xx *dev, unsigned int bus);
804*4882a593Smuzhiyun
805*4882a593Smuzhiyun /* Provided by em28xx-core.c */
806*4882a593Smuzhiyun int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
807*4882a593Smuzhiyun char *buf, int len);
808*4882a593Smuzhiyun int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg);
809*4882a593Smuzhiyun int em28xx_read_reg(struct em28xx *dev, u16 reg);
810*4882a593Smuzhiyun int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
811*4882a593Smuzhiyun int len);
812*4882a593Smuzhiyun int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len);
813*4882a593Smuzhiyun int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val);
814*4882a593Smuzhiyun int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
815*4882a593Smuzhiyun u8 bitmask);
816*4882a593Smuzhiyun int em28xx_toggle_reg_bits(struct em28xx *dev, u16 reg, u8 bitmask);
817*4882a593Smuzhiyun
818*4882a593Smuzhiyun int em28xx_read_ac97(struct em28xx *dev, u8 reg);
819*4882a593Smuzhiyun int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val);
820*4882a593Smuzhiyun
821*4882a593Smuzhiyun int em28xx_audio_analog_set(struct em28xx *dev);
822*4882a593Smuzhiyun int em28xx_audio_setup(struct em28xx *dev);
823*4882a593Smuzhiyun
824*4882a593Smuzhiyun const struct em28xx_led *em28xx_find_led(struct em28xx *dev,
825*4882a593Smuzhiyun enum em28xx_led_role role);
826*4882a593Smuzhiyun int em28xx_capture_start(struct em28xx *dev, int start);
827*4882a593Smuzhiyun int em28xx_alloc_urbs(struct em28xx *dev, enum em28xx_mode mode, int xfer_bulk,
828*4882a593Smuzhiyun int num_bufs, int max_pkt_size, int packet_multiplier);
829*4882a593Smuzhiyun int em28xx_init_usb_xfer(struct em28xx *dev, enum em28xx_mode mode,
830*4882a593Smuzhiyun int xfer_bulk,
831*4882a593Smuzhiyun int num_bufs, int max_pkt_size, int packet_multiplier,
832*4882a593Smuzhiyun int (*urb_data_copy)
833*4882a593Smuzhiyun (struct em28xx *dev, struct urb *urb));
834*4882a593Smuzhiyun void em28xx_uninit_usb_xfer(struct em28xx *dev, enum em28xx_mode mode);
835*4882a593Smuzhiyun void em28xx_stop_urbs(struct em28xx *dev);
836*4882a593Smuzhiyun int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode);
837*4882a593Smuzhiyun int em28xx_gpio_set(struct em28xx *dev, const struct em28xx_reg_seq *gpio);
838*4882a593Smuzhiyun int em28xx_register_extension(struct em28xx_ops *dev);
839*4882a593Smuzhiyun void em28xx_unregister_extension(struct em28xx_ops *dev);
840*4882a593Smuzhiyun void em28xx_init_extension(struct em28xx *dev);
841*4882a593Smuzhiyun void em28xx_close_extension(struct em28xx *dev);
842*4882a593Smuzhiyun int em28xx_suspend_extension(struct em28xx *dev);
843*4882a593Smuzhiyun int em28xx_resume_extension(struct em28xx *dev);
844*4882a593Smuzhiyun
845*4882a593Smuzhiyun /* Provided by em28xx-cards.c */
846*4882a593Smuzhiyun extern const struct em28xx_board em28xx_boards[];
847*4882a593Smuzhiyun extern struct usb_device_id em28xx_id_table[];
848*4882a593Smuzhiyun int em28xx_tuner_callback(void *ptr, int component, int command, int arg);
849*4882a593Smuzhiyun void em28xx_setup_xc3028(struct em28xx *dev, struct xc2028_ctrl *ctl);
850*4882a593Smuzhiyun void em28xx_free_device(struct kref *ref);
851*4882a593Smuzhiyun
852*4882a593Smuzhiyun /* Provided by em28xx-camera.c */
853*4882a593Smuzhiyun int em28xx_detect_sensor(struct em28xx *dev);
854*4882a593Smuzhiyun int em28xx_init_camera(struct em28xx *dev);
855*4882a593Smuzhiyun
856*4882a593Smuzhiyun #endif
857