xref: /OK3568_Linux_fs/kernel/drivers/media/usb/dvb-usb-v2/mxl111sf-tuner.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *  mxl111sf-tuner.c - driver for the MaxLinear MXL111SF CMOS tuner
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  *  Copyright (C) 2010-2014 Michael Krufky <mkrufky@linuxtv.org>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include "mxl111sf-tuner.h"
9*4882a593Smuzhiyun #include "mxl111sf-phy.h"
10*4882a593Smuzhiyun #include "mxl111sf-reg.h"
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun /* debug */
13*4882a593Smuzhiyun static int mxl111sf_tuner_debug;
14*4882a593Smuzhiyun module_param_named(debug, mxl111sf_tuner_debug, int, 0644);
15*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "set debugging level (1=info (or-able)).");
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #define mxl_dbg(fmt, arg...) \
18*4882a593Smuzhiyun 	if (mxl111sf_tuner_debug) \
19*4882a593Smuzhiyun 		mxl_printk(KERN_DEBUG, fmt, ##arg)
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun /* ------------------------------------------------------------------------ */
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun struct mxl111sf_tuner_state {
24*4882a593Smuzhiyun 	struct mxl111sf_state *mxl_state;
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun 	const struct mxl111sf_tuner_config *cfg;
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun 	enum mxl_if_freq if_freq;
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun 	u32 frequency;
31*4882a593Smuzhiyun 	u32 bandwidth;
32*4882a593Smuzhiyun };
33*4882a593Smuzhiyun 
mxl111sf_tuner_read_reg(struct mxl111sf_tuner_state * state,u8 addr,u8 * data)34*4882a593Smuzhiyun static int mxl111sf_tuner_read_reg(struct mxl111sf_tuner_state *state,
35*4882a593Smuzhiyun 				   u8 addr, u8 *data)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun 	return (state->cfg->read_reg) ?
38*4882a593Smuzhiyun 		state->cfg->read_reg(state->mxl_state, addr, data) :
39*4882a593Smuzhiyun 		-EINVAL;
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun 
mxl111sf_tuner_write_reg(struct mxl111sf_tuner_state * state,u8 addr,u8 data)42*4882a593Smuzhiyun static int mxl111sf_tuner_write_reg(struct mxl111sf_tuner_state *state,
43*4882a593Smuzhiyun 				    u8 addr, u8 data)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun 	return (state->cfg->write_reg) ?
46*4882a593Smuzhiyun 		state->cfg->write_reg(state->mxl_state, addr, data) :
47*4882a593Smuzhiyun 		-EINVAL;
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun 
mxl111sf_tuner_program_regs(struct mxl111sf_tuner_state * state,struct mxl111sf_reg_ctrl_info * ctrl_reg_info)50*4882a593Smuzhiyun static int mxl111sf_tuner_program_regs(struct mxl111sf_tuner_state *state,
51*4882a593Smuzhiyun 			       struct mxl111sf_reg_ctrl_info *ctrl_reg_info)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun 	return (state->cfg->program_regs) ?
54*4882a593Smuzhiyun 		state->cfg->program_regs(state->mxl_state, ctrl_reg_info) :
55*4882a593Smuzhiyun 		-EINVAL;
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun 
mxl1x1sf_tuner_top_master_ctrl(struct mxl111sf_tuner_state * state,int onoff)58*4882a593Smuzhiyun static int mxl1x1sf_tuner_top_master_ctrl(struct mxl111sf_tuner_state *state,
59*4882a593Smuzhiyun 					  int onoff)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun 	return (state->cfg->top_master_ctrl) ?
62*4882a593Smuzhiyun 		state->cfg->top_master_ctrl(state->mxl_state, onoff) :
63*4882a593Smuzhiyun 		-EINVAL;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun /* ------------------------------------------------------------------------ */
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun static struct mxl111sf_reg_ctrl_info mxl_phy_tune_rf[] = {
69*4882a593Smuzhiyun 	{0x1d, 0x7f, 0x00}, /* channel bandwidth section 1/2/3,
70*4882a593Smuzhiyun 			       DIG_MODEINDEX, _A, _CSF, */
71*4882a593Smuzhiyun 	{0x1e, 0xff, 0x00}, /* channel frequency (lo and fractional) */
72*4882a593Smuzhiyun 	{0x1f, 0xff, 0x00}, /* channel frequency (hi for integer portion) */
73*4882a593Smuzhiyun 	{0,    0,    0}
74*4882a593Smuzhiyun };
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun /* ------------------------------------------------------------------------ */
77*4882a593Smuzhiyun 
mxl111sf_calc_phy_tune_regs(u32 freq,u8 bw)78*4882a593Smuzhiyun static struct mxl111sf_reg_ctrl_info *mxl111sf_calc_phy_tune_regs(u32 freq,
79*4882a593Smuzhiyun 								  u8 bw)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun 	u8 filt_bw;
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	/* set channel bandwidth */
84*4882a593Smuzhiyun 	switch (bw) {
85*4882a593Smuzhiyun 	case 0: /* ATSC */
86*4882a593Smuzhiyun 		filt_bw = 25;
87*4882a593Smuzhiyun 		break;
88*4882a593Smuzhiyun 	case 1: /* QAM */
89*4882a593Smuzhiyun 		filt_bw = 69;
90*4882a593Smuzhiyun 		break;
91*4882a593Smuzhiyun 	case 6:
92*4882a593Smuzhiyun 		filt_bw = 21;
93*4882a593Smuzhiyun 		break;
94*4882a593Smuzhiyun 	case 7:
95*4882a593Smuzhiyun 		filt_bw = 42;
96*4882a593Smuzhiyun 		break;
97*4882a593Smuzhiyun 	case 8:
98*4882a593Smuzhiyun 		filt_bw = 63;
99*4882a593Smuzhiyun 		break;
100*4882a593Smuzhiyun 	default:
101*4882a593Smuzhiyun 		pr_err("%s: invalid bandwidth setting!", __func__);
102*4882a593Smuzhiyun 		return NULL;
103*4882a593Smuzhiyun 	}
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	/* calculate RF channel */
106*4882a593Smuzhiyun 	freq /= 1000000;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	freq *= 64;
109*4882a593Smuzhiyun #if 0
110*4882a593Smuzhiyun 	/* do round */
111*4882a593Smuzhiyun 	freq += 0.5;
112*4882a593Smuzhiyun #endif
113*4882a593Smuzhiyun 	/* set bandwidth */
114*4882a593Smuzhiyun 	mxl_phy_tune_rf[0].data = filt_bw;
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	/* set RF */
117*4882a593Smuzhiyun 	mxl_phy_tune_rf[1].data = (freq & 0xff);
118*4882a593Smuzhiyun 	mxl_phy_tune_rf[2].data = (freq >> 8) & 0xff;
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	/* start tune */
121*4882a593Smuzhiyun 	return mxl_phy_tune_rf;
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun 
mxl1x1sf_tuner_set_if_output_freq(struct mxl111sf_tuner_state * state)124*4882a593Smuzhiyun static int mxl1x1sf_tuner_set_if_output_freq(struct mxl111sf_tuner_state *state)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun 	int ret;
127*4882a593Smuzhiyun 	u8 ctrl;
128*4882a593Smuzhiyun #if 0
129*4882a593Smuzhiyun 	u16 iffcw;
130*4882a593Smuzhiyun 	u32 if_freq;
131*4882a593Smuzhiyun #endif
132*4882a593Smuzhiyun 	mxl_dbg("(IF polarity = %d, IF freq = 0x%02x)",
133*4882a593Smuzhiyun 		state->cfg->invert_spectrum, state->cfg->if_freq);
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	/* set IF polarity */
136*4882a593Smuzhiyun 	ctrl = state->cfg->invert_spectrum;
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	ctrl |= state->cfg->if_freq;
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	ret = mxl111sf_tuner_write_reg(state, V6_TUNER_IF_SEL_REG, ctrl);
141*4882a593Smuzhiyun 	if (mxl_fail(ret))
142*4882a593Smuzhiyun 		goto fail;
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun #if 0
145*4882a593Smuzhiyun 	if_freq /= 1000000;
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	/* do round */
148*4882a593Smuzhiyun 	if_freq += 0.5;
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	if (MXL_IF_LO == state->cfg->if_freq) {
151*4882a593Smuzhiyun 		ctrl = 0x08;
152*4882a593Smuzhiyun 		iffcw = (u16)(if_freq / (108 * 4096));
153*4882a593Smuzhiyun 	} else if (MXL_IF_HI == state->cfg->if_freq) {
154*4882a593Smuzhiyun 		ctrl = 0x08;
155*4882a593Smuzhiyun 		iffcw = (u16)(if_freq / (216 * 4096));
156*4882a593Smuzhiyun 	} else {
157*4882a593Smuzhiyun 		ctrl = 0;
158*4882a593Smuzhiyun 		iffcw = 0;
159*4882a593Smuzhiyun 	}
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	ctrl |= (iffcw >> 8);
162*4882a593Smuzhiyun #endif
163*4882a593Smuzhiyun 	ret = mxl111sf_tuner_read_reg(state, V6_TUNER_IF_FCW_BYP_REG, &ctrl);
164*4882a593Smuzhiyun 	if (mxl_fail(ret))
165*4882a593Smuzhiyun 		goto fail;
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 	ctrl &= 0xf0;
168*4882a593Smuzhiyun 	ctrl |= 0x90;
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	ret = mxl111sf_tuner_write_reg(state, V6_TUNER_IF_FCW_BYP_REG, ctrl);
171*4882a593Smuzhiyun 	if (mxl_fail(ret))
172*4882a593Smuzhiyun 		goto fail;
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun #if 0
175*4882a593Smuzhiyun 	ctrl = iffcw & 0x00ff;
176*4882a593Smuzhiyun #endif
177*4882a593Smuzhiyun 	ret = mxl111sf_tuner_write_reg(state, V6_TUNER_IF_FCW_REG, ctrl);
178*4882a593Smuzhiyun 	if (mxl_fail(ret))
179*4882a593Smuzhiyun 		goto fail;
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	state->if_freq = state->cfg->if_freq;
182*4882a593Smuzhiyun fail:
183*4882a593Smuzhiyun 	return ret;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun 
mxl1x1sf_tune_rf(struct dvb_frontend * fe,u32 freq,u8 bw)186*4882a593Smuzhiyun static int mxl1x1sf_tune_rf(struct dvb_frontend *fe, u32 freq, u8 bw)
187*4882a593Smuzhiyun {
188*4882a593Smuzhiyun 	struct mxl111sf_tuner_state *state = fe->tuner_priv;
189*4882a593Smuzhiyun 	static struct mxl111sf_reg_ctrl_info *reg_ctrl_array;
190*4882a593Smuzhiyun 	int ret;
191*4882a593Smuzhiyun 	u8 mxl_mode;
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	mxl_dbg("(freq = %d, bw = 0x%x)", freq, bw);
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	/* stop tune */
196*4882a593Smuzhiyun 	ret = mxl111sf_tuner_write_reg(state, START_TUNE_REG, 0);
197*4882a593Smuzhiyun 	if (mxl_fail(ret))
198*4882a593Smuzhiyun 		goto fail;
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	/* check device mode */
201*4882a593Smuzhiyun 	ret = mxl111sf_tuner_read_reg(state, MXL_MODE_REG, &mxl_mode);
202*4882a593Smuzhiyun 	if (mxl_fail(ret))
203*4882a593Smuzhiyun 		goto fail;
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 	/* Fill out registers for channel tune */
206*4882a593Smuzhiyun 	reg_ctrl_array = mxl111sf_calc_phy_tune_regs(freq, bw);
207*4882a593Smuzhiyun 	if (!reg_ctrl_array)
208*4882a593Smuzhiyun 		return -EINVAL;
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 	ret = mxl111sf_tuner_program_regs(state, reg_ctrl_array);
211*4882a593Smuzhiyun 	if (mxl_fail(ret))
212*4882a593Smuzhiyun 		goto fail;
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 	if ((mxl_mode & MXL_DEV_MODE_MASK) == MXL_TUNER_MODE) {
215*4882a593Smuzhiyun 		/* IF tuner mode only */
216*4882a593Smuzhiyun 		mxl1x1sf_tuner_top_master_ctrl(state, 0);
217*4882a593Smuzhiyun 		mxl1x1sf_tuner_top_master_ctrl(state, 1);
218*4882a593Smuzhiyun 		mxl1x1sf_tuner_set_if_output_freq(state);
219*4882a593Smuzhiyun 	}
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 	ret = mxl111sf_tuner_write_reg(state, START_TUNE_REG, 1);
222*4882a593Smuzhiyun 	if (mxl_fail(ret))
223*4882a593Smuzhiyun 		goto fail;
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	if (state->cfg->ant_hunt)
226*4882a593Smuzhiyun 		state->cfg->ant_hunt(fe);
227*4882a593Smuzhiyun fail:
228*4882a593Smuzhiyun 	return ret;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun 
mxl1x1sf_tuner_get_lock_status(struct mxl111sf_tuner_state * state,int * rf_synth_lock,int * ref_synth_lock)231*4882a593Smuzhiyun static int mxl1x1sf_tuner_get_lock_status(struct mxl111sf_tuner_state *state,
232*4882a593Smuzhiyun 					  int *rf_synth_lock,
233*4882a593Smuzhiyun 					  int *ref_synth_lock)
234*4882a593Smuzhiyun {
235*4882a593Smuzhiyun 	int ret;
236*4882a593Smuzhiyun 	u8 data;
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun 	*rf_synth_lock = 0;
239*4882a593Smuzhiyun 	*ref_synth_lock = 0;
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun 	ret = mxl111sf_tuner_read_reg(state, V6_RF_LOCK_STATUS_REG, &data);
242*4882a593Smuzhiyun 	if (mxl_fail(ret))
243*4882a593Smuzhiyun 		goto fail;
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 	*ref_synth_lock = ((data & 0x03) == 0x03) ? 1 : 0;
246*4882a593Smuzhiyun 	*rf_synth_lock  = ((data & 0x0c) == 0x0c) ? 1 : 0;
247*4882a593Smuzhiyun fail:
248*4882a593Smuzhiyun 	return ret;
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun #if 0
252*4882a593Smuzhiyun static int mxl1x1sf_tuner_loop_thru_ctrl(struct mxl111sf_tuner_state *state,
253*4882a593Smuzhiyun 					 int onoff)
254*4882a593Smuzhiyun {
255*4882a593Smuzhiyun 	return mxl111sf_tuner_write_reg(state, V6_TUNER_LOOP_THRU_CTRL_REG,
256*4882a593Smuzhiyun 					onoff ? 1 : 0);
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun #endif
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun /* ------------------------------------------------------------------------ */
261*4882a593Smuzhiyun 
mxl111sf_tuner_set_params(struct dvb_frontend * fe)262*4882a593Smuzhiyun static int mxl111sf_tuner_set_params(struct dvb_frontend *fe)
263*4882a593Smuzhiyun {
264*4882a593Smuzhiyun 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
265*4882a593Smuzhiyun 	u32 delsys  = c->delivery_system;
266*4882a593Smuzhiyun 	struct mxl111sf_tuner_state *state = fe->tuner_priv;
267*4882a593Smuzhiyun 	int ret;
268*4882a593Smuzhiyun 	u8 bw;
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun 	mxl_dbg("()");
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun 	switch (delsys) {
273*4882a593Smuzhiyun 	case SYS_ATSC:
274*4882a593Smuzhiyun 	case SYS_ATSCMH:
275*4882a593Smuzhiyun 		bw = 0; /* ATSC */
276*4882a593Smuzhiyun 		break;
277*4882a593Smuzhiyun 	case SYS_DVBC_ANNEX_B:
278*4882a593Smuzhiyun 		bw = 1; /* US CABLE */
279*4882a593Smuzhiyun 		break;
280*4882a593Smuzhiyun 	case SYS_DVBT:
281*4882a593Smuzhiyun 		switch (c->bandwidth_hz) {
282*4882a593Smuzhiyun 		case 6000000:
283*4882a593Smuzhiyun 			bw = 6;
284*4882a593Smuzhiyun 			break;
285*4882a593Smuzhiyun 		case 7000000:
286*4882a593Smuzhiyun 			bw = 7;
287*4882a593Smuzhiyun 			break;
288*4882a593Smuzhiyun 		case 8000000:
289*4882a593Smuzhiyun 			bw = 8;
290*4882a593Smuzhiyun 			break;
291*4882a593Smuzhiyun 		default:
292*4882a593Smuzhiyun 			pr_err("%s: bandwidth not set!", __func__);
293*4882a593Smuzhiyun 			return -EINVAL;
294*4882a593Smuzhiyun 		}
295*4882a593Smuzhiyun 		break;
296*4882a593Smuzhiyun 	default:
297*4882a593Smuzhiyun 		pr_err("%s: modulation type not supported!", __func__);
298*4882a593Smuzhiyun 		return -EINVAL;
299*4882a593Smuzhiyun 	}
300*4882a593Smuzhiyun 	ret = mxl1x1sf_tune_rf(fe, c->frequency, bw);
301*4882a593Smuzhiyun 	if (mxl_fail(ret))
302*4882a593Smuzhiyun 		goto fail;
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun 	state->frequency = c->frequency;
305*4882a593Smuzhiyun 	state->bandwidth = c->bandwidth_hz;
306*4882a593Smuzhiyun fail:
307*4882a593Smuzhiyun 	return ret;
308*4882a593Smuzhiyun }
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun /* ------------------------------------------------------------------------ */
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun #if 0
313*4882a593Smuzhiyun static int mxl111sf_tuner_init(struct dvb_frontend *fe)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun 	struct mxl111sf_tuner_state *state = fe->tuner_priv;
316*4882a593Smuzhiyun 	int ret;
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun 	/* wake from standby handled by usb driver */
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 	return ret;
321*4882a593Smuzhiyun }
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun static int mxl111sf_tuner_sleep(struct dvb_frontend *fe)
324*4882a593Smuzhiyun {
325*4882a593Smuzhiyun 	struct mxl111sf_tuner_state *state = fe->tuner_priv;
326*4882a593Smuzhiyun 	int ret;
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	/* enter standby mode handled by usb driver */
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 	return ret;
331*4882a593Smuzhiyun }
332*4882a593Smuzhiyun #endif
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun /* ------------------------------------------------------------------------ */
335*4882a593Smuzhiyun 
mxl111sf_tuner_get_status(struct dvb_frontend * fe,u32 * status)336*4882a593Smuzhiyun static int mxl111sf_tuner_get_status(struct dvb_frontend *fe, u32 *status)
337*4882a593Smuzhiyun {
338*4882a593Smuzhiyun 	struct mxl111sf_tuner_state *state = fe->tuner_priv;
339*4882a593Smuzhiyun 	int rf_locked, ref_locked, ret;
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 	*status = 0;
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 	ret = mxl1x1sf_tuner_get_lock_status(state, &rf_locked, &ref_locked);
344*4882a593Smuzhiyun 	if (mxl_fail(ret))
345*4882a593Smuzhiyun 		goto fail;
346*4882a593Smuzhiyun 	mxl_info("%s%s", rf_locked ? "rf locked " : "",
347*4882a593Smuzhiyun 		 ref_locked ? "ref locked" : "");
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun 	if ((rf_locked) || (ref_locked))
350*4882a593Smuzhiyun 		*status |= TUNER_STATUS_LOCKED;
351*4882a593Smuzhiyun fail:
352*4882a593Smuzhiyun 	return ret;
353*4882a593Smuzhiyun }
354*4882a593Smuzhiyun 
mxl111sf_get_rf_strength(struct dvb_frontend * fe,u16 * strength)355*4882a593Smuzhiyun static int mxl111sf_get_rf_strength(struct dvb_frontend *fe, u16 *strength)
356*4882a593Smuzhiyun {
357*4882a593Smuzhiyun 	struct mxl111sf_tuner_state *state = fe->tuner_priv;
358*4882a593Smuzhiyun 	u8 val1, val2;
359*4882a593Smuzhiyun 	int ret;
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	*strength = 0;
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	ret = mxl111sf_tuner_write_reg(state, 0x00, 0x02);
364*4882a593Smuzhiyun 	if (mxl_fail(ret))
365*4882a593Smuzhiyun 		goto fail;
366*4882a593Smuzhiyun 	ret = mxl111sf_tuner_read_reg(state, V6_DIG_RF_PWR_LSB_REG, &val1);
367*4882a593Smuzhiyun 	if (mxl_fail(ret))
368*4882a593Smuzhiyun 		goto fail;
369*4882a593Smuzhiyun 	ret = mxl111sf_tuner_read_reg(state, V6_DIG_RF_PWR_MSB_REG, &val2);
370*4882a593Smuzhiyun 	if (mxl_fail(ret))
371*4882a593Smuzhiyun 		goto fail;
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun 	*strength = val1 | ((val2 & 0x07) << 8);
374*4882a593Smuzhiyun fail:
375*4882a593Smuzhiyun 	ret = mxl111sf_tuner_write_reg(state, 0x00, 0x00);
376*4882a593Smuzhiyun 	mxl_fail(ret);
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun 	return ret;
379*4882a593Smuzhiyun }
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun /* ------------------------------------------------------------------------ */
382*4882a593Smuzhiyun 
mxl111sf_tuner_get_frequency(struct dvb_frontend * fe,u32 * frequency)383*4882a593Smuzhiyun static int mxl111sf_tuner_get_frequency(struct dvb_frontend *fe, u32 *frequency)
384*4882a593Smuzhiyun {
385*4882a593Smuzhiyun 	struct mxl111sf_tuner_state *state = fe->tuner_priv;
386*4882a593Smuzhiyun 	*frequency = state->frequency;
387*4882a593Smuzhiyun 	return 0;
388*4882a593Smuzhiyun }
389*4882a593Smuzhiyun 
mxl111sf_tuner_get_bandwidth(struct dvb_frontend * fe,u32 * bandwidth)390*4882a593Smuzhiyun static int mxl111sf_tuner_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
391*4882a593Smuzhiyun {
392*4882a593Smuzhiyun 	struct mxl111sf_tuner_state *state = fe->tuner_priv;
393*4882a593Smuzhiyun 	*bandwidth = state->bandwidth;
394*4882a593Smuzhiyun 	return 0;
395*4882a593Smuzhiyun }
396*4882a593Smuzhiyun 
mxl111sf_tuner_get_if_frequency(struct dvb_frontend * fe,u32 * frequency)397*4882a593Smuzhiyun static int mxl111sf_tuner_get_if_frequency(struct dvb_frontend *fe,
398*4882a593Smuzhiyun 					   u32 *frequency)
399*4882a593Smuzhiyun {
400*4882a593Smuzhiyun 	struct mxl111sf_tuner_state *state = fe->tuner_priv;
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun 	*frequency = 0;
403*4882a593Smuzhiyun 
404*4882a593Smuzhiyun 	switch (state->if_freq) {
405*4882a593Smuzhiyun 	case MXL_IF_4_0:   /* 4.0   MHz */
406*4882a593Smuzhiyun 		*frequency = 4000000;
407*4882a593Smuzhiyun 		break;
408*4882a593Smuzhiyun 	case MXL_IF_4_5:   /* 4.5   MHz */
409*4882a593Smuzhiyun 		*frequency = 4500000;
410*4882a593Smuzhiyun 		break;
411*4882a593Smuzhiyun 	case MXL_IF_4_57:  /* 4.57  MHz */
412*4882a593Smuzhiyun 		*frequency = 4570000;
413*4882a593Smuzhiyun 		break;
414*4882a593Smuzhiyun 	case MXL_IF_5_0:   /* 5.0   MHz */
415*4882a593Smuzhiyun 		*frequency = 5000000;
416*4882a593Smuzhiyun 		break;
417*4882a593Smuzhiyun 	case MXL_IF_5_38:  /* 5.38  MHz */
418*4882a593Smuzhiyun 		*frequency = 5380000;
419*4882a593Smuzhiyun 		break;
420*4882a593Smuzhiyun 	case MXL_IF_6_0:   /* 6.0   MHz */
421*4882a593Smuzhiyun 		*frequency = 6000000;
422*4882a593Smuzhiyun 		break;
423*4882a593Smuzhiyun 	case MXL_IF_6_28:  /* 6.28  MHz */
424*4882a593Smuzhiyun 		*frequency = 6280000;
425*4882a593Smuzhiyun 		break;
426*4882a593Smuzhiyun 	case MXL_IF_7_2:   /* 7.2   MHz */
427*4882a593Smuzhiyun 		*frequency = 7200000;
428*4882a593Smuzhiyun 		break;
429*4882a593Smuzhiyun 	case MXL_IF_35_25: /* 35.25 MHz */
430*4882a593Smuzhiyun 		*frequency = 35250000;
431*4882a593Smuzhiyun 		break;
432*4882a593Smuzhiyun 	case MXL_IF_36:    /* 36    MHz */
433*4882a593Smuzhiyun 		*frequency = 36000000;
434*4882a593Smuzhiyun 		break;
435*4882a593Smuzhiyun 	case MXL_IF_36_15: /* 36.15 MHz */
436*4882a593Smuzhiyun 		*frequency = 36150000;
437*4882a593Smuzhiyun 		break;
438*4882a593Smuzhiyun 	case MXL_IF_44:    /* 44    MHz */
439*4882a593Smuzhiyun 		*frequency = 44000000;
440*4882a593Smuzhiyun 		break;
441*4882a593Smuzhiyun 	}
442*4882a593Smuzhiyun 	return 0;
443*4882a593Smuzhiyun }
444*4882a593Smuzhiyun 
mxl111sf_tuner_release(struct dvb_frontend * fe)445*4882a593Smuzhiyun static void mxl111sf_tuner_release(struct dvb_frontend *fe)
446*4882a593Smuzhiyun {
447*4882a593Smuzhiyun 	struct mxl111sf_tuner_state *state = fe->tuner_priv;
448*4882a593Smuzhiyun 	mxl_dbg("()");
449*4882a593Smuzhiyun 	kfree(state);
450*4882a593Smuzhiyun 	fe->tuner_priv = NULL;
451*4882a593Smuzhiyun }
452*4882a593Smuzhiyun 
453*4882a593Smuzhiyun /* ------------------------------------------------------------------------- */
454*4882a593Smuzhiyun 
455*4882a593Smuzhiyun static const struct dvb_tuner_ops mxl111sf_tuner_tuner_ops = {
456*4882a593Smuzhiyun 	.info = {
457*4882a593Smuzhiyun 		.name = "MaxLinear MxL111SF",
458*4882a593Smuzhiyun #if 0
459*4882a593Smuzhiyun 		.frequency_min_hz  = ,
460*4882a593Smuzhiyun 		.frequency_max_hz  = ,
461*4882a593Smuzhiyun 		.frequency_step_hz = ,
462*4882a593Smuzhiyun #endif
463*4882a593Smuzhiyun 	},
464*4882a593Smuzhiyun #if 0
465*4882a593Smuzhiyun 	.init              = mxl111sf_tuner_init,
466*4882a593Smuzhiyun 	.sleep             = mxl111sf_tuner_sleep,
467*4882a593Smuzhiyun #endif
468*4882a593Smuzhiyun 	.set_params        = mxl111sf_tuner_set_params,
469*4882a593Smuzhiyun 	.get_status        = mxl111sf_tuner_get_status,
470*4882a593Smuzhiyun 	.get_rf_strength   = mxl111sf_get_rf_strength,
471*4882a593Smuzhiyun 	.get_frequency     = mxl111sf_tuner_get_frequency,
472*4882a593Smuzhiyun 	.get_bandwidth     = mxl111sf_tuner_get_bandwidth,
473*4882a593Smuzhiyun 	.get_if_frequency  = mxl111sf_tuner_get_if_frequency,
474*4882a593Smuzhiyun 	.release           = mxl111sf_tuner_release,
475*4882a593Smuzhiyun };
476*4882a593Smuzhiyun 
mxl111sf_tuner_attach(struct dvb_frontend * fe,struct mxl111sf_state * mxl_state,const struct mxl111sf_tuner_config * cfg)477*4882a593Smuzhiyun struct dvb_frontend *mxl111sf_tuner_attach(struct dvb_frontend *fe,
478*4882a593Smuzhiyun 				struct mxl111sf_state *mxl_state,
479*4882a593Smuzhiyun 				const struct mxl111sf_tuner_config *cfg)
480*4882a593Smuzhiyun {
481*4882a593Smuzhiyun 	struct mxl111sf_tuner_state *state = NULL;
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun 	mxl_dbg("()");
484*4882a593Smuzhiyun 
485*4882a593Smuzhiyun 	state = kzalloc(sizeof(struct mxl111sf_tuner_state), GFP_KERNEL);
486*4882a593Smuzhiyun 	if (state == NULL)
487*4882a593Smuzhiyun 		return NULL;
488*4882a593Smuzhiyun 
489*4882a593Smuzhiyun 	state->mxl_state = mxl_state;
490*4882a593Smuzhiyun 	state->cfg = cfg;
491*4882a593Smuzhiyun 
492*4882a593Smuzhiyun 	memcpy(&fe->ops.tuner_ops, &mxl111sf_tuner_tuner_ops,
493*4882a593Smuzhiyun 	       sizeof(struct dvb_tuner_ops));
494*4882a593Smuzhiyun 
495*4882a593Smuzhiyun 	fe->tuner_priv = state;
496*4882a593Smuzhiyun 	return fe;
497*4882a593Smuzhiyun }
498*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mxl111sf_tuner_attach);
499*4882a593Smuzhiyun 
500*4882a593Smuzhiyun MODULE_DESCRIPTION("MaxLinear MxL111SF CMOS tuner driver");
501*4882a593Smuzhiyun MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
502*4882a593Smuzhiyun MODULE_LICENSE("GPL");
503*4882a593Smuzhiyun MODULE_VERSION("0.1");
504