xref: /OK3568_Linux_fs/kernel/drivers/media/usb/dvb-usb-v2/mxl111sf-demod.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *  mxl111sf-demod.c - driver for the MaxLinear MXL111SF DVB-T demodulator
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  *  Copyright (C) 2010-2014 Michael Krufky <mkrufky@linuxtv.org>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include "mxl111sf-demod.h"
9*4882a593Smuzhiyun #include "mxl111sf-reg.h"
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun /* debug */
12*4882a593Smuzhiyun static int mxl111sf_demod_debug;
13*4882a593Smuzhiyun module_param_named(debug, mxl111sf_demod_debug, int, 0644);
14*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "set debugging level (1=info (or-able)).");
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #define mxl_dbg(fmt, arg...) \
17*4882a593Smuzhiyun 	if (mxl111sf_demod_debug) \
18*4882a593Smuzhiyun 		mxl_printk(KERN_DEBUG, fmt, ##arg)
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun /* ------------------------------------------------------------------------ */
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun struct mxl111sf_demod_state {
23*4882a593Smuzhiyun 	struct mxl111sf_state *mxl_state;
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun 	const struct mxl111sf_demod_config *cfg;
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun 	struct dvb_frontend fe;
28*4882a593Smuzhiyun };
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun /* ------------------------------------------------------------------------ */
31*4882a593Smuzhiyun 
mxl111sf_demod_read_reg(struct mxl111sf_demod_state * state,u8 addr,u8 * data)32*4882a593Smuzhiyun static int mxl111sf_demod_read_reg(struct mxl111sf_demod_state *state,
33*4882a593Smuzhiyun 				   u8 addr, u8 *data)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun 	return (state->cfg->read_reg) ?
36*4882a593Smuzhiyun 		state->cfg->read_reg(state->mxl_state, addr, data) :
37*4882a593Smuzhiyun 		-EINVAL;
38*4882a593Smuzhiyun }
39*4882a593Smuzhiyun 
mxl111sf_demod_write_reg(struct mxl111sf_demod_state * state,u8 addr,u8 data)40*4882a593Smuzhiyun static int mxl111sf_demod_write_reg(struct mxl111sf_demod_state *state,
41*4882a593Smuzhiyun 				    u8 addr, u8 data)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun 	return (state->cfg->write_reg) ?
44*4882a593Smuzhiyun 		state->cfg->write_reg(state->mxl_state, addr, data) :
45*4882a593Smuzhiyun 		-EINVAL;
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun static
mxl111sf_demod_program_regs(struct mxl111sf_demod_state * state,struct mxl111sf_reg_ctrl_info * ctrl_reg_info)49*4882a593Smuzhiyun int mxl111sf_demod_program_regs(struct mxl111sf_demod_state *state,
50*4882a593Smuzhiyun 				struct mxl111sf_reg_ctrl_info *ctrl_reg_info)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun 	return (state->cfg->program_regs) ?
53*4882a593Smuzhiyun 		state->cfg->program_regs(state->mxl_state, ctrl_reg_info) :
54*4882a593Smuzhiyun 		-EINVAL;
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun /* ------------------------------------------------------------------------ */
58*4882a593Smuzhiyun /* TPS */
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun static
mxl1x1sf_demod_get_tps_code_rate(struct mxl111sf_demod_state * state,enum fe_code_rate * code_rate)61*4882a593Smuzhiyun int mxl1x1sf_demod_get_tps_code_rate(struct mxl111sf_demod_state *state,
62*4882a593Smuzhiyun 				     enum fe_code_rate *code_rate)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun 	u8 val;
65*4882a593Smuzhiyun 	int ret = mxl111sf_demod_read_reg(state, V6_CODE_RATE_TPS_REG, &val);
66*4882a593Smuzhiyun 	/* bit<2:0> - 000:1/2, 001:2/3, 010:3/4, 011:5/6, 100:7/8 */
67*4882a593Smuzhiyun 	if (mxl_fail(ret))
68*4882a593Smuzhiyun 		goto fail;
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 	switch (val & V6_CODE_RATE_TPS_MASK) {
71*4882a593Smuzhiyun 	case 0:
72*4882a593Smuzhiyun 		*code_rate = FEC_1_2;
73*4882a593Smuzhiyun 		break;
74*4882a593Smuzhiyun 	case 1:
75*4882a593Smuzhiyun 		*code_rate = FEC_2_3;
76*4882a593Smuzhiyun 		break;
77*4882a593Smuzhiyun 	case 2:
78*4882a593Smuzhiyun 		*code_rate = FEC_3_4;
79*4882a593Smuzhiyun 		break;
80*4882a593Smuzhiyun 	case 3:
81*4882a593Smuzhiyun 		*code_rate = FEC_5_6;
82*4882a593Smuzhiyun 		break;
83*4882a593Smuzhiyun 	case 4:
84*4882a593Smuzhiyun 		*code_rate = FEC_7_8;
85*4882a593Smuzhiyun 		break;
86*4882a593Smuzhiyun 	}
87*4882a593Smuzhiyun fail:
88*4882a593Smuzhiyun 	return ret;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun static
mxl1x1sf_demod_get_tps_modulation(struct mxl111sf_demod_state * state,enum fe_modulation * modulation)92*4882a593Smuzhiyun int mxl1x1sf_demod_get_tps_modulation(struct mxl111sf_demod_state *state,
93*4882a593Smuzhiyun 				      enum fe_modulation *modulation)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun 	u8 val;
96*4882a593Smuzhiyun 	int ret = mxl111sf_demod_read_reg(state, V6_MODORDER_TPS_REG, &val);
97*4882a593Smuzhiyun 	/* Constellation, 00 : QPSK, 01 : 16QAM, 10:64QAM */
98*4882a593Smuzhiyun 	if (mxl_fail(ret))
99*4882a593Smuzhiyun 		goto fail;
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	switch ((val & V6_PARAM_CONSTELLATION_MASK) >> 4) {
102*4882a593Smuzhiyun 	case 0:
103*4882a593Smuzhiyun 		*modulation = QPSK;
104*4882a593Smuzhiyun 		break;
105*4882a593Smuzhiyun 	case 1:
106*4882a593Smuzhiyun 		*modulation = QAM_16;
107*4882a593Smuzhiyun 		break;
108*4882a593Smuzhiyun 	case 2:
109*4882a593Smuzhiyun 		*modulation = QAM_64;
110*4882a593Smuzhiyun 		break;
111*4882a593Smuzhiyun 	}
112*4882a593Smuzhiyun fail:
113*4882a593Smuzhiyun 	return ret;
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun static
mxl1x1sf_demod_get_tps_guard_fft_mode(struct mxl111sf_demod_state * state,enum fe_transmit_mode * fft_mode)117*4882a593Smuzhiyun int mxl1x1sf_demod_get_tps_guard_fft_mode(struct mxl111sf_demod_state *state,
118*4882a593Smuzhiyun 					  enum fe_transmit_mode *fft_mode)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun 	u8 val;
121*4882a593Smuzhiyun 	int ret = mxl111sf_demod_read_reg(state, V6_MODE_TPS_REG, &val);
122*4882a593Smuzhiyun 	/* FFT Mode, 00:2K, 01:8K, 10:4K */
123*4882a593Smuzhiyun 	if (mxl_fail(ret))
124*4882a593Smuzhiyun 		goto fail;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	switch ((val & V6_PARAM_FFT_MODE_MASK) >> 2) {
127*4882a593Smuzhiyun 	case 0:
128*4882a593Smuzhiyun 		*fft_mode = TRANSMISSION_MODE_2K;
129*4882a593Smuzhiyun 		break;
130*4882a593Smuzhiyun 	case 1:
131*4882a593Smuzhiyun 		*fft_mode = TRANSMISSION_MODE_8K;
132*4882a593Smuzhiyun 		break;
133*4882a593Smuzhiyun 	case 2:
134*4882a593Smuzhiyun 		*fft_mode = TRANSMISSION_MODE_4K;
135*4882a593Smuzhiyun 		break;
136*4882a593Smuzhiyun 	}
137*4882a593Smuzhiyun fail:
138*4882a593Smuzhiyun 	return ret;
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun static
mxl1x1sf_demod_get_tps_guard_interval(struct mxl111sf_demod_state * state,enum fe_guard_interval * guard)142*4882a593Smuzhiyun int mxl1x1sf_demod_get_tps_guard_interval(struct mxl111sf_demod_state *state,
143*4882a593Smuzhiyun 					  enum fe_guard_interval *guard)
144*4882a593Smuzhiyun {
145*4882a593Smuzhiyun 	u8 val;
146*4882a593Smuzhiyun 	int ret = mxl111sf_demod_read_reg(state, V6_CP_TPS_REG, &val);
147*4882a593Smuzhiyun 	/* 00:1/32, 01:1/16, 10:1/8, 11:1/4 */
148*4882a593Smuzhiyun 	if (mxl_fail(ret))
149*4882a593Smuzhiyun 		goto fail;
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	switch ((val & V6_PARAM_GI_MASK) >> 4) {
152*4882a593Smuzhiyun 	case 0:
153*4882a593Smuzhiyun 		*guard = GUARD_INTERVAL_1_32;
154*4882a593Smuzhiyun 		break;
155*4882a593Smuzhiyun 	case 1:
156*4882a593Smuzhiyun 		*guard = GUARD_INTERVAL_1_16;
157*4882a593Smuzhiyun 		break;
158*4882a593Smuzhiyun 	case 2:
159*4882a593Smuzhiyun 		*guard = GUARD_INTERVAL_1_8;
160*4882a593Smuzhiyun 		break;
161*4882a593Smuzhiyun 	case 3:
162*4882a593Smuzhiyun 		*guard = GUARD_INTERVAL_1_4;
163*4882a593Smuzhiyun 		break;
164*4882a593Smuzhiyun 	}
165*4882a593Smuzhiyun fail:
166*4882a593Smuzhiyun 	return ret;
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun static
mxl1x1sf_demod_get_tps_hierarchy(struct mxl111sf_demod_state * state,enum fe_hierarchy * hierarchy)170*4882a593Smuzhiyun int mxl1x1sf_demod_get_tps_hierarchy(struct mxl111sf_demod_state *state,
171*4882a593Smuzhiyun 				     enum fe_hierarchy *hierarchy)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun 	u8 val;
174*4882a593Smuzhiyun 	int ret = mxl111sf_demod_read_reg(state, V6_TPS_HIERACHY_REG, &val);
175*4882a593Smuzhiyun 	/* bit<6:4> - 000:Non hierarchy, 001:1, 010:2, 011:4 */
176*4882a593Smuzhiyun 	if (mxl_fail(ret))
177*4882a593Smuzhiyun 		goto fail;
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun 	switch ((val & V6_TPS_HIERARCHY_INFO_MASK) >> 6) {
180*4882a593Smuzhiyun 	case 0:
181*4882a593Smuzhiyun 		*hierarchy = HIERARCHY_NONE;
182*4882a593Smuzhiyun 		break;
183*4882a593Smuzhiyun 	case 1:
184*4882a593Smuzhiyun 		*hierarchy = HIERARCHY_1;
185*4882a593Smuzhiyun 		break;
186*4882a593Smuzhiyun 	case 2:
187*4882a593Smuzhiyun 		*hierarchy = HIERARCHY_2;
188*4882a593Smuzhiyun 		break;
189*4882a593Smuzhiyun 	case 3:
190*4882a593Smuzhiyun 		*hierarchy = HIERARCHY_4;
191*4882a593Smuzhiyun 		break;
192*4882a593Smuzhiyun 	}
193*4882a593Smuzhiyun fail:
194*4882a593Smuzhiyun 	return ret;
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun /* ------------------------------------------------------------------------ */
198*4882a593Smuzhiyun /* LOCKS */
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun static
mxl1x1sf_demod_get_sync_lock_status(struct mxl111sf_demod_state * state,int * sync_lock)201*4882a593Smuzhiyun int mxl1x1sf_demod_get_sync_lock_status(struct mxl111sf_demod_state *state,
202*4882a593Smuzhiyun 					int *sync_lock)
203*4882a593Smuzhiyun {
204*4882a593Smuzhiyun 	u8 val = 0;
205*4882a593Smuzhiyun 	int ret = mxl111sf_demod_read_reg(state, V6_SYNC_LOCK_REG, &val);
206*4882a593Smuzhiyun 	if (mxl_fail(ret))
207*4882a593Smuzhiyun 		goto fail;
208*4882a593Smuzhiyun 	*sync_lock = (val & SYNC_LOCK_MASK) >> 4;
209*4882a593Smuzhiyun fail:
210*4882a593Smuzhiyun 	return ret;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun static
mxl1x1sf_demod_get_rs_lock_status(struct mxl111sf_demod_state * state,int * rs_lock)214*4882a593Smuzhiyun int mxl1x1sf_demod_get_rs_lock_status(struct mxl111sf_demod_state *state,
215*4882a593Smuzhiyun 				      int *rs_lock)
216*4882a593Smuzhiyun {
217*4882a593Smuzhiyun 	u8 val = 0;
218*4882a593Smuzhiyun 	int ret = mxl111sf_demod_read_reg(state, V6_RS_LOCK_DET_REG, &val);
219*4882a593Smuzhiyun 	if (mxl_fail(ret))
220*4882a593Smuzhiyun 		goto fail;
221*4882a593Smuzhiyun 	*rs_lock = (val & RS_LOCK_DET_MASK) >> 3;
222*4882a593Smuzhiyun fail:
223*4882a593Smuzhiyun 	return ret;
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun static
mxl1x1sf_demod_get_tps_lock_status(struct mxl111sf_demod_state * state,int * tps_lock)227*4882a593Smuzhiyun int mxl1x1sf_demod_get_tps_lock_status(struct mxl111sf_demod_state *state,
228*4882a593Smuzhiyun 				       int *tps_lock)
229*4882a593Smuzhiyun {
230*4882a593Smuzhiyun 	u8 val = 0;
231*4882a593Smuzhiyun 	int ret = mxl111sf_demod_read_reg(state, V6_TPS_LOCK_REG, &val);
232*4882a593Smuzhiyun 	if (mxl_fail(ret))
233*4882a593Smuzhiyun 		goto fail;
234*4882a593Smuzhiyun 	*tps_lock = (val & V6_PARAM_TPS_LOCK_MASK) >> 6;
235*4882a593Smuzhiyun fail:
236*4882a593Smuzhiyun 	return ret;
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun static
mxl1x1sf_demod_get_fec_lock_status(struct mxl111sf_demod_state * state,int * fec_lock)240*4882a593Smuzhiyun int mxl1x1sf_demod_get_fec_lock_status(struct mxl111sf_demod_state *state,
241*4882a593Smuzhiyun 				       int *fec_lock)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun 	u8 val = 0;
244*4882a593Smuzhiyun 	int ret = mxl111sf_demod_read_reg(state, V6_IRQ_STATUS_REG, &val);
245*4882a593Smuzhiyun 	if (mxl_fail(ret))
246*4882a593Smuzhiyun 		goto fail;
247*4882a593Smuzhiyun 	*fec_lock = (val & IRQ_MASK_FEC_LOCK) >> 4;
248*4882a593Smuzhiyun fail:
249*4882a593Smuzhiyun 	return ret;
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun #if 0
253*4882a593Smuzhiyun static
254*4882a593Smuzhiyun int mxl1x1sf_demod_get_cp_lock_status(struct mxl111sf_demod_state *state,
255*4882a593Smuzhiyun 				      int *cp_lock)
256*4882a593Smuzhiyun {
257*4882a593Smuzhiyun 	u8 val = 0;
258*4882a593Smuzhiyun 	int ret = mxl111sf_demod_read_reg(state, V6_CP_LOCK_DET_REG, &val);
259*4882a593Smuzhiyun 	if (mxl_fail(ret))
260*4882a593Smuzhiyun 		goto fail;
261*4882a593Smuzhiyun 	*cp_lock = (val & V6_CP_LOCK_DET_MASK) >> 2;
262*4882a593Smuzhiyun fail:
263*4882a593Smuzhiyun 	return ret;
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun #endif
266*4882a593Smuzhiyun 
mxl1x1sf_demod_reset_irq_status(struct mxl111sf_demod_state * state)267*4882a593Smuzhiyun static int mxl1x1sf_demod_reset_irq_status(struct mxl111sf_demod_state *state)
268*4882a593Smuzhiyun {
269*4882a593Smuzhiyun 	return mxl111sf_demod_write_reg(state, 0x0e, 0xff);
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun /* ------------------------------------------------------------------------ */
273*4882a593Smuzhiyun 
mxl111sf_demod_set_frontend(struct dvb_frontend * fe)274*4882a593Smuzhiyun static int mxl111sf_demod_set_frontend(struct dvb_frontend *fe)
275*4882a593Smuzhiyun {
276*4882a593Smuzhiyun 	struct mxl111sf_demod_state *state = fe->demodulator_priv;
277*4882a593Smuzhiyun 	int ret = 0;
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun 	struct mxl111sf_reg_ctrl_info phy_pll_patch[] = {
280*4882a593Smuzhiyun 		{0x00, 0xff, 0x01}, /* change page to 1 */
281*4882a593Smuzhiyun 		{0x40, 0xff, 0x05},
282*4882a593Smuzhiyun 		{0x40, 0xff, 0x01},
283*4882a593Smuzhiyun 		{0x41, 0xff, 0xca},
284*4882a593Smuzhiyun 		{0x41, 0xff, 0xc0},
285*4882a593Smuzhiyun 		{0x00, 0xff, 0x00}, /* change page to 0 */
286*4882a593Smuzhiyun 		{0,    0,    0}
287*4882a593Smuzhiyun 	};
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 	mxl_dbg("()");
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun 	if (fe->ops.tuner_ops.set_params) {
292*4882a593Smuzhiyun 		ret = fe->ops.tuner_ops.set_params(fe);
293*4882a593Smuzhiyun 		if (mxl_fail(ret))
294*4882a593Smuzhiyun 			goto fail;
295*4882a593Smuzhiyun 		msleep(50);
296*4882a593Smuzhiyun 	}
297*4882a593Smuzhiyun 	ret = mxl111sf_demod_program_regs(state, phy_pll_patch);
298*4882a593Smuzhiyun 	mxl_fail(ret);
299*4882a593Smuzhiyun 	msleep(50);
300*4882a593Smuzhiyun 	ret = mxl1x1sf_demod_reset_irq_status(state);
301*4882a593Smuzhiyun 	mxl_fail(ret);
302*4882a593Smuzhiyun 	msleep(100);
303*4882a593Smuzhiyun fail:
304*4882a593Smuzhiyun 	return ret;
305*4882a593Smuzhiyun }
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun /* ------------------------------------------------------------------------ */
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun #if 0
310*4882a593Smuzhiyun /* resets TS Packet error count */
311*4882a593Smuzhiyun /* After setting 7th bit of V5_PER_COUNT_RESET_REG, it should be reset to 0. */
312*4882a593Smuzhiyun static
313*4882a593Smuzhiyun int mxl1x1sf_demod_reset_packet_error_count(struct mxl111sf_demod_state *state)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun 	struct mxl111sf_reg_ctrl_info reset_per_count[] = {
316*4882a593Smuzhiyun 		{0x20, 0x01, 0x01},
317*4882a593Smuzhiyun 		{0x20, 0x01, 0x00},
318*4882a593Smuzhiyun 		{0,    0,    0}
319*4882a593Smuzhiyun 	};
320*4882a593Smuzhiyun 	return mxl111sf_demod_program_regs(state, reset_per_count);
321*4882a593Smuzhiyun }
322*4882a593Smuzhiyun #endif
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun /* returns TS Packet error count */
325*4882a593Smuzhiyun /* PER Count = FEC_PER_COUNT * (2 ** (FEC_PER_SCALE * 4)) */
mxl111sf_demod_read_ucblocks(struct dvb_frontend * fe,u32 * ucblocks)326*4882a593Smuzhiyun static int mxl111sf_demod_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
327*4882a593Smuzhiyun {
328*4882a593Smuzhiyun 	struct mxl111sf_demod_state *state = fe->demodulator_priv;
329*4882a593Smuzhiyun 	u32 fec_per_count, fec_per_scale;
330*4882a593Smuzhiyun 	u8 val;
331*4882a593Smuzhiyun 	int ret;
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun 	*ucblocks = 0;
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	/* FEC_PER_COUNT Register */
336*4882a593Smuzhiyun 	ret = mxl111sf_demod_read_reg(state, V6_FEC_PER_COUNT_REG, &val);
337*4882a593Smuzhiyun 	if (mxl_fail(ret))
338*4882a593Smuzhiyun 		goto fail;
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun 	fec_per_count = val;
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun 	/* FEC_PER_SCALE Register */
343*4882a593Smuzhiyun 	ret = mxl111sf_demod_read_reg(state, V6_FEC_PER_SCALE_REG, &val);
344*4882a593Smuzhiyun 	if (mxl_fail(ret))
345*4882a593Smuzhiyun 		goto fail;
346*4882a593Smuzhiyun 
347*4882a593Smuzhiyun 	val &= V6_FEC_PER_SCALE_MASK;
348*4882a593Smuzhiyun 	val *= 4;
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun 	fec_per_scale = 1 << val;
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	fec_per_count *= fec_per_scale;
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	*ucblocks = fec_per_count;
355*4882a593Smuzhiyun fail:
356*4882a593Smuzhiyun 	return ret;
357*4882a593Smuzhiyun }
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun #ifdef MXL111SF_DEMOD_ENABLE_CALCULATIONS
360*4882a593Smuzhiyun /* FIXME: leaving this enabled breaks the build on some architectures,
361*4882a593Smuzhiyun  * and we shouldn't have any floating point math in the kernel, anyway.
362*4882a593Smuzhiyun  *
363*4882a593Smuzhiyun  * These macros need to be re-written, but it's harmless to simply
364*4882a593Smuzhiyun  * return zero for now. */
365*4882a593Smuzhiyun #define CALCULATE_BER(avg_errors, count) \
366*4882a593Smuzhiyun 	((u32)(avg_errors * 4)/(count*64*188*8))
367*4882a593Smuzhiyun #define CALCULATE_SNR(data) \
368*4882a593Smuzhiyun 	((u32)((10 * (u32)data / 64) - 2.5))
369*4882a593Smuzhiyun #else
370*4882a593Smuzhiyun #define CALCULATE_BER(avg_errors, count) 0
371*4882a593Smuzhiyun #define CALCULATE_SNR(data) 0
372*4882a593Smuzhiyun #endif
373*4882a593Smuzhiyun 
mxl111sf_demod_read_ber(struct dvb_frontend * fe,u32 * ber)374*4882a593Smuzhiyun static int mxl111sf_demod_read_ber(struct dvb_frontend *fe, u32 *ber)
375*4882a593Smuzhiyun {
376*4882a593Smuzhiyun 	struct mxl111sf_demod_state *state = fe->demodulator_priv;
377*4882a593Smuzhiyun 	u8 val1, val2, val3;
378*4882a593Smuzhiyun 	int ret;
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun 	*ber = 0;
381*4882a593Smuzhiyun 
382*4882a593Smuzhiyun 	ret = mxl111sf_demod_read_reg(state, V6_RS_AVG_ERRORS_LSB_REG, &val1);
383*4882a593Smuzhiyun 	if (mxl_fail(ret))
384*4882a593Smuzhiyun 		goto fail;
385*4882a593Smuzhiyun 	ret = mxl111sf_demod_read_reg(state, V6_RS_AVG_ERRORS_MSB_REG, &val2);
386*4882a593Smuzhiyun 	if (mxl_fail(ret))
387*4882a593Smuzhiyun 		goto fail;
388*4882a593Smuzhiyun 	ret = mxl111sf_demod_read_reg(state, V6_N_ACCUMULATE_REG, &val3);
389*4882a593Smuzhiyun 	if (mxl_fail(ret))
390*4882a593Smuzhiyun 		goto fail;
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun 	*ber = CALCULATE_BER((val1 | (val2 << 8)), val3);
393*4882a593Smuzhiyun fail:
394*4882a593Smuzhiyun 	return ret;
395*4882a593Smuzhiyun }
396*4882a593Smuzhiyun 
mxl111sf_demod_calc_snr(struct mxl111sf_demod_state * state,u16 * snr)397*4882a593Smuzhiyun static int mxl111sf_demod_calc_snr(struct mxl111sf_demod_state *state,
398*4882a593Smuzhiyun 				   u16 *snr)
399*4882a593Smuzhiyun {
400*4882a593Smuzhiyun 	u8 val1, val2;
401*4882a593Smuzhiyun 	int ret;
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun 	*snr = 0;
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 	ret = mxl111sf_demod_read_reg(state, V6_SNR_RB_LSB_REG, &val1);
406*4882a593Smuzhiyun 	if (mxl_fail(ret))
407*4882a593Smuzhiyun 		goto fail;
408*4882a593Smuzhiyun 	ret = mxl111sf_demod_read_reg(state, V6_SNR_RB_MSB_REG, &val2);
409*4882a593Smuzhiyun 	if (mxl_fail(ret))
410*4882a593Smuzhiyun 		goto fail;
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun 	*snr = CALCULATE_SNR(val1 | ((val2 & 0x03) << 8));
413*4882a593Smuzhiyun fail:
414*4882a593Smuzhiyun 	return ret;
415*4882a593Smuzhiyun }
416*4882a593Smuzhiyun 
mxl111sf_demod_read_snr(struct dvb_frontend * fe,u16 * snr)417*4882a593Smuzhiyun static int mxl111sf_demod_read_snr(struct dvb_frontend *fe, u16 *snr)
418*4882a593Smuzhiyun {
419*4882a593Smuzhiyun 	struct mxl111sf_demod_state *state = fe->demodulator_priv;
420*4882a593Smuzhiyun 
421*4882a593Smuzhiyun 	int ret = mxl111sf_demod_calc_snr(state, snr);
422*4882a593Smuzhiyun 	if (mxl_fail(ret))
423*4882a593Smuzhiyun 		goto fail;
424*4882a593Smuzhiyun 
425*4882a593Smuzhiyun 	*snr /= 10; /* 0.1 dB */
426*4882a593Smuzhiyun fail:
427*4882a593Smuzhiyun 	return ret;
428*4882a593Smuzhiyun }
429*4882a593Smuzhiyun 
mxl111sf_demod_read_status(struct dvb_frontend * fe,enum fe_status * status)430*4882a593Smuzhiyun static int mxl111sf_demod_read_status(struct dvb_frontend *fe,
431*4882a593Smuzhiyun 				      enum fe_status *status)
432*4882a593Smuzhiyun {
433*4882a593Smuzhiyun 	struct mxl111sf_demod_state *state = fe->demodulator_priv;
434*4882a593Smuzhiyun 	int ret, locked, cr_lock, sync_lock, fec_lock;
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun 	*status = 0;
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun 	ret = mxl1x1sf_demod_get_rs_lock_status(state, &locked);
439*4882a593Smuzhiyun 	if (mxl_fail(ret))
440*4882a593Smuzhiyun 		goto fail;
441*4882a593Smuzhiyun 	ret = mxl1x1sf_demod_get_tps_lock_status(state, &cr_lock);
442*4882a593Smuzhiyun 	if (mxl_fail(ret))
443*4882a593Smuzhiyun 		goto fail;
444*4882a593Smuzhiyun 	ret = mxl1x1sf_demod_get_sync_lock_status(state, &sync_lock);
445*4882a593Smuzhiyun 	if (mxl_fail(ret))
446*4882a593Smuzhiyun 		goto fail;
447*4882a593Smuzhiyun 	ret = mxl1x1sf_demod_get_fec_lock_status(state, &fec_lock);
448*4882a593Smuzhiyun 	if (mxl_fail(ret))
449*4882a593Smuzhiyun 		goto fail;
450*4882a593Smuzhiyun 
451*4882a593Smuzhiyun 	if (locked)
452*4882a593Smuzhiyun 		*status |= FE_HAS_SIGNAL;
453*4882a593Smuzhiyun 	if (cr_lock)
454*4882a593Smuzhiyun 		*status |= FE_HAS_CARRIER;
455*4882a593Smuzhiyun 	if (sync_lock)
456*4882a593Smuzhiyun 		*status |= FE_HAS_SYNC;
457*4882a593Smuzhiyun 	if (fec_lock) /* false positives? */
458*4882a593Smuzhiyun 		*status |= FE_HAS_VITERBI;
459*4882a593Smuzhiyun 
460*4882a593Smuzhiyun 	if ((locked) && (cr_lock) && (sync_lock))
461*4882a593Smuzhiyun 		*status |= FE_HAS_LOCK;
462*4882a593Smuzhiyun fail:
463*4882a593Smuzhiyun 	return ret;
464*4882a593Smuzhiyun }
465*4882a593Smuzhiyun 
mxl111sf_demod_read_signal_strength(struct dvb_frontend * fe,u16 * signal_strength)466*4882a593Smuzhiyun static int mxl111sf_demod_read_signal_strength(struct dvb_frontend *fe,
467*4882a593Smuzhiyun 					       u16 *signal_strength)
468*4882a593Smuzhiyun {
469*4882a593Smuzhiyun 	struct mxl111sf_demod_state *state = fe->demodulator_priv;
470*4882a593Smuzhiyun 	enum fe_modulation modulation;
471*4882a593Smuzhiyun 	int ret;
472*4882a593Smuzhiyun 	u16 snr;
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun 	ret = mxl111sf_demod_calc_snr(state, &snr);
475*4882a593Smuzhiyun 	if (ret < 0)
476*4882a593Smuzhiyun 		return ret;
477*4882a593Smuzhiyun 	ret = mxl1x1sf_demod_get_tps_modulation(state, &modulation);
478*4882a593Smuzhiyun 	if (ret < 0)
479*4882a593Smuzhiyun 		return ret;
480*4882a593Smuzhiyun 
481*4882a593Smuzhiyun 	switch (modulation) {
482*4882a593Smuzhiyun 	case QPSK:
483*4882a593Smuzhiyun 		*signal_strength = (snr >= 1300) ?
484*4882a593Smuzhiyun 			min(65535, snr * 44) : snr * 38;
485*4882a593Smuzhiyun 		break;
486*4882a593Smuzhiyun 	case QAM_16:
487*4882a593Smuzhiyun 		*signal_strength = (snr >= 1500) ?
488*4882a593Smuzhiyun 			min(65535, snr * 38) : snr * 33;
489*4882a593Smuzhiyun 		break;
490*4882a593Smuzhiyun 	case QAM_64:
491*4882a593Smuzhiyun 		*signal_strength = (snr >= 2000) ?
492*4882a593Smuzhiyun 			min(65535, snr * 29) : snr * 25;
493*4882a593Smuzhiyun 		break;
494*4882a593Smuzhiyun 	default:
495*4882a593Smuzhiyun 		*signal_strength = 0;
496*4882a593Smuzhiyun 		return -EINVAL;
497*4882a593Smuzhiyun 	}
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun 	return 0;
500*4882a593Smuzhiyun }
501*4882a593Smuzhiyun 
mxl111sf_demod_get_frontend(struct dvb_frontend * fe,struct dtv_frontend_properties * p)502*4882a593Smuzhiyun static int mxl111sf_demod_get_frontend(struct dvb_frontend *fe,
503*4882a593Smuzhiyun 				       struct dtv_frontend_properties *p)
504*4882a593Smuzhiyun {
505*4882a593Smuzhiyun 	struct mxl111sf_demod_state *state = fe->demodulator_priv;
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun 	mxl_dbg("()");
508*4882a593Smuzhiyun #if 0
509*4882a593Smuzhiyun 	p->inversion = /* FIXME */ ? INVERSION_ON : INVERSION_OFF;
510*4882a593Smuzhiyun #endif
511*4882a593Smuzhiyun 	if (fe->ops.tuner_ops.get_bandwidth)
512*4882a593Smuzhiyun 		fe->ops.tuner_ops.get_bandwidth(fe, &p->bandwidth_hz);
513*4882a593Smuzhiyun 	if (fe->ops.tuner_ops.get_frequency)
514*4882a593Smuzhiyun 		fe->ops.tuner_ops.get_frequency(fe, &p->frequency);
515*4882a593Smuzhiyun 	mxl1x1sf_demod_get_tps_code_rate(state, &p->code_rate_HP);
516*4882a593Smuzhiyun 	mxl1x1sf_demod_get_tps_code_rate(state, &p->code_rate_LP);
517*4882a593Smuzhiyun 	mxl1x1sf_demod_get_tps_modulation(state, &p->modulation);
518*4882a593Smuzhiyun 	mxl1x1sf_demod_get_tps_guard_fft_mode(state,
519*4882a593Smuzhiyun 					      &p->transmission_mode);
520*4882a593Smuzhiyun 	mxl1x1sf_demod_get_tps_guard_interval(state,
521*4882a593Smuzhiyun 					      &p->guard_interval);
522*4882a593Smuzhiyun 	mxl1x1sf_demod_get_tps_hierarchy(state,
523*4882a593Smuzhiyun 					 &p->hierarchy);
524*4882a593Smuzhiyun 
525*4882a593Smuzhiyun 	return 0;
526*4882a593Smuzhiyun }
527*4882a593Smuzhiyun 
528*4882a593Smuzhiyun static
mxl111sf_demod_get_tune_settings(struct dvb_frontend * fe,struct dvb_frontend_tune_settings * tune)529*4882a593Smuzhiyun int mxl111sf_demod_get_tune_settings(struct dvb_frontend *fe,
530*4882a593Smuzhiyun 				     struct dvb_frontend_tune_settings *tune)
531*4882a593Smuzhiyun {
532*4882a593Smuzhiyun 	tune->min_delay_ms = 1000;
533*4882a593Smuzhiyun 	return 0;
534*4882a593Smuzhiyun }
535*4882a593Smuzhiyun 
mxl111sf_demod_release(struct dvb_frontend * fe)536*4882a593Smuzhiyun static void mxl111sf_demod_release(struct dvb_frontend *fe)
537*4882a593Smuzhiyun {
538*4882a593Smuzhiyun 	struct mxl111sf_demod_state *state = fe->demodulator_priv;
539*4882a593Smuzhiyun 	mxl_dbg("()");
540*4882a593Smuzhiyun 	kfree(state);
541*4882a593Smuzhiyun 	fe->demodulator_priv = NULL;
542*4882a593Smuzhiyun }
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun static const struct dvb_frontend_ops mxl111sf_demod_ops = {
545*4882a593Smuzhiyun 	.delsys = { SYS_DVBT },
546*4882a593Smuzhiyun 	.info = {
547*4882a593Smuzhiyun 		.name               = "MaxLinear MxL111SF DVB-T demodulator",
548*4882a593Smuzhiyun 		.frequency_min_hz      = 177 * MHz,
549*4882a593Smuzhiyun 		.frequency_max_hz      = 858 * MHz,
550*4882a593Smuzhiyun 		.frequency_stepsize_hz = 166666,
551*4882a593Smuzhiyun 		.caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
552*4882a593Smuzhiyun 			FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
553*4882a593Smuzhiyun 			FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
554*4882a593Smuzhiyun 			FE_CAN_QAM_AUTO |
555*4882a593Smuzhiyun 			FE_CAN_HIERARCHY_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
556*4882a593Smuzhiyun 			FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER
557*4882a593Smuzhiyun 	},
558*4882a593Smuzhiyun 	.release              = mxl111sf_demod_release,
559*4882a593Smuzhiyun #if 0
560*4882a593Smuzhiyun 	.init                 = mxl111sf_init,
561*4882a593Smuzhiyun 	.i2c_gate_ctrl        = mxl111sf_i2c_gate_ctrl,
562*4882a593Smuzhiyun #endif
563*4882a593Smuzhiyun 	.set_frontend         = mxl111sf_demod_set_frontend,
564*4882a593Smuzhiyun 	.get_frontend         = mxl111sf_demod_get_frontend,
565*4882a593Smuzhiyun 	.get_tune_settings    = mxl111sf_demod_get_tune_settings,
566*4882a593Smuzhiyun 	.read_status          = mxl111sf_demod_read_status,
567*4882a593Smuzhiyun 	.read_signal_strength = mxl111sf_demod_read_signal_strength,
568*4882a593Smuzhiyun 	.read_ber             = mxl111sf_demod_read_ber,
569*4882a593Smuzhiyun 	.read_snr             = mxl111sf_demod_read_snr,
570*4882a593Smuzhiyun 	.read_ucblocks        = mxl111sf_demod_read_ucblocks,
571*4882a593Smuzhiyun };
572*4882a593Smuzhiyun 
mxl111sf_demod_attach(struct mxl111sf_state * mxl_state,const struct mxl111sf_demod_config * cfg)573*4882a593Smuzhiyun struct dvb_frontend *mxl111sf_demod_attach(struct mxl111sf_state *mxl_state,
574*4882a593Smuzhiyun 				   const struct mxl111sf_demod_config *cfg)
575*4882a593Smuzhiyun {
576*4882a593Smuzhiyun 	struct mxl111sf_demod_state *state = NULL;
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun 	mxl_dbg("()");
579*4882a593Smuzhiyun 
580*4882a593Smuzhiyun 	state = kzalloc(sizeof(struct mxl111sf_demod_state), GFP_KERNEL);
581*4882a593Smuzhiyun 	if (state == NULL)
582*4882a593Smuzhiyun 		return NULL;
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun 	state->mxl_state = mxl_state;
585*4882a593Smuzhiyun 	state->cfg = cfg;
586*4882a593Smuzhiyun 
587*4882a593Smuzhiyun 	memcpy(&state->fe.ops, &mxl111sf_demod_ops,
588*4882a593Smuzhiyun 	       sizeof(struct dvb_frontend_ops));
589*4882a593Smuzhiyun 
590*4882a593Smuzhiyun 	state->fe.demodulator_priv = state;
591*4882a593Smuzhiyun 	return &state->fe;
592*4882a593Smuzhiyun }
593*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mxl111sf_demod_attach);
594*4882a593Smuzhiyun 
595*4882a593Smuzhiyun MODULE_DESCRIPTION("MaxLinear MxL111SF DVB-T demodulator driver");
596*4882a593Smuzhiyun MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
597*4882a593Smuzhiyun MODULE_LICENSE("GPL");
598*4882a593Smuzhiyun MODULE_VERSION("0.1");
599