1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun cx231xx-pcb-cfg.h - driver for Conexant 4*4882a593Smuzhiyun Cx23100/101/102 USB video capture devices 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun Copyright (C) 2008 <srinivasa.deevi at conexant dot com> 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef _PCB_CONFIG_H_ 11*4882a593Smuzhiyun #define _PCB_CONFIG_H_ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <linux/init.h> 14*4882a593Smuzhiyun #include <linux/module.h> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /*************************************************************************** 17*4882a593Smuzhiyun * Class Information * 18*4882a593Smuzhiyun ***************************************************************************/ 19*4882a593Smuzhiyun #define CLASS_DEFAULT 0xFF 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun enum VENDOR_REQUEST_TYPE { 22*4882a593Smuzhiyun /* Set/Get I2C */ 23*4882a593Smuzhiyun VRT_SET_I2C0 = 0x0, 24*4882a593Smuzhiyun VRT_SET_I2C1 = 0x1, 25*4882a593Smuzhiyun VRT_SET_I2C2 = 0x2, 26*4882a593Smuzhiyun VRT_GET_I2C0 = 0x4, 27*4882a593Smuzhiyun VRT_GET_I2C1 = 0x5, 28*4882a593Smuzhiyun VRT_GET_I2C2 = 0x6, 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun /* Set/Get GPIO */ 31*4882a593Smuzhiyun VRT_SET_GPIO = 0x8, 32*4882a593Smuzhiyun VRT_GET_GPIO = 0x9, 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /* Set/Get GPIE */ 35*4882a593Smuzhiyun VRT_SET_GPIE = 0xA, 36*4882a593Smuzhiyun VRT_GET_GPIE = 0xB, 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun /* Set/Get Register Control/Status */ 39*4882a593Smuzhiyun VRT_SET_REGISTER = 0xC, 40*4882a593Smuzhiyun VRT_GET_REGISTER = 0xD, 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun /* Get Extended Compat ID Descriptor */ 43*4882a593Smuzhiyun VRT_GET_EXTCID_DESC = 0xFF, 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun enum BYTE_ENABLE_MASK { 47*4882a593Smuzhiyun ENABLE_ONE_BYTE = 0x1, 48*4882a593Smuzhiyun ENABLE_TWE_BYTE = 0x3, 49*4882a593Smuzhiyun ENABLE_THREE_BYTE = 0x7, 50*4882a593Smuzhiyun ENABLE_FOUR_BYTE = 0xF, 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun #define SPEED_MASK 0x1 54*4882a593Smuzhiyun enum USB_SPEED{ 55*4882a593Smuzhiyun FULL_SPEED = 0x0, /* 0: full speed */ 56*4882a593Smuzhiyun HIGH_SPEED = 0x1 /* 1: high speed */ 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #define TS_MASK 0x6 60*4882a593Smuzhiyun enum TS_PORT{ 61*4882a593Smuzhiyun NO_TS_PORT = 0x0, /* 2'b00: Neither port used. PCB not a Hybrid, 62*4882a593Smuzhiyun only offers Analog TV or Video */ 63*4882a593Smuzhiyun TS1_PORT = 0x4, /* 2'b10: TS1 Input (Hybrid mode : 64*4882a593Smuzhiyun Digital or External Analog/Compressed source) */ 65*4882a593Smuzhiyun TS1_TS2_PORT = 0x6, /* 2'b11: TS1 & TS2 Inputs 66*4882a593Smuzhiyun (Dual inputs from Digital and/or 67*4882a593Smuzhiyun External Analog/Compressed sources) */ 68*4882a593Smuzhiyun TS1_EXT_CLOCK = 0x6, /* 2'b11: TS1 & TS2 as selector 69*4882a593Smuzhiyun to external clock */ 70*4882a593Smuzhiyun TS1VIP_TS2_PORT = 0x2 /* 2'b01: TS1 used as 656/VIP Output, 71*4882a593Smuzhiyun TS2 Input (from Compressor) */ 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun #define EAVP_MASK 0x8 75*4882a593Smuzhiyun enum EAV_PRESENT{ 76*4882a593Smuzhiyun NO_EXTERNAL_AV = 0x0, /* 0: No External A/V inputs 77*4882a593Smuzhiyun (no need for i2s block), 78*4882a593Smuzhiyun Analog Tuner must be present */ 79*4882a593Smuzhiyun EXTERNAL_AV = 0x8 /* 1: External A/V inputs 80*4882a593Smuzhiyun present (requires i2s blk) */ 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun #define ATM_MASK 0x30 84*4882a593Smuzhiyun enum AT_MODE{ 85*4882a593Smuzhiyun DIF_TUNER = 0x30, /* 2'b11: IF Tuner (requires use of DIF) */ 86*4882a593Smuzhiyun BASEBAND_SOUND = 0x20, /* 2'b10: Baseband Composite & 87*4882a593Smuzhiyun Sound-IF Signals present */ 88*4882a593Smuzhiyun NO_TUNER = 0x10 /* 2'b0x: No Analog Tuner present */ 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun #define PWR_SEL_MASK 0x40 92*4882a593Smuzhiyun enum POWE_TYPE{ 93*4882a593Smuzhiyun SELF_POWER = 0x0, /* 0: self power */ 94*4882a593Smuzhiyun BUS_POWER = 0x40 /* 1: bus power */ 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun enum USB_POWE_TYPE{ 98*4882a593Smuzhiyun USB_SELF_POWER = 0, 99*4882a593Smuzhiyun USB_BUS_POWER 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun #define BO_0_MASK 0x80 103*4882a593Smuzhiyun enum AVDEC_STATUS{ 104*4882a593Smuzhiyun AVDEC_DISABLE = 0x0, /* 0: A/V Decoder Disabled */ 105*4882a593Smuzhiyun AVDEC_ENABLE = 0x80 /* 1: A/V Decoder Enabled */ 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun #define BO_1_MASK 0x100 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun #define BUSPOWER_MASK 0xC4 /* for Polaris spec 0.8 */ 111*4882a593Smuzhiyun #define SELFPOWER_MASK 0x86 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun /***************************************************************************/ 114*4882a593Smuzhiyun #define NOT_DECIDE_YET 0xFE 115*4882a593Smuzhiyun #define NOT_SUPPORTED 0xFF 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun /*************************************************************************** 118*4882a593Smuzhiyun * for mod field use * 119*4882a593Smuzhiyun ***************************************************************************/ 120*4882a593Smuzhiyun #define MOD_DIGITAL 0x1 121*4882a593Smuzhiyun #define MOD_ANALOG 0x2 122*4882a593Smuzhiyun #define MOD_DIF 0x4 123*4882a593Smuzhiyun #define MOD_EXTERNAL 0x8 124*4882a593Smuzhiyun #define CAP_ALL_MOD 0x0f 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun /*************************************************************************** 127*4882a593Smuzhiyun * source define * 128*4882a593Smuzhiyun ***************************************************************************/ 129*4882a593Smuzhiyun #define SOURCE_DIGITAL 0x1 130*4882a593Smuzhiyun #define SOURCE_ANALOG 0x2 131*4882a593Smuzhiyun #define SOURCE_DIF 0x4 132*4882a593Smuzhiyun #define SOURCE_EXTERNAL 0x8 133*4882a593Smuzhiyun #define SOURCE_TS_BDA 0x10 134*4882a593Smuzhiyun #define SOURCE_TS_ENCODE 0x20 135*4882a593Smuzhiyun #define SOURCE_TS_EXTERNAL 0x40 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun /*************************************************************************** 138*4882a593Smuzhiyun * interface information define * 139*4882a593Smuzhiyun ***************************************************************************/ 140*4882a593Smuzhiyun struct INTERFACE_INFO { 141*4882a593Smuzhiyun u8 interrupt_index; 142*4882a593Smuzhiyun u8 ts1_index; 143*4882a593Smuzhiyun u8 ts2_index; 144*4882a593Smuzhiyun u8 audio_index; 145*4882a593Smuzhiyun u8 video_index; 146*4882a593Smuzhiyun u8 vanc_index; /* VBI */ 147*4882a593Smuzhiyun u8 hanc_index; /* Sliced CC */ 148*4882a593Smuzhiyun u8 ir_index; 149*4882a593Smuzhiyun }; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun enum INDEX_INTERFACE_INFO{ 152*4882a593Smuzhiyun INDEX_INTERRUPT = 0x0, 153*4882a593Smuzhiyun INDEX_TS1, 154*4882a593Smuzhiyun INDEX_TS2, 155*4882a593Smuzhiyun INDEX_AUDIO, 156*4882a593Smuzhiyun INDEX_VIDEO, 157*4882a593Smuzhiyun INDEX_VANC, 158*4882a593Smuzhiyun INDEX_HANC, 159*4882a593Smuzhiyun INDEX_IR, 160*4882a593Smuzhiyun }; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun /*************************************************************************** 163*4882a593Smuzhiyun * configuration information define * 164*4882a593Smuzhiyun ***************************************************************************/ 165*4882a593Smuzhiyun struct CONFIG_INFO { 166*4882a593Smuzhiyun u8 config_index; 167*4882a593Smuzhiyun struct INTERFACE_INFO interface_info; 168*4882a593Smuzhiyun }; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun struct pcb_config { 171*4882a593Smuzhiyun u8 index; 172*4882a593Smuzhiyun u8 type; /* bus power or self power, 173*4882a593Smuzhiyun self power--0, bus_power--1 */ 174*4882a593Smuzhiyun u8 speed; /* usb speed, 2.0--1, 1.1--0 */ 175*4882a593Smuzhiyun u8 mode; /* digital , anlog, dif or external A/V */ 176*4882a593Smuzhiyun u32 ts1_source; /* three source -- BDA,External,encode */ 177*4882a593Smuzhiyun u32 ts2_source; 178*4882a593Smuzhiyun u32 analog_source; 179*4882a593Smuzhiyun u8 digital_index; /* bus-power used */ 180*4882a593Smuzhiyun u8 analog_index; /* bus-power used */ 181*4882a593Smuzhiyun u8 dif_index; /* bus-power used */ 182*4882a593Smuzhiyun u8 external_index; /* bus-power used */ 183*4882a593Smuzhiyun u8 config_num; /* current config num, 0,1,2, 184*4882a593Smuzhiyun for self-power, always 0 */ 185*4882a593Smuzhiyun struct CONFIG_INFO hs_config_info[3]; 186*4882a593Smuzhiyun struct CONFIG_INFO fs_config_info[3]; 187*4882a593Smuzhiyun }; 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun enum INDEX_PCB_CONFIG{ 190*4882a593Smuzhiyun INDEX_SELFPOWER_DIGITAL_ONLY = 0x0, 191*4882a593Smuzhiyun INDEX_SELFPOWER_DUAL_DIGITAL, 192*4882a593Smuzhiyun INDEX_SELFPOWER_ANALOG_ONLY, 193*4882a593Smuzhiyun INDEX_SELFPOWER_DUAL, 194*4882a593Smuzhiyun INDEX_SELFPOWER_TRIPLE, 195*4882a593Smuzhiyun INDEX_SELFPOWER_COMPRESSOR, 196*4882a593Smuzhiyun INDEX_BUSPOWER_DIGITAL_ONLY, 197*4882a593Smuzhiyun INDEX_BUSPOWER_ANALOG_ONLY, 198*4882a593Smuzhiyun INDEX_BUSPOWER_DIF_ONLY, 199*4882a593Smuzhiyun INDEX_BUSPOWER_EXTERNAL_ONLY, 200*4882a593Smuzhiyun INDEX_BUSPOWER_EXTERNAL_ANALOG, 201*4882a593Smuzhiyun INDEX_BUSPOWER_EXTERNAL_DIF, 202*4882a593Smuzhiyun INDEX_BUSPOWER_EXTERNAL_DIGITAL, 203*4882a593Smuzhiyun INDEX_BUSPOWER_DIGITAL_ANALOG, 204*4882a593Smuzhiyun INDEX_BUSPOWER_DIGITAL_DIF, 205*4882a593Smuzhiyun INDEX_BUSPOWER_DIGITAL_ANALOG_EXTERNAL, 206*4882a593Smuzhiyun INDEX_BUSPOWER_DIGITAL_DIF_EXTERNAL, 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun /***************************************************************************/ 210*4882a593Smuzhiyun struct cx231xx; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun int initialize_cx231xx(struct cx231xx *p_dev); 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun #endif 215