xref: /OK3568_Linux_fs/kernel/drivers/media/usb/cx231xx/cx231xx-cards.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun    cx231xx-cards.c - driver for Conexant Cx23100/101/102
4*4882a593Smuzhiyun 				USB video capture devices
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun    Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
7*4882a593Smuzhiyun 				Based on em28xx driver
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include "cx231xx.h"
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/slab.h>
15*4882a593Smuzhiyun #include <linux/delay.h>
16*4882a593Smuzhiyun #include <linux/i2c.h>
17*4882a593Smuzhiyun #include <media/tuner.h>
18*4882a593Smuzhiyun #include <media/tveeprom.h>
19*4882a593Smuzhiyun #include <media/v4l2-common.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #include <media/drv-intf/cx25840.h>
22*4882a593Smuzhiyun #include <media/dvb-usb-ids.h>
23*4882a593Smuzhiyun #include "xc5000.h"
24*4882a593Smuzhiyun #include "tda18271.h"
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun static int tuner = -1;
28*4882a593Smuzhiyun module_param(tuner, int, 0444);
29*4882a593Smuzhiyun MODULE_PARM_DESC(tuner, "tuner type");
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun static int transfer_mode = 1;
32*4882a593Smuzhiyun module_param(transfer_mode, int, 0444);
33*4882a593Smuzhiyun MODULE_PARM_DESC(transfer_mode, "transfer mode (1-ISO or 0-BULK)");
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun static unsigned int disable_ir;
36*4882a593Smuzhiyun module_param(disable_ir, int, 0444);
37*4882a593Smuzhiyun MODULE_PARM_DESC(disable_ir, "disable infrared remote support");
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun /* Bitmask marking allocated devices from 0 to CX231XX_MAXBOARDS */
40*4882a593Smuzhiyun static unsigned long cx231xx_devused;
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun /*
43*4882a593Smuzhiyun  *  Reset sequences for analog/digital modes
44*4882a593Smuzhiyun  */
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun static struct cx231xx_reg_seq RDE250_XCV_TUNER[] = {
47*4882a593Smuzhiyun 	{0x03, 0x01, 10},
48*4882a593Smuzhiyun 	{0x03, 0x00, 30},
49*4882a593Smuzhiyun 	{0x03, 0x01, 10},
50*4882a593Smuzhiyun 	{-1, -1, -1},
51*4882a593Smuzhiyun };
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun /*
54*4882a593Smuzhiyun  *  Board definitions
55*4882a593Smuzhiyun  */
56*4882a593Smuzhiyun struct cx231xx_board cx231xx_boards[] = {
57*4882a593Smuzhiyun 	[CX231XX_BOARD_UNKNOWN] = {
58*4882a593Smuzhiyun 		.name = "Unknown CX231xx video grabber",
59*4882a593Smuzhiyun 		.tuner_type = TUNER_ABSENT,
60*4882a593Smuzhiyun 		.input = {{
61*4882a593Smuzhiyun 				.type = CX231XX_VMUX_TELEVISION,
62*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_3_1,
63*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_VIDEO,
64*4882a593Smuzhiyun 				.gpio = NULL,
65*4882a593Smuzhiyun 			}, {
66*4882a593Smuzhiyun 				.type = CX231XX_VMUX_COMPOSITE1,
67*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_2_1,
68*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_LINE_IN,
69*4882a593Smuzhiyun 				.gpio = NULL,
70*4882a593Smuzhiyun 			}, {
71*4882a593Smuzhiyun 				.type = CX231XX_VMUX_SVIDEO,
72*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_1_1 |
73*4882a593Smuzhiyun 					(CX231XX_VIN_1_2 << 8) |
74*4882a593Smuzhiyun 					CX25840_SVIDEO_ON,
75*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_LINE_IN,
76*4882a593Smuzhiyun 				.gpio = NULL,
77*4882a593Smuzhiyun 			}
78*4882a593Smuzhiyun 		},
79*4882a593Smuzhiyun 	},
80*4882a593Smuzhiyun 	[CX231XX_BOARD_CNXT_CARRAERA] = {
81*4882a593Smuzhiyun 		.name = "Conexant Hybrid TV - CARRAERA",
82*4882a593Smuzhiyun 		.tuner_type = TUNER_XC5000,
83*4882a593Smuzhiyun 		.tuner_addr = 0x61,
84*4882a593Smuzhiyun 		.tuner_gpio = RDE250_XCV_TUNER,
85*4882a593Smuzhiyun 		.tuner_sif_gpio = 0x05,
86*4882a593Smuzhiyun 		.tuner_scl_gpio = 0x1a,
87*4882a593Smuzhiyun 		.tuner_sda_gpio = 0x1b,
88*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
89*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
90*4882a593Smuzhiyun 		.demod_xfer_mode = 0,
91*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
92*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x0c,
93*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
94*4882a593Smuzhiyun 		.tuner_i2c_master = I2C_1_MUX_3,
95*4882a593Smuzhiyun 		.demod_i2c_master = I2C_2,
96*4882a593Smuzhiyun 		.has_dvb = 1,
97*4882a593Smuzhiyun 		.demod_addr = 0x02,
98*4882a593Smuzhiyun 		.norm = V4L2_STD_PAL,
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 		.input = {{
101*4882a593Smuzhiyun 				.type = CX231XX_VMUX_TELEVISION,
102*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_3_1,
103*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_VIDEO,
104*4882a593Smuzhiyun 				.gpio = NULL,
105*4882a593Smuzhiyun 			}, {
106*4882a593Smuzhiyun 				.type = CX231XX_VMUX_COMPOSITE1,
107*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_2_1,
108*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_LINE_IN,
109*4882a593Smuzhiyun 				.gpio = NULL,
110*4882a593Smuzhiyun 			}, {
111*4882a593Smuzhiyun 				.type = CX231XX_VMUX_SVIDEO,
112*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_1_1 |
113*4882a593Smuzhiyun 					(CX231XX_VIN_1_2 << 8) |
114*4882a593Smuzhiyun 					CX25840_SVIDEO_ON,
115*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_LINE_IN,
116*4882a593Smuzhiyun 				.gpio = NULL,
117*4882a593Smuzhiyun 			}
118*4882a593Smuzhiyun 		},
119*4882a593Smuzhiyun 	},
120*4882a593Smuzhiyun 	[CX231XX_BOARD_CNXT_SHELBY] = {
121*4882a593Smuzhiyun 		.name = "Conexant Hybrid TV - SHELBY",
122*4882a593Smuzhiyun 		.tuner_type = TUNER_XC5000,
123*4882a593Smuzhiyun 		.tuner_addr = 0x61,
124*4882a593Smuzhiyun 		.tuner_gpio = RDE250_XCV_TUNER,
125*4882a593Smuzhiyun 		.tuner_sif_gpio = 0x05,
126*4882a593Smuzhiyun 		.tuner_scl_gpio = 0x1a,
127*4882a593Smuzhiyun 		.tuner_sda_gpio = 0x1b,
128*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
129*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
130*4882a593Smuzhiyun 		.demod_xfer_mode = 0,
131*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
132*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x0c,
133*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
134*4882a593Smuzhiyun 		.tuner_i2c_master = I2C_1_MUX_3,
135*4882a593Smuzhiyun 		.demod_i2c_master = I2C_2,
136*4882a593Smuzhiyun 		.has_dvb = 1,
137*4882a593Smuzhiyun 		.demod_addr = 0x32,
138*4882a593Smuzhiyun 		.norm = V4L2_STD_NTSC,
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 		.input = {{
141*4882a593Smuzhiyun 				.type = CX231XX_VMUX_TELEVISION,
142*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_3_1,
143*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_VIDEO,
144*4882a593Smuzhiyun 				.gpio = NULL,
145*4882a593Smuzhiyun 			}, {
146*4882a593Smuzhiyun 				.type = CX231XX_VMUX_COMPOSITE1,
147*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_2_1,
148*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_LINE_IN,
149*4882a593Smuzhiyun 				.gpio = NULL,
150*4882a593Smuzhiyun 			}, {
151*4882a593Smuzhiyun 				.type = CX231XX_VMUX_SVIDEO,
152*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_1_1 |
153*4882a593Smuzhiyun 					(CX231XX_VIN_1_2 << 8) |
154*4882a593Smuzhiyun 					CX25840_SVIDEO_ON,
155*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_LINE_IN,
156*4882a593Smuzhiyun 				.gpio = NULL,
157*4882a593Smuzhiyun 			}
158*4882a593Smuzhiyun 		},
159*4882a593Smuzhiyun 	},
160*4882a593Smuzhiyun 	[CX231XX_BOARD_CNXT_RDE_253S] = {
161*4882a593Smuzhiyun 		.name = "Conexant Hybrid TV - RDE253S",
162*4882a593Smuzhiyun 		.tuner_type = TUNER_NXP_TDA18271,
163*4882a593Smuzhiyun 		.tuner_addr = 0x60,
164*4882a593Smuzhiyun 		.tuner_gpio = RDE250_XCV_TUNER,
165*4882a593Smuzhiyun 		.tuner_sif_gpio = 0x05,
166*4882a593Smuzhiyun 		.tuner_scl_gpio = 0x1a,
167*4882a593Smuzhiyun 		.tuner_sda_gpio = 0x1b,
168*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
169*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
170*4882a593Smuzhiyun 		.demod_xfer_mode = 0,
171*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
172*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x1c,
173*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
174*4882a593Smuzhiyun 		.tuner_i2c_master = I2C_1_MUX_3,
175*4882a593Smuzhiyun 		.demod_i2c_master = I2C_2,
176*4882a593Smuzhiyun 		.has_dvb = 1,
177*4882a593Smuzhiyun 		.demod_addr = 0x02,
178*4882a593Smuzhiyun 		.norm = V4L2_STD_PAL,
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 		.input = {{
181*4882a593Smuzhiyun 				.type = CX231XX_VMUX_TELEVISION,
182*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_3_1,
183*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_VIDEO,
184*4882a593Smuzhiyun 				.gpio = NULL,
185*4882a593Smuzhiyun 			}, {
186*4882a593Smuzhiyun 				.type = CX231XX_VMUX_COMPOSITE1,
187*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_2_1,
188*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_LINE_IN,
189*4882a593Smuzhiyun 				.gpio = NULL,
190*4882a593Smuzhiyun 			}, {
191*4882a593Smuzhiyun 				.type = CX231XX_VMUX_SVIDEO,
192*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_1_1 |
193*4882a593Smuzhiyun 					(CX231XX_VIN_1_2 << 8) |
194*4882a593Smuzhiyun 					CX25840_SVIDEO_ON,
195*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_LINE_IN,
196*4882a593Smuzhiyun 				.gpio = NULL,
197*4882a593Smuzhiyun 			}
198*4882a593Smuzhiyun 		},
199*4882a593Smuzhiyun 	},
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	[CX231XX_BOARD_CNXT_RDU_253S] = {
202*4882a593Smuzhiyun 		.name = "Conexant Hybrid TV - RDU253S",
203*4882a593Smuzhiyun 		.tuner_type = TUNER_NXP_TDA18271,
204*4882a593Smuzhiyun 		.tuner_addr = 0x60,
205*4882a593Smuzhiyun 		.tuner_gpio = RDE250_XCV_TUNER,
206*4882a593Smuzhiyun 		.tuner_sif_gpio = 0x05,
207*4882a593Smuzhiyun 		.tuner_scl_gpio = 0x1a,
208*4882a593Smuzhiyun 		.tuner_sda_gpio = 0x1b,
209*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
210*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
211*4882a593Smuzhiyun 		.demod_xfer_mode = 0,
212*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
213*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x1c,
214*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
215*4882a593Smuzhiyun 		.tuner_i2c_master = I2C_1_MUX_3,
216*4882a593Smuzhiyun 		.demod_i2c_master = I2C_2,
217*4882a593Smuzhiyun 		.has_dvb = 1,
218*4882a593Smuzhiyun 		.demod_addr = 0x02,
219*4882a593Smuzhiyun 		.norm = V4L2_STD_PAL,
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 		.input = {{
222*4882a593Smuzhiyun 				.type = CX231XX_VMUX_TELEVISION,
223*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_3_1,
224*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_VIDEO,
225*4882a593Smuzhiyun 				.gpio = NULL,
226*4882a593Smuzhiyun 			}, {
227*4882a593Smuzhiyun 				.type = CX231XX_VMUX_COMPOSITE1,
228*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_2_1,
229*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_LINE_IN,
230*4882a593Smuzhiyun 				.gpio = NULL,
231*4882a593Smuzhiyun 			}, {
232*4882a593Smuzhiyun 				.type = CX231XX_VMUX_SVIDEO,
233*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_1_1 |
234*4882a593Smuzhiyun 					(CX231XX_VIN_1_2 << 8) |
235*4882a593Smuzhiyun 					CX25840_SVIDEO_ON,
236*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_LINE_IN,
237*4882a593Smuzhiyun 				.gpio = NULL,
238*4882a593Smuzhiyun 			}
239*4882a593Smuzhiyun 		},
240*4882a593Smuzhiyun 	},
241*4882a593Smuzhiyun 	[CX231XX_BOARD_CNXT_VIDEO_GRABBER] = {
242*4882a593Smuzhiyun 		.name = "Conexant VIDEO GRABBER",
243*4882a593Smuzhiyun 		.tuner_type = TUNER_ABSENT,
244*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
245*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
246*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
247*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x1c,
248*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
249*4882a593Smuzhiyun 		.norm = V4L2_STD_PAL,
250*4882a593Smuzhiyun 		.no_alt_vanc = 1,
251*4882a593Smuzhiyun 		.external_av = 1,
252*4882a593Smuzhiyun 		/* Actually, it has a 417, but it isn't working correctly.
253*4882a593Smuzhiyun 		 * So set to 0 for now until someone can manage to get this
254*4882a593Smuzhiyun 		 * to work reliably. */
255*4882a593Smuzhiyun 		.has_417 = 0,
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 		.input = {{
258*4882a593Smuzhiyun 				.type = CX231XX_VMUX_COMPOSITE1,
259*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_2_1,
260*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_LINE_IN,
261*4882a593Smuzhiyun 				.gpio = NULL,
262*4882a593Smuzhiyun 			}, {
263*4882a593Smuzhiyun 				.type = CX231XX_VMUX_SVIDEO,
264*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_1_1 |
265*4882a593Smuzhiyun 					(CX231XX_VIN_1_2 << 8) |
266*4882a593Smuzhiyun 					CX25840_SVIDEO_ON,
267*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_LINE_IN,
268*4882a593Smuzhiyun 				.gpio = NULL,
269*4882a593Smuzhiyun 			}
270*4882a593Smuzhiyun 		},
271*4882a593Smuzhiyun 	},
272*4882a593Smuzhiyun 	[CX231XX_BOARD_CNXT_RDE_250] = {
273*4882a593Smuzhiyun 		.name = "Conexant Hybrid TV - rde 250",
274*4882a593Smuzhiyun 		.tuner_type = TUNER_XC5000,
275*4882a593Smuzhiyun 		.tuner_addr = 0x61,
276*4882a593Smuzhiyun 		.tuner_gpio = RDE250_XCV_TUNER,
277*4882a593Smuzhiyun 		.tuner_sif_gpio = 0x05,
278*4882a593Smuzhiyun 		.tuner_scl_gpio = 0x1a,
279*4882a593Smuzhiyun 		.tuner_sda_gpio = 0x1b,
280*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
281*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
282*4882a593Smuzhiyun 		.demod_xfer_mode = 0,
283*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
284*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x0c,
285*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
286*4882a593Smuzhiyun 		.tuner_i2c_master = I2C_1_MUX_3,
287*4882a593Smuzhiyun 		.demod_i2c_master = I2C_2,
288*4882a593Smuzhiyun 		.has_dvb = 1,
289*4882a593Smuzhiyun 		.demod_addr = 0x02,
290*4882a593Smuzhiyun 		.norm = V4L2_STD_PAL,
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 		.input = {{
293*4882a593Smuzhiyun 				.type = CX231XX_VMUX_TELEVISION,
294*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_2_1,
295*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_VIDEO,
296*4882a593Smuzhiyun 				.gpio = NULL,
297*4882a593Smuzhiyun 			}
298*4882a593Smuzhiyun 		},
299*4882a593Smuzhiyun 	},
300*4882a593Smuzhiyun 	[CX231XX_BOARD_CNXT_RDU_250] = {
301*4882a593Smuzhiyun 		.name = "Conexant Hybrid TV - RDU 250",
302*4882a593Smuzhiyun 		.tuner_type = TUNER_XC5000,
303*4882a593Smuzhiyun 		.tuner_addr = 0x61,
304*4882a593Smuzhiyun 		.tuner_gpio = RDE250_XCV_TUNER,
305*4882a593Smuzhiyun 		.tuner_sif_gpio = 0x05,
306*4882a593Smuzhiyun 		.tuner_scl_gpio = 0x1a,
307*4882a593Smuzhiyun 		.tuner_sda_gpio = 0x1b,
308*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
309*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
310*4882a593Smuzhiyun 		.demod_xfer_mode = 0,
311*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
312*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x0c,
313*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
314*4882a593Smuzhiyun 		.tuner_i2c_master = I2C_1_MUX_3,
315*4882a593Smuzhiyun 		.demod_i2c_master = I2C_2,
316*4882a593Smuzhiyun 		.has_dvb = 1,
317*4882a593Smuzhiyun 		.demod_addr = 0x32,
318*4882a593Smuzhiyun 		.norm = V4L2_STD_NTSC,
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 		.input = {{
321*4882a593Smuzhiyun 				.type = CX231XX_VMUX_TELEVISION,
322*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_2_1,
323*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_VIDEO,
324*4882a593Smuzhiyun 				.gpio = NULL,
325*4882a593Smuzhiyun 			}
326*4882a593Smuzhiyun 		},
327*4882a593Smuzhiyun 	},
328*4882a593Smuzhiyun 	[CX231XX_BOARD_HAUPPAUGE_EXETER] = {
329*4882a593Smuzhiyun 		.name = "Hauppauge EXETER",
330*4882a593Smuzhiyun 		.tuner_type = TUNER_NXP_TDA18271,
331*4882a593Smuzhiyun 		.tuner_addr = 0x60,
332*4882a593Smuzhiyun 		.tuner_gpio = RDE250_XCV_TUNER,
333*4882a593Smuzhiyun 		.tuner_sif_gpio = 0x05,
334*4882a593Smuzhiyun 		.tuner_scl_gpio = 0x1a,
335*4882a593Smuzhiyun 		.tuner_sda_gpio = 0x1b,
336*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
337*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
338*4882a593Smuzhiyun 		.demod_xfer_mode = 0,
339*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
340*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x0c,
341*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
342*4882a593Smuzhiyun 		.tuner_i2c_master = I2C_1_MUX_1,
343*4882a593Smuzhiyun 		.demod_i2c_master = I2C_1_MUX_1,
344*4882a593Smuzhiyun 		.has_dvb = 1,
345*4882a593Smuzhiyun 		.demod_addr = 0x0e,
346*4882a593Smuzhiyun 		.norm = V4L2_STD_NTSC,
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun 		.input = {{
349*4882a593Smuzhiyun 			.type = CX231XX_VMUX_TELEVISION,
350*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_3_1,
351*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_VIDEO,
352*4882a593Smuzhiyun 			.gpio = NULL,
353*4882a593Smuzhiyun 		}, {
354*4882a593Smuzhiyun 			.type = CX231XX_VMUX_COMPOSITE1,
355*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_2_1,
356*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
357*4882a593Smuzhiyun 			.gpio = NULL,
358*4882a593Smuzhiyun 		}, {
359*4882a593Smuzhiyun 			.type = CX231XX_VMUX_SVIDEO,
360*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_1_1 |
361*4882a593Smuzhiyun 				(CX231XX_VIN_1_2 << 8) |
362*4882a593Smuzhiyun 				CX25840_SVIDEO_ON,
363*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
364*4882a593Smuzhiyun 			.gpio = NULL,
365*4882a593Smuzhiyun 		} },
366*4882a593Smuzhiyun 	},
367*4882a593Smuzhiyun 	[CX231XX_BOARD_HAUPPAUGE_USBLIVE2] = {
368*4882a593Smuzhiyun 		.name = "Hauppauge USB Live 2",
369*4882a593Smuzhiyun 		.tuner_type = TUNER_ABSENT,
370*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
371*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
372*4882a593Smuzhiyun 		.demod_xfer_mode = 0,
373*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
374*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x0c,
375*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
376*4882a593Smuzhiyun 		.norm = V4L2_STD_NTSC,
377*4882a593Smuzhiyun 		.no_alt_vanc = 1,
378*4882a593Smuzhiyun 		.external_av = 1,
379*4882a593Smuzhiyun 		.input = {{
380*4882a593Smuzhiyun 			.type = CX231XX_VMUX_COMPOSITE1,
381*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_2_1,
382*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
383*4882a593Smuzhiyun 			.gpio = NULL,
384*4882a593Smuzhiyun 		}, {
385*4882a593Smuzhiyun 			.type = CX231XX_VMUX_SVIDEO,
386*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_1_1 |
387*4882a593Smuzhiyun 				(CX231XX_VIN_1_2 << 8) |
388*4882a593Smuzhiyun 				CX25840_SVIDEO_ON,
389*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
390*4882a593Smuzhiyun 			.gpio = NULL,
391*4882a593Smuzhiyun 		} },
392*4882a593Smuzhiyun 	},
393*4882a593Smuzhiyun 	[CX231XX_BOARD_KWORLD_UB430_USB_HYBRID] = {
394*4882a593Smuzhiyun 		.name = "Kworld UB430 USB Hybrid",
395*4882a593Smuzhiyun 		.tuner_type = TUNER_NXP_TDA18271,
396*4882a593Smuzhiyun 		.tuner_addr = 0x60,
397*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
398*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
399*4882a593Smuzhiyun 		.demod_xfer_mode = 0,
400*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
401*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x11,	/* According with PV cxPolaris.inf file */
402*4882a593Smuzhiyun 		.tuner_sif_gpio = -1,
403*4882a593Smuzhiyun 		.tuner_scl_gpio = -1,
404*4882a593Smuzhiyun 		.tuner_sda_gpio = -1,
405*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
406*4882a593Smuzhiyun 		.tuner_i2c_master = I2C_2,
407*4882a593Smuzhiyun 		.demod_i2c_master = I2C_1_MUX_3,
408*4882a593Smuzhiyun 		.ir_i2c_master = I2C_2,
409*4882a593Smuzhiyun 		.has_dvb = 1,
410*4882a593Smuzhiyun 		.demod_addr = 0x10,
411*4882a593Smuzhiyun 		.norm = V4L2_STD_PAL_M,
412*4882a593Smuzhiyun 		.input = {{
413*4882a593Smuzhiyun 			.type = CX231XX_VMUX_TELEVISION,
414*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_3_1,
415*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_VIDEO,
416*4882a593Smuzhiyun 			.gpio = NULL,
417*4882a593Smuzhiyun 		}, {
418*4882a593Smuzhiyun 			.type = CX231XX_VMUX_COMPOSITE1,
419*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_2_1,
420*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
421*4882a593Smuzhiyun 			.gpio = NULL,
422*4882a593Smuzhiyun 		}, {
423*4882a593Smuzhiyun 			.type = CX231XX_VMUX_SVIDEO,
424*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_1_1 |
425*4882a593Smuzhiyun 				(CX231XX_VIN_1_2 << 8) |
426*4882a593Smuzhiyun 				CX25840_SVIDEO_ON,
427*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
428*4882a593Smuzhiyun 			.gpio = NULL,
429*4882a593Smuzhiyun 		} },
430*4882a593Smuzhiyun 	},
431*4882a593Smuzhiyun 	[CX231XX_BOARD_KWORLD_UB445_USB_HYBRID] = {
432*4882a593Smuzhiyun 		.name = "Kworld UB445 USB Hybrid",
433*4882a593Smuzhiyun 		.tuner_type = TUNER_NXP_TDA18271,
434*4882a593Smuzhiyun 		.tuner_addr = 0x60,
435*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
436*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
437*4882a593Smuzhiyun 		.demod_xfer_mode = 0,
438*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
439*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x11,	/* According with PV cxPolaris.inf file */
440*4882a593Smuzhiyun 		.tuner_sif_gpio = -1,
441*4882a593Smuzhiyun 		.tuner_scl_gpio = -1,
442*4882a593Smuzhiyun 		.tuner_sda_gpio = -1,
443*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
444*4882a593Smuzhiyun 		.tuner_i2c_master = I2C_2,
445*4882a593Smuzhiyun 		.demod_i2c_master = I2C_1_MUX_3,
446*4882a593Smuzhiyun 		.ir_i2c_master = I2C_2,
447*4882a593Smuzhiyun 		.has_dvb = 1,
448*4882a593Smuzhiyun 		.demod_addr = 0x10,
449*4882a593Smuzhiyun 		.norm = V4L2_STD_NTSC_M,
450*4882a593Smuzhiyun 		.input = {{
451*4882a593Smuzhiyun 			.type = CX231XX_VMUX_TELEVISION,
452*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_3_1,
453*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_VIDEO,
454*4882a593Smuzhiyun 			.gpio = NULL,
455*4882a593Smuzhiyun 		}, {
456*4882a593Smuzhiyun 			.type = CX231XX_VMUX_COMPOSITE1,
457*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_2_1,
458*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
459*4882a593Smuzhiyun 			.gpio = NULL,
460*4882a593Smuzhiyun 		}, {
461*4882a593Smuzhiyun 			.type = CX231XX_VMUX_SVIDEO,
462*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_1_1 |
463*4882a593Smuzhiyun 				(CX231XX_VIN_1_2 << 8) |
464*4882a593Smuzhiyun 				CX25840_SVIDEO_ON,
465*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
466*4882a593Smuzhiyun 			.gpio = NULL,
467*4882a593Smuzhiyun 		} },
468*4882a593Smuzhiyun 	},
469*4882a593Smuzhiyun 	[CX231XX_BOARD_PV_PLAYTV_USB_HYBRID] = {
470*4882a593Smuzhiyun 		.name = "Pixelview PlayTV USB Hybrid",
471*4882a593Smuzhiyun 		.tuner_type = TUNER_NXP_TDA18271,
472*4882a593Smuzhiyun 		.tuner_addr = 0x60,
473*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
474*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
475*4882a593Smuzhiyun 		.demod_xfer_mode = 0,
476*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
477*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x1c,
478*4882a593Smuzhiyun 		.tuner_sif_gpio = -1,
479*4882a593Smuzhiyun 		.tuner_scl_gpio = -1,
480*4882a593Smuzhiyun 		.tuner_sda_gpio = -1,
481*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
482*4882a593Smuzhiyun 		.tuner_i2c_master = I2C_2,
483*4882a593Smuzhiyun 		.demod_i2c_master = I2C_1_MUX_3,
484*4882a593Smuzhiyun 		.ir_i2c_master = I2C_2,
485*4882a593Smuzhiyun 		.rc_map_name = RC_MAP_PIXELVIEW_002T,
486*4882a593Smuzhiyun 		.has_dvb = 1,
487*4882a593Smuzhiyun 		.demod_addr = 0x10,
488*4882a593Smuzhiyun 		.norm = V4L2_STD_PAL_M,
489*4882a593Smuzhiyun 		.input = {{
490*4882a593Smuzhiyun 			.type = CX231XX_VMUX_TELEVISION,
491*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_3_1,
492*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_VIDEO,
493*4882a593Smuzhiyun 			.gpio = NULL,
494*4882a593Smuzhiyun 		}, {
495*4882a593Smuzhiyun 			.type = CX231XX_VMUX_COMPOSITE1,
496*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_2_1,
497*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
498*4882a593Smuzhiyun 			.gpio = NULL,
499*4882a593Smuzhiyun 		}, {
500*4882a593Smuzhiyun 			.type = CX231XX_VMUX_SVIDEO,
501*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_1_1 |
502*4882a593Smuzhiyun 				(CX231XX_VIN_1_2 << 8) |
503*4882a593Smuzhiyun 				CX25840_SVIDEO_ON,
504*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
505*4882a593Smuzhiyun 			.gpio = NULL,
506*4882a593Smuzhiyun 		} },
507*4882a593Smuzhiyun 	},
508*4882a593Smuzhiyun 	[CX231XX_BOARD_PV_XCAPTURE_USB] = {
509*4882a593Smuzhiyun 		.name = "Pixelview Xcapture USB",
510*4882a593Smuzhiyun 		.tuner_type = TUNER_ABSENT,
511*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
512*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
513*4882a593Smuzhiyun 		.demod_xfer_mode = 0,
514*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
515*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x0c,
516*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
517*4882a593Smuzhiyun 		.norm = V4L2_STD_NTSC,
518*4882a593Smuzhiyun 		.no_alt_vanc = 1,
519*4882a593Smuzhiyun 		.external_av = 1,
520*4882a593Smuzhiyun 
521*4882a593Smuzhiyun 		.input = {{
522*4882a593Smuzhiyun 				.type = CX231XX_VMUX_COMPOSITE1,
523*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_2_1,
524*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_LINE_IN,
525*4882a593Smuzhiyun 				.gpio = NULL,
526*4882a593Smuzhiyun 			}, {
527*4882a593Smuzhiyun 				.type = CX231XX_VMUX_SVIDEO,
528*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_1_1 |
529*4882a593Smuzhiyun 					(CX231XX_VIN_1_2 << 8) |
530*4882a593Smuzhiyun 					CX25840_SVIDEO_ON,
531*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_LINE_IN,
532*4882a593Smuzhiyun 				.gpio = NULL,
533*4882a593Smuzhiyun 			}
534*4882a593Smuzhiyun 		},
535*4882a593Smuzhiyun 	},
536*4882a593Smuzhiyun 
537*4882a593Smuzhiyun 	[CX231XX_BOARD_ICONBIT_U100] = {
538*4882a593Smuzhiyun 		.name = "Iconbit Analog Stick U100 FM",
539*4882a593Smuzhiyun 		.tuner_type = TUNER_ABSENT,
540*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
541*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
542*4882a593Smuzhiyun 		.demod_xfer_mode = 0,
543*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
544*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x1C,
545*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
546*4882a593Smuzhiyun 
547*4882a593Smuzhiyun 		.input = {{
548*4882a593Smuzhiyun 			.type = CX231XX_VMUX_COMPOSITE1,
549*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_2_1,
550*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
551*4882a593Smuzhiyun 			.gpio = NULL,
552*4882a593Smuzhiyun 		}, {
553*4882a593Smuzhiyun 			.type = CX231XX_VMUX_SVIDEO,
554*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_1_1 |
555*4882a593Smuzhiyun 				(CX231XX_VIN_1_2 << 8) |
556*4882a593Smuzhiyun 				CX25840_SVIDEO_ON,
557*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
558*4882a593Smuzhiyun 			.gpio = NULL,
559*4882a593Smuzhiyun 		} },
560*4882a593Smuzhiyun 	},
561*4882a593Smuzhiyun 	[CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL] = {
562*4882a593Smuzhiyun 		.name = "Hauppauge WinTV USB2 FM (PAL)",
563*4882a593Smuzhiyun 		.tuner_type = TUNER_NXP_TDA18271,
564*4882a593Smuzhiyun 		.tuner_addr = 0x60,
565*4882a593Smuzhiyun 		.tuner_gpio = RDE250_XCV_TUNER,
566*4882a593Smuzhiyun 		.tuner_sif_gpio = 0x05,
567*4882a593Smuzhiyun 		.tuner_scl_gpio = 0x1a,
568*4882a593Smuzhiyun 		.tuner_sda_gpio = 0x1b,
569*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
570*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
571*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
572*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x0c,
573*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
574*4882a593Smuzhiyun 		.tuner_i2c_master = I2C_1_MUX_3,
575*4882a593Smuzhiyun 		.norm = V4L2_STD_PAL,
576*4882a593Smuzhiyun 
577*4882a593Smuzhiyun 		.input = {{
578*4882a593Smuzhiyun 			.type = CX231XX_VMUX_TELEVISION,
579*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_3_1,
580*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_VIDEO,
581*4882a593Smuzhiyun 			.gpio = NULL,
582*4882a593Smuzhiyun 		}, {
583*4882a593Smuzhiyun 			.type = CX231XX_VMUX_COMPOSITE1,
584*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_2_1,
585*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
586*4882a593Smuzhiyun 			.gpio = NULL,
587*4882a593Smuzhiyun 		}, {
588*4882a593Smuzhiyun 			.type = CX231XX_VMUX_SVIDEO,
589*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_1_1 |
590*4882a593Smuzhiyun 				(CX231XX_VIN_1_2 << 8) |
591*4882a593Smuzhiyun 				CX25840_SVIDEO_ON,
592*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
593*4882a593Smuzhiyun 			.gpio = NULL,
594*4882a593Smuzhiyun 		} },
595*4882a593Smuzhiyun 	},
596*4882a593Smuzhiyun 	[CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC] = {
597*4882a593Smuzhiyun 		.name = "Hauppauge WinTV USB2 FM (NTSC)",
598*4882a593Smuzhiyun 		.tuner_type = TUNER_NXP_TDA18271,
599*4882a593Smuzhiyun 		.tuner_addr = 0x60,
600*4882a593Smuzhiyun 		.tuner_gpio = RDE250_XCV_TUNER,
601*4882a593Smuzhiyun 		.tuner_sif_gpio = 0x05,
602*4882a593Smuzhiyun 		.tuner_scl_gpio = 0x1a,
603*4882a593Smuzhiyun 		.tuner_sda_gpio = 0x1b,
604*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
605*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
606*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
607*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x0c,
608*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
609*4882a593Smuzhiyun 		.tuner_i2c_master = I2C_1_MUX_3,
610*4882a593Smuzhiyun 		.norm = V4L2_STD_NTSC,
611*4882a593Smuzhiyun 
612*4882a593Smuzhiyun 		.input = {{
613*4882a593Smuzhiyun 			.type = CX231XX_VMUX_TELEVISION,
614*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_3_1,
615*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_VIDEO,
616*4882a593Smuzhiyun 			.gpio = NULL,
617*4882a593Smuzhiyun 		}, {
618*4882a593Smuzhiyun 			.type = CX231XX_VMUX_COMPOSITE1,
619*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_2_1,
620*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
621*4882a593Smuzhiyun 			.gpio = NULL,
622*4882a593Smuzhiyun 		}, {
623*4882a593Smuzhiyun 			.type = CX231XX_VMUX_SVIDEO,
624*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_1_1 |
625*4882a593Smuzhiyun 				(CX231XX_VIN_1_2 << 8) |
626*4882a593Smuzhiyun 				CX25840_SVIDEO_ON,
627*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
628*4882a593Smuzhiyun 			.gpio = NULL,
629*4882a593Smuzhiyun 		} },
630*4882a593Smuzhiyun 	},
631*4882a593Smuzhiyun 	[CX231XX_BOARD_ELGATO_VIDEO_CAPTURE_V2] = {
632*4882a593Smuzhiyun 		.name = "Elgato Video Capture V2",
633*4882a593Smuzhiyun 		.tuner_type = TUNER_ABSENT,
634*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
635*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
636*4882a593Smuzhiyun 		.demod_xfer_mode = 0,
637*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
638*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x0c,
639*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
640*4882a593Smuzhiyun 		.norm = V4L2_STD_NTSC,
641*4882a593Smuzhiyun 		.no_alt_vanc = 1,
642*4882a593Smuzhiyun 		.external_av = 1,
643*4882a593Smuzhiyun 		.input = {{
644*4882a593Smuzhiyun 			.type = CX231XX_VMUX_COMPOSITE1,
645*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_2_1,
646*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
647*4882a593Smuzhiyun 			.gpio = NULL,
648*4882a593Smuzhiyun 		}, {
649*4882a593Smuzhiyun 			.type = CX231XX_VMUX_SVIDEO,
650*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_1_1 |
651*4882a593Smuzhiyun 				(CX231XX_VIN_1_2 << 8) |
652*4882a593Smuzhiyun 				CX25840_SVIDEO_ON,
653*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
654*4882a593Smuzhiyun 			.gpio = NULL,
655*4882a593Smuzhiyun 		} },
656*4882a593Smuzhiyun 	},
657*4882a593Smuzhiyun 	[CX231XX_BOARD_OTG102] = {
658*4882a593Smuzhiyun 		.name = "Geniatech OTG102",
659*4882a593Smuzhiyun 		.tuner_type = TUNER_ABSENT,
660*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
661*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
662*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
663*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x0c,
664*4882a593Smuzhiyun 			/* According with PV CxPlrCAP.inf file */
665*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
666*4882a593Smuzhiyun 		.norm = V4L2_STD_NTSC,
667*4882a593Smuzhiyun 		.no_alt_vanc = 1,
668*4882a593Smuzhiyun 		.external_av = 1,
669*4882a593Smuzhiyun 		/*.has_417 = 1, */
670*4882a593Smuzhiyun 		/* This board is believed to have a hardware encoding chip
671*4882a593Smuzhiyun 		 * supporting mpeg1/2/4, but as the 417 is apparently not
672*4882a593Smuzhiyun 		 * working for the reference board it is not here either. */
673*4882a593Smuzhiyun 
674*4882a593Smuzhiyun 		.input = {{
675*4882a593Smuzhiyun 				.type = CX231XX_VMUX_COMPOSITE1,
676*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_2_1,
677*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_LINE_IN,
678*4882a593Smuzhiyun 				.gpio = NULL,
679*4882a593Smuzhiyun 			}, {
680*4882a593Smuzhiyun 				.type = CX231XX_VMUX_SVIDEO,
681*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_1_1 |
682*4882a593Smuzhiyun 					(CX231XX_VIN_1_2 << 8) |
683*4882a593Smuzhiyun 					CX25840_SVIDEO_ON,
684*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_LINE_IN,
685*4882a593Smuzhiyun 				.gpio = NULL,
686*4882a593Smuzhiyun 			}
687*4882a593Smuzhiyun 		},
688*4882a593Smuzhiyun 	},
689*4882a593Smuzhiyun 	[CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx] = {
690*4882a593Smuzhiyun 		.name = "Hauppauge WinTV 930C-HD (1113xx) / HVR-900H (111xxx) / PCTV QuatroStick 521e",
691*4882a593Smuzhiyun 		.tuner_type = TUNER_NXP_TDA18271,
692*4882a593Smuzhiyun 		.tuner_addr = 0x60,
693*4882a593Smuzhiyun 		.tuner_gpio = RDE250_XCV_TUNER,
694*4882a593Smuzhiyun 		.tuner_sif_gpio = 0x05,
695*4882a593Smuzhiyun 		.tuner_scl_gpio = 0x1a,
696*4882a593Smuzhiyun 		.tuner_sda_gpio = 0x1b,
697*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
698*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
699*4882a593Smuzhiyun 		.demod_xfer_mode = 0,
700*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
701*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x0c,
702*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
703*4882a593Smuzhiyun 		.tuner_i2c_master = I2C_1_MUX_3,
704*4882a593Smuzhiyun 		.demod_i2c_master = I2C_1_MUX_3,
705*4882a593Smuzhiyun 		.has_dvb = 1,
706*4882a593Smuzhiyun 		.demod_addr = 0x64, /* 0xc8 >> 1 */
707*4882a593Smuzhiyun 		.norm = V4L2_STD_PAL,
708*4882a593Smuzhiyun 
709*4882a593Smuzhiyun 		.input = {{
710*4882a593Smuzhiyun 			.type = CX231XX_VMUX_TELEVISION,
711*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_3_1,
712*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_VIDEO,
713*4882a593Smuzhiyun 			.gpio = NULL,
714*4882a593Smuzhiyun 		}, {
715*4882a593Smuzhiyun 			.type = CX231XX_VMUX_COMPOSITE1,
716*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_2_1,
717*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
718*4882a593Smuzhiyun 			.gpio = NULL,
719*4882a593Smuzhiyun 		}, {
720*4882a593Smuzhiyun 			.type = CX231XX_VMUX_SVIDEO,
721*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_1_1 |
722*4882a593Smuzhiyun 				(CX231XX_VIN_1_2 << 8) |
723*4882a593Smuzhiyun 				CX25840_SVIDEO_ON,
724*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
725*4882a593Smuzhiyun 			.gpio = NULL,
726*4882a593Smuzhiyun 		} },
727*4882a593Smuzhiyun 	},
728*4882a593Smuzhiyun 	[CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx] = {
729*4882a593Smuzhiyun 		.name = "Hauppauge WinTV 930C-HD (1114xx) / HVR-901H (1114xx) / PCTV QuatroStick 522e",
730*4882a593Smuzhiyun 		.tuner_type = TUNER_ABSENT,
731*4882a593Smuzhiyun 		.tuner_addr = 0x60,
732*4882a593Smuzhiyun 		.tuner_gpio = RDE250_XCV_TUNER,
733*4882a593Smuzhiyun 		.tuner_sif_gpio = 0x05,
734*4882a593Smuzhiyun 		.tuner_scl_gpio = 0x1a,
735*4882a593Smuzhiyun 		.tuner_sda_gpio = 0x1b,
736*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
737*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
738*4882a593Smuzhiyun 		.demod_xfer_mode = 0,
739*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
740*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x0c,
741*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
742*4882a593Smuzhiyun 		.tuner_i2c_master = I2C_1_MUX_3,
743*4882a593Smuzhiyun 		.demod_i2c_master = I2C_1_MUX_3,
744*4882a593Smuzhiyun 		.has_dvb = 1,
745*4882a593Smuzhiyun 		.demod_addr = 0x64, /* 0xc8 >> 1 */
746*4882a593Smuzhiyun 		.norm = V4L2_STD_PAL,
747*4882a593Smuzhiyun 
748*4882a593Smuzhiyun 		.input = {{
749*4882a593Smuzhiyun 			.type = CX231XX_VMUX_TELEVISION,
750*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_3_1,
751*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_VIDEO,
752*4882a593Smuzhiyun 			.gpio = NULL,
753*4882a593Smuzhiyun 		}, {
754*4882a593Smuzhiyun 			.type = CX231XX_VMUX_COMPOSITE1,
755*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_2_1,
756*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
757*4882a593Smuzhiyun 			.gpio = NULL,
758*4882a593Smuzhiyun 		}, {
759*4882a593Smuzhiyun 			.type = CX231XX_VMUX_SVIDEO,
760*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_1_1 |
761*4882a593Smuzhiyun 				(CX231XX_VIN_1_2 << 8) |
762*4882a593Smuzhiyun 				CX25840_SVIDEO_ON,
763*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
764*4882a593Smuzhiyun 			.gpio = NULL,
765*4882a593Smuzhiyun 		} },
766*4882a593Smuzhiyun 	},
767*4882a593Smuzhiyun 	[CX231XX_BOARD_HAUPPAUGE_955Q] = {
768*4882a593Smuzhiyun 		.name = "Hauppauge WinTV-HVR-955Q (111401)",
769*4882a593Smuzhiyun 		.tuner_type = TUNER_ABSENT,
770*4882a593Smuzhiyun 		.tuner_addr = 0x60,
771*4882a593Smuzhiyun 		.tuner_gpio = RDE250_XCV_TUNER,
772*4882a593Smuzhiyun 		.tuner_sif_gpio = 0x05,
773*4882a593Smuzhiyun 		.tuner_scl_gpio = 0x1a,
774*4882a593Smuzhiyun 		.tuner_sda_gpio = 0x1b,
775*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
776*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
777*4882a593Smuzhiyun 		.demod_xfer_mode = 0,
778*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
779*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x0c,
780*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
781*4882a593Smuzhiyun 		.tuner_i2c_master = I2C_1_MUX_3,
782*4882a593Smuzhiyun 		.demod_i2c_master = I2C_1_MUX_3,
783*4882a593Smuzhiyun 		.has_dvb = 1,
784*4882a593Smuzhiyun 		.demod_addr = 0x59, /* 0xb2 >> 1 */
785*4882a593Smuzhiyun 		.norm = V4L2_STD_NTSC,
786*4882a593Smuzhiyun 
787*4882a593Smuzhiyun 		.input = {{
788*4882a593Smuzhiyun 			.type = CX231XX_VMUX_TELEVISION,
789*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_3_1,
790*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_VIDEO,
791*4882a593Smuzhiyun 			.gpio = NULL,
792*4882a593Smuzhiyun 		}, {
793*4882a593Smuzhiyun 			.type = CX231XX_VMUX_COMPOSITE1,
794*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_2_1,
795*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
796*4882a593Smuzhiyun 			.gpio = NULL,
797*4882a593Smuzhiyun 		}, {
798*4882a593Smuzhiyun 			.type = CX231XX_VMUX_SVIDEO,
799*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_1_1 |
800*4882a593Smuzhiyun 				(CX231XX_VIN_1_2 << 8) |
801*4882a593Smuzhiyun 				CX25840_SVIDEO_ON,
802*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
803*4882a593Smuzhiyun 			.gpio = NULL,
804*4882a593Smuzhiyun 		} },
805*4882a593Smuzhiyun 	},
806*4882a593Smuzhiyun 	[CX231XX_BOARD_TERRATEC_GRABBY] = {
807*4882a593Smuzhiyun 		.name = "Terratec Grabby",
808*4882a593Smuzhiyun 		.tuner_type = TUNER_ABSENT,
809*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
810*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
811*4882a593Smuzhiyun 		.demod_xfer_mode = 0,
812*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
813*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x0c,
814*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
815*4882a593Smuzhiyun 		.norm = V4L2_STD_PAL,
816*4882a593Smuzhiyun 		.no_alt_vanc = 1,
817*4882a593Smuzhiyun 		.external_av = 1,
818*4882a593Smuzhiyun 		.input = {{
819*4882a593Smuzhiyun 			.type = CX231XX_VMUX_COMPOSITE1,
820*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_2_1,
821*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
822*4882a593Smuzhiyun 			.gpio = NULL,
823*4882a593Smuzhiyun 		}, {
824*4882a593Smuzhiyun 			.type = CX231XX_VMUX_SVIDEO,
825*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_1_1 |
826*4882a593Smuzhiyun 				(CX231XX_VIN_1_2 << 8) |
827*4882a593Smuzhiyun 				CX25840_SVIDEO_ON,
828*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
829*4882a593Smuzhiyun 			.gpio = NULL,
830*4882a593Smuzhiyun 		} },
831*4882a593Smuzhiyun 	},
832*4882a593Smuzhiyun 	[CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD] = {
833*4882a593Smuzhiyun 		.name = "Evromedia USB Full Hybrid Full HD",
834*4882a593Smuzhiyun 		.tuner_type = TUNER_ABSENT,
835*4882a593Smuzhiyun 		.demod_addr = 0x64, /* 0xc8 >> 1 */
836*4882a593Smuzhiyun 		.demod_i2c_master = I2C_1_MUX_3,
837*4882a593Smuzhiyun 		.has_dvb = 1,
838*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
839*4882a593Smuzhiyun 		.norm = V4L2_STD_PAL,
840*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
841*4882a593Smuzhiyun 		.tuner_addr = 0x60, /* 0xc0 >> 1 */
842*4882a593Smuzhiyun 		.tuner_i2c_master = I2C_2,
843*4882a593Smuzhiyun 		.input = {{
844*4882a593Smuzhiyun 			.type = CX231XX_VMUX_TELEVISION,
845*4882a593Smuzhiyun 			.vmux = 0,
846*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_VIDEO,
847*4882a593Smuzhiyun 		}, {
848*4882a593Smuzhiyun 			.type = CX231XX_VMUX_COMPOSITE1,
849*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_2_1,
850*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
851*4882a593Smuzhiyun 		}, {
852*4882a593Smuzhiyun 			.type = CX231XX_VMUX_SVIDEO,
853*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_1_1 |
854*4882a593Smuzhiyun 				(CX231XX_VIN_1_2 << 8) |
855*4882a593Smuzhiyun 				CX25840_SVIDEO_ON,
856*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
857*4882a593Smuzhiyun 		} },
858*4882a593Smuzhiyun 	},
859*4882a593Smuzhiyun 	[CX231XX_BOARD_ASTROMETA_T2HYBRID] = {
860*4882a593Smuzhiyun 		.name = "Astrometa T2hybrid",
861*4882a593Smuzhiyun 		.tuner_type = TUNER_ABSENT,
862*4882a593Smuzhiyun 		.has_dvb = 1,
863*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
864*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
865*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x01,
866*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xffffffc4,
867*4882a593Smuzhiyun 		.demod_addr = 0x18, /* 0x30 >> 1 */
868*4882a593Smuzhiyun 		.demod_i2c_master = I2C_1_MUX_1,
869*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0xa,
870*4882a593Smuzhiyun 		.norm = V4L2_STD_NTSC,
871*4882a593Smuzhiyun 		.tuner_addr = 0x3a, /* 0x74 >> 1 */
872*4882a593Smuzhiyun 		.tuner_i2c_master = I2C_1_MUX_3,
873*4882a593Smuzhiyun 		.tuner_scl_gpio = 0x1a,
874*4882a593Smuzhiyun 		.tuner_sda_gpio = 0x1b,
875*4882a593Smuzhiyun 		.tuner_sif_gpio = 0x05,
876*4882a593Smuzhiyun 		.input = {{
877*4882a593Smuzhiyun 				.type = CX231XX_VMUX_TELEVISION,
878*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_1_1,
879*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_VIDEO,
880*4882a593Smuzhiyun 			}, {
881*4882a593Smuzhiyun 				.type = CX231XX_VMUX_COMPOSITE1,
882*4882a593Smuzhiyun 				.vmux = CX231XX_VIN_2_1,
883*4882a593Smuzhiyun 				.amux = CX231XX_AMUX_LINE_IN,
884*4882a593Smuzhiyun 			},
885*4882a593Smuzhiyun 		},
886*4882a593Smuzhiyun 	},
887*4882a593Smuzhiyun 	[CX231XX_BOARD_THE_IMAGING_SOURCE_DFG_USB2_PRO] = {
888*4882a593Smuzhiyun 		.name = "The Imaging Source DFG/USB2pro",
889*4882a593Smuzhiyun 		.tuner_type = TUNER_ABSENT,
890*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
891*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
892*4882a593Smuzhiyun 		.demod_xfer_mode = 0,
893*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
894*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x0c,
895*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
896*4882a593Smuzhiyun 		.norm = V4L2_STD_PAL,
897*4882a593Smuzhiyun 		.no_alt_vanc = 1,
898*4882a593Smuzhiyun 		.external_av = 1,
899*4882a593Smuzhiyun 		.input = {{
900*4882a593Smuzhiyun 			.type = CX231XX_VMUX_COMPOSITE1,
901*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_1_1,
902*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
903*4882a593Smuzhiyun 			.gpio = NULL,
904*4882a593Smuzhiyun 		}, {
905*4882a593Smuzhiyun 			.type = CX231XX_VMUX_SVIDEO,
906*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_2_1 |
907*4882a593Smuzhiyun 				(CX231XX_VIN_2_2 << 8) |
908*4882a593Smuzhiyun 				CX25840_SVIDEO_ON,
909*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
910*4882a593Smuzhiyun 			.gpio = NULL,
911*4882a593Smuzhiyun 		} },
912*4882a593Smuzhiyun 	},
913*4882a593Smuzhiyun 	[CX231XX_BOARD_HAUPPAUGE_935C] = {
914*4882a593Smuzhiyun 		.name = "Hauppauge WinTV-HVR-935C",
915*4882a593Smuzhiyun 		.tuner_type = TUNER_ABSENT,
916*4882a593Smuzhiyun 		.tuner_addr = 0x60,
917*4882a593Smuzhiyun 		.tuner_gpio = RDE250_XCV_TUNER,
918*4882a593Smuzhiyun 		.tuner_sif_gpio = 0x05,
919*4882a593Smuzhiyun 		.tuner_scl_gpio = 0x1a,
920*4882a593Smuzhiyun 		.tuner_sda_gpio = 0x1b,
921*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
922*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
923*4882a593Smuzhiyun 		.demod_xfer_mode = 0,
924*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
925*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x0c,
926*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
927*4882a593Smuzhiyun 		.tuner_i2c_master = I2C_1_MUX_3,
928*4882a593Smuzhiyun 		.demod_i2c_master = I2C_1_MUX_3,
929*4882a593Smuzhiyun 		.has_dvb = 1,
930*4882a593Smuzhiyun 		.demod_addr = 0x64, /* 0xc8 >> 1 */
931*4882a593Smuzhiyun 		.norm = V4L2_STD_PAL,
932*4882a593Smuzhiyun 
933*4882a593Smuzhiyun 		.input = {{
934*4882a593Smuzhiyun 			.type = CX231XX_VMUX_TELEVISION,
935*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_3_1,
936*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_VIDEO,
937*4882a593Smuzhiyun 			.gpio = NULL,
938*4882a593Smuzhiyun 		}, {
939*4882a593Smuzhiyun 			.type = CX231XX_VMUX_COMPOSITE1,
940*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_2_1,
941*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
942*4882a593Smuzhiyun 			.gpio = NULL,
943*4882a593Smuzhiyun 		}, {
944*4882a593Smuzhiyun 			.type = CX231XX_VMUX_SVIDEO,
945*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_1_1 |
946*4882a593Smuzhiyun 				(CX231XX_VIN_1_2 << 8) |
947*4882a593Smuzhiyun 				CX25840_SVIDEO_ON,
948*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
949*4882a593Smuzhiyun 			.gpio = NULL,
950*4882a593Smuzhiyun 		} },
951*4882a593Smuzhiyun 	},
952*4882a593Smuzhiyun 	[CX231XX_BOARD_HAUPPAUGE_975] = {
953*4882a593Smuzhiyun 		.name = "Hauppauge WinTV-HVR-975",
954*4882a593Smuzhiyun 		.tuner_type = TUNER_ABSENT,
955*4882a593Smuzhiyun 		.tuner_addr = 0x60,
956*4882a593Smuzhiyun 		.tuner_gpio = RDE250_XCV_TUNER,
957*4882a593Smuzhiyun 		.tuner_sif_gpio = 0x05,
958*4882a593Smuzhiyun 		.tuner_scl_gpio = 0x1a,
959*4882a593Smuzhiyun 		.tuner_sda_gpio = 0x1b,
960*4882a593Smuzhiyun 		.decoder = CX231XX_AVDECODER,
961*4882a593Smuzhiyun 		.output_mode = OUT_MODE_VIP11,
962*4882a593Smuzhiyun 		.demod_xfer_mode = 0,
963*4882a593Smuzhiyun 		.ctl_pin_status_mask = 0xFFFFFFC4,
964*4882a593Smuzhiyun 		.agc_analog_digital_select_gpio = 0x0c,
965*4882a593Smuzhiyun 		.gpio_pin_status_mask = 0x4001000,
966*4882a593Smuzhiyun 		.tuner_i2c_master = I2C_1_MUX_3,
967*4882a593Smuzhiyun 		.demod_i2c_master = I2C_1_MUX_3,
968*4882a593Smuzhiyun 		.has_dvb = 1,
969*4882a593Smuzhiyun 		.demod_addr = 0x59, /* 0xb2 >> 1 */
970*4882a593Smuzhiyun 		.demod_addr2 = 0x64, /* 0xc8 >> 1 */
971*4882a593Smuzhiyun 		.norm = V4L2_STD_ALL,
972*4882a593Smuzhiyun 
973*4882a593Smuzhiyun 		.input = {{
974*4882a593Smuzhiyun 			.type = CX231XX_VMUX_TELEVISION,
975*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_3_1,
976*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_VIDEO,
977*4882a593Smuzhiyun 			.gpio = NULL,
978*4882a593Smuzhiyun 		}, {
979*4882a593Smuzhiyun 			.type = CX231XX_VMUX_COMPOSITE1,
980*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_2_1,
981*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
982*4882a593Smuzhiyun 			.gpio = NULL,
983*4882a593Smuzhiyun 		}, {
984*4882a593Smuzhiyun 			.type = CX231XX_VMUX_SVIDEO,
985*4882a593Smuzhiyun 			.vmux = CX231XX_VIN_1_1 |
986*4882a593Smuzhiyun 				(CX231XX_VIN_1_2 << 8) |
987*4882a593Smuzhiyun 				CX25840_SVIDEO_ON,
988*4882a593Smuzhiyun 			.amux = CX231XX_AMUX_LINE_IN,
989*4882a593Smuzhiyun 			.gpio = NULL,
990*4882a593Smuzhiyun 		} },
991*4882a593Smuzhiyun 	},
992*4882a593Smuzhiyun };
993*4882a593Smuzhiyun const unsigned int cx231xx_bcount = ARRAY_SIZE(cx231xx_boards);
994*4882a593Smuzhiyun 
995*4882a593Smuzhiyun /* table of devices that work with this driver */
996*4882a593Smuzhiyun struct usb_device_id cx231xx_id_table[] = {
997*4882a593Smuzhiyun 	{USB_DEVICE(0x1D19, 0x6109),
998*4882a593Smuzhiyun 	.driver_info = CX231XX_BOARD_PV_XCAPTURE_USB},
999*4882a593Smuzhiyun 	{USB_DEVICE(0x0572, 0x5A3C),
1000*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_UNKNOWN},
1001*4882a593Smuzhiyun 	{USB_DEVICE(0x0572, 0x58A2),
1002*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_CNXT_CARRAERA},
1003*4882a593Smuzhiyun 	{USB_DEVICE(0x0572, 0x58A1),
1004*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_CNXT_SHELBY},
1005*4882a593Smuzhiyun 	{USB_DEVICE(0x0572, 0x58A4),
1006*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_CNXT_RDE_253S},
1007*4882a593Smuzhiyun 	{USB_DEVICE(0x0572, 0x58A5),
1008*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_CNXT_RDU_253S},
1009*4882a593Smuzhiyun 	{USB_DEVICE(0x0572, 0x58A6),
1010*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_CNXT_VIDEO_GRABBER},
1011*4882a593Smuzhiyun 	{USB_DEVICE(0x0572, 0x589E),
1012*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_CNXT_RDE_250},
1013*4882a593Smuzhiyun 	{USB_DEVICE(0x0572, 0x58A0),
1014*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_CNXT_RDU_250},
1015*4882a593Smuzhiyun 	/* AverMedia DVD EZMaker 7 */
1016*4882a593Smuzhiyun 	{USB_DEVICE(0x07ca, 0xc039),
1017*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_CNXT_VIDEO_GRABBER},
1018*4882a593Smuzhiyun 	{USB_DEVICE(0x2040, 0xb110),
1019*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL},
1020*4882a593Smuzhiyun 	{USB_DEVICE(0x2040, 0xb111),
1021*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC},
1022*4882a593Smuzhiyun 	{USB_DEVICE(0x2040, 0xb120),
1023*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_HAUPPAUGE_EXETER},
1024*4882a593Smuzhiyun 	{USB_DEVICE(0x2040, 0xb123),
1025*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_HAUPPAUGE_955Q},
1026*4882a593Smuzhiyun 	{USB_DEVICE(0x2040, 0xb124),
1027*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_HAUPPAUGE_955Q},
1028*4882a593Smuzhiyun 	{USB_DEVICE(0x2040, 0xb151),
1029*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_HAUPPAUGE_935C},
1030*4882a593Smuzhiyun 	{USB_DEVICE(0x2040, 0xb150),
1031*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_HAUPPAUGE_975},
1032*4882a593Smuzhiyun 	{USB_DEVICE(0x2040, 0xb130),
1033*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx},
1034*4882a593Smuzhiyun 	{USB_DEVICE(0x2040, 0xb131),
1035*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx},
1036*4882a593Smuzhiyun 	/* Hauppauge WinTV-HVR-900-H */
1037*4882a593Smuzhiyun 	{USB_DEVICE(0x2040, 0xb138),
1038*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx},
1039*4882a593Smuzhiyun 	/* Hauppauge WinTV-HVR-901-H */
1040*4882a593Smuzhiyun 	{USB_DEVICE(0x2040, 0xb139),
1041*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx},
1042*4882a593Smuzhiyun 	{USB_DEVICE(0x2040, 0xb140),
1043*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_HAUPPAUGE_EXETER},
1044*4882a593Smuzhiyun 	{USB_DEVICE(0x2040, 0xc200),
1045*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_HAUPPAUGE_USBLIVE2},
1046*4882a593Smuzhiyun 	/* PCTV QuatroStick 521e */
1047*4882a593Smuzhiyun 	{USB_DEVICE(0x2013, 0x0259),
1048*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx},
1049*4882a593Smuzhiyun 	/* PCTV QuatroStick 522e */
1050*4882a593Smuzhiyun 	{USB_DEVICE(0x2013, 0x025e),
1051*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx},
1052*4882a593Smuzhiyun 	{USB_DEVICE_VER(USB_VID_PIXELVIEW, USB_PID_PIXELVIEW_SBTVD, 0x4000, 0x4001),
1053*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_PV_PLAYTV_USB_HYBRID},
1054*4882a593Smuzhiyun 	{USB_DEVICE(USB_VID_PIXELVIEW, 0x5014),
1055*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_PV_XCAPTURE_USB},
1056*4882a593Smuzhiyun 	{USB_DEVICE(0x1b80, 0xe424),
1057*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_KWORLD_UB430_USB_HYBRID},
1058*4882a593Smuzhiyun 	{USB_DEVICE(0x1b80, 0xe421),
1059*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_KWORLD_UB445_USB_HYBRID},
1060*4882a593Smuzhiyun 	{USB_DEVICE(0x1f4d, 0x0237),
1061*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_ICONBIT_U100},
1062*4882a593Smuzhiyun 	{USB_DEVICE(0x0fd9, 0x0037),
1063*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_ELGATO_VIDEO_CAPTURE_V2},
1064*4882a593Smuzhiyun 	{USB_DEVICE(0x1f4d, 0x0102),
1065*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_OTG102},
1066*4882a593Smuzhiyun 	{USB_DEVICE(USB_VID_TERRATEC, 0x00a6),
1067*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_TERRATEC_GRABBY},
1068*4882a593Smuzhiyun 	{USB_DEVICE(0x1b80, 0xd3b2),
1069*4882a593Smuzhiyun 	.driver_info = CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD},
1070*4882a593Smuzhiyun 	{USB_DEVICE(0x15f4, 0x0135),
1071*4882a593Smuzhiyun 	.driver_info = CX231XX_BOARD_ASTROMETA_T2HYBRID},
1072*4882a593Smuzhiyun 	{USB_DEVICE(0x199e, 0x8002),
1073*4882a593Smuzhiyun 	 .driver_info = CX231XX_BOARD_THE_IMAGING_SOURCE_DFG_USB2_PRO},
1074*4882a593Smuzhiyun 	{},
1075*4882a593Smuzhiyun };
1076*4882a593Smuzhiyun 
1077*4882a593Smuzhiyun MODULE_DEVICE_TABLE(usb, cx231xx_id_table);
1078*4882a593Smuzhiyun 
1079*4882a593Smuzhiyun /* cx231xx_tuner_callback
1080*4882a593Smuzhiyun  * will be used to reset XC5000 tuner using GPIO pin
1081*4882a593Smuzhiyun  */
1082*4882a593Smuzhiyun 
cx231xx_tuner_callback(void * ptr,int component,int command,int arg)1083*4882a593Smuzhiyun int cx231xx_tuner_callback(void *ptr, int component, int command, int arg)
1084*4882a593Smuzhiyun {
1085*4882a593Smuzhiyun 	int rc = 0;
1086*4882a593Smuzhiyun 	struct cx231xx *dev = ptr;
1087*4882a593Smuzhiyun 
1088*4882a593Smuzhiyun 	if (dev->tuner_type == TUNER_XC5000) {
1089*4882a593Smuzhiyun 		if (command == XC5000_TUNER_RESET) {
1090*4882a593Smuzhiyun 			dev_dbg(dev->dev,
1091*4882a593Smuzhiyun 				"Tuner CB: RESET: cmd %d : tuner type %d\n",
1092*4882a593Smuzhiyun 				command, dev->tuner_type);
1093*4882a593Smuzhiyun 			cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit,
1094*4882a593Smuzhiyun 					       1);
1095*4882a593Smuzhiyun 			msleep(10);
1096*4882a593Smuzhiyun 			cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit,
1097*4882a593Smuzhiyun 					       0);
1098*4882a593Smuzhiyun 			msleep(330);
1099*4882a593Smuzhiyun 			cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit,
1100*4882a593Smuzhiyun 					       1);
1101*4882a593Smuzhiyun 			msleep(10);
1102*4882a593Smuzhiyun 		}
1103*4882a593Smuzhiyun 	} else if (dev->tuner_type == TUNER_NXP_TDA18271) {
1104*4882a593Smuzhiyun 		switch (command) {
1105*4882a593Smuzhiyun 		case TDA18271_CALLBACK_CMD_AGC_ENABLE:
1106*4882a593Smuzhiyun 			if (dev->model == CX231XX_BOARD_PV_PLAYTV_USB_HYBRID)
1107*4882a593Smuzhiyun 				rc = cx231xx_set_agc_analog_digital_mux_select(dev, arg);
1108*4882a593Smuzhiyun 			break;
1109*4882a593Smuzhiyun 		default:
1110*4882a593Smuzhiyun 			rc = -EINVAL;
1111*4882a593Smuzhiyun 			break;
1112*4882a593Smuzhiyun 		}
1113*4882a593Smuzhiyun 	}
1114*4882a593Smuzhiyun 	return rc;
1115*4882a593Smuzhiyun }
1116*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(cx231xx_tuner_callback);
1117*4882a593Smuzhiyun 
cx231xx_reset_out(struct cx231xx * dev)1118*4882a593Smuzhiyun static void cx231xx_reset_out(struct cx231xx *dev)
1119*4882a593Smuzhiyun {
1120*4882a593Smuzhiyun 	cx231xx_set_gpio_value(dev, CX23417_RESET, 1);
1121*4882a593Smuzhiyun 	msleep(200);
1122*4882a593Smuzhiyun 	cx231xx_set_gpio_value(dev, CX23417_RESET, 0);
1123*4882a593Smuzhiyun 	msleep(200);
1124*4882a593Smuzhiyun 	cx231xx_set_gpio_value(dev, CX23417_RESET, 1);
1125*4882a593Smuzhiyun }
1126*4882a593Smuzhiyun 
cx231xx_enable_OSC(struct cx231xx * dev)1127*4882a593Smuzhiyun static void cx231xx_enable_OSC(struct cx231xx *dev)
1128*4882a593Smuzhiyun {
1129*4882a593Smuzhiyun 	cx231xx_set_gpio_value(dev, CX23417_OSC_EN, 1);
1130*4882a593Smuzhiyun }
1131*4882a593Smuzhiyun 
cx231xx_sleep_s5h1432(struct cx231xx * dev)1132*4882a593Smuzhiyun static void cx231xx_sleep_s5h1432(struct cx231xx *dev)
1133*4882a593Smuzhiyun {
1134*4882a593Smuzhiyun 	cx231xx_set_gpio_value(dev, SLEEP_S5H1432, 0);
1135*4882a593Smuzhiyun }
1136*4882a593Smuzhiyun 
cx231xx_set_model(struct cx231xx * dev)1137*4882a593Smuzhiyun static inline void cx231xx_set_model(struct cx231xx *dev)
1138*4882a593Smuzhiyun {
1139*4882a593Smuzhiyun 	dev->board = cx231xx_boards[dev->model];
1140*4882a593Smuzhiyun }
1141*4882a593Smuzhiyun 
1142*4882a593Smuzhiyun /* Since cx231xx_pre_card_setup() requires a proper dev->model,
1143*4882a593Smuzhiyun  * this won't work for boards with generic PCI IDs
1144*4882a593Smuzhiyun  */
cx231xx_pre_card_setup(struct cx231xx * dev)1145*4882a593Smuzhiyun void cx231xx_pre_card_setup(struct cx231xx *dev)
1146*4882a593Smuzhiyun {
1147*4882a593Smuzhiyun 	dev_info(dev->dev, "Identified as %s (card=%d)\n",
1148*4882a593Smuzhiyun 		dev->board.name, dev->model);
1149*4882a593Smuzhiyun 
1150*4882a593Smuzhiyun 	if (CX231XX_BOARD_ASTROMETA_T2HYBRID == dev->model) {
1151*4882a593Smuzhiyun 		/* turn on demodulator chip */
1152*4882a593Smuzhiyun 		cx231xx_set_gpio_value(dev, 0x03, 0x01);
1153*4882a593Smuzhiyun 	}
1154*4882a593Smuzhiyun 
1155*4882a593Smuzhiyun 	/* set the direction for GPIO pins */
1156*4882a593Smuzhiyun 	if (dev->board.tuner_gpio) {
1157*4882a593Smuzhiyun 		cx231xx_set_gpio_direction(dev, dev->board.tuner_gpio->bit, 1);
1158*4882a593Smuzhiyun 		cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit, 1);
1159*4882a593Smuzhiyun 	}
1160*4882a593Smuzhiyun 	if (dev->board.tuner_sif_gpio >= 0)
1161*4882a593Smuzhiyun 		cx231xx_set_gpio_direction(dev, dev->board.tuner_sif_gpio, 1);
1162*4882a593Smuzhiyun 
1163*4882a593Smuzhiyun 	/* request some modules if any required */
1164*4882a593Smuzhiyun 
1165*4882a593Smuzhiyun 	/* set the mode to Analog mode initially */
1166*4882a593Smuzhiyun 	cx231xx_set_mode(dev, CX231XX_ANALOG_MODE);
1167*4882a593Smuzhiyun 
1168*4882a593Smuzhiyun 	/* Unlock device */
1169*4882a593Smuzhiyun 	/* cx231xx_set_mode(dev, CX231XX_SUSPEND); */
1170*4882a593Smuzhiyun 
1171*4882a593Smuzhiyun }
1172*4882a593Smuzhiyun 
cx231xx_config_tuner(struct cx231xx * dev)1173*4882a593Smuzhiyun static void cx231xx_config_tuner(struct cx231xx *dev)
1174*4882a593Smuzhiyun {
1175*4882a593Smuzhiyun 	struct tuner_setup tun_setup;
1176*4882a593Smuzhiyun 	struct v4l2_frequency f;
1177*4882a593Smuzhiyun 
1178*4882a593Smuzhiyun 	if (dev->tuner_type == TUNER_ABSENT)
1179*4882a593Smuzhiyun 		return;
1180*4882a593Smuzhiyun 
1181*4882a593Smuzhiyun 	tun_setup.mode_mask = T_ANALOG_TV | T_RADIO;
1182*4882a593Smuzhiyun 	tun_setup.type = dev->tuner_type;
1183*4882a593Smuzhiyun 	tun_setup.addr = dev->tuner_addr;
1184*4882a593Smuzhiyun 	tun_setup.tuner_callback = cx231xx_tuner_callback;
1185*4882a593Smuzhiyun 
1186*4882a593Smuzhiyun 	tuner_call(dev, tuner, s_type_addr, &tun_setup);
1187*4882a593Smuzhiyun 
1188*4882a593Smuzhiyun #if 0
1189*4882a593Smuzhiyun 	if (tun_setup.type == TUNER_XC5000) {
1190*4882a593Smuzhiyun 		static struct xc2028_ctrl ctrl = {
1191*4882a593Smuzhiyun 			.fname = XC5000_DEFAULT_FIRMWARE,
1192*4882a593Smuzhiyun 			.max_len = 64,
1193*4882a593Smuzhiyun 			.demod = 0;
1194*4882a593Smuzhiyun 		};
1195*4882a593Smuzhiyun 		struct v4l2_priv_tun_config cfg = {
1196*4882a593Smuzhiyun 			.tuner = dev->tuner_type,
1197*4882a593Smuzhiyun 			.priv = &ctrl,
1198*4882a593Smuzhiyun 		};
1199*4882a593Smuzhiyun 		tuner_call(dev, tuner, s_config, &cfg);
1200*4882a593Smuzhiyun 	}
1201*4882a593Smuzhiyun #endif
1202*4882a593Smuzhiyun 	/* configure tuner */
1203*4882a593Smuzhiyun 	f.tuner = 0;
1204*4882a593Smuzhiyun 	f.type = V4L2_TUNER_ANALOG_TV;
1205*4882a593Smuzhiyun 	f.frequency = 9076;	/* just a magic number */
1206*4882a593Smuzhiyun 	dev->ctl_freq = f.frequency;
1207*4882a593Smuzhiyun 	call_all(dev, tuner, s_frequency, &f);
1208*4882a593Smuzhiyun 
1209*4882a593Smuzhiyun }
1210*4882a593Smuzhiyun 
read_eeprom(struct cx231xx * dev,struct i2c_client * client,u8 * eedata,int len)1211*4882a593Smuzhiyun static int read_eeprom(struct cx231xx *dev, struct i2c_client *client,
1212*4882a593Smuzhiyun 		       u8 *eedata, int len)
1213*4882a593Smuzhiyun {
1214*4882a593Smuzhiyun 	int ret;
1215*4882a593Smuzhiyun 	u8 start_offset = 0;
1216*4882a593Smuzhiyun 	int len_todo = len;
1217*4882a593Smuzhiyun 	u8 *eedata_cur = eedata;
1218*4882a593Smuzhiyun 	int i;
1219*4882a593Smuzhiyun 	struct i2c_msg msg_write = { .addr = client->addr, .flags = 0,
1220*4882a593Smuzhiyun 		.buf = &start_offset, .len = 1 };
1221*4882a593Smuzhiyun 	struct i2c_msg msg_read = { .addr = client->addr, .flags = I2C_M_RD };
1222*4882a593Smuzhiyun 
1223*4882a593Smuzhiyun 	/* start reading at offset 0 */
1224*4882a593Smuzhiyun 	ret = i2c_transfer(client->adapter, &msg_write, 1);
1225*4882a593Smuzhiyun 	if (ret < 0) {
1226*4882a593Smuzhiyun 		dev_err(dev->dev, "Can't read eeprom\n");
1227*4882a593Smuzhiyun 		return ret;
1228*4882a593Smuzhiyun 	}
1229*4882a593Smuzhiyun 
1230*4882a593Smuzhiyun 	while (len_todo > 0) {
1231*4882a593Smuzhiyun 		msg_read.len = (len_todo > 64) ? 64 : len_todo;
1232*4882a593Smuzhiyun 		msg_read.buf = eedata_cur;
1233*4882a593Smuzhiyun 
1234*4882a593Smuzhiyun 		ret = i2c_transfer(client->adapter, &msg_read, 1);
1235*4882a593Smuzhiyun 		if (ret < 0) {
1236*4882a593Smuzhiyun 			dev_err(dev->dev, "Can't read eeprom\n");
1237*4882a593Smuzhiyun 			return ret;
1238*4882a593Smuzhiyun 		}
1239*4882a593Smuzhiyun 		eedata_cur += msg_read.len;
1240*4882a593Smuzhiyun 		len_todo -= msg_read.len;
1241*4882a593Smuzhiyun 	}
1242*4882a593Smuzhiyun 
1243*4882a593Smuzhiyun 	for (i = 0; i + 15 < len; i += 16)
1244*4882a593Smuzhiyun 		dev_dbg(dev->dev, "i2c eeprom %02x: %*ph\n",
1245*4882a593Smuzhiyun 			i, 16, &eedata[i]);
1246*4882a593Smuzhiyun 
1247*4882a593Smuzhiyun 	return 0;
1248*4882a593Smuzhiyun }
1249*4882a593Smuzhiyun 
cx231xx_card_setup(struct cx231xx * dev)1250*4882a593Smuzhiyun void cx231xx_card_setup(struct cx231xx *dev)
1251*4882a593Smuzhiyun {
1252*4882a593Smuzhiyun 
1253*4882a593Smuzhiyun 	cx231xx_set_model(dev);
1254*4882a593Smuzhiyun 
1255*4882a593Smuzhiyun 	dev->tuner_type = cx231xx_boards[dev->model].tuner_type;
1256*4882a593Smuzhiyun 	if (cx231xx_boards[dev->model].tuner_addr)
1257*4882a593Smuzhiyun 		dev->tuner_addr = cx231xx_boards[dev->model].tuner_addr;
1258*4882a593Smuzhiyun 
1259*4882a593Smuzhiyun 	/* request some modules */
1260*4882a593Smuzhiyun 	if (dev->board.decoder == CX231XX_AVDECODER) {
1261*4882a593Smuzhiyun 		dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1262*4882a593Smuzhiyun 					cx231xx_get_i2c_adap(dev, I2C_0),
1263*4882a593Smuzhiyun 					"cx25840", 0x88 >> 1, NULL);
1264*4882a593Smuzhiyun 		if (dev->sd_cx25840 == NULL)
1265*4882a593Smuzhiyun 			dev_err(dev->dev,
1266*4882a593Smuzhiyun 				"cx25840 subdev registration failure\n");
1267*4882a593Smuzhiyun 		cx25840_call(dev, core, load_fw);
1268*4882a593Smuzhiyun 
1269*4882a593Smuzhiyun 	}
1270*4882a593Smuzhiyun 
1271*4882a593Smuzhiyun 	/* Initialize the tuner */
1272*4882a593Smuzhiyun 	if (dev->board.tuner_type != TUNER_ABSENT) {
1273*4882a593Smuzhiyun 		struct i2c_adapter *tuner_i2c = cx231xx_get_i2c_adap(dev,
1274*4882a593Smuzhiyun 						dev->board.tuner_i2c_master);
1275*4882a593Smuzhiyun 		dev->sd_tuner = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1276*4882a593Smuzhiyun 						    tuner_i2c,
1277*4882a593Smuzhiyun 						    "tuner",
1278*4882a593Smuzhiyun 						    dev->tuner_addr, NULL);
1279*4882a593Smuzhiyun 		if (dev->sd_tuner == NULL)
1280*4882a593Smuzhiyun 			dev_err(dev->dev,
1281*4882a593Smuzhiyun 				"tuner subdev registration failure\n");
1282*4882a593Smuzhiyun 		else
1283*4882a593Smuzhiyun 			cx231xx_config_tuner(dev);
1284*4882a593Smuzhiyun 	}
1285*4882a593Smuzhiyun 
1286*4882a593Smuzhiyun 	switch (dev->model) {
1287*4882a593Smuzhiyun 	case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx:
1288*4882a593Smuzhiyun 	case CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx:
1289*4882a593Smuzhiyun 	case CX231XX_BOARD_HAUPPAUGE_955Q:
1290*4882a593Smuzhiyun 	case CX231XX_BOARD_HAUPPAUGE_935C:
1291*4882a593Smuzhiyun 	case CX231XX_BOARD_HAUPPAUGE_975:
1292*4882a593Smuzhiyun 		{
1293*4882a593Smuzhiyun 			struct eeprom {
1294*4882a593Smuzhiyun 				struct tveeprom tvee;
1295*4882a593Smuzhiyun 				u8 eeprom[256];
1296*4882a593Smuzhiyun 				struct i2c_client client;
1297*4882a593Smuzhiyun 			};
1298*4882a593Smuzhiyun 			struct eeprom *e = kzalloc(sizeof(*e), GFP_KERNEL);
1299*4882a593Smuzhiyun 
1300*4882a593Smuzhiyun 			if (e == NULL) {
1301*4882a593Smuzhiyun 				dev_err(dev->dev,
1302*4882a593Smuzhiyun 					"failed to allocate memory to read eeprom\n");
1303*4882a593Smuzhiyun 				break;
1304*4882a593Smuzhiyun 			}
1305*4882a593Smuzhiyun 			e->client.adapter = cx231xx_get_i2c_adap(dev, I2C_1_MUX_1);
1306*4882a593Smuzhiyun 			e->client.addr = 0xa0 >> 1;
1307*4882a593Smuzhiyun 
1308*4882a593Smuzhiyun 			read_eeprom(dev, &e->client, e->eeprom, sizeof(e->eeprom));
1309*4882a593Smuzhiyun 			tveeprom_hauppauge_analog(&e->tvee, e->eeprom + 0xc0);
1310*4882a593Smuzhiyun 			kfree(e);
1311*4882a593Smuzhiyun 			break;
1312*4882a593Smuzhiyun 		}
1313*4882a593Smuzhiyun 	}
1314*4882a593Smuzhiyun 
1315*4882a593Smuzhiyun }
1316*4882a593Smuzhiyun 
1317*4882a593Smuzhiyun /*
1318*4882a593Smuzhiyun  * cx231xx_config()
1319*4882a593Smuzhiyun  * inits registers with sane defaults
1320*4882a593Smuzhiyun  */
cx231xx_config(struct cx231xx * dev)1321*4882a593Smuzhiyun int cx231xx_config(struct cx231xx *dev)
1322*4882a593Smuzhiyun {
1323*4882a593Smuzhiyun 	/* TBD need to add cx231xx specific code */
1324*4882a593Smuzhiyun 
1325*4882a593Smuzhiyun 	return 0;
1326*4882a593Smuzhiyun }
1327*4882a593Smuzhiyun 
1328*4882a593Smuzhiyun /*
1329*4882a593Smuzhiyun  * cx231xx_config_i2c()
1330*4882a593Smuzhiyun  * configure i2c attached devices
1331*4882a593Smuzhiyun  */
cx231xx_config_i2c(struct cx231xx * dev)1332*4882a593Smuzhiyun void cx231xx_config_i2c(struct cx231xx *dev)
1333*4882a593Smuzhiyun {
1334*4882a593Smuzhiyun 	/* u32 input = INPUT(dev->video_input)->vmux; */
1335*4882a593Smuzhiyun 
1336*4882a593Smuzhiyun 	call_all(dev, video, s_stream, 1);
1337*4882a593Smuzhiyun }
1338*4882a593Smuzhiyun 
cx231xx_unregister_media_device(struct cx231xx * dev)1339*4882a593Smuzhiyun static void cx231xx_unregister_media_device(struct cx231xx *dev)
1340*4882a593Smuzhiyun {
1341*4882a593Smuzhiyun #ifdef CONFIG_MEDIA_CONTROLLER
1342*4882a593Smuzhiyun 	if (dev->media_dev) {
1343*4882a593Smuzhiyun 		media_device_unregister(dev->media_dev);
1344*4882a593Smuzhiyun 		media_device_cleanup(dev->media_dev);
1345*4882a593Smuzhiyun 		kfree(dev->media_dev);
1346*4882a593Smuzhiyun 		dev->media_dev = NULL;
1347*4882a593Smuzhiyun 	}
1348*4882a593Smuzhiyun #endif
1349*4882a593Smuzhiyun }
1350*4882a593Smuzhiyun 
1351*4882a593Smuzhiyun /*
1352*4882a593Smuzhiyun  * cx231xx_realease_resources()
1353*4882a593Smuzhiyun  * unregisters the v4l2,i2c and usb devices
1354*4882a593Smuzhiyun  * called when the device gets disconnected or at module unload
1355*4882a593Smuzhiyun */
cx231xx_release_resources(struct cx231xx * dev)1356*4882a593Smuzhiyun void cx231xx_release_resources(struct cx231xx *dev)
1357*4882a593Smuzhiyun {
1358*4882a593Smuzhiyun 	cx231xx_ir_exit(dev);
1359*4882a593Smuzhiyun 
1360*4882a593Smuzhiyun 	cx231xx_release_analog_resources(dev);
1361*4882a593Smuzhiyun 
1362*4882a593Smuzhiyun 	cx231xx_remove_from_devlist(dev);
1363*4882a593Smuzhiyun 
1364*4882a593Smuzhiyun 	/* Release I2C buses */
1365*4882a593Smuzhiyun 	cx231xx_dev_uninit(dev);
1366*4882a593Smuzhiyun 
1367*4882a593Smuzhiyun 	/* delete v4l2 device */
1368*4882a593Smuzhiyun 	v4l2_device_unregister(&dev->v4l2_dev);
1369*4882a593Smuzhiyun 
1370*4882a593Smuzhiyun 	cx231xx_unregister_media_device(dev);
1371*4882a593Smuzhiyun 
1372*4882a593Smuzhiyun 	usb_put_dev(dev->udev);
1373*4882a593Smuzhiyun 
1374*4882a593Smuzhiyun 	/* Mark device as unused */
1375*4882a593Smuzhiyun 	clear_bit(dev->devno, &cx231xx_devused);
1376*4882a593Smuzhiyun }
1377*4882a593Smuzhiyun 
cx231xx_media_device_init(struct cx231xx * dev,struct usb_device * udev)1378*4882a593Smuzhiyun static int cx231xx_media_device_init(struct cx231xx *dev,
1379*4882a593Smuzhiyun 				      struct usb_device *udev)
1380*4882a593Smuzhiyun {
1381*4882a593Smuzhiyun #ifdef CONFIG_MEDIA_CONTROLLER
1382*4882a593Smuzhiyun 	struct media_device *mdev;
1383*4882a593Smuzhiyun 
1384*4882a593Smuzhiyun 	mdev = kzalloc(sizeof(*mdev), GFP_KERNEL);
1385*4882a593Smuzhiyun 	if (!mdev)
1386*4882a593Smuzhiyun 		return -ENOMEM;
1387*4882a593Smuzhiyun 
1388*4882a593Smuzhiyun 	media_device_usb_init(mdev, udev, dev->board.name);
1389*4882a593Smuzhiyun 
1390*4882a593Smuzhiyun 	dev->media_dev = mdev;
1391*4882a593Smuzhiyun #endif
1392*4882a593Smuzhiyun 	return 0;
1393*4882a593Smuzhiyun }
1394*4882a593Smuzhiyun 
1395*4882a593Smuzhiyun /*
1396*4882a593Smuzhiyun  * cx231xx_init_dev()
1397*4882a593Smuzhiyun  * allocates and inits the device structs, registers i2c bus and v4l device
1398*4882a593Smuzhiyun  */
cx231xx_init_dev(struct cx231xx * dev,struct usb_device * udev,int minor)1399*4882a593Smuzhiyun static int cx231xx_init_dev(struct cx231xx *dev, struct usb_device *udev,
1400*4882a593Smuzhiyun 			    int minor)
1401*4882a593Smuzhiyun {
1402*4882a593Smuzhiyun 	int retval = -ENOMEM;
1403*4882a593Smuzhiyun 	unsigned int maxh, maxw;
1404*4882a593Smuzhiyun 
1405*4882a593Smuzhiyun 	dev->udev = udev;
1406*4882a593Smuzhiyun 	mutex_init(&dev->lock);
1407*4882a593Smuzhiyun 	mutex_init(&dev->ctrl_urb_lock);
1408*4882a593Smuzhiyun 	mutex_init(&dev->gpio_i2c_lock);
1409*4882a593Smuzhiyun 	mutex_init(&dev->i2c_lock);
1410*4882a593Smuzhiyun 
1411*4882a593Smuzhiyun 	spin_lock_init(&dev->video_mode.slock);
1412*4882a593Smuzhiyun 	spin_lock_init(&dev->vbi_mode.slock);
1413*4882a593Smuzhiyun 	spin_lock_init(&dev->sliced_cc_mode.slock);
1414*4882a593Smuzhiyun 
1415*4882a593Smuzhiyun 	init_waitqueue_head(&dev->open);
1416*4882a593Smuzhiyun 	init_waitqueue_head(&dev->wait_frame);
1417*4882a593Smuzhiyun 	init_waitqueue_head(&dev->wait_stream);
1418*4882a593Smuzhiyun 
1419*4882a593Smuzhiyun 	dev->cx231xx_read_ctrl_reg = cx231xx_read_ctrl_reg;
1420*4882a593Smuzhiyun 	dev->cx231xx_write_ctrl_reg = cx231xx_write_ctrl_reg;
1421*4882a593Smuzhiyun 	dev->cx231xx_send_usb_command = cx231xx_send_usb_command;
1422*4882a593Smuzhiyun 	dev->cx231xx_gpio_i2c_read = cx231xx_gpio_i2c_read;
1423*4882a593Smuzhiyun 	dev->cx231xx_gpio_i2c_write = cx231xx_gpio_i2c_write;
1424*4882a593Smuzhiyun 
1425*4882a593Smuzhiyun 	/* Query cx231xx to find what pcb config it is related to */
1426*4882a593Smuzhiyun 	retval = initialize_cx231xx(dev);
1427*4882a593Smuzhiyun 	if (retval < 0) {
1428*4882a593Smuzhiyun 		dev_err(dev->dev, "Failed to read PCB config\n");
1429*4882a593Smuzhiyun 		return retval;
1430*4882a593Smuzhiyun 	}
1431*4882a593Smuzhiyun 
1432*4882a593Smuzhiyun 	/*To workaround error number=-71 on EP0 for VideoGrabber,
1433*4882a593Smuzhiyun 		 need set alt here.*/
1434*4882a593Smuzhiyun 	if (dev->model == CX231XX_BOARD_CNXT_VIDEO_GRABBER ||
1435*4882a593Smuzhiyun 	    dev->model == CX231XX_BOARD_HAUPPAUGE_USBLIVE2) {
1436*4882a593Smuzhiyun 		cx231xx_set_alt_setting(dev, INDEX_VIDEO, 3);
1437*4882a593Smuzhiyun 		cx231xx_set_alt_setting(dev, INDEX_VANC, 1);
1438*4882a593Smuzhiyun 	}
1439*4882a593Smuzhiyun 	/* Cx231xx pre card setup */
1440*4882a593Smuzhiyun 	cx231xx_pre_card_setup(dev);
1441*4882a593Smuzhiyun 
1442*4882a593Smuzhiyun 	retval = cx231xx_config(dev);
1443*4882a593Smuzhiyun 	if (retval) {
1444*4882a593Smuzhiyun 		dev_err(dev->dev, "error configuring device\n");
1445*4882a593Smuzhiyun 		return -ENOMEM;
1446*4882a593Smuzhiyun 	}
1447*4882a593Smuzhiyun 
1448*4882a593Smuzhiyun 	/* set default norm */
1449*4882a593Smuzhiyun 	dev->norm = dev->board.norm;
1450*4882a593Smuzhiyun 
1451*4882a593Smuzhiyun 	/* register i2c bus */
1452*4882a593Smuzhiyun 	retval = cx231xx_dev_init(dev);
1453*4882a593Smuzhiyun 	if (retval) {
1454*4882a593Smuzhiyun 		dev_err(dev->dev,
1455*4882a593Smuzhiyun 			"%s: cx231xx_i2c_register - errCode [%d]!\n",
1456*4882a593Smuzhiyun 			__func__, retval);
1457*4882a593Smuzhiyun 		goto err_dev_init;
1458*4882a593Smuzhiyun 	}
1459*4882a593Smuzhiyun 
1460*4882a593Smuzhiyun 	/* Do board specific init */
1461*4882a593Smuzhiyun 	cx231xx_card_setup(dev);
1462*4882a593Smuzhiyun 
1463*4882a593Smuzhiyun 	/* configure the device */
1464*4882a593Smuzhiyun 	cx231xx_config_i2c(dev);
1465*4882a593Smuzhiyun 
1466*4882a593Smuzhiyun 	maxw = norm_maxw(dev);
1467*4882a593Smuzhiyun 	maxh = norm_maxh(dev);
1468*4882a593Smuzhiyun 
1469*4882a593Smuzhiyun 	/* set default image size */
1470*4882a593Smuzhiyun 	dev->width = maxw;
1471*4882a593Smuzhiyun 	dev->height = maxh;
1472*4882a593Smuzhiyun 	dev->interlaced = 0;
1473*4882a593Smuzhiyun 	dev->video_input = 0;
1474*4882a593Smuzhiyun 
1475*4882a593Smuzhiyun 	retval = cx231xx_config(dev);
1476*4882a593Smuzhiyun 	if (retval) {
1477*4882a593Smuzhiyun 		dev_err(dev->dev, "%s: cx231xx_config - errCode [%d]!\n",
1478*4882a593Smuzhiyun 			__func__, retval);
1479*4882a593Smuzhiyun 		goto err_dev_init;
1480*4882a593Smuzhiyun 	}
1481*4882a593Smuzhiyun 
1482*4882a593Smuzhiyun 	/* init video dma queue */
1483*4882a593Smuzhiyun 	INIT_LIST_HEAD(&dev->video_mode.vidq.active);
1484*4882a593Smuzhiyun 
1485*4882a593Smuzhiyun 	/* init vbi dma queue */
1486*4882a593Smuzhiyun 	INIT_LIST_HEAD(&dev->vbi_mode.vidq.active);
1487*4882a593Smuzhiyun 
1488*4882a593Smuzhiyun 	/* Reset other chips required if they are tied up with GPIO pins */
1489*4882a593Smuzhiyun 	cx231xx_add_into_devlist(dev);
1490*4882a593Smuzhiyun 
1491*4882a593Smuzhiyun 	if (dev->board.has_417) {
1492*4882a593Smuzhiyun 		dev_info(dev->dev, "attach 417 %d\n", dev->model);
1493*4882a593Smuzhiyun 		if (cx231xx_417_register(dev) < 0) {
1494*4882a593Smuzhiyun 			dev_err(dev->dev,
1495*4882a593Smuzhiyun 				"%s() Failed to register 417 on VID_B\n",
1496*4882a593Smuzhiyun 				__func__);
1497*4882a593Smuzhiyun 		}
1498*4882a593Smuzhiyun 	}
1499*4882a593Smuzhiyun 
1500*4882a593Smuzhiyun 	retval = cx231xx_register_analog_devices(dev);
1501*4882a593Smuzhiyun 	if (retval)
1502*4882a593Smuzhiyun 		goto err_analog;
1503*4882a593Smuzhiyun 
1504*4882a593Smuzhiyun 	cx231xx_ir_init(dev);
1505*4882a593Smuzhiyun 
1506*4882a593Smuzhiyun 	cx231xx_init_extension(dev);
1507*4882a593Smuzhiyun 
1508*4882a593Smuzhiyun 	return 0;
1509*4882a593Smuzhiyun err_analog:
1510*4882a593Smuzhiyun 	cx231xx_unregister_media_device(dev);
1511*4882a593Smuzhiyun 	cx231xx_release_analog_resources(dev);
1512*4882a593Smuzhiyun 	cx231xx_remove_from_devlist(dev);
1513*4882a593Smuzhiyun err_dev_init:
1514*4882a593Smuzhiyun 	cx231xx_dev_uninit(dev);
1515*4882a593Smuzhiyun 	return retval;
1516*4882a593Smuzhiyun }
1517*4882a593Smuzhiyun 
1518*4882a593Smuzhiyun #if defined(CONFIG_MODULES) && defined(MODULE)
request_module_async(struct work_struct * work)1519*4882a593Smuzhiyun static void request_module_async(struct work_struct *work)
1520*4882a593Smuzhiyun {
1521*4882a593Smuzhiyun 	struct cx231xx *dev = container_of(work,
1522*4882a593Smuzhiyun 					   struct cx231xx, request_module_wk);
1523*4882a593Smuzhiyun 
1524*4882a593Smuzhiyun 	if (dev->has_alsa_audio)
1525*4882a593Smuzhiyun 		request_module("cx231xx-alsa");
1526*4882a593Smuzhiyun 
1527*4882a593Smuzhiyun 	if (dev->board.has_dvb)
1528*4882a593Smuzhiyun 		request_module("cx231xx-dvb");
1529*4882a593Smuzhiyun 
1530*4882a593Smuzhiyun }
1531*4882a593Smuzhiyun 
request_modules(struct cx231xx * dev)1532*4882a593Smuzhiyun static void request_modules(struct cx231xx *dev)
1533*4882a593Smuzhiyun {
1534*4882a593Smuzhiyun 	INIT_WORK(&dev->request_module_wk, request_module_async);
1535*4882a593Smuzhiyun 	schedule_work(&dev->request_module_wk);
1536*4882a593Smuzhiyun }
1537*4882a593Smuzhiyun 
flush_request_modules(struct cx231xx * dev)1538*4882a593Smuzhiyun static void flush_request_modules(struct cx231xx *dev)
1539*4882a593Smuzhiyun {
1540*4882a593Smuzhiyun 	flush_work(&dev->request_module_wk);
1541*4882a593Smuzhiyun }
1542*4882a593Smuzhiyun #else
1543*4882a593Smuzhiyun #define request_modules(dev)
1544*4882a593Smuzhiyun #define flush_request_modules(dev)
1545*4882a593Smuzhiyun #endif /* CONFIG_MODULES */
1546*4882a593Smuzhiyun 
cx231xx_init_v4l2(struct cx231xx * dev,struct usb_device * udev,struct usb_interface * interface,int isoc_pipe)1547*4882a593Smuzhiyun static int cx231xx_init_v4l2(struct cx231xx *dev,
1548*4882a593Smuzhiyun 			     struct usb_device *udev,
1549*4882a593Smuzhiyun 			     struct usb_interface *interface,
1550*4882a593Smuzhiyun 			     int isoc_pipe)
1551*4882a593Smuzhiyun {
1552*4882a593Smuzhiyun 	struct usb_interface *uif;
1553*4882a593Smuzhiyun 	int i, idx;
1554*4882a593Smuzhiyun 
1555*4882a593Smuzhiyun 	/* Video Init */
1556*4882a593Smuzhiyun 
1557*4882a593Smuzhiyun 	/* compute alternate max packet sizes for video */
1558*4882a593Smuzhiyun 	idx = dev->current_pcb_config.hs_config_info[0].interface_info.video_index + 1;
1559*4882a593Smuzhiyun 	if (idx >= dev->max_iad_interface_count) {
1560*4882a593Smuzhiyun 		dev_err(dev->dev,
1561*4882a593Smuzhiyun 			"Video PCB interface #%d doesn't exist\n", idx);
1562*4882a593Smuzhiyun 		return -ENODEV;
1563*4882a593Smuzhiyun 	}
1564*4882a593Smuzhiyun 
1565*4882a593Smuzhiyun 	uif = udev->actconfig->interface[idx];
1566*4882a593Smuzhiyun 
1567*4882a593Smuzhiyun 	if (uif->altsetting[0].desc.bNumEndpoints < isoc_pipe + 1)
1568*4882a593Smuzhiyun 		return -ENODEV;
1569*4882a593Smuzhiyun 
1570*4882a593Smuzhiyun 	dev->video_mode.end_point_addr = uif->altsetting[0].endpoint[isoc_pipe].desc.bEndpointAddress;
1571*4882a593Smuzhiyun 	dev->video_mode.num_alt = uif->num_altsetting;
1572*4882a593Smuzhiyun 
1573*4882a593Smuzhiyun 	dev_info(dev->dev,
1574*4882a593Smuzhiyun 		 "video EndPoint Addr 0x%x, Alternate settings: %i\n",
1575*4882a593Smuzhiyun 		 dev->video_mode.end_point_addr,
1576*4882a593Smuzhiyun 		 dev->video_mode.num_alt);
1577*4882a593Smuzhiyun 
1578*4882a593Smuzhiyun 	dev->video_mode.alt_max_pkt_size = devm_kmalloc_array(&udev->dev, 32, dev->video_mode.num_alt, GFP_KERNEL);
1579*4882a593Smuzhiyun 	if (dev->video_mode.alt_max_pkt_size == NULL)
1580*4882a593Smuzhiyun 		return -ENOMEM;
1581*4882a593Smuzhiyun 
1582*4882a593Smuzhiyun 	for (i = 0; i < dev->video_mode.num_alt; i++) {
1583*4882a593Smuzhiyun 		u16 tmp;
1584*4882a593Smuzhiyun 
1585*4882a593Smuzhiyun 		if (uif->altsetting[i].desc.bNumEndpoints < isoc_pipe + 1)
1586*4882a593Smuzhiyun 			return -ENODEV;
1587*4882a593Smuzhiyun 
1588*4882a593Smuzhiyun 		tmp = le16_to_cpu(uif->altsetting[i].endpoint[isoc_pipe].desc.wMaxPacketSize);
1589*4882a593Smuzhiyun 		dev->video_mode.alt_max_pkt_size[i] = (tmp & 0x07ff) * (((tmp & 0x1800) >> 11) + 1);
1590*4882a593Smuzhiyun 		dev_dbg(dev->dev,
1591*4882a593Smuzhiyun 			"Alternate setting %i, max size= %i\n", i,
1592*4882a593Smuzhiyun 			dev->video_mode.alt_max_pkt_size[i]);
1593*4882a593Smuzhiyun 	}
1594*4882a593Smuzhiyun 
1595*4882a593Smuzhiyun 	/* VBI Init */
1596*4882a593Smuzhiyun 
1597*4882a593Smuzhiyun 	idx = dev->current_pcb_config.hs_config_info[0].interface_info.vanc_index + 1;
1598*4882a593Smuzhiyun 	if (idx >= dev->max_iad_interface_count) {
1599*4882a593Smuzhiyun 		dev_err(dev->dev,
1600*4882a593Smuzhiyun 			"VBI PCB interface #%d doesn't exist\n", idx);
1601*4882a593Smuzhiyun 		return -ENODEV;
1602*4882a593Smuzhiyun 	}
1603*4882a593Smuzhiyun 	uif = udev->actconfig->interface[idx];
1604*4882a593Smuzhiyun 
1605*4882a593Smuzhiyun 	if (uif->altsetting[0].desc.bNumEndpoints < isoc_pipe + 1)
1606*4882a593Smuzhiyun 		return -ENODEV;
1607*4882a593Smuzhiyun 
1608*4882a593Smuzhiyun 	dev->vbi_mode.end_point_addr =
1609*4882a593Smuzhiyun 	    uif->altsetting[0].endpoint[isoc_pipe].desc.
1610*4882a593Smuzhiyun 			bEndpointAddress;
1611*4882a593Smuzhiyun 
1612*4882a593Smuzhiyun 	dev->vbi_mode.num_alt = uif->num_altsetting;
1613*4882a593Smuzhiyun 	dev_info(dev->dev,
1614*4882a593Smuzhiyun 		 "VBI EndPoint Addr 0x%x, Alternate settings: %i\n",
1615*4882a593Smuzhiyun 		 dev->vbi_mode.end_point_addr,
1616*4882a593Smuzhiyun 		 dev->vbi_mode.num_alt);
1617*4882a593Smuzhiyun 
1618*4882a593Smuzhiyun 	/* compute alternate max packet sizes for vbi */
1619*4882a593Smuzhiyun 	dev->vbi_mode.alt_max_pkt_size = devm_kmalloc_array(&udev->dev, 32, dev->vbi_mode.num_alt, GFP_KERNEL);
1620*4882a593Smuzhiyun 	if (dev->vbi_mode.alt_max_pkt_size == NULL)
1621*4882a593Smuzhiyun 		return -ENOMEM;
1622*4882a593Smuzhiyun 
1623*4882a593Smuzhiyun 	for (i = 0; i < dev->vbi_mode.num_alt; i++) {
1624*4882a593Smuzhiyun 		u16 tmp;
1625*4882a593Smuzhiyun 
1626*4882a593Smuzhiyun 		if (uif->altsetting[i].desc.bNumEndpoints < isoc_pipe + 1)
1627*4882a593Smuzhiyun 			return -ENODEV;
1628*4882a593Smuzhiyun 
1629*4882a593Smuzhiyun 		tmp = le16_to_cpu(uif->altsetting[i].endpoint[isoc_pipe].
1630*4882a593Smuzhiyun 				desc.wMaxPacketSize);
1631*4882a593Smuzhiyun 		dev->vbi_mode.alt_max_pkt_size[i] =
1632*4882a593Smuzhiyun 		    (tmp & 0x07ff) * (((tmp & 0x1800) >> 11) + 1);
1633*4882a593Smuzhiyun 		dev_dbg(dev->dev,
1634*4882a593Smuzhiyun 			"Alternate setting %i, max size= %i\n", i,
1635*4882a593Smuzhiyun 			dev->vbi_mode.alt_max_pkt_size[i]);
1636*4882a593Smuzhiyun 	}
1637*4882a593Smuzhiyun 
1638*4882a593Smuzhiyun 	/* Sliced CC VBI init */
1639*4882a593Smuzhiyun 
1640*4882a593Smuzhiyun 	/* compute alternate max packet sizes for sliced CC */
1641*4882a593Smuzhiyun 	idx = dev->current_pcb_config.hs_config_info[0].interface_info.hanc_index + 1;
1642*4882a593Smuzhiyun 	if (idx >= dev->max_iad_interface_count) {
1643*4882a593Smuzhiyun 		dev_err(dev->dev,
1644*4882a593Smuzhiyun 			"Sliced CC PCB interface #%d doesn't exist\n", idx);
1645*4882a593Smuzhiyun 		return -ENODEV;
1646*4882a593Smuzhiyun 	}
1647*4882a593Smuzhiyun 	uif = udev->actconfig->interface[idx];
1648*4882a593Smuzhiyun 
1649*4882a593Smuzhiyun 	if (uif->altsetting[0].desc.bNumEndpoints < isoc_pipe + 1)
1650*4882a593Smuzhiyun 		return -ENODEV;
1651*4882a593Smuzhiyun 
1652*4882a593Smuzhiyun 	dev->sliced_cc_mode.end_point_addr =
1653*4882a593Smuzhiyun 	    uif->altsetting[0].endpoint[isoc_pipe].desc.
1654*4882a593Smuzhiyun 			bEndpointAddress;
1655*4882a593Smuzhiyun 
1656*4882a593Smuzhiyun 	dev->sliced_cc_mode.num_alt = uif->num_altsetting;
1657*4882a593Smuzhiyun 	dev_info(dev->dev,
1658*4882a593Smuzhiyun 		 "sliced CC EndPoint Addr 0x%x, Alternate settings: %i\n",
1659*4882a593Smuzhiyun 		 dev->sliced_cc_mode.end_point_addr,
1660*4882a593Smuzhiyun 		 dev->sliced_cc_mode.num_alt);
1661*4882a593Smuzhiyun 	dev->sliced_cc_mode.alt_max_pkt_size = devm_kmalloc_array(&udev->dev, 32, dev->sliced_cc_mode.num_alt, GFP_KERNEL);
1662*4882a593Smuzhiyun 	if (dev->sliced_cc_mode.alt_max_pkt_size == NULL)
1663*4882a593Smuzhiyun 		return -ENOMEM;
1664*4882a593Smuzhiyun 
1665*4882a593Smuzhiyun 	for (i = 0; i < dev->sliced_cc_mode.num_alt; i++) {
1666*4882a593Smuzhiyun 		u16 tmp;
1667*4882a593Smuzhiyun 
1668*4882a593Smuzhiyun 		if (uif->altsetting[i].desc.bNumEndpoints < isoc_pipe + 1)
1669*4882a593Smuzhiyun 			return -ENODEV;
1670*4882a593Smuzhiyun 
1671*4882a593Smuzhiyun 		tmp = le16_to_cpu(uif->altsetting[i].endpoint[isoc_pipe].
1672*4882a593Smuzhiyun 				desc.wMaxPacketSize);
1673*4882a593Smuzhiyun 		dev->sliced_cc_mode.alt_max_pkt_size[i] =
1674*4882a593Smuzhiyun 		    (tmp & 0x07ff) * (((tmp & 0x1800) >> 11) + 1);
1675*4882a593Smuzhiyun 		dev_dbg(dev->dev,
1676*4882a593Smuzhiyun 			"Alternate setting %i, max size= %i\n", i,
1677*4882a593Smuzhiyun 			dev->sliced_cc_mode.alt_max_pkt_size[i]);
1678*4882a593Smuzhiyun 	}
1679*4882a593Smuzhiyun 
1680*4882a593Smuzhiyun 	return 0;
1681*4882a593Smuzhiyun }
1682*4882a593Smuzhiyun 
1683*4882a593Smuzhiyun /*
1684*4882a593Smuzhiyun  * cx231xx_usb_probe()
1685*4882a593Smuzhiyun  * checks for supported devices
1686*4882a593Smuzhiyun  */
cx231xx_usb_probe(struct usb_interface * interface,const struct usb_device_id * id)1687*4882a593Smuzhiyun static int cx231xx_usb_probe(struct usb_interface *interface,
1688*4882a593Smuzhiyun 			     const struct usb_device_id *id)
1689*4882a593Smuzhiyun {
1690*4882a593Smuzhiyun 	struct usb_device *udev;
1691*4882a593Smuzhiyun 	struct device *d = &interface->dev;
1692*4882a593Smuzhiyun 	struct usb_interface *uif;
1693*4882a593Smuzhiyun 	struct cx231xx *dev = NULL;
1694*4882a593Smuzhiyun 	int retval = -ENODEV;
1695*4882a593Smuzhiyun 	int nr = 0, ifnum;
1696*4882a593Smuzhiyun 	int i, isoc_pipe = 0;
1697*4882a593Smuzhiyun 	char *speed;
1698*4882a593Smuzhiyun 	u8 idx;
1699*4882a593Smuzhiyun 	struct usb_interface_assoc_descriptor *assoc_desc;
1700*4882a593Smuzhiyun 
1701*4882a593Smuzhiyun 	ifnum = interface->altsetting[0].desc.bInterfaceNumber;
1702*4882a593Smuzhiyun 
1703*4882a593Smuzhiyun 	/*
1704*4882a593Smuzhiyun 	 * Interface number 0 - IR interface (handled by mceusb driver)
1705*4882a593Smuzhiyun 	 * Interface number 1 - AV interface (handled by this driver)
1706*4882a593Smuzhiyun 	 */
1707*4882a593Smuzhiyun 	if (ifnum != 1)
1708*4882a593Smuzhiyun 		return -ENODEV;
1709*4882a593Smuzhiyun 
1710*4882a593Smuzhiyun 	/* Check to see next free device and mark as used */
1711*4882a593Smuzhiyun 	do {
1712*4882a593Smuzhiyun 		nr = find_first_zero_bit(&cx231xx_devused, CX231XX_MAXBOARDS);
1713*4882a593Smuzhiyun 		if (nr >= CX231XX_MAXBOARDS) {
1714*4882a593Smuzhiyun 			/* No free device slots */
1715*4882a593Smuzhiyun 			dev_err(d,
1716*4882a593Smuzhiyun 				"Supports only %i devices.\n",
1717*4882a593Smuzhiyun 				CX231XX_MAXBOARDS);
1718*4882a593Smuzhiyun 			return -ENOMEM;
1719*4882a593Smuzhiyun 		}
1720*4882a593Smuzhiyun 	} while (test_and_set_bit(nr, &cx231xx_devused));
1721*4882a593Smuzhiyun 
1722*4882a593Smuzhiyun 	udev = usb_get_dev(interface_to_usbdev(interface));
1723*4882a593Smuzhiyun 
1724*4882a593Smuzhiyun 	/* allocate memory for our device state and initialize it */
1725*4882a593Smuzhiyun 	dev = devm_kzalloc(&udev->dev, sizeof(*dev), GFP_KERNEL);
1726*4882a593Smuzhiyun 	if (dev == NULL) {
1727*4882a593Smuzhiyun 		retval = -ENOMEM;
1728*4882a593Smuzhiyun 		goto err_if;
1729*4882a593Smuzhiyun 	}
1730*4882a593Smuzhiyun 
1731*4882a593Smuzhiyun 	snprintf(dev->name, 29, "cx231xx #%d", nr);
1732*4882a593Smuzhiyun 	dev->devno = nr;
1733*4882a593Smuzhiyun 	dev->model = id->driver_info;
1734*4882a593Smuzhiyun 	dev->video_mode.alt = -1;
1735*4882a593Smuzhiyun 	dev->dev = d;
1736*4882a593Smuzhiyun 
1737*4882a593Smuzhiyun 	cx231xx_set_model(dev);
1738*4882a593Smuzhiyun 
1739*4882a593Smuzhiyun 	dev->interface_count++;
1740*4882a593Smuzhiyun 	/* reset gpio dir and value */
1741*4882a593Smuzhiyun 	dev->gpio_dir = 0;
1742*4882a593Smuzhiyun 	dev->gpio_val = 0;
1743*4882a593Smuzhiyun 	dev->xc_fw_load_done = 0;
1744*4882a593Smuzhiyun 	dev->has_alsa_audio = 1;
1745*4882a593Smuzhiyun 	dev->power_mode = -1;
1746*4882a593Smuzhiyun 	atomic_set(&dev->devlist_count, 0);
1747*4882a593Smuzhiyun 
1748*4882a593Smuzhiyun 	/* 0 - vbi ; 1 -sliced cc mode */
1749*4882a593Smuzhiyun 	dev->vbi_or_sliced_cc_mode = 0;
1750*4882a593Smuzhiyun 
1751*4882a593Smuzhiyun 	/* get maximum no.of IAD interfaces */
1752*4882a593Smuzhiyun 	dev->max_iad_interface_count = udev->config->desc.bNumInterfaces;
1753*4882a593Smuzhiyun 
1754*4882a593Smuzhiyun 	/* init CIR module TBD */
1755*4882a593Smuzhiyun 
1756*4882a593Smuzhiyun 	/*mode_tv: digital=1 or analog=0*/
1757*4882a593Smuzhiyun 	dev->mode_tv = 0;
1758*4882a593Smuzhiyun 
1759*4882a593Smuzhiyun 	dev->USE_ISO = transfer_mode;
1760*4882a593Smuzhiyun 
1761*4882a593Smuzhiyun 	switch (udev->speed) {
1762*4882a593Smuzhiyun 	case USB_SPEED_LOW:
1763*4882a593Smuzhiyun 		speed = "1.5";
1764*4882a593Smuzhiyun 		break;
1765*4882a593Smuzhiyun 	case USB_SPEED_UNKNOWN:
1766*4882a593Smuzhiyun 	case USB_SPEED_FULL:
1767*4882a593Smuzhiyun 		speed = "12";
1768*4882a593Smuzhiyun 		break;
1769*4882a593Smuzhiyun 	case USB_SPEED_HIGH:
1770*4882a593Smuzhiyun 		speed = "480";
1771*4882a593Smuzhiyun 		break;
1772*4882a593Smuzhiyun 	default:
1773*4882a593Smuzhiyun 		speed = "unknown";
1774*4882a593Smuzhiyun 	}
1775*4882a593Smuzhiyun 
1776*4882a593Smuzhiyun 	dev_info(d,
1777*4882a593Smuzhiyun 		 "New device %s %s @ %s Mbps (%04x:%04x) with %d interfaces\n",
1778*4882a593Smuzhiyun 		 udev->manufacturer ? udev->manufacturer : "",
1779*4882a593Smuzhiyun 		 udev->product ? udev->product : "",
1780*4882a593Smuzhiyun 		 speed,
1781*4882a593Smuzhiyun 		 le16_to_cpu(udev->descriptor.idVendor),
1782*4882a593Smuzhiyun 		 le16_to_cpu(udev->descriptor.idProduct),
1783*4882a593Smuzhiyun 		 dev->max_iad_interface_count);
1784*4882a593Smuzhiyun 
1785*4882a593Smuzhiyun 	/* increment interface count */
1786*4882a593Smuzhiyun 	dev->interface_count++;
1787*4882a593Smuzhiyun 
1788*4882a593Smuzhiyun 	/* get device number */
1789*4882a593Smuzhiyun 	nr = dev->devno;
1790*4882a593Smuzhiyun 
1791*4882a593Smuzhiyun 	assoc_desc = udev->actconfig->intf_assoc[0];
1792*4882a593Smuzhiyun 	if (!assoc_desc || assoc_desc->bFirstInterface != ifnum) {
1793*4882a593Smuzhiyun 		dev_err(d, "Not found matching IAD interface\n");
1794*4882a593Smuzhiyun 		retval = -ENODEV;
1795*4882a593Smuzhiyun 		goto err_if;
1796*4882a593Smuzhiyun 	}
1797*4882a593Smuzhiyun 
1798*4882a593Smuzhiyun 	dev_dbg(d, "registering interface %d\n", ifnum);
1799*4882a593Smuzhiyun 
1800*4882a593Smuzhiyun 	/* save our data pointer in this interface device */
1801*4882a593Smuzhiyun 	usb_set_intfdata(interface, dev);
1802*4882a593Smuzhiyun 
1803*4882a593Smuzhiyun 	/* Initialize the media controller */
1804*4882a593Smuzhiyun 	retval = cx231xx_media_device_init(dev, udev);
1805*4882a593Smuzhiyun 	if (retval) {
1806*4882a593Smuzhiyun 		dev_err(d, "cx231xx_media_device_init failed\n");
1807*4882a593Smuzhiyun 		goto err_media_init;
1808*4882a593Smuzhiyun 	}
1809*4882a593Smuzhiyun 
1810*4882a593Smuzhiyun 	/* Create v4l2 device */
1811*4882a593Smuzhiyun #ifdef CONFIG_MEDIA_CONTROLLER
1812*4882a593Smuzhiyun 	dev->v4l2_dev.mdev = dev->media_dev;
1813*4882a593Smuzhiyun #endif
1814*4882a593Smuzhiyun 	retval = v4l2_device_register(&interface->dev, &dev->v4l2_dev);
1815*4882a593Smuzhiyun 	if (retval) {
1816*4882a593Smuzhiyun 		dev_err(d, "v4l2_device_register failed\n");
1817*4882a593Smuzhiyun 		goto err_v4l2;
1818*4882a593Smuzhiyun 	}
1819*4882a593Smuzhiyun 
1820*4882a593Smuzhiyun 	/* allocate device struct */
1821*4882a593Smuzhiyun 	retval = cx231xx_init_dev(dev, udev, nr);
1822*4882a593Smuzhiyun 	if (retval)
1823*4882a593Smuzhiyun 		goto err_init;
1824*4882a593Smuzhiyun 
1825*4882a593Smuzhiyun 	retval = cx231xx_init_v4l2(dev, udev, interface, isoc_pipe);
1826*4882a593Smuzhiyun 	if (retval)
1827*4882a593Smuzhiyun 		goto err_init;
1828*4882a593Smuzhiyun 
1829*4882a593Smuzhiyun 	if (dev->current_pcb_config.ts1_source != 0xff) {
1830*4882a593Smuzhiyun 		/* compute alternate max packet sizes for TS1 */
1831*4882a593Smuzhiyun 		idx = dev->current_pcb_config.hs_config_info[0].interface_info.ts1_index + 1;
1832*4882a593Smuzhiyun 		if (idx >= dev->max_iad_interface_count) {
1833*4882a593Smuzhiyun 			dev_err(d, "TS1 PCB interface #%d doesn't exist\n",
1834*4882a593Smuzhiyun 				idx);
1835*4882a593Smuzhiyun 			retval = -ENODEV;
1836*4882a593Smuzhiyun 			goto err_video_alt;
1837*4882a593Smuzhiyun 		}
1838*4882a593Smuzhiyun 		uif = udev->actconfig->interface[idx];
1839*4882a593Smuzhiyun 
1840*4882a593Smuzhiyun 		if (uif->altsetting[0].desc.bNumEndpoints < isoc_pipe + 1) {
1841*4882a593Smuzhiyun 			retval = -ENODEV;
1842*4882a593Smuzhiyun 			goto err_video_alt;
1843*4882a593Smuzhiyun 		}
1844*4882a593Smuzhiyun 
1845*4882a593Smuzhiyun 		dev->ts1_mode.end_point_addr =
1846*4882a593Smuzhiyun 		    uif->altsetting[0].endpoint[isoc_pipe].
1847*4882a593Smuzhiyun 				desc.bEndpointAddress;
1848*4882a593Smuzhiyun 
1849*4882a593Smuzhiyun 		dev->ts1_mode.num_alt = uif->num_altsetting;
1850*4882a593Smuzhiyun 		dev_info(d,
1851*4882a593Smuzhiyun 			 "TS EndPoint Addr 0x%x, Alternate settings: %i\n",
1852*4882a593Smuzhiyun 			 dev->ts1_mode.end_point_addr,
1853*4882a593Smuzhiyun 			 dev->ts1_mode.num_alt);
1854*4882a593Smuzhiyun 
1855*4882a593Smuzhiyun 		dev->ts1_mode.alt_max_pkt_size = devm_kmalloc_array(&udev->dev, 32, dev->ts1_mode.num_alt, GFP_KERNEL);
1856*4882a593Smuzhiyun 		if (dev->ts1_mode.alt_max_pkt_size == NULL) {
1857*4882a593Smuzhiyun 			retval = -ENOMEM;
1858*4882a593Smuzhiyun 			goto err_video_alt;
1859*4882a593Smuzhiyun 		}
1860*4882a593Smuzhiyun 
1861*4882a593Smuzhiyun 		for (i = 0; i < dev->ts1_mode.num_alt; i++) {
1862*4882a593Smuzhiyun 			u16 tmp;
1863*4882a593Smuzhiyun 
1864*4882a593Smuzhiyun 			if (uif->altsetting[i].desc.bNumEndpoints < isoc_pipe + 1) {
1865*4882a593Smuzhiyun 				retval = -ENODEV;
1866*4882a593Smuzhiyun 				goto err_video_alt;
1867*4882a593Smuzhiyun 			}
1868*4882a593Smuzhiyun 
1869*4882a593Smuzhiyun 			tmp = le16_to_cpu(uif->altsetting[i].
1870*4882a593Smuzhiyun 						endpoint[isoc_pipe].desc.
1871*4882a593Smuzhiyun 						wMaxPacketSize);
1872*4882a593Smuzhiyun 			dev->ts1_mode.alt_max_pkt_size[i] =
1873*4882a593Smuzhiyun 			    (tmp & 0x07ff) * (((tmp & 0x1800) >> 11) + 1);
1874*4882a593Smuzhiyun 			dev_dbg(d, "Alternate setting %i, max size= %i\n",
1875*4882a593Smuzhiyun 				i, dev->ts1_mode.alt_max_pkt_size[i]);
1876*4882a593Smuzhiyun 		}
1877*4882a593Smuzhiyun 	}
1878*4882a593Smuzhiyun 
1879*4882a593Smuzhiyun 	if (dev->model == CX231XX_BOARD_CNXT_VIDEO_GRABBER) {
1880*4882a593Smuzhiyun 		cx231xx_enable_OSC(dev);
1881*4882a593Smuzhiyun 		cx231xx_reset_out(dev);
1882*4882a593Smuzhiyun 		cx231xx_set_alt_setting(dev, INDEX_VIDEO, 3);
1883*4882a593Smuzhiyun 	}
1884*4882a593Smuzhiyun 
1885*4882a593Smuzhiyun 	if (dev->model == CX231XX_BOARD_CNXT_RDE_253S)
1886*4882a593Smuzhiyun 		cx231xx_sleep_s5h1432(dev);
1887*4882a593Smuzhiyun 
1888*4882a593Smuzhiyun 	/* load other modules required */
1889*4882a593Smuzhiyun 	request_modules(dev);
1890*4882a593Smuzhiyun 
1891*4882a593Smuzhiyun #ifdef CONFIG_MEDIA_CONTROLLER
1892*4882a593Smuzhiyun 	/* Init entities at the Media Controller */
1893*4882a593Smuzhiyun 	cx231xx_v4l2_create_entities(dev);
1894*4882a593Smuzhiyun 
1895*4882a593Smuzhiyun 	retval = v4l2_mc_create_media_graph(dev->media_dev);
1896*4882a593Smuzhiyun 	if (!retval)
1897*4882a593Smuzhiyun 		retval = media_device_register(dev->media_dev);
1898*4882a593Smuzhiyun #endif
1899*4882a593Smuzhiyun 	if (retval < 0)
1900*4882a593Smuzhiyun 		cx231xx_release_resources(dev);
1901*4882a593Smuzhiyun 	return retval;
1902*4882a593Smuzhiyun 
1903*4882a593Smuzhiyun err_video_alt:
1904*4882a593Smuzhiyun 	/* cx231xx_uninit_dev: */
1905*4882a593Smuzhiyun 	cx231xx_close_extension(dev);
1906*4882a593Smuzhiyun 	cx231xx_ir_exit(dev);
1907*4882a593Smuzhiyun 	cx231xx_release_analog_resources(dev);
1908*4882a593Smuzhiyun 	cx231xx_417_unregister(dev);
1909*4882a593Smuzhiyun 	cx231xx_remove_from_devlist(dev);
1910*4882a593Smuzhiyun 	cx231xx_dev_uninit(dev);
1911*4882a593Smuzhiyun err_init:
1912*4882a593Smuzhiyun 	v4l2_device_unregister(&dev->v4l2_dev);
1913*4882a593Smuzhiyun err_v4l2:
1914*4882a593Smuzhiyun 	cx231xx_unregister_media_device(dev);
1915*4882a593Smuzhiyun err_media_init:
1916*4882a593Smuzhiyun 	usb_set_intfdata(interface, NULL);
1917*4882a593Smuzhiyun err_if:
1918*4882a593Smuzhiyun 	usb_put_dev(udev);
1919*4882a593Smuzhiyun 	clear_bit(nr, &cx231xx_devused);
1920*4882a593Smuzhiyun 	return retval;
1921*4882a593Smuzhiyun }
1922*4882a593Smuzhiyun 
1923*4882a593Smuzhiyun /*
1924*4882a593Smuzhiyun  * cx231xx_usb_disconnect()
1925*4882a593Smuzhiyun  * called when the device gets disconnected
1926*4882a593Smuzhiyun  * video device will be unregistered on v4l2_close in case it is still open
1927*4882a593Smuzhiyun  */
cx231xx_usb_disconnect(struct usb_interface * interface)1928*4882a593Smuzhiyun static void cx231xx_usb_disconnect(struct usb_interface *interface)
1929*4882a593Smuzhiyun {
1930*4882a593Smuzhiyun 	struct cx231xx *dev;
1931*4882a593Smuzhiyun 
1932*4882a593Smuzhiyun 	dev = usb_get_intfdata(interface);
1933*4882a593Smuzhiyun 	usb_set_intfdata(interface, NULL);
1934*4882a593Smuzhiyun 
1935*4882a593Smuzhiyun 	if (!dev)
1936*4882a593Smuzhiyun 		return;
1937*4882a593Smuzhiyun 
1938*4882a593Smuzhiyun 	if (!dev->udev)
1939*4882a593Smuzhiyun 		return;
1940*4882a593Smuzhiyun 
1941*4882a593Smuzhiyun 	dev->state |= DEV_DISCONNECTED;
1942*4882a593Smuzhiyun 
1943*4882a593Smuzhiyun 	flush_request_modules(dev);
1944*4882a593Smuzhiyun 
1945*4882a593Smuzhiyun 	/* wait until all current v4l2 io is finished then deallocate
1946*4882a593Smuzhiyun 	   resources */
1947*4882a593Smuzhiyun 	mutex_lock(&dev->lock);
1948*4882a593Smuzhiyun 
1949*4882a593Smuzhiyun 	wake_up_interruptible_all(&dev->open);
1950*4882a593Smuzhiyun 
1951*4882a593Smuzhiyun 	if (dev->users) {
1952*4882a593Smuzhiyun 		dev_warn(dev->dev,
1953*4882a593Smuzhiyun 			 "device %s is open! Deregistration and memory deallocation are deferred on close.\n",
1954*4882a593Smuzhiyun 			 video_device_node_name(&dev->vdev));
1955*4882a593Smuzhiyun 
1956*4882a593Smuzhiyun 		/* Even having users, it is safe to remove the RC i2c driver */
1957*4882a593Smuzhiyun 		cx231xx_ir_exit(dev);
1958*4882a593Smuzhiyun 
1959*4882a593Smuzhiyun 		if (dev->USE_ISO)
1960*4882a593Smuzhiyun 			cx231xx_uninit_isoc(dev);
1961*4882a593Smuzhiyun 		else
1962*4882a593Smuzhiyun 			cx231xx_uninit_bulk(dev);
1963*4882a593Smuzhiyun 		wake_up_interruptible(&dev->wait_frame);
1964*4882a593Smuzhiyun 		wake_up_interruptible(&dev->wait_stream);
1965*4882a593Smuzhiyun 	} else {
1966*4882a593Smuzhiyun 	}
1967*4882a593Smuzhiyun 
1968*4882a593Smuzhiyun 	cx231xx_close_extension(dev);
1969*4882a593Smuzhiyun 
1970*4882a593Smuzhiyun 	mutex_unlock(&dev->lock);
1971*4882a593Smuzhiyun 
1972*4882a593Smuzhiyun 	if (!dev->users)
1973*4882a593Smuzhiyun 		cx231xx_release_resources(dev);
1974*4882a593Smuzhiyun }
1975*4882a593Smuzhiyun 
1976*4882a593Smuzhiyun static struct usb_driver cx231xx_usb_driver = {
1977*4882a593Smuzhiyun 	.name = "cx231xx",
1978*4882a593Smuzhiyun 	.probe = cx231xx_usb_probe,
1979*4882a593Smuzhiyun 	.disconnect = cx231xx_usb_disconnect,
1980*4882a593Smuzhiyun 	.id_table = cx231xx_id_table,
1981*4882a593Smuzhiyun };
1982*4882a593Smuzhiyun 
1983*4882a593Smuzhiyun module_usb_driver(cx231xx_usb_driver);
1984