1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Driver for Xceive XC5000 "QAM/8VSB single chip tuner"
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2007 Xceive Corporation
6*4882a593Smuzhiyun * Copyright (c) 2007 Steven Toth <stoth@linuxtv.org>
7*4882a593Smuzhiyun * Copyright (c) 2009 Devin Heitmueller <dheitmueller@kernellabs.com>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/moduleparam.h>
12*4882a593Smuzhiyun #include <linux/videodev2.h>
13*4882a593Smuzhiyun #include <linux/delay.h>
14*4882a593Smuzhiyun #include <linux/workqueue.h>
15*4882a593Smuzhiyun #include <linux/dvb/frontend.h>
16*4882a593Smuzhiyun #include <linux/i2c.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include <media/dvb_frontend.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include "xc5000.h"
21*4882a593Smuzhiyun #include "tuner-i2c.h"
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun static int debug;
24*4882a593Smuzhiyun module_param(debug, int, 0644);
25*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun static int no_poweroff;
28*4882a593Smuzhiyun module_param(no_poweroff, int, 0644);
29*4882a593Smuzhiyun MODULE_PARM_DESC(no_poweroff, "0 (default) powers device off when not used.\n"
30*4882a593Smuzhiyun "\t\t1 keep device energized and with tuner ready all the times.\n"
31*4882a593Smuzhiyun "\t\tFaster, but consumes more power and keeps the device hotter");
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun static DEFINE_MUTEX(xc5000_list_mutex);
34*4882a593Smuzhiyun static LIST_HEAD(hybrid_tuner_instance_list);
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #define dprintk(level, fmt, arg...) if (debug >= level) \
37*4882a593Smuzhiyun printk(KERN_INFO "%s: " fmt, "xc5000", ## arg)
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun struct xc5000_priv {
40*4882a593Smuzhiyun struct tuner_i2c_props i2c_props;
41*4882a593Smuzhiyun struct list_head hybrid_tuner_instance_list;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun u32 if_khz;
44*4882a593Smuzhiyun u16 xtal_khz;
45*4882a593Smuzhiyun u32 freq_hz, freq_offset;
46*4882a593Smuzhiyun u32 bandwidth;
47*4882a593Smuzhiyun u8 video_standard;
48*4882a593Smuzhiyun unsigned int mode;
49*4882a593Smuzhiyun u8 rf_mode;
50*4882a593Smuzhiyun u8 radio_input;
51*4882a593Smuzhiyun u16 output_amp;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun int chip_id;
54*4882a593Smuzhiyun u16 pll_register_no;
55*4882a593Smuzhiyun u8 init_status_supported;
56*4882a593Smuzhiyun u8 fw_checksum_supported;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun struct dvb_frontend *fe;
59*4882a593Smuzhiyun struct delayed_work timer_sleep;
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun const struct firmware *firmware;
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun /* Misc Defines */
65*4882a593Smuzhiyun #define MAX_TV_STANDARD 24
66*4882a593Smuzhiyun #define XC_MAX_I2C_WRITE_LENGTH 64
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun /* Time to suspend after the .sleep callback is called */
69*4882a593Smuzhiyun #define XC5000_SLEEP_TIME 5000 /* ms */
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun /* Signal Types */
72*4882a593Smuzhiyun #define XC_RF_MODE_AIR 0
73*4882a593Smuzhiyun #define XC_RF_MODE_CABLE 1
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun /* Product id */
76*4882a593Smuzhiyun #define XC_PRODUCT_ID_FW_NOT_LOADED 0x2000
77*4882a593Smuzhiyun #define XC_PRODUCT_ID_FW_LOADED 0x1388
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun /* Registers */
80*4882a593Smuzhiyun #define XREG_INIT 0x00
81*4882a593Smuzhiyun #define XREG_VIDEO_MODE 0x01
82*4882a593Smuzhiyun #define XREG_AUDIO_MODE 0x02
83*4882a593Smuzhiyun #define XREG_RF_FREQ 0x03
84*4882a593Smuzhiyun #define XREG_D_CODE 0x04
85*4882a593Smuzhiyun #define XREG_IF_OUT 0x05
86*4882a593Smuzhiyun #define XREG_SEEK_MODE 0x07
87*4882a593Smuzhiyun #define XREG_POWER_DOWN 0x0A /* Obsolete */
88*4882a593Smuzhiyun /* Set the output amplitude - SIF for analog, DTVP/DTVN for digital */
89*4882a593Smuzhiyun #define XREG_OUTPUT_AMP 0x0B
90*4882a593Smuzhiyun #define XREG_SIGNALSOURCE 0x0D /* 0=Air, 1=Cable */
91*4882a593Smuzhiyun #define XREG_SMOOTHEDCVBS 0x0E
92*4882a593Smuzhiyun #define XREG_XTALFREQ 0x0F
93*4882a593Smuzhiyun #define XREG_FINERFREQ 0x10
94*4882a593Smuzhiyun #define XREG_DDIMODE 0x11
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun #define XREG_ADC_ENV 0x00
97*4882a593Smuzhiyun #define XREG_QUALITY 0x01
98*4882a593Smuzhiyun #define XREG_FRAME_LINES 0x02
99*4882a593Smuzhiyun #define XREG_HSYNC_FREQ 0x03
100*4882a593Smuzhiyun #define XREG_LOCK 0x04
101*4882a593Smuzhiyun #define XREG_FREQ_ERROR 0x05
102*4882a593Smuzhiyun #define XREG_SNR 0x06
103*4882a593Smuzhiyun #define XREG_VERSION 0x07
104*4882a593Smuzhiyun #define XREG_PRODUCT_ID 0x08
105*4882a593Smuzhiyun #define XREG_BUSY 0x09
106*4882a593Smuzhiyun #define XREG_BUILD 0x0D
107*4882a593Smuzhiyun #define XREG_TOTALGAIN 0x0F
108*4882a593Smuzhiyun #define XREG_FW_CHECKSUM 0x12
109*4882a593Smuzhiyun #define XREG_INIT_STATUS 0x13
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun /*
112*4882a593Smuzhiyun Basic firmware description. This will remain with
113*4882a593Smuzhiyun the driver for documentation purposes.
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun This represents an I2C firmware file encoded as a
116*4882a593Smuzhiyun string of unsigned char. Format is as follows:
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun char[0 ]=len0_MSB -> len = len_MSB * 256 + len_LSB
119*4882a593Smuzhiyun char[1 ]=len0_LSB -> length of first write transaction
120*4882a593Smuzhiyun char[2 ]=data0 -> first byte to be sent
121*4882a593Smuzhiyun char[3 ]=data1
122*4882a593Smuzhiyun char[4 ]=data2
123*4882a593Smuzhiyun char[ ]=...
124*4882a593Smuzhiyun char[M ]=dataN -> last byte to be sent
125*4882a593Smuzhiyun char[M+1]=len1_MSB -> len = len_MSB * 256 + len_LSB
126*4882a593Smuzhiyun char[M+2]=len1_LSB -> length of second write transaction
127*4882a593Smuzhiyun char[M+3]=data0
128*4882a593Smuzhiyun char[M+4]=data1
129*4882a593Smuzhiyun ...
130*4882a593Smuzhiyun etc.
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun The [len] value should be interpreted as follows:
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun len= len_MSB _ len_LSB
135*4882a593Smuzhiyun len=1111_1111_1111_1111 : End of I2C_SEQUENCE
136*4882a593Smuzhiyun len=0000_0000_0000_0000 : Reset command: Do hardware reset
137*4882a593Smuzhiyun len=0NNN_NNNN_NNNN_NNNN : Normal transaction: number of bytes = {1:32767)
138*4882a593Smuzhiyun len=1WWW_WWWW_WWWW_WWWW : Wait command: wait for {1:32767} ms
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun For the RESET and WAIT commands, the two following bytes will contain
141*4882a593Smuzhiyun immediately the length of the following transaction.
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun */
144*4882a593Smuzhiyun struct XC_TV_STANDARD {
145*4882a593Smuzhiyun char *name;
146*4882a593Smuzhiyun u16 audio_mode;
147*4882a593Smuzhiyun u16 video_mode;
148*4882a593Smuzhiyun };
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun /* Tuner standards */
151*4882a593Smuzhiyun #define MN_NTSC_PAL_BTSC 0
152*4882a593Smuzhiyun #define MN_NTSC_PAL_A2 1
153*4882a593Smuzhiyun #define MN_NTSC_PAL_EIAJ 2
154*4882a593Smuzhiyun #define MN_NTSC_PAL_MONO 3
155*4882a593Smuzhiyun #define BG_PAL_A2 4
156*4882a593Smuzhiyun #define BG_PAL_NICAM 5
157*4882a593Smuzhiyun #define BG_PAL_MONO 6
158*4882a593Smuzhiyun #define I_PAL_NICAM 7
159*4882a593Smuzhiyun #define I_PAL_NICAM_MONO 8
160*4882a593Smuzhiyun #define DK_PAL_A2 9
161*4882a593Smuzhiyun #define DK_PAL_NICAM 10
162*4882a593Smuzhiyun #define DK_PAL_MONO 11
163*4882a593Smuzhiyun #define DK_SECAM_A2DK1 12
164*4882a593Smuzhiyun #define DK_SECAM_A2LDK3 13
165*4882a593Smuzhiyun #define DK_SECAM_A2MONO 14
166*4882a593Smuzhiyun #define L_SECAM_NICAM 15
167*4882a593Smuzhiyun #define LC_SECAM_NICAM 16
168*4882a593Smuzhiyun #define DTV6 17
169*4882a593Smuzhiyun #define DTV8 18
170*4882a593Smuzhiyun #define DTV7_8 19
171*4882a593Smuzhiyun #define DTV7 20
172*4882a593Smuzhiyun #define FM_RADIO_INPUT2 21
173*4882a593Smuzhiyun #define FM_RADIO_INPUT1 22
174*4882a593Smuzhiyun #define FM_RADIO_INPUT1_MONO 23
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun static struct XC_TV_STANDARD xc5000_standard[MAX_TV_STANDARD] = {
177*4882a593Smuzhiyun {"M/N-NTSC/PAL-BTSC", 0x0400, 0x8020},
178*4882a593Smuzhiyun {"M/N-NTSC/PAL-A2", 0x0600, 0x8020},
179*4882a593Smuzhiyun {"M/N-NTSC/PAL-EIAJ", 0x0440, 0x8020},
180*4882a593Smuzhiyun {"M/N-NTSC/PAL-Mono", 0x0478, 0x8020},
181*4882a593Smuzhiyun {"B/G-PAL-A2", 0x0A00, 0x8049},
182*4882a593Smuzhiyun {"B/G-PAL-NICAM", 0x0C04, 0x8049},
183*4882a593Smuzhiyun {"B/G-PAL-MONO", 0x0878, 0x8059},
184*4882a593Smuzhiyun {"I-PAL-NICAM", 0x1080, 0x8009},
185*4882a593Smuzhiyun {"I-PAL-NICAM-MONO", 0x0E78, 0x8009},
186*4882a593Smuzhiyun {"D/K-PAL-A2", 0x1600, 0x8009},
187*4882a593Smuzhiyun {"D/K-PAL-NICAM", 0x0E80, 0x8009},
188*4882a593Smuzhiyun {"D/K-PAL-MONO", 0x1478, 0x8009},
189*4882a593Smuzhiyun {"D/K-SECAM-A2 DK1", 0x1200, 0x8009},
190*4882a593Smuzhiyun {"D/K-SECAM-A2 L/DK3", 0x0E00, 0x8009},
191*4882a593Smuzhiyun {"D/K-SECAM-A2 MONO", 0x1478, 0x8009},
192*4882a593Smuzhiyun {"L-SECAM-NICAM", 0x8E82, 0x0009},
193*4882a593Smuzhiyun {"L'-SECAM-NICAM", 0x8E82, 0x4009},
194*4882a593Smuzhiyun {"DTV6", 0x00C0, 0x8002},
195*4882a593Smuzhiyun {"DTV8", 0x00C0, 0x800B},
196*4882a593Smuzhiyun {"DTV7/8", 0x00C0, 0x801B},
197*4882a593Smuzhiyun {"DTV7", 0x00C0, 0x8007},
198*4882a593Smuzhiyun {"FM Radio-INPUT2", 0x9802, 0x9002},
199*4882a593Smuzhiyun {"FM Radio-INPUT1", 0x0208, 0x9002},
200*4882a593Smuzhiyun {"FM Radio-INPUT1_MONO", 0x0278, 0x9002}
201*4882a593Smuzhiyun };
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun struct xc5000_fw_cfg {
205*4882a593Smuzhiyun char *name;
206*4882a593Smuzhiyun u16 size;
207*4882a593Smuzhiyun u16 pll_reg;
208*4882a593Smuzhiyun u8 init_status_supported;
209*4882a593Smuzhiyun u8 fw_checksum_supported;
210*4882a593Smuzhiyun };
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun #define XC5000A_FIRMWARE "dvb-fe-xc5000-1.6.114.fw"
213*4882a593Smuzhiyun static const struct xc5000_fw_cfg xc5000a_1_6_114 = {
214*4882a593Smuzhiyun .name = XC5000A_FIRMWARE,
215*4882a593Smuzhiyun .size = 12401,
216*4882a593Smuzhiyun .pll_reg = 0x806c,
217*4882a593Smuzhiyun };
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun #define XC5000C_FIRMWARE "dvb-fe-xc5000c-4.1.30.7.fw"
220*4882a593Smuzhiyun static const struct xc5000_fw_cfg xc5000c_41_024_5 = {
221*4882a593Smuzhiyun .name = XC5000C_FIRMWARE,
222*4882a593Smuzhiyun .size = 16497,
223*4882a593Smuzhiyun .pll_reg = 0x13,
224*4882a593Smuzhiyun .init_status_supported = 1,
225*4882a593Smuzhiyun .fw_checksum_supported = 1,
226*4882a593Smuzhiyun };
227*4882a593Smuzhiyun
xc5000_assign_firmware(int chip_id)228*4882a593Smuzhiyun static inline const struct xc5000_fw_cfg *xc5000_assign_firmware(int chip_id)
229*4882a593Smuzhiyun {
230*4882a593Smuzhiyun switch (chip_id) {
231*4882a593Smuzhiyun default:
232*4882a593Smuzhiyun case XC5000A:
233*4882a593Smuzhiyun return &xc5000a_1_6_114;
234*4882a593Smuzhiyun case XC5000C:
235*4882a593Smuzhiyun return &xc5000c_41_024_5;
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun static int xc_load_fw_and_init_tuner(struct dvb_frontend *fe, int force);
240*4882a593Smuzhiyun static int xc5000_is_firmware_loaded(struct dvb_frontend *fe);
241*4882a593Smuzhiyun static int xc5000_readreg(struct xc5000_priv *priv, u16 reg, u16 *val);
242*4882a593Smuzhiyun static int xc5000_tuner_reset(struct dvb_frontend *fe);
243*4882a593Smuzhiyun
xc_send_i2c_data(struct xc5000_priv * priv,u8 * buf,int len)244*4882a593Smuzhiyun static int xc_send_i2c_data(struct xc5000_priv *priv, u8 *buf, int len)
245*4882a593Smuzhiyun {
246*4882a593Smuzhiyun struct i2c_msg msg = { .addr = priv->i2c_props.addr,
247*4882a593Smuzhiyun .flags = 0, .buf = buf, .len = len };
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun if (i2c_transfer(priv->i2c_props.adap, &msg, 1) != 1) {
250*4882a593Smuzhiyun printk(KERN_ERR "xc5000: I2C write failed (len=%i)\n", len);
251*4882a593Smuzhiyun return -EREMOTEIO;
252*4882a593Smuzhiyun }
253*4882a593Smuzhiyun return 0;
254*4882a593Smuzhiyun }
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun #if 0
257*4882a593Smuzhiyun /* This routine is never used because the only time we read data from the
258*4882a593Smuzhiyun i2c bus is when we read registers, and we want that to be an atomic i2c
259*4882a593Smuzhiyun transaction in case we are on a multi-master bus */
260*4882a593Smuzhiyun static int xc_read_i2c_data(struct xc5000_priv *priv, u8 *buf, int len)
261*4882a593Smuzhiyun {
262*4882a593Smuzhiyun struct i2c_msg msg = { .addr = priv->i2c_props.addr,
263*4882a593Smuzhiyun .flags = I2C_M_RD, .buf = buf, .len = len };
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun if (i2c_transfer(priv->i2c_props.adap, &msg, 1) != 1) {
266*4882a593Smuzhiyun printk(KERN_ERR "xc5000 I2C read failed (len=%i)\n", len);
267*4882a593Smuzhiyun return -EREMOTEIO;
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun return 0;
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun #endif
272*4882a593Smuzhiyun
xc5000_readreg(struct xc5000_priv * priv,u16 reg,u16 * val)273*4882a593Smuzhiyun static int xc5000_readreg(struct xc5000_priv *priv, u16 reg, u16 *val)
274*4882a593Smuzhiyun {
275*4882a593Smuzhiyun u8 buf[2] = { reg >> 8, reg & 0xff };
276*4882a593Smuzhiyun u8 bval[2] = { 0, 0 };
277*4882a593Smuzhiyun struct i2c_msg msg[2] = {
278*4882a593Smuzhiyun { .addr = priv->i2c_props.addr,
279*4882a593Smuzhiyun .flags = 0, .buf = &buf[0], .len = 2 },
280*4882a593Smuzhiyun { .addr = priv->i2c_props.addr,
281*4882a593Smuzhiyun .flags = I2C_M_RD, .buf = &bval[0], .len = 2 },
282*4882a593Smuzhiyun };
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun if (i2c_transfer(priv->i2c_props.adap, msg, 2) != 2) {
285*4882a593Smuzhiyun printk(KERN_WARNING "xc5000: I2C read failed\n");
286*4882a593Smuzhiyun return -EREMOTEIO;
287*4882a593Smuzhiyun }
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun *val = (bval[0] << 8) | bval[1];
290*4882a593Smuzhiyun return 0;
291*4882a593Smuzhiyun }
292*4882a593Smuzhiyun
xc5000_tuner_reset(struct dvb_frontend * fe)293*4882a593Smuzhiyun static int xc5000_tuner_reset(struct dvb_frontend *fe)
294*4882a593Smuzhiyun {
295*4882a593Smuzhiyun struct xc5000_priv *priv = fe->tuner_priv;
296*4882a593Smuzhiyun int ret;
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun dprintk(1, "%s()\n", __func__);
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun if (fe->callback) {
301*4882a593Smuzhiyun ret = fe->callback(((fe->dvb) && (fe->dvb->priv)) ?
302*4882a593Smuzhiyun fe->dvb->priv :
303*4882a593Smuzhiyun priv->i2c_props.adap->algo_data,
304*4882a593Smuzhiyun DVB_FRONTEND_COMPONENT_TUNER,
305*4882a593Smuzhiyun XC5000_TUNER_RESET, 0);
306*4882a593Smuzhiyun if (ret) {
307*4882a593Smuzhiyun printk(KERN_ERR "xc5000: reset failed\n");
308*4882a593Smuzhiyun return ret;
309*4882a593Smuzhiyun }
310*4882a593Smuzhiyun } else {
311*4882a593Smuzhiyun printk(KERN_ERR "xc5000: no tuner reset callback function, fatal\n");
312*4882a593Smuzhiyun return -EINVAL;
313*4882a593Smuzhiyun }
314*4882a593Smuzhiyun return 0;
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun
xc_write_reg(struct xc5000_priv * priv,u16 reg_addr,u16 i2c_data)317*4882a593Smuzhiyun static int xc_write_reg(struct xc5000_priv *priv, u16 reg_addr, u16 i2c_data)
318*4882a593Smuzhiyun {
319*4882a593Smuzhiyun u8 buf[4];
320*4882a593Smuzhiyun int watch_dog_timer = 100;
321*4882a593Smuzhiyun int result;
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun buf[0] = (reg_addr >> 8) & 0xFF;
324*4882a593Smuzhiyun buf[1] = reg_addr & 0xFF;
325*4882a593Smuzhiyun buf[2] = (i2c_data >> 8) & 0xFF;
326*4882a593Smuzhiyun buf[3] = i2c_data & 0xFF;
327*4882a593Smuzhiyun result = xc_send_i2c_data(priv, buf, 4);
328*4882a593Smuzhiyun if (result == 0) {
329*4882a593Smuzhiyun /* wait for busy flag to clear */
330*4882a593Smuzhiyun while ((watch_dog_timer > 0) && (result == 0)) {
331*4882a593Smuzhiyun result = xc5000_readreg(priv, XREG_BUSY, (u16 *)buf);
332*4882a593Smuzhiyun if (result == 0) {
333*4882a593Smuzhiyun if ((buf[0] == 0) && (buf[1] == 0)) {
334*4882a593Smuzhiyun /* busy flag cleared */
335*4882a593Smuzhiyun break;
336*4882a593Smuzhiyun } else {
337*4882a593Smuzhiyun msleep(5); /* wait 5 ms */
338*4882a593Smuzhiyun watch_dog_timer--;
339*4882a593Smuzhiyun }
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun }
343*4882a593Smuzhiyun if (watch_dog_timer <= 0)
344*4882a593Smuzhiyun result = -EREMOTEIO;
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun return result;
347*4882a593Smuzhiyun }
348*4882a593Smuzhiyun
xc_load_i2c_sequence(struct dvb_frontend * fe,const u8 * i2c_sequence)349*4882a593Smuzhiyun static int xc_load_i2c_sequence(struct dvb_frontend *fe, const u8 *i2c_sequence)
350*4882a593Smuzhiyun {
351*4882a593Smuzhiyun struct xc5000_priv *priv = fe->tuner_priv;
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun int i, nbytes_to_send, result;
354*4882a593Smuzhiyun unsigned int len, pos, index;
355*4882a593Smuzhiyun u8 buf[XC_MAX_I2C_WRITE_LENGTH];
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun index = 0;
358*4882a593Smuzhiyun while ((i2c_sequence[index] != 0xFF) ||
359*4882a593Smuzhiyun (i2c_sequence[index + 1] != 0xFF)) {
360*4882a593Smuzhiyun len = i2c_sequence[index] * 256 + i2c_sequence[index+1];
361*4882a593Smuzhiyun if (len == 0x0000) {
362*4882a593Smuzhiyun /* RESET command */
363*4882a593Smuzhiyun result = xc5000_tuner_reset(fe);
364*4882a593Smuzhiyun index += 2;
365*4882a593Smuzhiyun if (result != 0)
366*4882a593Smuzhiyun return result;
367*4882a593Smuzhiyun } else if (len & 0x8000) {
368*4882a593Smuzhiyun /* WAIT command */
369*4882a593Smuzhiyun msleep(len & 0x7FFF);
370*4882a593Smuzhiyun index += 2;
371*4882a593Smuzhiyun } else {
372*4882a593Smuzhiyun /* Send i2c data whilst ensuring individual transactions
373*4882a593Smuzhiyun * do not exceed XC_MAX_I2C_WRITE_LENGTH bytes.
374*4882a593Smuzhiyun */
375*4882a593Smuzhiyun index += 2;
376*4882a593Smuzhiyun buf[0] = i2c_sequence[index];
377*4882a593Smuzhiyun buf[1] = i2c_sequence[index + 1];
378*4882a593Smuzhiyun pos = 2;
379*4882a593Smuzhiyun while (pos < len) {
380*4882a593Smuzhiyun if ((len - pos) > XC_MAX_I2C_WRITE_LENGTH - 2)
381*4882a593Smuzhiyun nbytes_to_send =
382*4882a593Smuzhiyun XC_MAX_I2C_WRITE_LENGTH;
383*4882a593Smuzhiyun else
384*4882a593Smuzhiyun nbytes_to_send = (len - pos + 2);
385*4882a593Smuzhiyun for (i = 2; i < nbytes_to_send; i++) {
386*4882a593Smuzhiyun buf[i] = i2c_sequence[index + pos +
387*4882a593Smuzhiyun i - 2];
388*4882a593Smuzhiyun }
389*4882a593Smuzhiyun result = xc_send_i2c_data(priv, buf,
390*4882a593Smuzhiyun nbytes_to_send);
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun if (result != 0)
393*4882a593Smuzhiyun return result;
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun pos += nbytes_to_send - 2;
396*4882a593Smuzhiyun }
397*4882a593Smuzhiyun index += len;
398*4882a593Smuzhiyun }
399*4882a593Smuzhiyun }
400*4882a593Smuzhiyun return 0;
401*4882a593Smuzhiyun }
402*4882a593Smuzhiyun
xc_initialize(struct xc5000_priv * priv)403*4882a593Smuzhiyun static int xc_initialize(struct xc5000_priv *priv)
404*4882a593Smuzhiyun {
405*4882a593Smuzhiyun dprintk(1, "%s()\n", __func__);
406*4882a593Smuzhiyun return xc_write_reg(priv, XREG_INIT, 0);
407*4882a593Smuzhiyun }
408*4882a593Smuzhiyun
xc_set_tv_standard(struct xc5000_priv * priv,u16 video_mode,u16 audio_mode,u8 radio_mode)409*4882a593Smuzhiyun static int xc_set_tv_standard(struct xc5000_priv *priv,
410*4882a593Smuzhiyun u16 video_mode, u16 audio_mode, u8 radio_mode)
411*4882a593Smuzhiyun {
412*4882a593Smuzhiyun int ret;
413*4882a593Smuzhiyun dprintk(1, "%s(0x%04x,0x%04x)\n", __func__, video_mode, audio_mode);
414*4882a593Smuzhiyun if (radio_mode) {
415*4882a593Smuzhiyun dprintk(1, "%s() Standard = %s\n",
416*4882a593Smuzhiyun __func__,
417*4882a593Smuzhiyun xc5000_standard[radio_mode].name);
418*4882a593Smuzhiyun } else {
419*4882a593Smuzhiyun dprintk(1, "%s() Standard = %s\n",
420*4882a593Smuzhiyun __func__,
421*4882a593Smuzhiyun xc5000_standard[priv->video_standard].name);
422*4882a593Smuzhiyun }
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun ret = xc_write_reg(priv, XREG_VIDEO_MODE, video_mode);
425*4882a593Smuzhiyun if (ret == 0)
426*4882a593Smuzhiyun ret = xc_write_reg(priv, XREG_AUDIO_MODE, audio_mode);
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun return ret;
429*4882a593Smuzhiyun }
430*4882a593Smuzhiyun
xc_set_signal_source(struct xc5000_priv * priv,u16 rf_mode)431*4882a593Smuzhiyun static int xc_set_signal_source(struct xc5000_priv *priv, u16 rf_mode)
432*4882a593Smuzhiyun {
433*4882a593Smuzhiyun dprintk(1, "%s(%d) Source = %s\n", __func__, rf_mode,
434*4882a593Smuzhiyun rf_mode == XC_RF_MODE_AIR ? "ANTENNA" : "CABLE");
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun if ((rf_mode != XC_RF_MODE_AIR) && (rf_mode != XC_RF_MODE_CABLE)) {
437*4882a593Smuzhiyun rf_mode = XC_RF_MODE_CABLE;
438*4882a593Smuzhiyun printk(KERN_ERR
439*4882a593Smuzhiyun "%s(), Invalid mode, defaulting to CABLE",
440*4882a593Smuzhiyun __func__);
441*4882a593Smuzhiyun }
442*4882a593Smuzhiyun return xc_write_reg(priv, XREG_SIGNALSOURCE, rf_mode);
443*4882a593Smuzhiyun }
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun static const struct dvb_tuner_ops xc5000_tuner_ops;
446*4882a593Smuzhiyun
xc_set_rf_frequency(struct xc5000_priv * priv,u32 freq_hz)447*4882a593Smuzhiyun static int xc_set_rf_frequency(struct xc5000_priv *priv, u32 freq_hz)
448*4882a593Smuzhiyun {
449*4882a593Smuzhiyun u16 freq_code;
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun dprintk(1, "%s(%u)\n", __func__, freq_hz);
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun if ((freq_hz > xc5000_tuner_ops.info.frequency_max_hz) ||
454*4882a593Smuzhiyun (freq_hz < xc5000_tuner_ops.info.frequency_min_hz))
455*4882a593Smuzhiyun return -EINVAL;
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun freq_code = (u16)(freq_hz / 15625);
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun /* Starting in firmware version 1.1.44, Xceive recommends using the
460*4882a593Smuzhiyun FINERFREQ for all normal tuning (the doc indicates reg 0x03 should
461*4882a593Smuzhiyun only be used for fast scanning for channel lock) */
462*4882a593Smuzhiyun return xc_write_reg(priv, XREG_FINERFREQ, freq_code);
463*4882a593Smuzhiyun }
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun
xc_set_IF_frequency(struct xc5000_priv * priv,u32 freq_khz)466*4882a593Smuzhiyun static int xc_set_IF_frequency(struct xc5000_priv *priv, u32 freq_khz)
467*4882a593Smuzhiyun {
468*4882a593Smuzhiyun u32 freq_code = (freq_khz * 1024)/1000;
469*4882a593Smuzhiyun dprintk(1, "%s(freq_khz = %d) freq_code = 0x%x\n",
470*4882a593Smuzhiyun __func__, freq_khz, freq_code);
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun return xc_write_reg(priv, XREG_IF_OUT, freq_code);
473*4882a593Smuzhiyun }
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun
xc_get_adc_envelope(struct xc5000_priv * priv,u16 * adc_envelope)476*4882a593Smuzhiyun static int xc_get_adc_envelope(struct xc5000_priv *priv, u16 *adc_envelope)
477*4882a593Smuzhiyun {
478*4882a593Smuzhiyun return xc5000_readreg(priv, XREG_ADC_ENV, adc_envelope);
479*4882a593Smuzhiyun }
480*4882a593Smuzhiyun
xc_get_frequency_error(struct xc5000_priv * priv,u32 * freq_error_hz)481*4882a593Smuzhiyun static int xc_get_frequency_error(struct xc5000_priv *priv, u32 *freq_error_hz)
482*4882a593Smuzhiyun {
483*4882a593Smuzhiyun int result;
484*4882a593Smuzhiyun u16 reg_data;
485*4882a593Smuzhiyun u32 tmp;
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun result = xc5000_readreg(priv, XREG_FREQ_ERROR, ®_data);
488*4882a593Smuzhiyun if (result != 0)
489*4882a593Smuzhiyun return result;
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun tmp = (u32)reg_data;
492*4882a593Smuzhiyun (*freq_error_hz) = (tmp * 15625) / 1000;
493*4882a593Smuzhiyun return result;
494*4882a593Smuzhiyun }
495*4882a593Smuzhiyun
xc_get_lock_status(struct xc5000_priv * priv,u16 * lock_status)496*4882a593Smuzhiyun static int xc_get_lock_status(struct xc5000_priv *priv, u16 *lock_status)
497*4882a593Smuzhiyun {
498*4882a593Smuzhiyun return xc5000_readreg(priv, XREG_LOCK, lock_status);
499*4882a593Smuzhiyun }
500*4882a593Smuzhiyun
xc_get_version(struct xc5000_priv * priv,u8 * hw_majorversion,u8 * hw_minorversion,u8 * fw_majorversion,u8 * fw_minorversion)501*4882a593Smuzhiyun static int xc_get_version(struct xc5000_priv *priv,
502*4882a593Smuzhiyun u8 *hw_majorversion, u8 *hw_minorversion,
503*4882a593Smuzhiyun u8 *fw_majorversion, u8 *fw_minorversion)
504*4882a593Smuzhiyun {
505*4882a593Smuzhiyun u16 data;
506*4882a593Smuzhiyun int result;
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun result = xc5000_readreg(priv, XREG_VERSION, &data);
509*4882a593Smuzhiyun if (result != 0)
510*4882a593Smuzhiyun return result;
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun (*hw_majorversion) = (data >> 12) & 0x0F;
513*4882a593Smuzhiyun (*hw_minorversion) = (data >> 8) & 0x0F;
514*4882a593Smuzhiyun (*fw_majorversion) = (data >> 4) & 0x0F;
515*4882a593Smuzhiyun (*fw_minorversion) = data & 0x0F;
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun return 0;
518*4882a593Smuzhiyun }
519*4882a593Smuzhiyun
xc_get_buildversion(struct xc5000_priv * priv,u16 * buildrev)520*4882a593Smuzhiyun static int xc_get_buildversion(struct xc5000_priv *priv, u16 *buildrev)
521*4882a593Smuzhiyun {
522*4882a593Smuzhiyun return xc5000_readreg(priv, XREG_BUILD, buildrev);
523*4882a593Smuzhiyun }
524*4882a593Smuzhiyun
xc_get_hsync_freq(struct xc5000_priv * priv,u32 * hsync_freq_hz)525*4882a593Smuzhiyun static int xc_get_hsync_freq(struct xc5000_priv *priv, u32 *hsync_freq_hz)
526*4882a593Smuzhiyun {
527*4882a593Smuzhiyun u16 reg_data;
528*4882a593Smuzhiyun int result;
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun result = xc5000_readreg(priv, XREG_HSYNC_FREQ, ®_data);
531*4882a593Smuzhiyun if (result != 0)
532*4882a593Smuzhiyun return result;
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun (*hsync_freq_hz) = ((reg_data & 0x0fff) * 763)/100;
535*4882a593Smuzhiyun return result;
536*4882a593Smuzhiyun }
537*4882a593Smuzhiyun
xc_get_frame_lines(struct xc5000_priv * priv,u16 * frame_lines)538*4882a593Smuzhiyun static int xc_get_frame_lines(struct xc5000_priv *priv, u16 *frame_lines)
539*4882a593Smuzhiyun {
540*4882a593Smuzhiyun return xc5000_readreg(priv, XREG_FRAME_LINES, frame_lines);
541*4882a593Smuzhiyun }
542*4882a593Smuzhiyun
xc_get_quality(struct xc5000_priv * priv,u16 * quality)543*4882a593Smuzhiyun static int xc_get_quality(struct xc5000_priv *priv, u16 *quality)
544*4882a593Smuzhiyun {
545*4882a593Smuzhiyun return xc5000_readreg(priv, XREG_QUALITY, quality);
546*4882a593Smuzhiyun }
547*4882a593Smuzhiyun
xc_get_analogsnr(struct xc5000_priv * priv,u16 * snr)548*4882a593Smuzhiyun static int xc_get_analogsnr(struct xc5000_priv *priv, u16 *snr)
549*4882a593Smuzhiyun {
550*4882a593Smuzhiyun return xc5000_readreg(priv, XREG_SNR, snr);
551*4882a593Smuzhiyun }
552*4882a593Smuzhiyun
xc_get_totalgain(struct xc5000_priv * priv,u16 * totalgain)553*4882a593Smuzhiyun static int xc_get_totalgain(struct xc5000_priv *priv, u16 *totalgain)
554*4882a593Smuzhiyun {
555*4882a593Smuzhiyun return xc5000_readreg(priv, XREG_TOTALGAIN, totalgain);
556*4882a593Smuzhiyun }
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun #define XC_TUNE_ANALOG 0
559*4882a593Smuzhiyun #define XC_TUNE_DIGITAL 1
xc_tune_channel(struct xc5000_priv * priv,u32 freq_hz,int mode)560*4882a593Smuzhiyun static int xc_tune_channel(struct xc5000_priv *priv, u32 freq_hz, int mode)
561*4882a593Smuzhiyun {
562*4882a593Smuzhiyun dprintk(1, "%s(%u)\n", __func__, freq_hz);
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun if (xc_set_rf_frequency(priv, freq_hz) != 0)
565*4882a593Smuzhiyun return -EREMOTEIO;
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun return 0;
568*4882a593Smuzhiyun }
569*4882a593Smuzhiyun
xc_set_xtal(struct dvb_frontend * fe)570*4882a593Smuzhiyun static int xc_set_xtal(struct dvb_frontend *fe)
571*4882a593Smuzhiyun {
572*4882a593Smuzhiyun struct xc5000_priv *priv = fe->tuner_priv;
573*4882a593Smuzhiyun int ret = 0;
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun switch (priv->chip_id) {
576*4882a593Smuzhiyun default:
577*4882a593Smuzhiyun case XC5000A:
578*4882a593Smuzhiyun /* 32.000 MHz xtal is default */
579*4882a593Smuzhiyun break;
580*4882a593Smuzhiyun case XC5000C:
581*4882a593Smuzhiyun switch (priv->xtal_khz) {
582*4882a593Smuzhiyun default:
583*4882a593Smuzhiyun case 32000:
584*4882a593Smuzhiyun /* 32.000 MHz xtal is default */
585*4882a593Smuzhiyun break;
586*4882a593Smuzhiyun case 31875:
587*4882a593Smuzhiyun /* 31.875 MHz xtal configuration */
588*4882a593Smuzhiyun ret = xc_write_reg(priv, 0x000f, 0x8081);
589*4882a593Smuzhiyun break;
590*4882a593Smuzhiyun }
591*4882a593Smuzhiyun break;
592*4882a593Smuzhiyun }
593*4882a593Smuzhiyun return ret;
594*4882a593Smuzhiyun }
595*4882a593Smuzhiyun
xc5000_fwupload(struct dvb_frontend * fe,const struct xc5000_fw_cfg * desired_fw,const struct firmware * fw)596*4882a593Smuzhiyun static int xc5000_fwupload(struct dvb_frontend *fe,
597*4882a593Smuzhiyun const struct xc5000_fw_cfg *desired_fw,
598*4882a593Smuzhiyun const struct firmware *fw)
599*4882a593Smuzhiyun {
600*4882a593Smuzhiyun struct xc5000_priv *priv = fe->tuner_priv;
601*4882a593Smuzhiyun int ret;
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun /* request the firmware, this will block and timeout */
604*4882a593Smuzhiyun dprintk(1, "waiting for firmware upload (%s)...\n",
605*4882a593Smuzhiyun desired_fw->name);
606*4882a593Smuzhiyun
607*4882a593Smuzhiyun priv->pll_register_no = desired_fw->pll_reg;
608*4882a593Smuzhiyun priv->init_status_supported = desired_fw->init_status_supported;
609*4882a593Smuzhiyun priv->fw_checksum_supported = desired_fw->fw_checksum_supported;
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun
612*4882a593Smuzhiyun dprintk(1, "firmware uploading...\n");
613*4882a593Smuzhiyun ret = xc_load_i2c_sequence(fe, fw->data);
614*4882a593Smuzhiyun if (!ret) {
615*4882a593Smuzhiyun ret = xc_set_xtal(fe);
616*4882a593Smuzhiyun dprintk(1, "Firmware upload complete...\n");
617*4882a593Smuzhiyun } else
618*4882a593Smuzhiyun printk(KERN_ERR "xc5000: firmware upload failed...\n");
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun return ret;
621*4882a593Smuzhiyun }
622*4882a593Smuzhiyun
xc_debug_dump(struct xc5000_priv * priv)623*4882a593Smuzhiyun static void xc_debug_dump(struct xc5000_priv *priv)
624*4882a593Smuzhiyun {
625*4882a593Smuzhiyun u16 adc_envelope;
626*4882a593Smuzhiyun u32 freq_error_hz = 0;
627*4882a593Smuzhiyun u16 lock_status;
628*4882a593Smuzhiyun u32 hsync_freq_hz = 0;
629*4882a593Smuzhiyun u16 frame_lines;
630*4882a593Smuzhiyun u16 quality;
631*4882a593Smuzhiyun u16 snr;
632*4882a593Smuzhiyun u16 totalgain;
633*4882a593Smuzhiyun u8 hw_majorversion = 0, hw_minorversion = 0;
634*4882a593Smuzhiyun u8 fw_majorversion = 0, fw_minorversion = 0;
635*4882a593Smuzhiyun u16 fw_buildversion = 0;
636*4882a593Smuzhiyun u16 regval;
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun /* Wait for stats to stabilize.
639*4882a593Smuzhiyun * Frame Lines needs two frame times after initial lock
640*4882a593Smuzhiyun * before it is valid.
641*4882a593Smuzhiyun */
642*4882a593Smuzhiyun msleep(100);
643*4882a593Smuzhiyun
644*4882a593Smuzhiyun xc_get_adc_envelope(priv, &adc_envelope);
645*4882a593Smuzhiyun dprintk(1, "*** ADC envelope (0-1023) = %d\n", adc_envelope);
646*4882a593Smuzhiyun
647*4882a593Smuzhiyun xc_get_frequency_error(priv, &freq_error_hz);
648*4882a593Smuzhiyun dprintk(1, "*** Frequency error = %d Hz\n", freq_error_hz);
649*4882a593Smuzhiyun
650*4882a593Smuzhiyun xc_get_lock_status(priv, &lock_status);
651*4882a593Smuzhiyun dprintk(1, "*** Lock status (0-Wait, 1-Locked, 2-No-signal) = %d\n",
652*4882a593Smuzhiyun lock_status);
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun xc_get_version(priv, &hw_majorversion, &hw_minorversion,
655*4882a593Smuzhiyun &fw_majorversion, &fw_minorversion);
656*4882a593Smuzhiyun xc_get_buildversion(priv, &fw_buildversion);
657*4882a593Smuzhiyun dprintk(1, "*** HW: V%d.%d, FW: V %d.%d.%d\n",
658*4882a593Smuzhiyun hw_majorversion, hw_minorversion,
659*4882a593Smuzhiyun fw_majorversion, fw_minorversion, fw_buildversion);
660*4882a593Smuzhiyun
661*4882a593Smuzhiyun xc_get_hsync_freq(priv, &hsync_freq_hz);
662*4882a593Smuzhiyun dprintk(1, "*** Horizontal sync frequency = %d Hz\n", hsync_freq_hz);
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun xc_get_frame_lines(priv, &frame_lines);
665*4882a593Smuzhiyun dprintk(1, "*** Frame lines = %d\n", frame_lines);
666*4882a593Smuzhiyun
667*4882a593Smuzhiyun xc_get_quality(priv, &quality);
668*4882a593Smuzhiyun dprintk(1, "*** Quality (0:<8dB, 7:>56dB) = %d\n", quality & 0x07);
669*4882a593Smuzhiyun
670*4882a593Smuzhiyun xc_get_analogsnr(priv, &snr);
671*4882a593Smuzhiyun dprintk(1, "*** Unweighted analog SNR = %d dB\n", snr & 0x3f);
672*4882a593Smuzhiyun
673*4882a593Smuzhiyun xc_get_totalgain(priv, &totalgain);
674*4882a593Smuzhiyun dprintk(1, "*** Total gain = %d.%d dB\n", totalgain / 256,
675*4882a593Smuzhiyun (totalgain % 256) * 100 / 256);
676*4882a593Smuzhiyun
677*4882a593Smuzhiyun if (priv->pll_register_no) {
678*4882a593Smuzhiyun if (!xc5000_readreg(priv, priv->pll_register_no, ®val))
679*4882a593Smuzhiyun dprintk(1, "*** PLL lock status = 0x%04x\n", regval);
680*4882a593Smuzhiyun }
681*4882a593Smuzhiyun }
682*4882a593Smuzhiyun
xc5000_tune_digital(struct dvb_frontend * fe)683*4882a593Smuzhiyun static int xc5000_tune_digital(struct dvb_frontend *fe)
684*4882a593Smuzhiyun {
685*4882a593Smuzhiyun struct xc5000_priv *priv = fe->tuner_priv;
686*4882a593Smuzhiyun int ret;
687*4882a593Smuzhiyun u32 bw = fe->dtv_property_cache.bandwidth_hz;
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun ret = xc_set_signal_source(priv, priv->rf_mode);
690*4882a593Smuzhiyun if (ret != 0) {
691*4882a593Smuzhiyun printk(KERN_ERR
692*4882a593Smuzhiyun "xc5000: xc_set_signal_source(%d) failed\n",
693*4882a593Smuzhiyun priv->rf_mode);
694*4882a593Smuzhiyun return -EREMOTEIO;
695*4882a593Smuzhiyun }
696*4882a593Smuzhiyun
697*4882a593Smuzhiyun ret = xc_set_tv_standard(priv,
698*4882a593Smuzhiyun xc5000_standard[priv->video_standard].video_mode,
699*4882a593Smuzhiyun xc5000_standard[priv->video_standard].audio_mode, 0);
700*4882a593Smuzhiyun if (ret != 0) {
701*4882a593Smuzhiyun printk(KERN_ERR "xc5000: xc_set_tv_standard failed\n");
702*4882a593Smuzhiyun return -EREMOTEIO;
703*4882a593Smuzhiyun }
704*4882a593Smuzhiyun
705*4882a593Smuzhiyun ret = xc_set_IF_frequency(priv, priv->if_khz);
706*4882a593Smuzhiyun if (ret != 0) {
707*4882a593Smuzhiyun printk(KERN_ERR "xc5000: xc_Set_IF_frequency(%d) failed\n",
708*4882a593Smuzhiyun priv->if_khz);
709*4882a593Smuzhiyun return -EIO;
710*4882a593Smuzhiyun }
711*4882a593Smuzhiyun
712*4882a593Smuzhiyun dprintk(1, "%s() setting OUTPUT_AMP to 0x%x\n",
713*4882a593Smuzhiyun __func__, priv->output_amp);
714*4882a593Smuzhiyun xc_write_reg(priv, XREG_OUTPUT_AMP, priv->output_amp);
715*4882a593Smuzhiyun
716*4882a593Smuzhiyun xc_tune_channel(priv, priv->freq_hz, XC_TUNE_DIGITAL);
717*4882a593Smuzhiyun
718*4882a593Smuzhiyun if (debug)
719*4882a593Smuzhiyun xc_debug_dump(priv);
720*4882a593Smuzhiyun
721*4882a593Smuzhiyun priv->bandwidth = bw;
722*4882a593Smuzhiyun
723*4882a593Smuzhiyun return 0;
724*4882a593Smuzhiyun }
725*4882a593Smuzhiyun
xc5000_set_digital_params(struct dvb_frontend * fe)726*4882a593Smuzhiyun static int xc5000_set_digital_params(struct dvb_frontend *fe)
727*4882a593Smuzhiyun {
728*4882a593Smuzhiyun int b;
729*4882a593Smuzhiyun struct xc5000_priv *priv = fe->tuner_priv;
730*4882a593Smuzhiyun u32 bw = fe->dtv_property_cache.bandwidth_hz;
731*4882a593Smuzhiyun u32 freq = fe->dtv_property_cache.frequency;
732*4882a593Smuzhiyun u32 delsys = fe->dtv_property_cache.delivery_system;
733*4882a593Smuzhiyun
734*4882a593Smuzhiyun if (xc_load_fw_and_init_tuner(fe, 0) != 0) {
735*4882a593Smuzhiyun dprintk(1, "Unable to load firmware and init tuner\n");
736*4882a593Smuzhiyun return -EINVAL;
737*4882a593Smuzhiyun }
738*4882a593Smuzhiyun
739*4882a593Smuzhiyun dprintk(1, "%s() frequency=%d (Hz)\n", __func__, freq);
740*4882a593Smuzhiyun
741*4882a593Smuzhiyun switch (delsys) {
742*4882a593Smuzhiyun case SYS_ATSC:
743*4882a593Smuzhiyun dprintk(1, "%s() VSB modulation\n", __func__);
744*4882a593Smuzhiyun priv->rf_mode = XC_RF_MODE_AIR;
745*4882a593Smuzhiyun priv->freq_offset = 1750000;
746*4882a593Smuzhiyun priv->video_standard = DTV6;
747*4882a593Smuzhiyun break;
748*4882a593Smuzhiyun case SYS_DVBC_ANNEX_B:
749*4882a593Smuzhiyun dprintk(1, "%s() QAM modulation\n", __func__);
750*4882a593Smuzhiyun priv->rf_mode = XC_RF_MODE_CABLE;
751*4882a593Smuzhiyun priv->freq_offset = 1750000;
752*4882a593Smuzhiyun priv->video_standard = DTV6;
753*4882a593Smuzhiyun break;
754*4882a593Smuzhiyun case SYS_ISDBT:
755*4882a593Smuzhiyun /* All ISDB-T are currently for 6 MHz bw */
756*4882a593Smuzhiyun if (!bw)
757*4882a593Smuzhiyun bw = 6000000;
758*4882a593Smuzhiyun /* fall to OFDM handling */
759*4882a593Smuzhiyun fallthrough;
760*4882a593Smuzhiyun case SYS_DMBTH:
761*4882a593Smuzhiyun case SYS_DVBT:
762*4882a593Smuzhiyun case SYS_DVBT2:
763*4882a593Smuzhiyun dprintk(1, "%s() OFDM\n", __func__);
764*4882a593Smuzhiyun switch (bw) {
765*4882a593Smuzhiyun case 6000000:
766*4882a593Smuzhiyun priv->video_standard = DTV6;
767*4882a593Smuzhiyun priv->freq_offset = 1750000;
768*4882a593Smuzhiyun break;
769*4882a593Smuzhiyun case 7000000:
770*4882a593Smuzhiyun priv->video_standard = DTV7;
771*4882a593Smuzhiyun priv->freq_offset = 2250000;
772*4882a593Smuzhiyun break;
773*4882a593Smuzhiyun case 8000000:
774*4882a593Smuzhiyun priv->video_standard = DTV8;
775*4882a593Smuzhiyun priv->freq_offset = 2750000;
776*4882a593Smuzhiyun break;
777*4882a593Smuzhiyun default:
778*4882a593Smuzhiyun printk(KERN_ERR "xc5000 bandwidth not set!\n");
779*4882a593Smuzhiyun return -EINVAL;
780*4882a593Smuzhiyun }
781*4882a593Smuzhiyun priv->rf_mode = XC_RF_MODE_AIR;
782*4882a593Smuzhiyun break;
783*4882a593Smuzhiyun case SYS_DVBC_ANNEX_A:
784*4882a593Smuzhiyun case SYS_DVBC_ANNEX_C:
785*4882a593Smuzhiyun dprintk(1, "%s() QAM modulation\n", __func__);
786*4882a593Smuzhiyun priv->rf_mode = XC_RF_MODE_CABLE;
787*4882a593Smuzhiyun if (bw <= 6000000) {
788*4882a593Smuzhiyun priv->video_standard = DTV6;
789*4882a593Smuzhiyun priv->freq_offset = 1750000;
790*4882a593Smuzhiyun b = 6;
791*4882a593Smuzhiyun } else if (bw <= 7000000) {
792*4882a593Smuzhiyun priv->video_standard = DTV7;
793*4882a593Smuzhiyun priv->freq_offset = 2250000;
794*4882a593Smuzhiyun b = 7;
795*4882a593Smuzhiyun } else {
796*4882a593Smuzhiyun priv->video_standard = DTV7_8;
797*4882a593Smuzhiyun priv->freq_offset = 2750000;
798*4882a593Smuzhiyun b = 8;
799*4882a593Smuzhiyun }
800*4882a593Smuzhiyun dprintk(1, "%s() Bandwidth %dMHz (%d)\n", __func__,
801*4882a593Smuzhiyun b, bw);
802*4882a593Smuzhiyun break;
803*4882a593Smuzhiyun default:
804*4882a593Smuzhiyun printk(KERN_ERR "xc5000: delivery system is not supported!\n");
805*4882a593Smuzhiyun return -EINVAL;
806*4882a593Smuzhiyun }
807*4882a593Smuzhiyun
808*4882a593Smuzhiyun priv->freq_hz = freq - priv->freq_offset;
809*4882a593Smuzhiyun priv->mode = V4L2_TUNER_DIGITAL_TV;
810*4882a593Smuzhiyun
811*4882a593Smuzhiyun dprintk(1, "%s() frequency=%d (compensated to %d)\n",
812*4882a593Smuzhiyun __func__, freq, priv->freq_hz);
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun return xc5000_tune_digital(fe);
815*4882a593Smuzhiyun }
816*4882a593Smuzhiyun
xc5000_is_firmware_loaded(struct dvb_frontend * fe)817*4882a593Smuzhiyun static int xc5000_is_firmware_loaded(struct dvb_frontend *fe)
818*4882a593Smuzhiyun {
819*4882a593Smuzhiyun struct xc5000_priv *priv = fe->tuner_priv;
820*4882a593Smuzhiyun int ret;
821*4882a593Smuzhiyun u16 id;
822*4882a593Smuzhiyun
823*4882a593Smuzhiyun ret = xc5000_readreg(priv, XREG_PRODUCT_ID, &id);
824*4882a593Smuzhiyun if (!ret) {
825*4882a593Smuzhiyun if (id == XC_PRODUCT_ID_FW_NOT_LOADED)
826*4882a593Smuzhiyun ret = -ENOENT;
827*4882a593Smuzhiyun else
828*4882a593Smuzhiyun ret = 0;
829*4882a593Smuzhiyun dprintk(1, "%s() returns id = 0x%x\n", __func__, id);
830*4882a593Smuzhiyun } else {
831*4882a593Smuzhiyun dprintk(1, "%s() returns error %d\n", __func__, ret);
832*4882a593Smuzhiyun }
833*4882a593Smuzhiyun
834*4882a593Smuzhiyun return ret;
835*4882a593Smuzhiyun }
836*4882a593Smuzhiyun
xc5000_config_tv(struct dvb_frontend * fe,struct analog_parameters * params)837*4882a593Smuzhiyun static void xc5000_config_tv(struct dvb_frontend *fe,
838*4882a593Smuzhiyun struct analog_parameters *params)
839*4882a593Smuzhiyun {
840*4882a593Smuzhiyun struct xc5000_priv *priv = fe->tuner_priv;
841*4882a593Smuzhiyun
842*4882a593Smuzhiyun dprintk(1, "%s() frequency=%d (in units of 62.5khz)\n",
843*4882a593Smuzhiyun __func__, params->frequency);
844*4882a593Smuzhiyun
845*4882a593Smuzhiyun /* Fix me: it could be air. */
846*4882a593Smuzhiyun priv->rf_mode = params->mode;
847*4882a593Smuzhiyun if (params->mode > XC_RF_MODE_CABLE)
848*4882a593Smuzhiyun priv->rf_mode = XC_RF_MODE_CABLE;
849*4882a593Smuzhiyun
850*4882a593Smuzhiyun /* params->frequency is in units of 62.5khz */
851*4882a593Smuzhiyun priv->freq_hz = params->frequency * 62500;
852*4882a593Smuzhiyun
853*4882a593Smuzhiyun /* FIX ME: Some video standards may have several possible audio
854*4882a593Smuzhiyun standards. We simply default to one of them here.
855*4882a593Smuzhiyun */
856*4882a593Smuzhiyun if (params->std & V4L2_STD_MN) {
857*4882a593Smuzhiyun /* default to BTSC audio standard */
858*4882a593Smuzhiyun priv->video_standard = MN_NTSC_PAL_BTSC;
859*4882a593Smuzhiyun return;
860*4882a593Smuzhiyun }
861*4882a593Smuzhiyun
862*4882a593Smuzhiyun if (params->std & V4L2_STD_PAL_BG) {
863*4882a593Smuzhiyun /* default to NICAM audio standard */
864*4882a593Smuzhiyun priv->video_standard = BG_PAL_NICAM;
865*4882a593Smuzhiyun return;
866*4882a593Smuzhiyun }
867*4882a593Smuzhiyun
868*4882a593Smuzhiyun if (params->std & V4L2_STD_PAL_I) {
869*4882a593Smuzhiyun /* default to NICAM audio standard */
870*4882a593Smuzhiyun priv->video_standard = I_PAL_NICAM;
871*4882a593Smuzhiyun return;
872*4882a593Smuzhiyun }
873*4882a593Smuzhiyun
874*4882a593Smuzhiyun if (params->std & V4L2_STD_PAL_DK) {
875*4882a593Smuzhiyun /* default to NICAM audio standard */
876*4882a593Smuzhiyun priv->video_standard = DK_PAL_NICAM;
877*4882a593Smuzhiyun return;
878*4882a593Smuzhiyun }
879*4882a593Smuzhiyun
880*4882a593Smuzhiyun if (params->std & V4L2_STD_SECAM_DK) {
881*4882a593Smuzhiyun /* default to A2 DK1 audio standard */
882*4882a593Smuzhiyun priv->video_standard = DK_SECAM_A2DK1;
883*4882a593Smuzhiyun return;
884*4882a593Smuzhiyun }
885*4882a593Smuzhiyun
886*4882a593Smuzhiyun if (params->std & V4L2_STD_SECAM_L) {
887*4882a593Smuzhiyun priv->video_standard = L_SECAM_NICAM;
888*4882a593Smuzhiyun return;
889*4882a593Smuzhiyun }
890*4882a593Smuzhiyun
891*4882a593Smuzhiyun if (params->std & V4L2_STD_SECAM_LC) {
892*4882a593Smuzhiyun priv->video_standard = LC_SECAM_NICAM;
893*4882a593Smuzhiyun return;
894*4882a593Smuzhiyun }
895*4882a593Smuzhiyun }
896*4882a593Smuzhiyun
xc5000_set_tv_freq(struct dvb_frontend * fe)897*4882a593Smuzhiyun static int xc5000_set_tv_freq(struct dvb_frontend *fe)
898*4882a593Smuzhiyun {
899*4882a593Smuzhiyun struct xc5000_priv *priv = fe->tuner_priv;
900*4882a593Smuzhiyun u16 pll_lock_status;
901*4882a593Smuzhiyun int ret;
902*4882a593Smuzhiyun
903*4882a593Smuzhiyun tune_channel:
904*4882a593Smuzhiyun ret = xc_set_signal_source(priv, priv->rf_mode);
905*4882a593Smuzhiyun if (ret != 0) {
906*4882a593Smuzhiyun printk(KERN_ERR
907*4882a593Smuzhiyun "xc5000: xc_set_signal_source(%d) failed\n",
908*4882a593Smuzhiyun priv->rf_mode);
909*4882a593Smuzhiyun return -EREMOTEIO;
910*4882a593Smuzhiyun }
911*4882a593Smuzhiyun
912*4882a593Smuzhiyun ret = xc_set_tv_standard(priv,
913*4882a593Smuzhiyun xc5000_standard[priv->video_standard].video_mode,
914*4882a593Smuzhiyun xc5000_standard[priv->video_standard].audio_mode, 0);
915*4882a593Smuzhiyun if (ret != 0) {
916*4882a593Smuzhiyun printk(KERN_ERR "xc5000: xc_set_tv_standard failed\n");
917*4882a593Smuzhiyun return -EREMOTEIO;
918*4882a593Smuzhiyun }
919*4882a593Smuzhiyun
920*4882a593Smuzhiyun xc_write_reg(priv, XREG_OUTPUT_AMP, 0x09);
921*4882a593Smuzhiyun
922*4882a593Smuzhiyun xc_tune_channel(priv, priv->freq_hz, XC_TUNE_ANALOG);
923*4882a593Smuzhiyun
924*4882a593Smuzhiyun if (debug)
925*4882a593Smuzhiyun xc_debug_dump(priv);
926*4882a593Smuzhiyun
927*4882a593Smuzhiyun if (priv->pll_register_no != 0) {
928*4882a593Smuzhiyun msleep(20);
929*4882a593Smuzhiyun ret = xc5000_readreg(priv, priv->pll_register_no,
930*4882a593Smuzhiyun &pll_lock_status);
931*4882a593Smuzhiyun if (ret)
932*4882a593Smuzhiyun return ret;
933*4882a593Smuzhiyun if (pll_lock_status > 63) {
934*4882a593Smuzhiyun /* PLL is unlocked, force reload of the firmware */
935*4882a593Smuzhiyun dprintk(1, "xc5000: PLL not locked (0x%x). Reloading...\n",
936*4882a593Smuzhiyun pll_lock_status);
937*4882a593Smuzhiyun if (xc_load_fw_and_init_tuner(fe, 1) != 0) {
938*4882a593Smuzhiyun printk(KERN_ERR "xc5000: Unable to reload fw\n");
939*4882a593Smuzhiyun return -EREMOTEIO;
940*4882a593Smuzhiyun }
941*4882a593Smuzhiyun goto tune_channel;
942*4882a593Smuzhiyun }
943*4882a593Smuzhiyun }
944*4882a593Smuzhiyun
945*4882a593Smuzhiyun return 0;
946*4882a593Smuzhiyun }
947*4882a593Smuzhiyun
xc5000_config_radio(struct dvb_frontend * fe,struct analog_parameters * params)948*4882a593Smuzhiyun static int xc5000_config_radio(struct dvb_frontend *fe,
949*4882a593Smuzhiyun struct analog_parameters *params)
950*4882a593Smuzhiyun
951*4882a593Smuzhiyun {
952*4882a593Smuzhiyun struct xc5000_priv *priv = fe->tuner_priv;
953*4882a593Smuzhiyun
954*4882a593Smuzhiyun dprintk(1, "%s() frequency=%d (in units of khz)\n",
955*4882a593Smuzhiyun __func__, params->frequency);
956*4882a593Smuzhiyun
957*4882a593Smuzhiyun if (priv->radio_input == XC5000_RADIO_NOT_CONFIGURED) {
958*4882a593Smuzhiyun dprintk(1, "%s() radio input not configured\n", __func__);
959*4882a593Smuzhiyun return -EINVAL;
960*4882a593Smuzhiyun }
961*4882a593Smuzhiyun
962*4882a593Smuzhiyun priv->freq_hz = params->frequency * 125 / 2;
963*4882a593Smuzhiyun priv->rf_mode = XC_RF_MODE_AIR;
964*4882a593Smuzhiyun
965*4882a593Smuzhiyun return 0;
966*4882a593Smuzhiyun }
967*4882a593Smuzhiyun
xc5000_set_radio_freq(struct dvb_frontend * fe)968*4882a593Smuzhiyun static int xc5000_set_radio_freq(struct dvb_frontend *fe)
969*4882a593Smuzhiyun {
970*4882a593Smuzhiyun struct xc5000_priv *priv = fe->tuner_priv;
971*4882a593Smuzhiyun int ret;
972*4882a593Smuzhiyun u8 radio_input;
973*4882a593Smuzhiyun
974*4882a593Smuzhiyun if (priv->radio_input == XC5000_RADIO_FM1)
975*4882a593Smuzhiyun radio_input = FM_RADIO_INPUT1;
976*4882a593Smuzhiyun else if (priv->radio_input == XC5000_RADIO_FM2)
977*4882a593Smuzhiyun radio_input = FM_RADIO_INPUT2;
978*4882a593Smuzhiyun else if (priv->radio_input == XC5000_RADIO_FM1_MONO)
979*4882a593Smuzhiyun radio_input = FM_RADIO_INPUT1_MONO;
980*4882a593Smuzhiyun else {
981*4882a593Smuzhiyun dprintk(1, "%s() unknown radio input %d\n", __func__,
982*4882a593Smuzhiyun priv->radio_input);
983*4882a593Smuzhiyun return -EINVAL;
984*4882a593Smuzhiyun }
985*4882a593Smuzhiyun
986*4882a593Smuzhiyun ret = xc_set_tv_standard(priv, xc5000_standard[radio_input].video_mode,
987*4882a593Smuzhiyun xc5000_standard[radio_input].audio_mode, radio_input);
988*4882a593Smuzhiyun
989*4882a593Smuzhiyun if (ret != 0) {
990*4882a593Smuzhiyun printk(KERN_ERR "xc5000: xc_set_tv_standard failed\n");
991*4882a593Smuzhiyun return -EREMOTEIO;
992*4882a593Smuzhiyun }
993*4882a593Smuzhiyun
994*4882a593Smuzhiyun ret = xc_set_signal_source(priv, priv->rf_mode);
995*4882a593Smuzhiyun if (ret != 0) {
996*4882a593Smuzhiyun printk(KERN_ERR
997*4882a593Smuzhiyun "xc5000: xc_set_signal_source(%d) failed\n",
998*4882a593Smuzhiyun priv->rf_mode);
999*4882a593Smuzhiyun return -EREMOTEIO;
1000*4882a593Smuzhiyun }
1001*4882a593Smuzhiyun
1002*4882a593Smuzhiyun if ((priv->radio_input == XC5000_RADIO_FM1) ||
1003*4882a593Smuzhiyun (priv->radio_input == XC5000_RADIO_FM2))
1004*4882a593Smuzhiyun xc_write_reg(priv, XREG_OUTPUT_AMP, 0x09);
1005*4882a593Smuzhiyun else if (priv->radio_input == XC5000_RADIO_FM1_MONO)
1006*4882a593Smuzhiyun xc_write_reg(priv, XREG_OUTPUT_AMP, 0x06);
1007*4882a593Smuzhiyun
1008*4882a593Smuzhiyun xc_tune_channel(priv, priv->freq_hz, XC_TUNE_ANALOG);
1009*4882a593Smuzhiyun
1010*4882a593Smuzhiyun return 0;
1011*4882a593Smuzhiyun }
1012*4882a593Smuzhiyun
xc5000_set_params(struct dvb_frontend * fe)1013*4882a593Smuzhiyun static int xc5000_set_params(struct dvb_frontend *fe)
1014*4882a593Smuzhiyun {
1015*4882a593Smuzhiyun struct xc5000_priv *priv = fe->tuner_priv;
1016*4882a593Smuzhiyun
1017*4882a593Smuzhiyun if (xc_load_fw_and_init_tuner(fe, 0) != 0) {
1018*4882a593Smuzhiyun dprintk(1, "Unable to load firmware and init tuner\n");
1019*4882a593Smuzhiyun return -EINVAL;
1020*4882a593Smuzhiyun }
1021*4882a593Smuzhiyun
1022*4882a593Smuzhiyun switch (priv->mode) {
1023*4882a593Smuzhiyun case V4L2_TUNER_RADIO:
1024*4882a593Smuzhiyun return xc5000_set_radio_freq(fe);
1025*4882a593Smuzhiyun case V4L2_TUNER_ANALOG_TV:
1026*4882a593Smuzhiyun return xc5000_set_tv_freq(fe);
1027*4882a593Smuzhiyun case V4L2_TUNER_DIGITAL_TV:
1028*4882a593Smuzhiyun return xc5000_tune_digital(fe);
1029*4882a593Smuzhiyun }
1030*4882a593Smuzhiyun
1031*4882a593Smuzhiyun return 0;
1032*4882a593Smuzhiyun }
1033*4882a593Smuzhiyun
xc5000_set_analog_params(struct dvb_frontend * fe,struct analog_parameters * params)1034*4882a593Smuzhiyun static int xc5000_set_analog_params(struct dvb_frontend *fe,
1035*4882a593Smuzhiyun struct analog_parameters *params)
1036*4882a593Smuzhiyun {
1037*4882a593Smuzhiyun struct xc5000_priv *priv = fe->tuner_priv;
1038*4882a593Smuzhiyun int ret;
1039*4882a593Smuzhiyun
1040*4882a593Smuzhiyun if (priv->i2c_props.adap == NULL)
1041*4882a593Smuzhiyun return -EINVAL;
1042*4882a593Smuzhiyun
1043*4882a593Smuzhiyun switch (params->mode) {
1044*4882a593Smuzhiyun case V4L2_TUNER_RADIO:
1045*4882a593Smuzhiyun ret = xc5000_config_radio(fe, params);
1046*4882a593Smuzhiyun if (ret)
1047*4882a593Smuzhiyun return ret;
1048*4882a593Smuzhiyun break;
1049*4882a593Smuzhiyun case V4L2_TUNER_ANALOG_TV:
1050*4882a593Smuzhiyun xc5000_config_tv(fe, params);
1051*4882a593Smuzhiyun break;
1052*4882a593Smuzhiyun default:
1053*4882a593Smuzhiyun break;
1054*4882a593Smuzhiyun }
1055*4882a593Smuzhiyun priv->mode = params->mode;
1056*4882a593Smuzhiyun
1057*4882a593Smuzhiyun return xc5000_set_params(fe);
1058*4882a593Smuzhiyun }
1059*4882a593Smuzhiyun
xc5000_get_frequency(struct dvb_frontend * fe,u32 * freq)1060*4882a593Smuzhiyun static int xc5000_get_frequency(struct dvb_frontend *fe, u32 *freq)
1061*4882a593Smuzhiyun {
1062*4882a593Smuzhiyun struct xc5000_priv *priv = fe->tuner_priv;
1063*4882a593Smuzhiyun dprintk(1, "%s()\n", __func__);
1064*4882a593Smuzhiyun *freq = priv->freq_hz + priv->freq_offset;
1065*4882a593Smuzhiyun return 0;
1066*4882a593Smuzhiyun }
1067*4882a593Smuzhiyun
xc5000_get_if_frequency(struct dvb_frontend * fe,u32 * freq)1068*4882a593Smuzhiyun static int xc5000_get_if_frequency(struct dvb_frontend *fe, u32 *freq)
1069*4882a593Smuzhiyun {
1070*4882a593Smuzhiyun struct xc5000_priv *priv = fe->tuner_priv;
1071*4882a593Smuzhiyun dprintk(1, "%s()\n", __func__);
1072*4882a593Smuzhiyun *freq = priv->if_khz * 1000;
1073*4882a593Smuzhiyun return 0;
1074*4882a593Smuzhiyun }
1075*4882a593Smuzhiyun
xc5000_get_bandwidth(struct dvb_frontend * fe,u32 * bw)1076*4882a593Smuzhiyun static int xc5000_get_bandwidth(struct dvb_frontend *fe, u32 *bw)
1077*4882a593Smuzhiyun {
1078*4882a593Smuzhiyun struct xc5000_priv *priv = fe->tuner_priv;
1079*4882a593Smuzhiyun dprintk(1, "%s()\n", __func__);
1080*4882a593Smuzhiyun
1081*4882a593Smuzhiyun *bw = priv->bandwidth;
1082*4882a593Smuzhiyun return 0;
1083*4882a593Smuzhiyun }
1084*4882a593Smuzhiyun
xc5000_get_status(struct dvb_frontend * fe,u32 * status)1085*4882a593Smuzhiyun static int xc5000_get_status(struct dvb_frontend *fe, u32 *status)
1086*4882a593Smuzhiyun {
1087*4882a593Smuzhiyun struct xc5000_priv *priv = fe->tuner_priv;
1088*4882a593Smuzhiyun u16 lock_status = 0;
1089*4882a593Smuzhiyun
1090*4882a593Smuzhiyun xc_get_lock_status(priv, &lock_status);
1091*4882a593Smuzhiyun
1092*4882a593Smuzhiyun dprintk(1, "%s() lock_status = 0x%08x\n", __func__, lock_status);
1093*4882a593Smuzhiyun
1094*4882a593Smuzhiyun *status = lock_status;
1095*4882a593Smuzhiyun
1096*4882a593Smuzhiyun return 0;
1097*4882a593Smuzhiyun }
1098*4882a593Smuzhiyun
xc_load_fw_and_init_tuner(struct dvb_frontend * fe,int force)1099*4882a593Smuzhiyun static int xc_load_fw_and_init_tuner(struct dvb_frontend *fe, int force)
1100*4882a593Smuzhiyun {
1101*4882a593Smuzhiyun struct xc5000_priv *priv = fe->tuner_priv;
1102*4882a593Smuzhiyun const struct xc5000_fw_cfg *desired_fw = xc5000_assign_firmware(priv->chip_id);
1103*4882a593Smuzhiyun const struct firmware *fw;
1104*4882a593Smuzhiyun int ret, i;
1105*4882a593Smuzhiyun u16 pll_lock_status;
1106*4882a593Smuzhiyun u16 fw_ck;
1107*4882a593Smuzhiyun
1108*4882a593Smuzhiyun cancel_delayed_work(&priv->timer_sleep);
1109*4882a593Smuzhiyun
1110*4882a593Smuzhiyun if (!force && xc5000_is_firmware_loaded(fe) == 0)
1111*4882a593Smuzhiyun return 0;
1112*4882a593Smuzhiyun
1113*4882a593Smuzhiyun if (!priv->firmware) {
1114*4882a593Smuzhiyun ret = request_firmware(&fw, desired_fw->name,
1115*4882a593Smuzhiyun priv->i2c_props.adap->dev.parent);
1116*4882a593Smuzhiyun if (ret) {
1117*4882a593Smuzhiyun pr_err("xc5000: Upload failed. rc %d\n", ret);
1118*4882a593Smuzhiyun return ret;
1119*4882a593Smuzhiyun }
1120*4882a593Smuzhiyun dprintk(1, "firmware read %zu bytes.\n", fw->size);
1121*4882a593Smuzhiyun
1122*4882a593Smuzhiyun if (fw->size != desired_fw->size) {
1123*4882a593Smuzhiyun pr_err("xc5000: Firmware file with incorrect size\n");
1124*4882a593Smuzhiyun release_firmware(fw);
1125*4882a593Smuzhiyun return -EINVAL;
1126*4882a593Smuzhiyun }
1127*4882a593Smuzhiyun priv->firmware = fw;
1128*4882a593Smuzhiyun } else
1129*4882a593Smuzhiyun fw = priv->firmware;
1130*4882a593Smuzhiyun
1131*4882a593Smuzhiyun /* Try up to 5 times to load firmware */
1132*4882a593Smuzhiyun for (i = 0; i < 5; i++) {
1133*4882a593Smuzhiyun if (i)
1134*4882a593Smuzhiyun printk(KERN_CONT " - retrying to upload firmware.\n");
1135*4882a593Smuzhiyun
1136*4882a593Smuzhiyun ret = xc5000_fwupload(fe, desired_fw, fw);
1137*4882a593Smuzhiyun if (ret != 0)
1138*4882a593Smuzhiyun goto err;
1139*4882a593Smuzhiyun
1140*4882a593Smuzhiyun msleep(20);
1141*4882a593Smuzhiyun
1142*4882a593Smuzhiyun if (priv->fw_checksum_supported) {
1143*4882a593Smuzhiyun if (xc5000_readreg(priv, XREG_FW_CHECKSUM, &fw_ck)) {
1144*4882a593Smuzhiyun printk(KERN_ERR
1145*4882a593Smuzhiyun "xc5000: FW checksum reading failed.");
1146*4882a593Smuzhiyun continue;
1147*4882a593Smuzhiyun }
1148*4882a593Smuzhiyun
1149*4882a593Smuzhiyun if (!fw_ck) {
1150*4882a593Smuzhiyun printk(KERN_ERR
1151*4882a593Smuzhiyun "xc5000: FW checksum failed = 0x%04x.",
1152*4882a593Smuzhiyun fw_ck);
1153*4882a593Smuzhiyun continue;
1154*4882a593Smuzhiyun }
1155*4882a593Smuzhiyun }
1156*4882a593Smuzhiyun
1157*4882a593Smuzhiyun /* Start the tuner self-calibration process */
1158*4882a593Smuzhiyun ret = xc_initialize(priv);
1159*4882a593Smuzhiyun if (ret) {
1160*4882a593Smuzhiyun printk(KERN_ERR "xc5000: Can't request self-calibration.");
1161*4882a593Smuzhiyun continue;
1162*4882a593Smuzhiyun }
1163*4882a593Smuzhiyun
1164*4882a593Smuzhiyun /* Wait for calibration to complete.
1165*4882a593Smuzhiyun * We could continue but XC5000 will clock stretch subsequent
1166*4882a593Smuzhiyun * I2C transactions until calibration is complete. This way we
1167*4882a593Smuzhiyun * don't have to rely on clock stretching working.
1168*4882a593Smuzhiyun */
1169*4882a593Smuzhiyun msleep(100);
1170*4882a593Smuzhiyun
1171*4882a593Smuzhiyun if (priv->init_status_supported) {
1172*4882a593Smuzhiyun if (xc5000_readreg(priv, XREG_INIT_STATUS, &fw_ck)) {
1173*4882a593Smuzhiyun printk(KERN_ERR
1174*4882a593Smuzhiyun "xc5000: FW failed reading init status.");
1175*4882a593Smuzhiyun continue;
1176*4882a593Smuzhiyun }
1177*4882a593Smuzhiyun
1178*4882a593Smuzhiyun if (!fw_ck) {
1179*4882a593Smuzhiyun printk(KERN_ERR
1180*4882a593Smuzhiyun "xc5000: FW init status failed = 0x%04x.",
1181*4882a593Smuzhiyun fw_ck);
1182*4882a593Smuzhiyun continue;
1183*4882a593Smuzhiyun }
1184*4882a593Smuzhiyun }
1185*4882a593Smuzhiyun
1186*4882a593Smuzhiyun if (priv->pll_register_no) {
1187*4882a593Smuzhiyun ret = xc5000_readreg(priv, priv->pll_register_no,
1188*4882a593Smuzhiyun &pll_lock_status);
1189*4882a593Smuzhiyun if (ret)
1190*4882a593Smuzhiyun continue;
1191*4882a593Smuzhiyun if (pll_lock_status > 63) {
1192*4882a593Smuzhiyun /* PLL is unlocked, force reload of the firmware */
1193*4882a593Smuzhiyun printk(KERN_ERR
1194*4882a593Smuzhiyun "xc5000: PLL not running after fwload.");
1195*4882a593Smuzhiyun continue;
1196*4882a593Smuzhiyun }
1197*4882a593Smuzhiyun }
1198*4882a593Smuzhiyun
1199*4882a593Smuzhiyun /* Default to "CABLE" mode */
1200*4882a593Smuzhiyun ret = xc_write_reg(priv, XREG_SIGNALSOURCE, XC_RF_MODE_CABLE);
1201*4882a593Smuzhiyun if (!ret)
1202*4882a593Smuzhiyun break;
1203*4882a593Smuzhiyun printk(KERN_ERR "xc5000: can't set to cable mode.");
1204*4882a593Smuzhiyun }
1205*4882a593Smuzhiyun
1206*4882a593Smuzhiyun err:
1207*4882a593Smuzhiyun if (!ret)
1208*4882a593Smuzhiyun printk(KERN_INFO "xc5000: Firmware %s loaded and running.\n",
1209*4882a593Smuzhiyun desired_fw->name);
1210*4882a593Smuzhiyun else
1211*4882a593Smuzhiyun printk(KERN_CONT " - too many retries. Giving up\n");
1212*4882a593Smuzhiyun
1213*4882a593Smuzhiyun return ret;
1214*4882a593Smuzhiyun }
1215*4882a593Smuzhiyun
xc5000_do_timer_sleep(struct work_struct * timer_sleep)1216*4882a593Smuzhiyun static void xc5000_do_timer_sleep(struct work_struct *timer_sleep)
1217*4882a593Smuzhiyun {
1218*4882a593Smuzhiyun struct xc5000_priv *priv =container_of(timer_sleep, struct xc5000_priv,
1219*4882a593Smuzhiyun timer_sleep.work);
1220*4882a593Smuzhiyun struct dvb_frontend *fe = priv->fe;
1221*4882a593Smuzhiyun int ret;
1222*4882a593Smuzhiyun
1223*4882a593Smuzhiyun dprintk(1, "%s()\n", __func__);
1224*4882a593Smuzhiyun
1225*4882a593Smuzhiyun /* According to Xceive technical support, the "powerdown" register
1226*4882a593Smuzhiyun was removed in newer versions of the firmware. The "supported"
1227*4882a593Smuzhiyun way to sleep the tuner is to pull the reset pin low for 10ms */
1228*4882a593Smuzhiyun ret = xc5000_tuner_reset(fe);
1229*4882a593Smuzhiyun if (ret != 0)
1230*4882a593Smuzhiyun printk(KERN_ERR
1231*4882a593Smuzhiyun "xc5000: %s() unable to shutdown tuner\n",
1232*4882a593Smuzhiyun __func__);
1233*4882a593Smuzhiyun }
1234*4882a593Smuzhiyun
xc5000_sleep(struct dvb_frontend * fe)1235*4882a593Smuzhiyun static int xc5000_sleep(struct dvb_frontend *fe)
1236*4882a593Smuzhiyun {
1237*4882a593Smuzhiyun struct xc5000_priv *priv = fe->tuner_priv;
1238*4882a593Smuzhiyun
1239*4882a593Smuzhiyun dprintk(1, "%s()\n", __func__);
1240*4882a593Smuzhiyun
1241*4882a593Smuzhiyun /* Avoid firmware reload on slow devices */
1242*4882a593Smuzhiyun if (no_poweroff)
1243*4882a593Smuzhiyun return 0;
1244*4882a593Smuzhiyun
1245*4882a593Smuzhiyun schedule_delayed_work(&priv->timer_sleep,
1246*4882a593Smuzhiyun msecs_to_jiffies(XC5000_SLEEP_TIME));
1247*4882a593Smuzhiyun
1248*4882a593Smuzhiyun return 0;
1249*4882a593Smuzhiyun }
1250*4882a593Smuzhiyun
xc5000_suspend(struct dvb_frontend * fe)1251*4882a593Smuzhiyun static int xc5000_suspend(struct dvb_frontend *fe)
1252*4882a593Smuzhiyun {
1253*4882a593Smuzhiyun struct xc5000_priv *priv = fe->tuner_priv;
1254*4882a593Smuzhiyun int ret;
1255*4882a593Smuzhiyun
1256*4882a593Smuzhiyun dprintk(1, "%s()\n", __func__);
1257*4882a593Smuzhiyun
1258*4882a593Smuzhiyun cancel_delayed_work(&priv->timer_sleep);
1259*4882a593Smuzhiyun
1260*4882a593Smuzhiyun ret = xc5000_tuner_reset(fe);
1261*4882a593Smuzhiyun if (ret != 0)
1262*4882a593Smuzhiyun printk(KERN_ERR
1263*4882a593Smuzhiyun "xc5000: %s() unable to shutdown tuner\n",
1264*4882a593Smuzhiyun __func__);
1265*4882a593Smuzhiyun
1266*4882a593Smuzhiyun return 0;
1267*4882a593Smuzhiyun }
1268*4882a593Smuzhiyun
xc5000_resume(struct dvb_frontend * fe)1269*4882a593Smuzhiyun static int xc5000_resume(struct dvb_frontend *fe)
1270*4882a593Smuzhiyun {
1271*4882a593Smuzhiyun struct xc5000_priv *priv = fe->tuner_priv;
1272*4882a593Smuzhiyun
1273*4882a593Smuzhiyun dprintk(1, "%s()\n", __func__);
1274*4882a593Smuzhiyun
1275*4882a593Smuzhiyun /* suspended before firmware is loaded.
1276*4882a593Smuzhiyun Avoid firmware load in resume path. */
1277*4882a593Smuzhiyun if (!priv->firmware)
1278*4882a593Smuzhiyun return 0;
1279*4882a593Smuzhiyun
1280*4882a593Smuzhiyun return xc5000_set_params(fe);
1281*4882a593Smuzhiyun }
1282*4882a593Smuzhiyun
xc5000_init(struct dvb_frontend * fe)1283*4882a593Smuzhiyun static int xc5000_init(struct dvb_frontend *fe)
1284*4882a593Smuzhiyun {
1285*4882a593Smuzhiyun struct xc5000_priv *priv = fe->tuner_priv;
1286*4882a593Smuzhiyun dprintk(1, "%s()\n", __func__);
1287*4882a593Smuzhiyun
1288*4882a593Smuzhiyun if (xc_load_fw_and_init_tuner(fe, 0) != 0) {
1289*4882a593Smuzhiyun printk(KERN_ERR "xc5000: Unable to initialise tuner\n");
1290*4882a593Smuzhiyun return -EREMOTEIO;
1291*4882a593Smuzhiyun }
1292*4882a593Smuzhiyun
1293*4882a593Smuzhiyun if (debug)
1294*4882a593Smuzhiyun xc_debug_dump(priv);
1295*4882a593Smuzhiyun
1296*4882a593Smuzhiyun return 0;
1297*4882a593Smuzhiyun }
1298*4882a593Smuzhiyun
xc5000_release(struct dvb_frontend * fe)1299*4882a593Smuzhiyun static void xc5000_release(struct dvb_frontend *fe)
1300*4882a593Smuzhiyun {
1301*4882a593Smuzhiyun struct xc5000_priv *priv = fe->tuner_priv;
1302*4882a593Smuzhiyun
1303*4882a593Smuzhiyun dprintk(1, "%s()\n", __func__);
1304*4882a593Smuzhiyun
1305*4882a593Smuzhiyun mutex_lock(&xc5000_list_mutex);
1306*4882a593Smuzhiyun
1307*4882a593Smuzhiyun if (priv) {
1308*4882a593Smuzhiyun cancel_delayed_work(&priv->timer_sleep);
1309*4882a593Smuzhiyun if (priv->firmware) {
1310*4882a593Smuzhiyun release_firmware(priv->firmware);
1311*4882a593Smuzhiyun priv->firmware = NULL;
1312*4882a593Smuzhiyun }
1313*4882a593Smuzhiyun hybrid_tuner_release_state(priv);
1314*4882a593Smuzhiyun }
1315*4882a593Smuzhiyun
1316*4882a593Smuzhiyun mutex_unlock(&xc5000_list_mutex);
1317*4882a593Smuzhiyun
1318*4882a593Smuzhiyun fe->tuner_priv = NULL;
1319*4882a593Smuzhiyun }
1320*4882a593Smuzhiyun
xc5000_set_config(struct dvb_frontend * fe,void * priv_cfg)1321*4882a593Smuzhiyun static int xc5000_set_config(struct dvb_frontend *fe, void *priv_cfg)
1322*4882a593Smuzhiyun {
1323*4882a593Smuzhiyun struct xc5000_priv *priv = fe->tuner_priv;
1324*4882a593Smuzhiyun struct xc5000_config *p = priv_cfg;
1325*4882a593Smuzhiyun
1326*4882a593Smuzhiyun dprintk(1, "%s()\n", __func__);
1327*4882a593Smuzhiyun
1328*4882a593Smuzhiyun if (p->if_khz)
1329*4882a593Smuzhiyun priv->if_khz = p->if_khz;
1330*4882a593Smuzhiyun
1331*4882a593Smuzhiyun if (p->radio_input)
1332*4882a593Smuzhiyun priv->radio_input = p->radio_input;
1333*4882a593Smuzhiyun
1334*4882a593Smuzhiyun if (p->output_amp)
1335*4882a593Smuzhiyun priv->output_amp = p->output_amp;
1336*4882a593Smuzhiyun
1337*4882a593Smuzhiyun return 0;
1338*4882a593Smuzhiyun }
1339*4882a593Smuzhiyun
1340*4882a593Smuzhiyun
1341*4882a593Smuzhiyun static const struct dvb_tuner_ops xc5000_tuner_ops = {
1342*4882a593Smuzhiyun .info = {
1343*4882a593Smuzhiyun .name = "Xceive XC5000",
1344*4882a593Smuzhiyun .frequency_min_hz = 1 * MHz,
1345*4882a593Smuzhiyun .frequency_max_hz = 1023 * MHz,
1346*4882a593Smuzhiyun .frequency_step_hz = 50 * kHz,
1347*4882a593Smuzhiyun },
1348*4882a593Smuzhiyun
1349*4882a593Smuzhiyun .release = xc5000_release,
1350*4882a593Smuzhiyun .init = xc5000_init,
1351*4882a593Smuzhiyun .sleep = xc5000_sleep,
1352*4882a593Smuzhiyun .suspend = xc5000_suspend,
1353*4882a593Smuzhiyun .resume = xc5000_resume,
1354*4882a593Smuzhiyun
1355*4882a593Smuzhiyun .set_config = xc5000_set_config,
1356*4882a593Smuzhiyun .set_params = xc5000_set_digital_params,
1357*4882a593Smuzhiyun .set_analog_params = xc5000_set_analog_params,
1358*4882a593Smuzhiyun .get_frequency = xc5000_get_frequency,
1359*4882a593Smuzhiyun .get_if_frequency = xc5000_get_if_frequency,
1360*4882a593Smuzhiyun .get_bandwidth = xc5000_get_bandwidth,
1361*4882a593Smuzhiyun .get_status = xc5000_get_status
1362*4882a593Smuzhiyun };
1363*4882a593Smuzhiyun
xc5000_attach(struct dvb_frontend * fe,struct i2c_adapter * i2c,const struct xc5000_config * cfg)1364*4882a593Smuzhiyun struct dvb_frontend *xc5000_attach(struct dvb_frontend *fe,
1365*4882a593Smuzhiyun struct i2c_adapter *i2c,
1366*4882a593Smuzhiyun const struct xc5000_config *cfg)
1367*4882a593Smuzhiyun {
1368*4882a593Smuzhiyun struct xc5000_priv *priv = NULL;
1369*4882a593Smuzhiyun int instance;
1370*4882a593Smuzhiyun u16 id = 0;
1371*4882a593Smuzhiyun
1372*4882a593Smuzhiyun dprintk(1, "%s(%d-%04x)\n", __func__,
1373*4882a593Smuzhiyun i2c ? i2c_adapter_id(i2c) : -1,
1374*4882a593Smuzhiyun cfg ? cfg->i2c_address : -1);
1375*4882a593Smuzhiyun
1376*4882a593Smuzhiyun mutex_lock(&xc5000_list_mutex);
1377*4882a593Smuzhiyun
1378*4882a593Smuzhiyun instance = hybrid_tuner_request_state(struct xc5000_priv, priv,
1379*4882a593Smuzhiyun hybrid_tuner_instance_list,
1380*4882a593Smuzhiyun i2c, cfg->i2c_address, "xc5000");
1381*4882a593Smuzhiyun switch (instance) {
1382*4882a593Smuzhiyun case 0:
1383*4882a593Smuzhiyun goto fail;
1384*4882a593Smuzhiyun case 1:
1385*4882a593Smuzhiyun /* new tuner instance */
1386*4882a593Smuzhiyun priv->bandwidth = 6000000;
1387*4882a593Smuzhiyun fe->tuner_priv = priv;
1388*4882a593Smuzhiyun priv->fe = fe;
1389*4882a593Smuzhiyun INIT_DELAYED_WORK(&priv->timer_sleep, xc5000_do_timer_sleep);
1390*4882a593Smuzhiyun break;
1391*4882a593Smuzhiyun default:
1392*4882a593Smuzhiyun /* existing tuner instance */
1393*4882a593Smuzhiyun fe->tuner_priv = priv;
1394*4882a593Smuzhiyun break;
1395*4882a593Smuzhiyun }
1396*4882a593Smuzhiyun
1397*4882a593Smuzhiyun if (priv->if_khz == 0) {
1398*4882a593Smuzhiyun /* If the IF hasn't been set yet, use the value provided by
1399*4882a593Smuzhiyun the caller (occurs in hybrid devices where the analog
1400*4882a593Smuzhiyun call to xc5000_attach occurs before the digital side) */
1401*4882a593Smuzhiyun priv->if_khz = cfg->if_khz;
1402*4882a593Smuzhiyun }
1403*4882a593Smuzhiyun
1404*4882a593Smuzhiyun if (priv->xtal_khz == 0)
1405*4882a593Smuzhiyun priv->xtal_khz = cfg->xtal_khz;
1406*4882a593Smuzhiyun
1407*4882a593Smuzhiyun if (priv->radio_input == 0)
1408*4882a593Smuzhiyun priv->radio_input = cfg->radio_input;
1409*4882a593Smuzhiyun
1410*4882a593Smuzhiyun /* don't override chip id if it's already been set
1411*4882a593Smuzhiyun unless explicitly specified */
1412*4882a593Smuzhiyun if ((priv->chip_id == 0) || (cfg->chip_id))
1413*4882a593Smuzhiyun /* use default chip id if none specified, set to 0 so
1414*4882a593Smuzhiyun it can be overridden if this is a hybrid driver */
1415*4882a593Smuzhiyun priv->chip_id = (cfg->chip_id) ? cfg->chip_id : 0;
1416*4882a593Smuzhiyun
1417*4882a593Smuzhiyun /* don't override output_amp if it's already been set
1418*4882a593Smuzhiyun unless explicitly specified */
1419*4882a593Smuzhiyun if ((priv->output_amp == 0) || (cfg->output_amp))
1420*4882a593Smuzhiyun /* use default output_amp value if none specified */
1421*4882a593Smuzhiyun priv->output_amp = (cfg->output_amp) ? cfg->output_amp : 0x8a;
1422*4882a593Smuzhiyun
1423*4882a593Smuzhiyun /* Check if firmware has been loaded. It is possible that another
1424*4882a593Smuzhiyun instance of the driver has loaded the firmware.
1425*4882a593Smuzhiyun */
1426*4882a593Smuzhiyun if (xc5000_readreg(priv, XREG_PRODUCT_ID, &id) != 0)
1427*4882a593Smuzhiyun goto fail;
1428*4882a593Smuzhiyun
1429*4882a593Smuzhiyun switch (id) {
1430*4882a593Smuzhiyun case XC_PRODUCT_ID_FW_LOADED:
1431*4882a593Smuzhiyun printk(KERN_INFO
1432*4882a593Smuzhiyun "xc5000: Successfully identified at address 0x%02x\n",
1433*4882a593Smuzhiyun cfg->i2c_address);
1434*4882a593Smuzhiyun printk(KERN_INFO
1435*4882a593Smuzhiyun "xc5000: Firmware has been loaded previously\n");
1436*4882a593Smuzhiyun break;
1437*4882a593Smuzhiyun case XC_PRODUCT_ID_FW_NOT_LOADED:
1438*4882a593Smuzhiyun printk(KERN_INFO
1439*4882a593Smuzhiyun "xc5000: Successfully identified at address 0x%02x\n",
1440*4882a593Smuzhiyun cfg->i2c_address);
1441*4882a593Smuzhiyun printk(KERN_INFO
1442*4882a593Smuzhiyun "xc5000: Firmware has not been loaded previously\n");
1443*4882a593Smuzhiyun break;
1444*4882a593Smuzhiyun default:
1445*4882a593Smuzhiyun printk(KERN_ERR
1446*4882a593Smuzhiyun "xc5000: Device not found at addr 0x%02x (0x%x)\n",
1447*4882a593Smuzhiyun cfg->i2c_address, id);
1448*4882a593Smuzhiyun goto fail;
1449*4882a593Smuzhiyun }
1450*4882a593Smuzhiyun
1451*4882a593Smuzhiyun mutex_unlock(&xc5000_list_mutex);
1452*4882a593Smuzhiyun
1453*4882a593Smuzhiyun memcpy(&fe->ops.tuner_ops, &xc5000_tuner_ops,
1454*4882a593Smuzhiyun sizeof(struct dvb_tuner_ops));
1455*4882a593Smuzhiyun
1456*4882a593Smuzhiyun return fe;
1457*4882a593Smuzhiyun fail:
1458*4882a593Smuzhiyun mutex_unlock(&xc5000_list_mutex);
1459*4882a593Smuzhiyun
1460*4882a593Smuzhiyun xc5000_release(fe);
1461*4882a593Smuzhiyun return NULL;
1462*4882a593Smuzhiyun }
1463*4882a593Smuzhiyun EXPORT_SYMBOL(xc5000_attach);
1464*4882a593Smuzhiyun
1465*4882a593Smuzhiyun MODULE_AUTHOR("Steven Toth");
1466*4882a593Smuzhiyun MODULE_DESCRIPTION("Xceive xc5000 silicon tuner driver");
1467*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1468*4882a593Smuzhiyun MODULE_FIRMWARE(XC5000A_FIRMWARE);
1469*4882a593Smuzhiyun MODULE_FIRMWARE(XC5000C_FIRMWARE);
1470