xref: /OK3568_Linux_fs/kernel/drivers/media/tuners/xc4000.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *  Driver for Xceive XC4000 "QAM/8VSB single chip tuner"
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  *  Copyright (c) 2007 Xceive Corporation
6*4882a593Smuzhiyun  *  Copyright (c) 2007 Steven Toth <stoth@linuxtv.org>
7*4882a593Smuzhiyun  *  Copyright (c) 2009 Devin Heitmueller <dheitmueller@kernellabs.com>
8*4882a593Smuzhiyun  *  Copyright (c) 2009 Davide Ferri <d.ferri@zero11.it>
9*4882a593Smuzhiyun  *  Copyright (c) 2010 Istvan Varga <istvan_v@mailbox.hu>
10*4882a593Smuzhiyun  */
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/moduleparam.h>
14*4882a593Smuzhiyun #include <linux/videodev2.h>
15*4882a593Smuzhiyun #include <linux/delay.h>
16*4882a593Smuzhiyun #include <linux/dvb/frontend.h>
17*4882a593Smuzhiyun #include <linux/i2c.h>
18*4882a593Smuzhiyun #include <linux/mutex.h>
19*4882a593Smuzhiyun #include <asm/unaligned.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #include <media/dvb_frontend.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #include "xc4000.h"
24*4882a593Smuzhiyun #include "tuner-i2c.h"
25*4882a593Smuzhiyun #include "tuner-xc2028-types.h"
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun static int debug;
28*4882a593Smuzhiyun module_param(debug, int, 0644);
29*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "Debugging level (0 to 2, default: 0 (off)).");
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun static int no_poweroff;
32*4882a593Smuzhiyun module_param(no_poweroff, int, 0644);
33*4882a593Smuzhiyun MODULE_PARM_DESC(no_poweroff, "Power management (1: disabled, 2: enabled, 0 (default): use device-specific default mode).");
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun static int audio_std;
36*4882a593Smuzhiyun module_param(audio_std, int, 0644);
37*4882a593Smuzhiyun MODULE_PARM_DESC(audio_std, "Audio standard. XC4000 audio decoder explicitly needs to know what audio standard is needed for some video standards with audio A2 or NICAM. The valid settings are a sum of:\n"
38*4882a593Smuzhiyun 	" 1: use NICAM/B or A2/B instead of NICAM/A or A2/A\n"
39*4882a593Smuzhiyun 	" 2: use A2 instead of NICAM or BTSC\n"
40*4882a593Smuzhiyun 	" 4: use SECAM/K3 instead of K1\n"
41*4882a593Smuzhiyun 	" 8: use PAL-D/K audio for SECAM-D/K\n"
42*4882a593Smuzhiyun 	"16: use FM radio input 1 instead of input 2\n"
43*4882a593Smuzhiyun 	"32: use mono audio (the lower three bits are ignored)");
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun static char firmware_name[30];
46*4882a593Smuzhiyun module_param_string(firmware_name, firmware_name, sizeof(firmware_name), 0);
47*4882a593Smuzhiyun MODULE_PARM_DESC(firmware_name, "Firmware file name. Allows overriding the default firmware name.");
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun static DEFINE_MUTEX(xc4000_list_mutex);
50*4882a593Smuzhiyun static LIST_HEAD(hybrid_tuner_instance_list);
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun #define dprintk(level, fmt, arg...) if (debug >= level) \
53*4882a593Smuzhiyun 	printk(KERN_INFO "%s: " fmt, "xc4000", ## arg)
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun /* struct for storing firmware table */
56*4882a593Smuzhiyun struct firmware_description {
57*4882a593Smuzhiyun 	unsigned int  type;
58*4882a593Smuzhiyun 	v4l2_std_id   id;
59*4882a593Smuzhiyun 	__u16         int_freq;
60*4882a593Smuzhiyun 	unsigned char *ptr;
61*4882a593Smuzhiyun 	unsigned int  size;
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun struct firmware_properties {
65*4882a593Smuzhiyun 	unsigned int	type;
66*4882a593Smuzhiyun 	v4l2_std_id	id;
67*4882a593Smuzhiyun 	v4l2_std_id	std_req;
68*4882a593Smuzhiyun 	__u16		int_freq;
69*4882a593Smuzhiyun 	unsigned int	scode_table;
70*4882a593Smuzhiyun 	int		scode_nr;
71*4882a593Smuzhiyun };
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun struct xc4000_priv {
74*4882a593Smuzhiyun 	struct tuner_i2c_props i2c_props;
75*4882a593Smuzhiyun 	struct list_head hybrid_tuner_instance_list;
76*4882a593Smuzhiyun 	struct firmware_description *firm;
77*4882a593Smuzhiyun 	int	firm_size;
78*4882a593Smuzhiyun 	u32	if_khz;
79*4882a593Smuzhiyun 	u32	freq_hz, freq_offset;
80*4882a593Smuzhiyun 	u32	bandwidth;
81*4882a593Smuzhiyun 	u8	video_standard;
82*4882a593Smuzhiyun 	u8	rf_mode;
83*4882a593Smuzhiyun 	u8	default_pm;
84*4882a593Smuzhiyun 	u8	dvb_amplitude;
85*4882a593Smuzhiyun 	u8	set_smoothedcvbs;
86*4882a593Smuzhiyun 	u8	ignore_i2c_write_errors;
87*4882a593Smuzhiyun 	__u16	firm_version;
88*4882a593Smuzhiyun 	struct firmware_properties cur_fw;
89*4882a593Smuzhiyun 	__u16	hwmodel;
90*4882a593Smuzhiyun 	__u16	hwvers;
91*4882a593Smuzhiyun 	struct mutex	lock;
92*4882a593Smuzhiyun };
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun #define XC4000_AUDIO_STD_B		 1
95*4882a593Smuzhiyun #define XC4000_AUDIO_STD_A2		 2
96*4882a593Smuzhiyun #define XC4000_AUDIO_STD_K3		 4
97*4882a593Smuzhiyun #define XC4000_AUDIO_STD_L		 8
98*4882a593Smuzhiyun #define XC4000_AUDIO_STD_INPUT1		16
99*4882a593Smuzhiyun #define XC4000_AUDIO_STD_MONO		32
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun #define XC4000_DEFAULT_FIRMWARE "dvb-fe-xc4000-1.4.fw"
102*4882a593Smuzhiyun #define XC4000_DEFAULT_FIRMWARE_NEW "dvb-fe-xc4000-1.4.1.fw"
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun /* Misc Defines */
105*4882a593Smuzhiyun #define MAX_TV_STANDARD			24
106*4882a593Smuzhiyun #define XC_MAX_I2C_WRITE_LENGTH		64
107*4882a593Smuzhiyun #define XC_POWERED_DOWN			0x80000000U
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun /* Signal Types */
110*4882a593Smuzhiyun #define XC_RF_MODE_AIR			0
111*4882a593Smuzhiyun #define XC_RF_MODE_CABLE		1
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun /* Product id */
114*4882a593Smuzhiyun #define XC_PRODUCT_ID_FW_NOT_LOADED	0x2000
115*4882a593Smuzhiyun #define XC_PRODUCT_ID_XC4000		0x0FA0
116*4882a593Smuzhiyun #define XC_PRODUCT_ID_XC4100		0x1004
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun /* Registers (Write-only) */
119*4882a593Smuzhiyun #define XREG_INIT         0x00
120*4882a593Smuzhiyun #define XREG_VIDEO_MODE   0x01
121*4882a593Smuzhiyun #define XREG_AUDIO_MODE   0x02
122*4882a593Smuzhiyun #define XREG_RF_FREQ      0x03
123*4882a593Smuzhiyun #define XREG_D_CODE       0x04
124*4882a593Smuzhiyun #define XREG_DIRECTSITTING_MODE 0x05
125*4882a593Smuzhiyun #define XREG_SEEK_MODE    0x06
126*4882a593Smuzhiyun #define XREG_POWER_DOWN   0x08
127*4882a593Smuzhiyun #define XREG_SIGNALSOURCE 0x0A
128*4882a593Smuzhiyun #define XREG_SMOOTHEDCVBS 0x0E
129*4882a593Smuzhiyun #define XREG_AMPLITUDE    0x10
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun /* Registers (Read-only) */
132*4882a593Smuzhiyun #define XREG_ADC_ENV      0x00
133*4882a593Smuzhiyun #define XREG_QUALITY      0x01
134*4882a593Smuzhiyun #define XREG_FRAME_LINES  0x02
135*4882a593Smuzhiyun #define XREG_HSYNC_FREQ   0x03
136*4882a593Smuzhiyun #define XREG_LOCK         0x04
137*4882a593Smuzhiyun #define XREG_FREQ_ERROR   0x05
138*4882a593Smuzhiyun #define XREG_SNR          0x06
139*4882a593Smuzhiyun #define XREG_VERSION      0x07
140*4882a593Smuzhiyun #define XREG_PRODUCT_ID   0x08
141*4882a593Smuzhiyun #define XREG_SIGNAL_LEVEL 0x0A
142*4882a593Smuzhiyun #define XREG_NOISE_LEVEL  0x0B
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun /*
145*4882a593Smuzhiyun    Basic firmware description. This will remain with
146*4882a593Smuzhiyun    the driver for documentation purposes.
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun    This represents an I2C firmware file encoded as a
149*4882a593Smuzhiyun    string of unsigned char. Format is as follows:
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun    char[0  ]=len0_MSB  -> len = len_MSB * 256 + len_LSB
152*4882a593Smuzhiyun    char[1  ]=len0_LSB  -> length of first write transaction
153*4882a593Smuzhiyun    char[2  ]=data0 -> first byte to be sent
154*4882a593Smuzhiyun    char[3  ]=data1
155*4882a593Smuzhiyun    char[4  ]=data2
156*4882a593Smuzhiyun    char[   ]=...
157*4882a593Smuzhiyun    char[M  ]=dataN  -> last byte to be sent
158*4882a593Smuzhiyun    char[M+1]=len1_MSB  -> len = len_MSB * 256 + len_LSB
159*4882a593Smuzhiyun    char[M+2]=len1_LSB  -> length of second write transaction
160*4882a593Smuzhiyun    char[M+3]=data0
161*4882a593Smuzhiyun    char[M+4]=data1
162*4882a593Smuzhiyun    ...
163*4882a593Smuzhiyun    etc.
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun    The [len] value should be interpreted as follows:
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun    len= len_MSB _ len_LSB
168*4882a593Smuzhiyun    len=1111_1111_1111_1111   : End of I2C_SEQUENCE
169*4882a593Smuzhiyun    len=0000_0000_0000_0000   : Reset command: Do hardware reset
170*4882a593Smuzhiyun    len=0NNN_NNNN_NNNN_NNNN   : Normal transaction: number of bytes = {1:32767)
171*4882a593Smuzhiyun    len=1WWW_WWWW_WWWW_WWWW   : Wait command: wait for {1:32767} ms
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun    For the RESET and WAIT commands, the two following bytes will contain
174*4882a593Smuzhiyun    immediately the length of the following transaction.
175*4882a593Smuzhiyun */
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun struct XC_TV_STANDARD {
178*4882a593Smuzhiyun 	const char  *Name;
179*4882a593Smuzhiyun 	u16	    audio_mode;
180*4882a593Smuzhiyun 	u16	    video_mode;
181*4882a593Smuzhiyun 	u16	    int_freq;
182*4882a593Smuzhiyun };
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun /* Tuner standards */
185*4882a593Smuzhiyun #define XC4000_MN_NTSC_PAL_BTSC		0
186*4882a593Smuzhiyun #define XC4000_MN_NTSC_PAL_A2		1
187*4882a593Smuzhiyun #define XC4000_MN_NTSC_PAL_EIAJ		2
188*4882a593Smuzhiyun #define XC4000_MN_NTSC_PAL_Mono		3
189*4882a593Smuzhiyun #define XC4000_BG_PAL_A2		4
190*4882a593Smuzhiyun #define XC4000_BG_PAL_NICAM		5
191*4882a593Smuzhiyun #define XC4000_BG_PAL_MONO		6
192*4882a593Smuzhiyun #define XC4000_I_PAL_NICAM		7
193*4882a593Smuzhiyun #define XC4000_I_PAL_NICAM_MONO		8
194*4882a593Smuzhiyun #define XC4000_DK_PAL_A2		9
195*4882a593Smuzhiyun #define XC4000_DK_PAL_NICAM		10
196*4882a593Smuzhiyun #define XC4000_DK_PAL_MONO		11
197*4882a593Smuzhiyun #define XC4000_DK_SECAM_A2DK1		12
198*4882a593Smuzhiyun #define XC4000_DK_SECAM_A2LDK3		13
199*4882a593Smuzhiyun #define XC4000_DK_SECAM_A2MONO		14
200*4882a593Smuzhiyun #define XC4000_DK_SECAM_NICAM		15
201*4882a593Smuzhiyun #define XC4000_L_SECAM_NICAM		16
202*4882a593Smuzhiyun #define XC4000_LC_SECAM_NICAM		17
203*4882a593Smuzhiyun #define XC4000_DTV6			18
204*4882a593Smuzhiyun #define XC4000_DTV8			19
205*4882a593Smuzhiyun #define XC4000_DTV7_8			20
206*4882a593Smuzhiyun #define XC4000_DTV7			21
207*4882a593Smuzhiyun #define XC4000_FM_Radio_INPUT2		22
208*4882a593Smuzhiyun #define XC4000_FM_Radio_INPUT1		23
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun static struct XC_TV_STANDARD xc4000_standard[MAX_TV_STANDARD] = {
211*4882a593Smuzhiyun 	{"M/N-NTSC/PAL-BTSC",	0x0000, 0x80A0, 4500},
212*4882a593Smuzhiyun 	{"M/N-NTSC/PAL-A2",	0x0000, 0x80A0, 4600},
213*4882a593Smuzhiyun 	{"M/N-NTSC/PAL-EIAJ",	0x0040, 0x80A0, 4500},
214*4882a593Smuzhiyun 	{"M/N-NTSC/PAL-Mono",	0x0078, 0x80A0, 4500},
215*4882a593Smuzhiyun 	{"B/G-PAL-A2",		0x0000, 0x8159, 5640},
216*4882a593Smuzhiyun 	{"B/G-PAL-NICAM",	0x0004, 0x8159, 5740},
217*4882a593Smuzhiyun 	{"B/G-PAL-MONO",	0x0078, 0x8159, 5500},
218*4882a593Smuzhiyun 	{"I-PAL-NICAM",		0x0080, 0x8049, 6240},
219*4882a593Smuzhiyun 	{"I-PAL-NICAM-MONO",	0x0078, 0x8049, 6000},
220*4882a593Smuzhiyun 	{"D/K-PAL-A2",		0x0000, 0x8049, 6380},
221*4882a593Smuzhiyun 	{"D/K-PAL-NICAM",	0x0080, 0x8049, 6200},
222*4882a593Smuzhiyun 	{"D/K-PAL-MONO",	0x0078, 0x8049, 6500},
223*4882a593Smuzhiyun 	{"D/K-SECAM-A2 DK1",	0x0000, 0x8049, 6340},
224*4882a593Smuzhiyun 	{"D/K-SECAM-A2 L/DK3",	0x0000, 0x8049, 6000},
225*4882a593Smuzhiyun 	{"D/K-SECAM-A2 MONO",	0x0078, 0x8049, 6500},
226*4882a593Smuzhiyun 	{"D/K-SECAM-NICAM",	0x0080, 0x8049, 6200},
227*4882a593Smuzhiyun 	{"L-SECAM-NICAM",	0x8080, 0x0009, 6200},
228*4882a593Smuzhiyun 	{"L'-SECAM-NICAM",	0x8080, 0x4009, 6200},
229*4882a593Smuzhiyun 	{"DTV6",		0x00C0, 0x8002,    0},
230*4882a593Smuzhiyun 	{"DTV8",		0x00C0, 0x800B,    0},
231*4882a593Smuzhiyun 	{"DTV7/8",		0x00C0, 0x801B,    0},
232*4882a593Smuzhiyun 	{"DTV7",		0x00C0, 0x8007,    0},
233*4882a593Smuzhiyun 	{"FM Radio-INPUT2",	0x0008, 0x9800, 10700},
234*4882a593Smuzhiyun 	{"FM Radio-INPUT1",	0x0008, 0x9000, 10700}
235*4882a593Smuzhiyun };
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun static int xc4000_readreg(struct xc4000_priv *priv, u16 reg, u16 *val);
238*4882a593Smuzhiyun static int xc4000_tuner_reset(struct dvb_frontend *fe);
239*4882a593Smuzhiyun static void xc_debug_dump(struct xc4000_priv *priv);
240*4882a593Smuzhiyun 
xc_send_i2c_data(struct xc4000_priv * priv,u8 * buf,int len)241*4882a593Smuzhiyun static int xc_send_i2c_data(struct xc4000_priv *priv, u8 *buf, int len)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun 	struct i2c_msg msg = { .addr = priv->i2c_props.addr,
244*4882a593Smuzhiyun 			       .flags = 0, .buf = buf, .len = len };
245*4882a593Smuzhiyun 	if (i2c_transfer(priv->i2c_props.adap, &msg, 1) != 1) {
246*4882a593Smuzhiyun 		if (priv->ignore_i2c_write_errors == 0) {
247*4882a593Smuzhiyun 			printk(KERN_ERR "xc4000: I2C write failed (len=%i)\n",
248*4882a593Smuzhiyun 			       len);
249*4882a593Smuzhiyun 			if (len == 4) {
250*4882a593Smuzhiyun 				printk(KERN_ERR "bytes %*ph\n", 4, buf);
251*4882a593Smuzhiyun 			}
252*4882a593Smuzhiyun 			return -EREMOTEIO;
253*4882a593Smuzhiyun 		}
254*4882a593Smuzhiyun 	}
255*4882a593Smuzhiyun 	return 0;
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun 
xc4000_tuner_reset(struct dvb_frontend * fe)258*4882a593Smuzhiyun static int xc4000_tuner_reset(struct dvb_frontend *fe)
259*4882a593Smuzhiyun {
260*4882a593Smuzhiyun 	struct xc4000_priv *priv = fe->tuner_priv;
261*4882a593Smuzhiyun 	int ret;
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	dprintk(1, "%s()\n", __func__);
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	if (fe->callback) {
266*4882a593Smuzhiyun 		ret = fe->callback(((fe->dvb) && (fe->dvb->priv)) ?
267*4882a593Smuzhiyun 					   fe->dvb->priv :
268*4882a593Smuzhiyun 					   priv->i2c_props.adap->algo_data,
269*4882a593Smuzhiyun 					   DVB_FRONTEND_COMPONENT_TUNER,
270*4882a593Smuzhiyun 					   XC4000_TUNER_RESET, 0);
271*4882a593Smuzhiyun 		if (ret) {
272*4882a593Smuzhiyun 			printk(KERN_ERR "xc4000: reset failed\n");
273*4882a593Smuzhiyun 			return -EREMOTEIO;
274*4882a593Smuzhiyun 		}
275*4882a593Smuzhiyun 	} else {
276*4882a593Smuzhiyun 		printk(KERN_ERR "xc4000: no tuner reset callback function, fatal\n");
277*4882a593Smuzhiyun 		return -EINVAL;
278*4882a593Smuzhiyun 	}
279*4882a593Smuzhiyun 	return 0;
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun 
xc_write_reg(struct xc4000_priv * priv,u16 regAddr,u16 i2cData)282*4882a593Smuzhiyun static int xc_write_reg(struct xc4000_priv *priv, u16 regAddr, u16 i2cData)
283*4882a593Smuzhiyun {
284*4882a593Smuzhiyun 	u8 buf[4];
285*4882a593Smuzhiyun 	int result;
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	buf[0] = (regAddr >> 8) & 0xFF;
288*4882a593Smuzhiyun 	buf[1] = regAddr & 0xFF;
289*4882a593Smuzhiyun 	buf[2] = (i2cData >> 8) & 0xFF;
290*4882a593Smuzhiyun 	buf[3] = i2cData & 0xFF;
291*4882a593Smuzhiyun 	result = xc_send_i2c_data(priv, buf, 4);
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 	return result;
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun 
xc_load_i2c_sequence(struct dvb_frontend * fe,const u8 * i2c_sequence)296*4882a593Smuzhiyun static int xc_load_i2c_sequence(struct dvb_frontend *fe, const u8 *i2c_sequence)
297*4882a593Smuzhiyun {
298*4882a593Smuzhiyun 	struct xc4000_priv *priv = fe->tuner_priv;
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun 	int i, nbytes_to_send, result;
301*4882a593Smuzhiyun 	unsigned int len, pos, index;
302*4882a593Smuzhiyun 	u8 buf[XC_MAX_I2C_WRITE_LENGTH];
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun 	index = 0;
305*4882a593Smuzhiyun 	while ((i2c_sequence[index] != 0xFF) ||
306*4882a593Smuzhiyun 		(i2c_sequence[index + 1] != 0xFF)) {
307*4882a593Smuzhiyun 		len = i2c_sequence[index] * 256 + i2c_sequence[index+1];
308*4882a593Smuzhiyun 		if (len == 0x0000) {
309*4882a593Smuzhiyun 			/* RESET command */
310*4882a593Smuzhiyun 			/* NOTE: this is ignored, as the reset callback was */
311*4882a593Smuzhiyun 			/* already called by check_firmware() */
312*4882a593Smuzhiyun 			index += 2;
313*4882a593Smuzhiyun 		} else if (len & 0x8000) {
314*4882a593Smuzhiyun 			/* WAIT command */
315*4882a593Smuzhiyun 			msleep(len & 0x7FFF);
316*4882a593Smuzhiyun 			index += 2;
317*4882a593Smuzhiyun 		} else {
318*4882a593Smuzhiyun 			/* Send i2c data whilst ensuring individual transactions
319*4882a593Smuzhiyun 			 * do not exceed XC_MAX_I2C_WRITE_LENGTH bytes.
320*4882a593Smuzhiyun 			 */
321*4882a593Smuzhiyun 			index += 2;
322*4882a593Smuzhiyun 			buf[0] = i2c_sequence[index];
323*4882a593Smuzhiyun 			buf[1] = i2c_sequence[index + 1];
324*4882a593Smuzhiyun 			pos = 2;
325*4882a593Smuzhiyun 			while (pos < len) {
326*4882a593Smuzhiyun 				if ((len - pos) > XC_MAX_I2C_WRITE_LENGTH - 2)
327*4882a593Smuzhiyun 					nbytes_to_send =
328*4882a593Smuzhiyun 						XC_MAX_I2C_WRITE_LENGTH;
329*4882a593Smuzhiyun 				else
330*4882a593Smuzhiyun 					nbytes_to_send = (len - pos + 2);
331*4882a593Smuzhiyun 				for (i = 2; i < nbytes_to_send; i++) {
332*4882a593Smuzhiyun 					buf[i] = i2c_sequence[index + pos +
333*4882a593Smuzhiyun 						i - 2];
334*4882a593Smuzhiyun 				}
335*4882a593Smuzhiyun 				result = xc_send_i2c_data(priv, buf,
336*4882a593Smuzhiyun 					nbytes_to_send);
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun 				if (result != 0)
339*4882a593Smuzhiyun 					return result;
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 				pos += nbytes_to_send - 2;
342*4882a593Smuzhiyun 			}
343*4882a593Smuzhiyun 			index += len;
344*4882a593Smuzhiyun 		}
345*4882a593Smuzhiyun 	}
346*4882a593Smuzhiyun 	return 0;
347*4882a593Smuzhiyun }
348*4882a593Smuzhiyun 
xc_set_tv_standard(struct xc4000_priv * priv,u16 video_mode,u16 audio_mode)349*4882a593Smuzhiyun static int xc_set_tv_standard(struct xc4000_priv *priv,
350*4882a593Smuzhiyun 	u16 video_mode, u16 audio_mode)
351*4882a593Smuzhiyun {
352*4882a593Smuzhiyun 	int ret;
353*4882a593Smuzhiyun 	dprintk(1, "%s(0x%04x,0x%04x)\n", __func__, video_mode, audio_mode);
354*4882a593Smuzhiyun 	dprintk(1, "%s() Standard = %s\n",
355*4882a593Smuzhiyun 		__func__,
356*4882a593Smuzhiyun 		xc4000_standard[priv->video_standard].Name);
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 	/* Don't complain when the request fails because of i2c stretching */
359*4882a593Smuzhiyun 	priv->ignore_i2c_write_errors = 1;
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	ret = xc_write_reg(priv, XREG_VIDEO_MODE, video_mode);
362*4882a593Smuzhiyun 	if (ret == 0)
363*4882a593Smuzhiyun 		ret = xc_write_reg(priv, XREG_AUDIO_MODE, audio_mode);
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun 	priv->ignore_i2c_write_errors = 0;
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 	return ret;
368*4882a593Smuzhiyun }
369*4882a593Smuzhiyun 
xc_set_signal_source(struct xc4000_priv * priv,u16 rf_mode)370*4882a593Smuzhiyun static int xc_set_signal_source(struct xc4000_priv *priv, u16 rf_mode)
371*4882a593Smuzhiyun {
372*4882a593Smuzhiyun 	dprintk(1, "%s(%d) Source = %s\n", __func__, rf_mode,
373*4882a593Smuzhiyun 		rf_mode == XC_RF_MODE_AIR ? "ANTENNA" : "CABLE");
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun 	if ((rf_mode != XC_RF_MODE_AIR) && (rf_mode != XC_RF_MODE_CABLE)) {
376*4882a593Smuzhiyun 		rf_mode = XC_RF_MODE_CABLE;
377*4882a593Smuzhiyun 		printk(KERN_ERR
378*4882a593Smuzhiyun 			"%s(), Invalid mode, defaulting to CABLE",
379*4882a593Smuzhiyun 			__func__);
380*4882a593Smuzhiyun 	}
381*4882a593Smuzhiyun 	return xc_write_reg(priv, XREG_SIGNALSOURCE, rf_mode);
382*4882a593Smuzhiyun }
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun static const struct dvb_tuner_ops xc4000_tuner_ops;
385*4882a593Smuzhiyun 
xc_set_rf_frequency(struct xc4000_priv * priv,u32 freq_hz)386*4882a593Smuzhiyun static int xc_set_rf_frequency(struct xc4000_priv *priv, u32 freq_hz)
387*4882a593Smuzhiyun {
388*4882a593Smuzhiyun 	u16 freq_code;
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun 	dprintk(1, "%s(%u)\n", __func__, freq_hz);
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun 	if ((freq_hz > xc4000_tuner_ops.info.frequency_max_hz) ||
393*4882a593Smuzhiyun 	    (freq_hz < xc4000_tuner_ops.info.frequency_min_hz))
394*4882a593Smuzhiyun 		return -EINVAL;
395*4882a593Smuzhiyun 
396*4882a593Smuzhiyun 	freq_code = (u16)(freq_hz / 15625);
397*4882a593Smuzhiyun 
398*4882a593Smuzhiyun 	/* WAS: Starting in firmware version 1.1.44, Xceive recommends using the
399*4882a593Smuzhiyun 	   FINERFREQ for all normal tuning (the doc indicates reg 0x03 should
400*4882a593Smuzhiyun 	   only be used for fast scanning for channel lock) */
401*4882a593Smuzhiyun 	/* WAS: XREG_FINERFREQ */
402*4882a593Smuzhiyun 	return xc_write_reg(priv, XREG_RF_FREQ, freq_code);
403*4882a593Smuzhiyun }
404*4882a593Smuzhiyun 
xc_get_adc_envelope(struct xc4000_priv * priv,u16 * adc_envelope)405*4882a593Smuzhiyun static int xc_get_adc_envelope(struct xc4000_priv *priv, u16 *adc_envelope)
406*4882a593Smuzhiyun {
407*4882a593Smuzhiyun 	return xc4000_readreg(priv, XREG_ADC_ENV, adc_envelope);
408*4882a593Smuzhiyun }
409*4882a593Smuzhiyun 
xc_get_frequency_error(struct xc4000_priv * priv,u32 * freq_error_hz)410*4882a593Smuzhiyun static int xc_get_frequency_error(struct xc4000_priv *priv, u32 *freq_error_hz)
411*4882a593Smuzhiyun {
412*4882a593Smuzhiyun 	int result;
413*4882a593Smuzhiyun 	u16 regData;
414*4882a593Smuzhiyun 	u32 tmp;
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun 	result = xc4000_readreg(priv, XREG_FREQ_ERROR, &regData);
417*4882a593Smuzhiyun 	if (result != 0)
418*4882a593Smuzhiyun 		return result;
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun 	tmp = (u32)regData & 0xFFFFU;
421*4882a593Smuzhiyun 	tmp = (tmp < 0x8000U ? tmp : 0x10000U - tmp);
422*4882a593Smuzhiyun 	(*freq_error_hz) = tmp * 15625;
423*4882a593Smuzhiyun 	return result;
424*4882a593Smuzhiyun }
425*4882a593Smuzhiyun 
xc_get_lock_status(struct xc4000_priv * priv,u16 * lock_status)426*4882a593Smuzhiyun static int xc_get_lock_status(struct xc4000_priv *priv, u16 *lock_status)
427*4882a593Smuzhiyun {
428*4882a593Smuzhiyun 	return xc4000_readreg(priv, XREG_LOCK, lock_status);
429*4882a593Smuzhiyun }
430*4882a593Smuzhiyun 
xc_get_version(struct xc4000_priv * priv,u8 * hw_majorversion,u8 * hw_minorversion,u8 * fw_majorversion,u8 * fw_minorversion)431*4882a593Smuzhiyun static int xc_get_version(struct xc4000_priv *priv,
432*4882a593Smuzhiyun 	u8 *hw_majorversion, u8 *hw_minorversion,
433*4882a593Smuzhiyun 	u8 *fw_majorversion, u8 *fw_minorversion)
434*4882a593Smuzhiyun {
435*4882a593Smuzhiyun 	u16 data;
436*4882a593Smuzhiyun 	int result;
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun 	result = xc4000_readreg(priv, XREG_VERSION, &data);
439*4882a593Smuzhiyun 	if (result != 0)
440*4882a593Smuzhiyun 		return result;
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun 	(*hw_majorversion) = (data >> 12) & 0x0F;
443*4882a593Smuzhiyun 	(*hw_minorversion) = (data >>  8) & 0x0F;
444*4882a593Smuzhiyun 	(*fw_majorversion) = (data >>  4) & 0x0F;
445*4882a593Smuzhiyun 	(*fw_minorversion) = data & 0x0F;
446*4882a593Smuzhiyun 
447*4882a593Smuzhiyun 	return 0;
448*4882a593Smuzhiyun }
449*4882a593Smuzhiyun 
xc_get_hsync_freq(struct xc4000_priv * priv,u32 * hsync_freq_hz)450*4882a593Smuzhiyun static int xc_get_hsync_freq(struct xc4000_priv *priv, u32 *hsync_freq_hz)
451*4882a593Smuzhiyun {
452*4882a593Smuzhiyun 	u16 regData;
453*4882a593Smuzhiyun 	int result;
454*4882a593Smuzhiyun 
455*4882a593Smuzhiyun 	result = xc4000_readreg(priv, XREG_HSYNC_FREQ, &regData);
456*4882a593Smuzhiyun 	if (result != 0)
457*4882a593Smuzhiyun 		return result;
458*4882a593Smuzhiyun 
459*4882a593Smuzhiyun 	(*hsync_freq_hz) = ((regData & 0x0fff) * 763)/100;
460*4882a593Smuzhiyun 	return result;
461*4882a593Smuzhiyun }
462*4882a593Smuzhiyun 
xc_get_frame_lines(struct xc4000_priv * priv,u16 * frame_lines)463*4882a593Smuzhiyun static int xc_get_frame_lines(struct xc4000_priv *priv, u16 *frame_lines)
464*4882a593Smuzhiyun {
465*4882a593Smuzhiyun 	return xc4000_readreg(priv, XREG_FRAME_LINES, frame_lines);
466*4882a593Smuzhiyun }
467*4882a593Smuzhiyun 
xc_get_quality(struct xc4000_priv * priv,u16 * quality)468*4882a593Smuzhiyun static int xc_get_quality(struct xc4000_priv *priv, u16 *quality)
469*4882a593Smuzhiyun {
470*4882a593Smuzhiyun 	return xc4000_readreg(priv, XREG_QUALITY, quality);
471*4882a593Smuzhiyun }
472*4882a593Smuzhiyun 
xc_get_signal_level(struct xc4000_priv * priv,u16 * signal)473*4882a593Smuzhiyun static int xc_get_signal_level(struct xc4000_priv *priv, u16 *signal)
474*4882a593Smuzhiyun {
475*4882a593Smuzhiyun 	return xc4000_readreg(priv, XREG_SIGNAL_LEVEL, signal);
476*4882a593Smuzhiyun }
477*4882a593Smuzhiyun 
xc_get_noise_level(struct xc4000_priv * priv,u16 * noise)478*4882a593Smuzhiyun static int xc_get_noise_level(struct xc4000_priv *priv, u16 *noise)
479*4882a593Smuzhiyun {
480*4882a593Smuzhiyun 	return xc4000_readreg(priv, XREG_NOISE_LEVEL, noise);
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun 
xc_wait_for_lock(struct xc4000_priv * priv)483*4882a593Smuzhiyun static u16 xc_wait_for_lock(struct xc4000_priv *priv)
484*4882a593Smuzhiyun {
485*4882a593Smuzhiyun 	u16	lock_state = 0;
486*4882a593Smuzhiyun 	int	watchdog_count = 40;
487*4882a593Smuzhiyun 
488*4882a593Smuzhiyun 	while ((lock_state == 0) && (watchdog_count > 0)) {
489*4882a593Smuzhiyun 		xc_get_lock_status(priv, &lock_state);
490*4882a593Smuzhiyun 		if (lock_state != 1) {
491*4882a593Smuzhiyun 			msleep(5);
492*4882a593Smuzhiyun 			watchdog_count--;
493*4882a593Smuzhiyun 		}
494*4882a593Smuzhiyun 	}
495*4882a593Smuzhiyun 	return lock_state;
496*4882a593Smuzhiyun }
497*4882a593Smuzhiyun 
xc_tune_channel(struct xc4000_priv * priv,u32 freq_hz)498*4882a593Smuzhiyun static int xc_tune_channel(struct xc4000_priv *priv, u32 freq_hz)
499*4882a593Smuzhiyun {
500*4882a593Smuzhiyun 	int	found = 1;
501*4882a593Smuzhiyun 	int	result;
502*4882a593Smuzhiyun 
503*4882a593Smuzhiyun 	dprintk(1, "%s(%u)\n", __func__, freq_hz);
504*4882a593Smuzhiyun 
505*4882a593Smuzhiyun 	/* Don't complain when the request fails because of i2c stretching */
506*4882a593Smuzhiyun 	priv->ignore_i2c_write_errors = 1;
507*4882a593Smuzhiyun 	result = xc_set_rf_frequency(priv, freq_hz);
508*4882a593Smuzhiyun 	priv->ignore_i2c_write_errors = 0;
509*4882a593Smuzhiyun 
510*4882a593Smuzhiyun 	if (result != 0)
511*4882a593Smuzhiyun 		return 0;
512*4882a593Smuzhiyun 
513*4882a593Smuzhiyun 	/* wait for lock only in analog TV mode */
514*4882a593Smuzhiyun 	if ((priv->cur_fw.type & (FM | DTV6 | DTV7 | DTV78 | DTV8)) == 0) {
515*4882a593Smuzhiyun 		if (xc_wait_for_lock(priv) != 1)
516*4882a593Smuzhiyun 			found = 0;
517*4882a593Smuzhiyun 	}
518*4882a593Smuzhiyun 
519*4882a593Smuzhiyun 	/* Wait for stats to stabilize.
520*4882a593Smuzhiyun 	 * Frame Lines needs two frame times after initial lock
521*4882a593Smuzhiyun 	 * before it is valid.
522*4882a593Smuzhiyun 	 */
523*4882a593Smuzhiyun 	msleep(debug ? 100 : 10);
524*4882a593Smuzhiyun 
525*4882a593Smuzhiyun 	if (debug)
526*4882a593Smuzhiyun 		xc_debug_dump(priv);
527*4882a593Smuzhiyun 
528*4882a593Smuzhiyun 	return found;
529*4882a593Smuzhiyun }
530*4882a593Smuzhiyun 
xc4000_readreg(struct xc4000_priv * priv,u16 reg,u16 * val)531*4882a593Smuzhiyun static int xc4000_readreg(struct xc4000_priv *priv, u16 reg, u16 *val)
532*4882a593Smuzhiyun {
533*4882a593Smuzhiyun 	u8 buf[2] = { reg >> 8, reg & 0xff };
534*4882a593Smuzhiyun 	u8 bval[2] = { 0, 0 };
535*4882a593Smuzhiyun 	struct i2c_msg msg[2] = {
536*4882a593Smuzhiyun 		{ .addr = priv->i2c_props.addr,
537*4882a593Smuzhiyun 			.flags = 0, .buf = &buf[0], .len = 2 },
538*4882a593Smuzhiyun 		{ .addr = priv->i2c_props.addr,
539*4882a593Smuzhiyun 			.flags = I2C_M_RD, .buf = &bval[0], .len = 2 },
540*4882a593Smuzhiyun 	};
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun 	if (i2c_transfer(priv->i2c_props.adap, msg, 2) != 2) {
543*4882a593Smuzhiyun 		printk(KERN_ERR "xc4000: I2C read failed\n");
544*4882a593Smuzhiyun 		return -EREMOTEIO;
545*4882a593Smuzhiyun 	}
546*4882a593Smuzhiyun 
547*4882a593Smuzhiyun 	*val = (bval[0] << 8) | bval[1];
548*4882a593Smuzhiyun 	return 0;
549*4882a593Smuzhiyun }
550*4882a593Smuzhiyun 
551*4882a593Smuzhiyun #define dump_firm_type(t)	dump_firm_type_and_int_freq(t, 0)
dump_firm_type_and_int_freq(unsigned int type,u16 int_freq)552*4882a593Smuzhiyun static void dump_firm_type_and_int_freq(unsigned int type, u16 int_freq)
553*4882a593Smuzhiyun {
554*4882a593Smuzhiyun 	if (type & BASE)
555*4882a593Smuzhiyun 		printk(KERN_CONT "BASE ");
556*4882a593Smuzhiyun 	if (type & INIT1)
557*4882a593Smuzhiyun 		printk(KERN_CONT "INIT1 ");
558*4882a593Smuzhiyun 	if (type & F8MHZ)
559*4882a593Smuzhiyun 		printk(KERN_CONT "F8MHZ ");
560*4882a593Smuzhiyun 	if (type & MTS)
561*4882a593Smuzhiyun 		printk(KERN_CONT "MTS ");
562*4882a593Smuzhiyun 	if (type & D2620)
563*4882a593Smuzhiyun 		printk(KERN_CONT "D2620 ");
564*4882a593Smuzhiyun 	if (type & D2633)
565*4882a593Smuzhiyun 		printk(KERN_CONT "D2633 ");
566*4882a593Smuzhiyun 	if (type & DTV6)
567*4882a593Smuzhiyun 		printk(KERN_CONT "DTV6 ");
568*4882a593Smuzhiyun 	if (type & QAM)
569*4882a593Smuzhiyun 		printk(KERN_CONT "QAM ");
570*4882a593Smuzhiyun 	if (type & DTV7)
571*4882a593Smuzhiyun 		printk(KERN_CONT "DTV7 ");
572*4882a593Smuzhiyun 	if (type & DTV78)
573*4882a593Smuzhiyun 		printk(KERN_CONT "DTV78 ");
574*4882a593Smuzhiyun 	if (type & DTV8)
575*4882a593Smuzhiyun 		printk(KERN_CONT "DTV8 ");
576*4882a593Smuzhiyun 	if (type & FM)
577*4882a593Smuzhiyun 		printk(KERN_CONT "FM ");
578*4882a593Smuzhiyun 	if (type & INPUT1)
579*4882a593Smuzhiyun 		printk(KERN_CONT "INPUT1 ");
580*4882a593Smuzhiyun 	if (type & LCD)
581*4882a593Smuzhiyun 		printk(KERN_CONT "LCD ");
582*4882a593Smuzhiyun 	if (type & NOGD)
583*4882a593Smuzhiyun 		printk(KERN_CONT "NOGD ");
584*4882a593Smuzhiyun 	if (type & MONO)
585*4882a593Smuzhiyun 		printk(KERN_CONT "MONO ");
586*4882a593Smuzhiyun 	if (type & ATSC)
587*4882a593Smuzhiyun 		printk(KERN_CONT "ATSC ");
588*4882a593Smuzhiyun 	if (type & IF)
589*4882a593Smuzhiyun 		printk(KERN_CONT "IF ");
590*4882a593Smuzhiyun 	if (type & LG60)
591*4882a593Smuzhiyun 		printk(KERN_CONT "LG60 ");
592*4882a593Smuzhiyun 	if (type & ATI638)
593*4882a593Smuzhiyun 		printk(KERN_CONT "ATI638 ");
594*4882a593Smuzhiyun 	if (type & OREN538)
595*4882a593Smuzhiyun 		printk(KERN_CONT "OREN538 ");
596*4882a593Smuzhiyun 	if (type & OREN36)
597*4882a593Smuzhiyun 		printk(KERN_CONT "OREN36 ");
598*4882a593Smuzhiyun 	if (type & TOYOTA388)
599*4882a593Smuzhiyun 		printk(KERN_CONT "TOYOTA388 ");
600*4882a593Smuzhiyun 	if (type & TOYOTA794)
601*4882a593Smuzhiyun 		printk(KERN_CONT "TOYOTA794 ");
602*4882a593Smuzhiyun 	if (type & DIBCOM52)
603*4882a593Smuzhiyun 		printk(KERN_CONT "DIBCOM52 ");
604*4882a593Smuzhiyun 	if (type & ZARLINK456)
605*4882a593Smuzhiyun 		printk(KERN_CONT "ZARLINK456 ");
606*4882a593Smuzhiyun 	if (type & CHINA)
607*4882a593Smuzhiyun 		printk(KERN_CONT "CHINA ");
608*4882a593Smuzhiyun 	if (type & F6MHZ)
609*4882a593Smuzhiyun 		printk(KERN_CONT "F6MHZ ");
610*4882a593Smuzhiyun 	if (type & INPUT2)
611*4882a593Smuzhiyun 		printk(KERN_CONT "INPUT2 ");
612*4882a593Smuzhiyun 	if (type & SCODE)
613*4882a593Smuzhiyun 		printk(KERN_CONT "SCODE ");
614*4882a593Smuzhiyun 	if (type & HAS_IF)
615*4882a593Smuzhiyun 		printk(KERN_CONT "HAS_IF_%d ", int_freq);
616*4882a593Smuzhiyun }
617*4882a593Smuzhiyun 
seek_firmware(struct dvb_frontend * fe,unsigned int type,v4l2_std_id * id)618*4882a593Smuzhiyun static int seek_firmware(struct dvb_frontend *fe, unsigned int type,
619*4882a593Smuzhiyun 			 v4l2_std_id *id)
620*4882a593Smuzhiyun {
621*4882a593Smuzhiyun 	struct xc4000_priv *priv = fe->tuner_priv;
622*4882a593Smuzhiyun 	int		i, best_i = -1;
623*4882a593Smuzhiyun 	unsigned int	best_nr_diffs = 255U;
624*4882a593Smuzhiyun 
625*4882a593Smuzhiyun 	if (!priv->firm) {
626*4882a593Smuzhiyun 		printk(KERN_ERR "Error! firmware not loaded\n");
627*4882a593Smuzhiyun 		return -EINVAL;
628*4882a593Smuzhiyun 	}
629*4882a593Smuzhiyun 
630*4882a593Smuzhiyun 	if (((type & ~SCODE) == 0) && (*id == 0))
631*4882a593Smuzhiyun 		*id = V4L2_STD_PAL;
632*4882a593Smuzhiyun 
633*4882a593Smuzhiyun 	/* Seek for generic video standard match */
634*4882a593Smuzhiyun 	for (i = 0; i < priv->firm_size; i++) {
635*4882a593Smuzhiyun 		v4l2_std_id	id_diff_mask =
636*4882a593Smuzhiyun 			(priv->firm[i].id ^ (*id)) & (*id);
637*4882a593Smuzhiyun 		unsigned int	type_diff_mask =
638*4882a593Smuzhiyun 			(priv->firm[i].type ^ type)
639*4882a593Smuzhiyun 			& (BASE_TYPES | DTV_TYPES | LCD | NOGD | MONO | SCODE);
640*4882a593Smuzhiyun 		unsigned int	nr_diffs;
641*4882a593Smuzhiyun 
642*4882a593Smuzhiyun 		if (type_diff_mask
643*4882a593Smuzhiyun 		    & (BASE | INIT1 | FM | DTV6 | DTV7 | DTV78 | DTV8 | SCODE))
644*4882a593Smuzhiyun 			continue;
645*4882a593Smuzhiyun 
646*4882a593Smuzhiyun 		nr_diffs = hweight64(id_diff_mask) + hweight32(type_diff_mask);
647*4882a593Smuzhiyun 		if (!nr_diffs)	/* Supports all the requested standards */
648*4882a593Smuzhiyun 			goto found;
649*4882a593Smuzhiyun 
650*4882a593Smuzhiyun 		if (nr_diffs < best_nr_diffs) {
651*4882a593Smuzhiyun 			best_nr_diffs = nr_diffs;
652*4882a593Smuzhiyun 			best_i = i;
653*4882a593Smuzhiyun 		}
654*4882a593Smuzhiyun 	}
655*4882a593Smuzhiyun 
656*4882a593Smuzhiyun 	/* FIXME: Would make sense to seek for type "hint" match ? */
657*4882a593Smuzhiyun 	if (best_i < 0) {
658*4882a593Smuzhiyun 		i = -ENOENT;
659*4882a593Smuzhiyun 		goto ret;
660*4882a593Smuzhiyun 	}
661*4882a593Smuzhiyun 
662*4882a593Smuzhiyun 	if (best_nr_diffs > 0U) {
663*4882a593Smuzhiyun 		printk(KERN_WARNING
664*4882a593Smuzhiyun 		       "Selecting best matching firmware (%u bits differ) for type=(%x), id %016llx:\n",
665*4882a593Smuzhiyun 		       best_nr_diffs, type, (unsigned long long)*id);
666*4882a593Smuzhiyun 		i = best_i;
667*4882a593Smuzhiyun 	}
668*4882a593Smuzhiyun 
669*4882a593Smuzhiyun found:
670*4882a593Smuzhiyun 	*id = priv->firm[i].id;
671*4882a593Smuzhiyun 
672*4882a593Smuzhiyun ret:
673*4882a593Smuzhiyun 	if (debug) {
674*4882a593Smuzhiyun 		printk(KERN_DEBUG "%s firmware for type=",
675*4882a593Smuzhiyun 		       (i < 0) ? "Can't find" : "Found");
676*4882a593Smuzhiyun 		dump_firm_type(type);
677*4882a593Smuzhiyun 		printk(KERN_DEBUG "(%x), id %016llx.\n", type, (unsigned long long)*id);
678*4882a593Smuzhiyun 	}
679*4882a593Smuzhiyun 	return i;
680*4882a593Smuzhiyun }
681*4882a593Smuzhiyun 
load_firmware(struct dvb_frontend * fe,unsigned int type,v4l2_std_id * id)682*4882a593Smuzhiyun static int load_firmware(struct dvb_frontend *fe, unsigned int type,
683*4882a593Smuzhiyun 			 v4l2_std_id *id)
684*4882a593Smuzhiyun {
685*4882a593Smuzhiyun 	struct xc4000_priv *priv = fe->tuner_priv;
686*4882a593Smuzhiyun 	int                pos, rc;
687*4882a593Smuzhiyun 	unsigned char      *p;
688*4882a593Smuzhiyun 
689*4882a593Smuzhiyun 	pos = seek_firmware(fe, type, id);
690*4882a593Smuzhiyun 	if (pos < 0)
691*4882a593Smuzhiyun 		return pos;
692*4882a593Smuzhiyun 
693*4882a593Smuzhiyun 	p = priv->firm[pos].ptr;
694*4882a593Smuzhiyun 
695*4882a593Smuzhiyun 	/* Don't complain when the request fails because of i2c stretching */
696*4882a593Smuzhiyun 	priv->ignore_i2c_write_errors = 1;
697*4882a593Smuzhiyun 
698*4882a593Smuzhiyun 	rc = xc_load_i2c_sequence(fe, p);
699*4882a593Smuzhiyun 
700*4882a593Smuzhiyun 	priv->ignore_i2c_write_errors = 0;
701*4882a593Smuzhiyun 
702*4882a593Smuzhiyun 	return rc;
703*4882a593Smuzhiyun }
704*4882a593Smuzhiyun 
xc4000_fwupload(struct dvb_frontend * fe)705*4882a593Smuzhiyun static int xc4000_fwupload(struct dvb_frontend *fe)
706*4882a593Smuzhiyun {
707*4882a593Smuzhiyun 	struct xc4000_priv *priv = fe->tuner_priv;
708*4882a593Smuzhiyun 	const struct firmware *fw   = NULL;
709*4882a593Smuzhiyun 	const unsigned char   *p, *endp;
710*4882a593Smuzhiyun 	int                   rc = 0;
711*4882a593Smuzhiyun 	int		      n, n_array;
712*4882a593Smuzhiyun 	char		      name[33];
713*4882a593Smuzhiyun 	const char	      *fname;
714*4882a593Smuzhiyun 
715*4882a593Smuzhiyun 	if (firmware_name[0] != '\0') {
716*4882a593Smuzhiyun 		fname = firmware_name;
717*4882a593Smuzhiyun 
718*4882a593Smuzhiyun 		dprintk(1, "Reading custom firmware %s\n", fname);
719*4882a593Smuzhiyun 		rc = request_firmware(&fw, fname,
720*4882a593Smuzhiyun 				      priv->i2c_props.adap->dev.parent);
721*4882a593Smuzhiyun 	} else {
722*4882a593Smuzhiyun 		fname = XC4000_DEFAULT_FIRMWARE_NEW;
723*4882a593Smuzhiyun 		dprintk(1, "Trying to read firmware %s\n", fname);
724*4882a593Smuzhiyun 		rc = request_firmware(&fw, fname,
725*4882a593Smuzhiyun 				      priv->i2c_props.adap->dev.parent);
726*4882a593Smuzhiyun 		if (rc == -ENOENT) {
727*4882a593Smuzhiyun 			fname = XC4000_DEFAULT_FIRMWARE;
728*4882a593Smuzhiyun 			dprintk(1, "Trying to read firmware %s\n", fname);
729*4882a593Smuzhiyun 			rc = request_firmware(&fw, fname,
730*4882a593Smuzhiyun 					      priv->i2c_props.adap->dev.parent);
731*4882a593Smuzhiyun 		}
732*4882a593Smuzhiyun 	}
733*4882a593Smuzhiyun 
734*4882a593Smuzhiyun 	if (rc < 0) {
735*4882a593Smuzhiyun 		if (rc == -ENOENT)
736*4882a593Smuzhiyun 			printk(KERN_ERR "Error: firmware %s not found.\n", fname);
737*4882a593Smuzhiyun 		else
738*4882a593Smuzhiyun 			printk(KERN_ERR "Error %d while requesting firmware %s\n",
739*4882a593Smuzhiyun 			       rc, fname);
740*4882a593Smuzhiyun 
741*4882a593Smuzhiyun 		return rc;
742*4882a593Smuzhiyun 	}
743*4882a593Smuzhiyun 	dprintk(1, "Loading Firmware: %s\n", fname);
744*4882a593Smuzhiyun 
745*4882a593Smuzhiyun 	p = fw->data;
746*4882a593Smuzhiyun 	endp = p + fw->size;
747*4882a593Smuzhiyun 
748*4882a593Smuzhiyun 	if (fw->size < sizeof(name) - 1 + 2 + 2) {
749*4882a593Smuzhiyun 		printk(KERN_ERR "Error: firmware file %s has invalid size!\n",
750*4882a593Smuzhiyun 		       fname);
751*4882a593Smuzhiyun 		goto corrupt;
752*4882a593Smuzhiyun 	}
753*4882a593Smuzhiyun 
754*4882a593Smuzhiyun 	memcpy(name, p, sizeof(name) - 1);
755*4882a593Smuzhiyun 	name[sizeof(name) - 1] = '\0';
756*4882a593Smuzhiyun 	p += sizeof(name) - 1;
757*4882a593Smuzhiyun 
758*4882a593Smuzhiyun 	priv->firm_version = get_unaligned_le16(p);
759*4882a593Smuzhiyun 	p += 2;
760*4882a593Smuzhiyun 
761*4882a593Smuzhiyun 	n_array = get_unaligned_le16(p);
762*4882a593Smuzhiyun 	p += 2;
763*4882a593Smuzhiyun 
764*4882a593Smuzhiyun 	dprintk(1, "Loading %d firmware images from %s, type: %s, ver %d.%d\n",
765*4882a593Smuzhiyun 		n_array, fname, name,
766*4882a593Smuzhiyun 		priv->firm_version >> 8, priv->firm_version & 0xff);
767*4882a593Smuzhiyun 
768*4882a593Smuzhiyun 	priv->firm = kcalloc(n_array, sizeof(*priv->firm), GFP_KERNEL);
769*4882a593Smuzhiyun 	if (priv->firm == NULL) {
770*4882a593Smuzhiyun 		printk(KERN_ERR "Not enough memory to load firmware file.\n");
771*4882a593Smuzhiyun 		rc = -ENOMEM;
772*4882a593Smuzhiyun 		goto done;
773*4882a593Smuzhiyun 	}
774*4882a593Smuzhiyun 	priv->firm_size = n_array;
775*4882a593Smuzhiyun 
776*4882a593Smuzhiyun 	n = -1;
777*4882a593Smuzhiyun 	while (p < endp) {
778*4882a593Smuzhiyun 		__u32 type, size;
779*4882a593Smuzhiyun 		v4l2_std_id id;
780*4882a593Smuzhiyun 		__u16 int_freq = 0;
781*4882a593Smuzhiyun 
782*4882a593Smuzhiyun 		n++;
783*4882a593Smuzhiyun 		if (n >= n_array) {
784*4882a593Smuzhiyun 			printk(KERN_ERR "More firmware images in file than were expected!\n");
785*4882a593Smuzhiyun 			goto corrupt;
786*4882a593Smuzhiyun 		}
787*4882a593Smuzhiyun 
788*4882a593Smuzhiyun 		/* Checks if there's enough bytes to read */
789*4882a593Smuzhiyun 		if (endp - p < sizeof(type) + sizeof(id) + sizeof(size))
790*4882a593Smuzhiyun 			goto header;
791*4882a593Smuzhiyun 
792*4882a593Smuzhiyun 		type = get_unaligned_le32(p);
793*4882a593Smuzhiyun 		p += sizeof(type);
794*4882a593Smuzhiyun 
795*4882a593Smuzhiyun 		id = get_unaligned_le64(p);
796*4882a593Smuzhiyun 		p += sizeof(id);
797*4882a593Smuzhiyun 
798*4882a593Smuzhiyun 		if (type & HAS_IF) {
799*4882a593Smuzhiyun 			int_freq = get_unaligned_le16(p);
800*4882a593Smuzhiyun 			p += sizeof(int_freq);
801*4882a593Smuzhiyun 			if (endp - p < sizeof(size))
802*4882a593Smuzhiyun 				goto header;
803*4882a593Smuzhiyun 		}
804*4882a593Smuzhiyun 
805*4882a593Smuzhiyun 		size = get_unaligned_le32(p);
806*4882a593Smuzhiyun 		p += sizeof(size);
807*4882a593Smuzhiyun 
808*4882a593Smuzhiyun 		if (!size || size > endp - p) {
809*4882a593Smuzhiyun 			printk(KERN_ERR "Firmware type (%x), id %llx is corrupted (size=%zd, expected %d)\n",
810*4882a593Smuzhiyun 			       type, (unsigned long long)id,
811*4882a593Smuzhiyun 			       endp - p, size);
812*4882a593Smuzhiyun 			goto corrupt;
813*4882a593Smuzhiyun 		}
814*4882a593Smuzhiyun 
815*4882a593Smuzhiyun 		priv->firm[n].ptr = kmemdup(p, size, GFP_KERNEL);
816*4882a593Smuzhiyun 		if (priv->firm[n].ptr == NULL) {
817*4882a593Smuzhiyun 			printk(KERN_ERR "Not enough memory to load firmware file.\n");
818*4882a593Smuzhiyun 			rc = -ENOMEM;
819*4882a593Smuzhiyun 			goto done;
820*4882a593Smuzhiyun 		}
821*4882a593Smuzhiyun 
822*4882a593Smuzhiyun 		if (debug) {
823*4882a593Smuzhiyun 			printk(KERN_DEBUG "Reading firmware type ");
824*4882a593Smuzhiyun 			dump_firm_type_and_int_freq(type, int_freq);
825*4882a593Smuzhiyun 			printk(KERN_DEBUG "(%x), id %llx, size=%d.\n",
826*4882a593Smuzhiyun 			       type, (unsigned long long)id, size);
827*4882a593Smuzhiyun 		}
828*4882a593Smuzhiyun 
829*4882a593Smuzhiyun 		priv->firm[n].type = type;
830*4882a593Smuzhiyun 		priv->firm[n].id   = id;
831*4882a593Smuzhiyun 		priv->firm[n].size = size;
832*4882a593Smuzhiyun 		priv->firm[n].int_freq = int_freq;
833*4882a593Smuzhiyun 
834*4882a593Smuzhiyun 		p += size;
835*4882a593Smuzhiyun 	}
836*4882a593Smuzhiyun 
837*4882a593Smuzhiyun 	if (n + 1 != priv->firm_size) {
838*4882a593Smuzhiyun 		printk(KERN_ERR "Firmware file is incomplete!\n");
839*4882a593Smuzhiyun 		goto corrupt;
840*4882a593Smuzhiyun 	}
841*4882a593Smuzhiyun 
842*4882a593Smuzhiyun 	goto done;
843*4882a593Smuzhiyun 
844*4882a593Smuzhiyun header:
845*4882a593Smuzhiyun 	printk(KERN_ERR "Firmware header is incomplete!\n");
846*4882a593Smuzhiyun corrupt:
847*4882a593Smuzhiyun 	rc = -EINVAL;
848*4882a593Smuzhiyun 	printk(KERN_ERR "Error: firmware file is corrupted!\n");
849*4882a593Smuzhiyun 
850*4882a593Smuzhiyun done:
851*4882a593Smuzhiyun 	release_firmware(fw);
852*4882a593Smuzhiyun 	if (rc == 0)
853*4882a593Smuzhiyun 		dprintk(1, "Firmware files loaded.\n");
854*4882a593Smuzhiyun 
855*4882a593Smuzhiyun 	return rc;
856*4882a593Smuzhiyun }
857*4882a593Smuzhiyun 
load_scode(struct dvb_frontend * fe,unsigned int type,v4l2_std_id * id,__u16 int_freq,int scode)858*4882a593Smuzhiyun static int load_scode(struct dvb_frontend *fe, unsigned int type,
859*4882a593Smuzhiyun 			 v4l2_std_id *id, __u16 int_freq, int scode)
860*4882a593Smuzhiyun {
861*4882a593Smuzhiyun 	struct xc4000_priv *priv = fe->tuner_priv;
862*4882a593Smuzhiyun 	int		pos, rc;
863*4882a593Smuzhiyun 	unsigned char	*p;
864*4882a593Smuzhiyun 	u8		scode_buf[13];
865*4882a593Smuzhiyun 	u8		indirect_mode[5];
866*4882a593Smuzhiyun 
867*4882a593Smuzhiyun 	dprintk(1, "%s called int_freq=%d\n", __func__, int_freq);
868*4882a593Smuzhiyun 
869*4882a593Smuzhiyun 	if (!int_freq) {
870*4882a593Smuzhiyun 		pos = seek_firmware(fe, type, id);
871*4882a593Smuzhiyun 		if (pos < 0)
872*4882a593Smuzhiyun 			return pos;
873*4882a593Smuzhiyun 	} else {
874*4882a593Smuzhiyun 		for (pos = 0; pos < priv->firm_size; pos++) {
875*4882a593Smuzhiyun 			if ((priv->firm[pos].int_freq == int_freq) &&
876*4882a593Smuzhiyun 			    (priv->firm[pos].type & HAS_IF))
877*4882a593Smuzhiyun 				break;
878*4882a593Smuzhiyun 		}
879*4882a593Smuzhiyun 		if (pos == priv->firm_size)
880*4882a593Smuzhiyun 			return -ENOENT;
881*4882a593Smuzhiyun 	}
882*4882a593Smuzhiyun 
883*4882a593Smuzhiyun 	p = priv->firm[pos].ptr;
884*4882a593Smuzhiyun 
885*4882a593Smuzhiyun 	if (priv->firm[pos].size != 12 * 16 || scode >= 16)
886*4882a593Smuzhiyun 		return -EINVAL;
887*4882a593Smuzhiyun 	p += 12 * scode;
888*4882a593Smuzhiyun 
889*4882a593Smuzhiyun 	if (debug) {
890*4882a593Smuzhiyun 		tuner_info("Loading SCODE for type=");
891*4882a593Smuzhiyun 		dump_firm_type_and_int_freq(priv->firm[pos].type,
892*4882a593Smuzhiyun 					    priv->firm[pos].int_freq);
893*4882a593Smuzhiyun 		printk(KERN_CONT "(%x), id %016llx.\n", priv->firm[pos].type,
894*4882a593Smuzhiyun 		       (unsigned long long)*id);
895*4882a593Smuzhiyun 	}
896*4882a593Smuzhiyun 
897*4882a593Smuzhiyun 	scode_buf[0] = 0x00;
898*4882a593Smuzhiyun 	memcpy(&scode_buf[1], p, 12);
899*4882a593Smuzhiyun 
900*4882a593Smuzhiyun 	/* Enter direct-mode */
901*4882a593Smuzhiyun 	rc = xc_write_reg(priv, XREG_DIRECTSITTING_MODE, 0);
902*4882a593Smuzhiyun 	if (rc < 0) {
903*4882a593Smuzhiyun 		printk(KERN_ERR "failed to put device into direct mode!\n");
904*4882a593Smuzhiyun 		return -EIO;
905*4882a593Smuzhiyun 	}
906*4882a593Smuzhiyun 
907*4882a593Smuzhiyun 	rc = xc_send_i2c_data(priv, scode_buf, 13);
908*4882a593Smuzhiyun 	if (rc != 0) {
909*4882a593Smuzhiyun 		/* Even if the send failed, make sure we set back to indirect
910*4882a593Smuzhiyun 		   mode */
911*4882a593Smuzhiyun 		printk(KERN_ERR "Failed to set scode %d\n", rc);
912*4882a593Smuzhiyun 	}
913*4882a593Smuzhiyun 
914*4882a593Smuzhiyun 	/* Switch back to indirect-mode */
915*4882a593Smuzhiyun 	memset(indirect_mode, 0, sizeof(indirect_mode));
916*4882a593Smuzhiyun 	indirect_mode[4] = 0x88;
917*4882a593Smuzhiyun 	xc_send_i2c_data(priv, indirect_mode, sizeof(indirect_mode));
918*4882a593Smuzhiyun 	msleep(10);
919*4882a593Smuzhiyun 
920*4882a593Smuzhiyun 	return 0;
921*4882a593Smuzhiyun }
922*4882a593Smuzhiyun 
check_firmware(struct dvb_frontend * fe,unsigned int type,v4l2_std_id std,__u16 int_freq)923*4882a593Smuzhiyun static int check_firmware(struct dvb_frontend *fe, unsigned int type,
924*4882a593Smuzhiyun 			  v4l2_std_id std, __u16 int_freq)
925*4882a593Smuzhiyun {
926*4882a593Smuzhiyun 	struct xc4000_priv         *priv = fe->tuner_priv;
927*4882a593Smuzhiyun 	struct firmware_properties new_fw;
928*4882a593Smuzhiyun 	int			   rc = 0, is_retry = 0;
929*4882a593Smuzhiyun 	u16			   hwmodel;
930*4882a593Smuzhiyun 	v4l2_std_id		   std0;
931*4882a593Smuzhiyun 	u8			   hw_major = 0, hw_minor = 0, fw_major = 0, fw_minor = 0;
932*4882a593Smuzhiyun 
933*4882a593Smuzhiyun 	dprintk(1, "%s called\n", __func__);
934*4882a593Smuzhiyun 
935*4882a593Smuzhiyun 	if (!priv->firm) {
936*4882a593Smuzhiyun 		rc = xc4000_fwupload(fe);
937*4882a593Smuzhiyun 		if (rc < 0)
938*4882a593Smuzhiyun 			return rc;
939*4882a593Smuzhiyun 	}
940*4882a593Smuzhiyun 
941*4882a593Smuzhiyun retry:
942*4882a593Smuzhiyun 	new_fw.type = type;
943*4882a593Smuzhiyun 	new_fw.id = std;
944*4882a593Smuzhiyun 	new_fw.std_req = std;
945*4882a593Smuzhiyun 	new_fw.scode_table = SCODE;
946*4882a593Smuzhiyun 	new_fw.scode_nr = 0;
947*4882a593Smuzhiyun 	new_fw.int_freq = int_freq;
948*4882a593Smuzhiyun 
949*4882a593Smuzhiyun 	dprintk(1, "checking firmware, user requested type=");
950*4882a593Smuzhiyun 	if (debug) {
951*4882a593Smuzhiyun 		dump_firm_type(new_fw.type);
952*4882a593Smuzhiyun 		printk(KERN_CONT "(%x), id %016llx, ", new_fw.type,
953*4882a593Smuzhiyun 		       (unsigned long long)new_fw.std_req);
954*4882a593Smuzhiyun 		if (!int_freq)
955*4882a593Smuzhiyun 			printk(KERN_CONT "scode_tbl ");
956*4882a593Smuzhiyun 		else
957*4882a593Smuzhiyun 			printk(KERN_CONT "int_freq %d, ", new_fw.int_freq);
958*4882a593Smuzhiyun 		printk(KERN_CONT "scode_nr %d\n", new_fw.scode_nr);
959*4882a593Smuzhiyun 	}
960*4882a593Smuzhiyun 
961*4882a593Smuzhiyun 	/* No need to reload base firmware if it matches */
962*4882a593Smuzhiyun 	if (priv->cur_fw.type & BASE) {
963*4882a593Smuzhiyun 		dprintk(1, "BASE firmware not changed.\n");
964*4882a593Smuzhiyun 		goto skip_base;
965*4882a593Smuzhiyun 	}
966*4882a593Smuzhiyun 
967*4882a593Smuzhiyun 	/* Updating BASE - forget about all currently loaded firmware */
968*4882a593Smuzhiyun 	memset(&priv->cur_fw, 0, sizeof(priv->cur_fw));
969*4882a593Smuzhiyun 
970*4882a593Smuzhiyun 	/* Reset is needed before loading firmware */
971*4882a593Smuzhiyun 	rc = xc4000_tuner_reset(fe);
972*4882a593Smuzhiyun 	if (rc < 0)
973*4882a593Smuzhiyun 		goto fail;
974*4882a593Smuzhiyun 
975*4882a593Smuzhiyun 	/* BASE firmwares are all std0 */
976*4882a593Smuzhiyun 	std0 = 0;
977*4882a593Smuzhiyun 	rc = load_firmware(fe, BASE, &std0);
978*4882a593Smuzhiyun 	if (rc < 0) {
979*4882a593Smuzhiyun 		printk(KERN_ERR "Error %d while loading base firmware\n", rc);
980*4882a593Smuzhiyun 		goto fail;
981*4882a593Smuzhiyun 	}
982*4882a593Smuzhiyun 
983*4882a593Smuzhiyun 	/* Load INIT1, if needed */
984*4882a593Smuzhiyun 	dprintk(1, "Load init1 firmware, if exists\n");
985*4882a593Smuzhiyun 
986*4882a593Smuzhiyun 	rc = load_firmware(fe, BASE | INIT1, &std0);
987*4882a593Smuzhiyun 	if (rc == -ENOENT)
988*4882a593Smuzhiyun 		rc = load_firmware(fe, BASE | INIT1, &std0);
989*4882a593Smuzhiyun 	if (rc < 0 && rc != -ENOENT) {
990*4882a593Smuzhiyun 		tuner_err("Error %d while loading init1 firmware\n",
991*4882a593Smuzhiyun 			  rc);
992*4882a593Smuzhiyun 		goto fail;
993*4882a593Smuzhiyun 	}
994*4882a593Smuzhiyun 
995*4882a593Smuzhiyun skip_base:
996*4882a593Smuzhiyun 	/*
997*4882a593Smuzhiyun 	 * No need to reload standard specific firmware if base firmware
998*4882a593Smuzhiyun 	 * was not reloaded and requested video standards have not changed.
999*4882a593Smuzhiyun 	 */
1000*4882a593Smuzhiyun 	if (priv->cur_fw.type == (BASE | new_fw.type) &&
1001*4882a593Smuzhiyun 	    priv->cur_fw.std_req == std) {
1002*4882a593Smuzhiyun 		dprintk(1, "Std-specific firmware already loaded.\n");
1003*4882a593Smuzhiyun 		goto skip_std_specific;
1004*4882a593Smuzhiyun 	}
1005*4882a593Smuzhiyun 
1006*4882a593Smuzhiyun 	/* Reloading std-specific firmware forces a SCODE update */
1007*4882a593Smuzhiyun 	priv->cur_fw.scode_table = 0;
1008*4882a593Smuzhiyun 
1009*4882a593Smuzhiyun 	/* Load the standard firmware */
1010*4882a593Smuzhiyun 	rc = load_firmware(fe, new_fw.type, &new_fw.id);
1011*4882a593Smuzhiyun 
1012*4882a593Smuzhiyun 	if (rc < 0)
1013*4882a593Smuzhiyun 		goto fail;
1014*4882a593Smuzhiyun 
1015*4882a593Smuzhiyun skip_std_specific:
1016*4882a593Smuzhiyun 	if (priv->cur_fw.scode_table == new_fw.scode_table &&
1017*4882a593Smuzhiyun 	    priv->cur_fw.scode_nr == new_fw.scode_nr) {
1018*4882a593Smuzhiyun 		dprintk(1, "SCODE firmware already loaded.\n");
1019*4882a593Smuzhiyun 		goto check_device;
1020*4882a593Smuzhiyun 	}
1021*4882a593Smuzhiyun 
1022*4882a593Smuzhiyun 	/* Load SCODE firmware, if exists */
1023*4882a593Smuzhiyun 	rc = load_scode(fe, new_fw.type | new_fw.scode_table, &new_fw.id,
1024*4882a593Smuzhiyun 			new_fw.int_freq, new_fw.scode_nr);
1025*4882a593Smuzhiyun 	if (rc != 0)
1026*4882a593Smuzhiyun 		dprintk(1, "load scode failed %d\n", rc);
1027*4882a593Smuzhiyun 
1028*4882a593Smuzhiyun check_device:
1029*4882a593Smuzhiyun 	if (xc4000_readreg(priv, XREG_PRODUCT_ID, &hwmodel) < 0) {
1030*4882a593Smuzhiyun 		printk(KERN_ERR "Unable to read tuner registers.\n");
1031*4882a593Smuzhiyun 		goto fail;
1032*4882a593Smuzhiyun 	}
1033*4882a593Smuzhiyun 
1034*4882a593Smuzhiyun 	if (xc_get_version(priv, &hw_major, &hw_minor, &fw_major,
1035*4882a593Smuzhiyun 			   &fw_minor) != 0) {
1036*4882a593Smuzhiyun 		printk(KERN_ERR "Unable to read tuner registers.\n");
1037*4882a593Smuzhiyun 		goto fail;
1038*4882a593Smuzhiyun 	}
1039*4882a593Smuzhiyun 
1040*4882a593Smuzhiyun 	dprintk(1, "Device is Xceive %d version %d.%d, firmware version %d.%d\n",
1041*4882a593Smuzhiyun 		hwmodel, hw_major, hw_minor, fw_major, fw_minor);
1042*4882a593Smuzhiyun 
1043*4882a593Smuzhiyun 	/* Check firmware version against what we downloaded. */
1044*4882a593Smuzhiyun 	if (priv->firm_version != ((fw_major << 8) | fw_minor)) {
1045*4882a593Smuzhiyun 		printk(KERN_WARNING
1046*4882a593Smuzhiyun 		       "Incorrect readback of firmware version %d.%d.\n",
1047*4882a593Smuzhiyun 		       fw_major, fw_minor);
1048*4882a593Smuzhiyun 		goto fail;
1049*4882a593Smuzhiyun 	}
1050*4882a593Smuzhiyun 
1051*4882a593Smuzhiyun 	/* Check that the tuner hardware model remains consistent over time. */
1052*4882a593Smuzhiyun 	if (priv->hwmodel == 0 &&
1053*4882a593Smuzhiyun 	    (hwmodel == XC_PRODUCT_ID_XC4000 ||
1054*4882a593Smuzhiyun 	     hwmodel == XC_PRODUCT_ID_XC4100)) {
1055*4882a593Smuzhiyun 		priv->hwmodel = hwmodel;
1056*4882a593Smuzhiyun 		priv->hwvers = (hw_major << 8) | hw_minor;
1057*4882a593Smuzhiyun 	} else if (priv->hwmodel == 0 || priv->hwmodel != hwmodel ||
1058*4882a593Smuzhiyun 		   priv->hwvers != ((hw_major << 8) | hw_minor)) {
1059*4882a593Smuzhiyun 		printk(KERN_WARNING
1060*4882a593Smuzhiyun 		       "Read invalid device hardware information - tuner hung?\n");
1061*4882a593Smuzhiyun 		goto fail;
1062*4882a593Smuzhiyun 	}
1063*4882a593Smuzhiyun 
1064*4882a593Smuzhiyun 	priv->cur_fw = new_fw;
1065*4882a593Smuzhiyun 
1066*4882a593Smuzhiyun 	/*
1067*4882a593Smuzhiyun 	 * By setting BASE in cur_fw.type only after successfully loading all
1068*4882a593Smuzhiyun 	 * firmwares, we can:
1069*4882a593Smuzhiyun 	 * 1. Identify that BASE firmware with type=0 has been loaded;
1070*4882a593Smuzhiyun 	 * 2. Tell whether BASE firmware was just changed the next time through.
1071*4882a593Smuzhiyun 	 */
1072*4882a593Smuzhiyun 	priv->cur_fw.type |= BASE;
1073*4882a593Smuzhiyun 
1074*4882a593Smuzhiyun 	return 0;
1075*4882a593Smuzhiyun 
1076*4882a593Smuzhiyun fail:
1077*4882a593Smuzhiyun 	memset(&priv->cur_fw, 0, sizeof(priv->cur_fw));
1078*4882a593Smuzhiyun 	if (!is_retry) {
1079*4882a593Smuzhiyun 		msleep(50);
1080*4882a593Smuzhiyun 		is_retry = 1;
1081*4882a593Smuzhiyun 		dprintk(1, "Retrying firmware load\n");
1082*4882a593Smuzhiyun 		goto retry;
1083*4882a593Smuzhiyun 	}
1084*4882a593Smuzhiyun 
1085*4882a593Smuzhiyun 	if (rc == -ENOENT)
1086*4882a593Smuzhiyun 		rc = -EINVAL;
1087*4882a593Smuzhiyun 	return rc;
1088*4882a593Smuzhiyun }
1089*4882a593Smuzhiyun 
xc_debug_dump(struct xc4000_priv * priv)1090*4882a593Smuzhiyun static void xc_debug_dump(struct xc4000_priv *priv)
1091*4882a593Smuzhiyun {
1092*4882a593Smuzhiyun 	u16	adc_envelope;
1093*4882a593Smuzhiyun 	u32	freq_error_hz = 0;
1094*4882a593Smuzhiyun 	u16	lock_status;
1095*4882a593Smuzhiyun 	u32	hsync_freq_hz = 0;
1096*4882a593Smuzhiyun 	u16	frame_lines;
1097*4882a593Smuzhiyun 	u16	quality;
1098*4882a593Smuzhiyun 	u16	signal = 0;
1099*4882a593Smuzhiyun 	u16	noise = 0;
1100*4882a593Smuzhiyun 	u8	hw_majorversion = 0, hw_minorversion = 0;
1101*4882a593Smuzhiyun 	u8	fw_majorversion = 0, fw_minorversion = 0;
1102*4882a593Smuzhiyun 
1103*4882a593Smuzhiyun 	xc_get_adc_envelope(priv, &adc_envelope);
1104*4882a593Smuzhiyun 	dprintk(1, "*** ADC envelope (0-1023) = %d\n", adc_envelope);
1105*4882a593Smuzhiyun 
1106*4882a593Smuzhiyun 	xc_get_frequency_error(priv, &freq_error_hz);
1107*4882a593Smuzhiyun 	dprintk(1, "*** Frequency error = %d Hz\n", freq_error_hz);
1108*4882a593Smuzhiyun 
1109*4882a593Smuzhiyun 	xc_get_lock_status(priv, &lock_status);
1110*4882a593Smuzhiyun 	dprintk(1, "*** Lock status (0-Wait, 1-Locked, 2-No-signal) = %d\n",
1111*4882a593Smuzhiyun 		lock_status);
1112*4882a593Smuzhiyun 
1113*4882a593Smuzhiyun 	xc_get_version(priv, &hw_majorversion, &hw_minorversion,
1114*4882a593Smuzhiyun 		       &fw_majorversion, &fw_minorversion);
1115*4882a593Smuzhiyun 	dprintk(1, "*** HW: V%02x.%02x, FW: V%02x.%02x\n",
1116*4882a593Smuzhiyun 		hw_majorversion, hw_minorversion,
1117*4882a593Smuzhiyun 		fw_majorversion, fw_minorversion);
1118*4882a593Smuzhiyun 
1119*4882a593Smuzhiyun 	if (priv->video_standard < XC4000_DTV6) {
1120*4882a593Smuzhiyun 		xc_get_hsync_freq(priv, &hsync_freq_hz);
1121*4882a593Smuzhiyun 		dprintk(1, "*** Horizontal sync frequency = %d Hz\n",
1122*4882a593Smuzhiyun 			hsync_freq_hz);
1123*4882a593Smuzhiyun 
1124*4882a593Smuzhiyun 		xc_get_frame_lines(priv, &frame_lines);
1125*4882a593Smuzhiyun 		dprintk(1, "*** Frame lines = %d\n", frame_lines);
1126*4882a593Smuzhiyun 	}
1127*4882a593Smuzhiyun 
1128*4882a593Smuzhiyun 	xc_get_quality(priv, &quality);
1129*4882a593Smuzhiyun 	dprintk(1, "*** Quality (0:<8dB, 7:>56dB) = %d\n", quality);
1130*4882a593Smuzhiyun 
1131*4882a593Smuzhiyun 	xc_get_signal_level(priv, &signal);
1132*4882a593Smuzhiyun 	dprintk(1, "*** Signal level = -%ddB (%d)\n", signal >> 8, signal);
1133*4882a593Smuzhiyun 
1134*4882a593Smuzhiyun 	xc_get_noise_level(priv, &noise);
1135*4882a593Smuzhiyun 	dprintk(1, "*** Noise level = %ddB (%d)\n", noise >> 8, noise);
1136*4882a593Smuzhiyun }
1137*4882a593Smuzhiyun 
xc4000_set_params(struct dvb_frontend * fe)1138*4882a593Smuzhiyun static int xc4000_set_params(struct dvb_frontend *fe)
1139*4882a593Smuzhiyun {
1140*4882a593Smuzhiyun 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1141*4882a593Smuzhiyun 	u32 delsys = c->delivery_system;
1142*4882a593Smuzhiyun 	u32 bw = c->bandwidth_hz;
1143*4882a593Smuzhiyun 	struct xc4000_priv *priv = fe->tuner_priv;
1144*4882a593Smuzhiyun 	unsigned int type;
1145*4882a593Smuzhiyun 	int	ret = -EREMOTEIO;
1146*4882a593Smuzhiyun 
1147*4882a593Smuzhiyun 	dprintk(1, "%s() frequency=%d (Hz)\n", __func__, c->frequency);
1148*4882a593Smuzhiyun 
1149*4882a593Smuzhiyun 	mutex_lock(&priv->lock);
1150*4882a593Smuzhiyun 
1151*4882a593Smuzhiyun 	switch (delsys) {
1152*4882a593Smuzhiyun 	case SYS_ATSC:
1153*4882a593Smuzhiyun 		dprintk(1, "%s() VSB modulation\n", __func__);
1154*4882a593Smuzhiyun 		priv->rf_mode = XC_RF_MODE_AIR;
1155*4882a593Smuzhiyun 		priv->freq_offset = 1750000;
1156*4882a593Smuzhiyun 		priv->video_standard = XC4000_DTV6;
1157*4882a593Smuzhiyun 		type = DTV6;
1158*4882a593Smuzhiyun 		break;
1159*4882a593Smuzhiyun 	case SYS_DVBC_ANNEX_B:
1160*4882a593Smuzhiyun 		dprintk(1, "%s() QAM modulation\n", __func__);
1161*4882a593Smuzhiyun 		priv->rf_mode = XC_RF_MODE_CABLE;
1162*4882a593Smuzhiyun 		priv->freq_offset = 1750000;
1163*4882a593Smuzhiyun 		priv->video_standard = XC4000_DTV6;
1164*4882a593Smuzhiyun 		type = DTV6;
1165*4882a593Smuzhiyun 		break;
1166*4882a593Smuzhiyun 	case SYS_DVBT:
1167*4882a593Smuzhiyun 	case SYS_DVBT2:
1168*4882a593Smuzhiyun 		dprintk(1, "%s() OFDM\n", __func__);
1169*4882a593Smuzhiyun 		if (bw == 0) {
1170*4882a593Smuzhiyun 			if (c->frequency < 400000000) {
1171*4882a593Smuzhiyun 				priv->freq_offset = 2250000;
1172*4882a593Smuzhiyun 			} else {
1173*4882a593Smuzhiyun 				priv->freq_offset = 2750000;
1174*4882a593Smuzhiyun 			}
1175*4882a593Smuzhiyun 			priv->video_standard = XC4000_DTV7_8;
1176*4882a593Smuzhiyun 			type = DTV78;
1177*4882a593Smuzhiyun 		} else if (bw <= 6000000) {
1178*4882a593Smuzhiyun 			priv->video_standard = XC4000_DTV6;
1179*4882a593Smuzhiyun 			priv->freq_offset = 1750000;
1180*4882a593Smuzhiyun 			type = DTV6;
1181*4882a593Smuzhiyun 		} else if (bw <= 7000000) {
1182*4882a593Smuzhiyun 			priv->video_standard = XC4000_DTV7;
1183*4882a593Smuzhiyun 			priv->freq_offset = 2250000;
1184*4882a593Smuzhiyun 			type = DTV7;
1185*4882a593Smuzhiyun 		} else {
1186*4882a593Smuzhiyun 			priv->video_standard = XC4000_DTV8;
1187*4882a593Smuzhiyun 			priv->freq_offset = 2750000;
1188*4882a593Smuzhiyun 			type = DTV8;
1189*4882a593Smuzhiyun 		}
1190*4882a593Smuzhiyun 		priv->rf_mode = XC_RF_MODE_AIR;
1191*4882a593Smuzhiyun 		break;
1192*4882a593Smuzhiyun 	default:
1193*4882a593Smuzhiyun 		printk(KERN_ERR "xc4000 delivery system not supported!\n");
1194*4882a593Smuzhiyun 		ret = -EINVAL;
1195*4882a593Smuzhiyun 		goto fail;
1196*4882a593Smuzhiyun 	}
1197*4882a593Smuzhiyun 
1198*4882a593Smuzhiyun 	priv->freq_hz = c->frequency - priv->freq_offset;
1199*4882a593Smuzhiyun 
1200*4882a593Smuzhiyun 	dprintk(1, "%s() frequency=%d (compensated)\n",
1201*4882a593Smuzhiyun 		__func__, priv->freq_hz);
1202*4882a593Smuzhiyun 
1203*4882a593Smuzhiyun 	/* Make sure the correct firmware type is loaded */
1204*4882a593Smuzhiyun 	if (check_firmware(fe, type, 0, priv->if_khz) != 0)
1205*4882a593Smuzhiyun 		goto fail;
1206*4882a593Smuzhiyun 
1207*4882a593Smuzhiyun 	priv->bandwidth = c->bandwidth_hz;
1208*4882a593Smuzhiyun 
1209*4882a593Smuzhiyun 	ret = xc_set_signal_source(priv, priv->rf_mode);
1210*4882a593Smuzhiyun 	if (ret != 0) {
1211*4882a593Smuzhiyun 		printk(KERN_ERR "xc4000: xc_set_signal_source(%d) failed\n",
1212*4882a593Smuzhiyun 		       priv->rf_mode);
1213*4882a593Smuzhiyun 		goto fail;
1214*4882a593Smuzhiyun 	} else {
1215*4882a593Smuzhiyun 		u16	video_mode, audio_mode;
1216*4882a593Smuzhiyun 		video_mode = xc4000_standard[priv->video_standard].video_mode;
1217*4882a593Smuzhiyun 		audio_mode = xc4000_standard[priv->video_standard].audio_mode;
1218*4882a593Smuzhiyun 		if (type == DTV6 && priv->firm_version != 0x0102)
1219*4882a593Smuzhiyun 			video_mode |= 0x0001;
1220*4882a593Smuzhiyun 		ret = xc_set_tv_standard(priv, video_mode, audio_mode);
1221*4882a593Smuzhiyun 		if (ret != 0) {
1222*4882a593Smuzhiyun 			printk(KERN_ERR "xc4000: xc_set_tv_standard failed\n");
1223*4882a593Smuzhiyun 			/* DJH - do not return when it fails... */
1224*4882a593Smuzhiyun 			/* goto fail; */
1225*4882a593Smuzhiyun 		}
1226*4882a593Smuzhiyun 	}
1227*4882a593Smuzhiyun 
1228*4882a593Smuzhiyun 	if (xc_write_reg(priv, XREG_D_CODE, 0) == 0)
1229*4882a593Smuzhiyun 		ret = 0;
1230*4882a593Smuzhiyun 	if (priv->dvb_amplitude != 0) {
1231*4882a593Smuzhiyun 		if (xc_write_reg(priv, XREG_AMPLITUDE,
1232*4882a593Smuzhiyun 				 (priv->firm_version != 0x0102 ||
1233*4882a593Smuzhiyun 				  priv->dvb_amplitude != 134 ?
1234*4882a593Smuzhiyun 				  priv->dvb_amplitude : 132)) != 0)
1235*4882a593Smuzhiyun 			ret = -EREMOTEIO;
1236*4882a593Smuzhiyun 	}
1237*4882a593Smuzhiyun 	if (priv->set_smoothedcvbs != 0) {
1238*4882a593Smuzhiyun 		if (xc_write_reg(priv, XREG_SMOOTHEDCVBS, 1) != 0)
1239*4882a593Smuzhiyun 			ret = -EREMOTEIO;
1240*4882a593Smuzhiyun 	}
1241*4882a593Smuzhiyun 	if (ret != 0) {
1242*4882a593Smuzhiyun 		printk(KERN_ERR "xc4000: setting registers failed\n");
1243*4882a593Smuzhiyun 		/* goto fail; */
1244*4882a593Smuzhiyun 	}
1245*4882a593Smuzhiyun 
1246*4882a593Smuzhiyun 	xc_tune_channel(priv, priv->freq_hz);
1247*4882a593Smuzhiyun 
1248*4882a593Smuzhiyun 	ret = 0;
1249*4882a593Smuzhiyun 
1250*4882a593Smuzhiyun fail:
1251*4882a593Smuzhiyun 	mutex_unlock(&priv->lock);
1252*4882a593Smuzhiyun 
1253*4882a593Smuzhiyun 	return ret;
1254*4882a593Smuzhiyun }
1255*4882a593Smuzhiyun 
xc4000_set_analog_params(struct dvb_frontend * fe,struct analog_parameters * params)1256*4882a593Smuzhiyun static int xc4000_set_analog_params(struct dvb_frontend *fe,
1257*4882a593Smuzhiyun 	struct analog_parameters *params)
1258*4882a593Smuzhiyun {
1259*4882a593Smuzhiyun 	struct xc4000_priv *priv = fe->tuner_priv;
1260*4882a593Smuzhiyun 	unsigned int type = 0;
1261*4882a593Smuzhiyun 	int	ret = -EREMOTEIO;
1262*4882a593Smuzhiyun 
1263*4882a593Smuzhiyun 	if (params->mode == V4L2_TUNER_RADIO) {
1264*4882a593Smuzhiyun 		dprintk(1, "%s() frequency=%d (in units of 62.5Hz)\n",
1265*4882a593Smuzhiyun 			__func__, params->frequency);
1266*4882a593Smuzhiyun 
1267*4882a593Smuzhiyun 		mutex_lock(&priv->lock);
1268*4882a593Smuzhiyun 
1269*4882a593Smuzhiyun 		params->std = 0;
1270*4882a593Smuzhiyun 		priv->freq_hz = params->frequency * 125L / 2;
1271*4882a593Smuzhiyun 
1272*4882a593Smuzhiyun 		if (audio_std & XC4000_AUDIO_STD_INPUT1) {
1273*4882a593Smuzhiyun 			priv->video_standard = XC4000_FM_Radio_INPUT1;
1274*4882a593Smuzhiyun 			type = FM | INPUT1;
1275*4882a593Smuzhiyun 		} else {
1276*4882a593Smuzhiyun 			priv->video_standard = XC4000_FM_Radio_INPUT2;
1277*4882a593Smuzhiyun 			type = FM | INPUT2;
1278*4882a593Smuzhiyun 		}
1279*4882a593Smuzhiyun 
1280*4882a593Smuzhiyun 		goto tune_channel;
1281*4882a593Smuzhiyun 	}
1282*4882a593Smuzhiyun 
1283*4882a593Smuzhiyun 	dprintk(1, "%s() frequency=%d (in units of 62.5khz)\n",
1284*4882a593Smuzhiyun 		__func__, params->frequency);
1285*4882a593Smuzhiyun 
1286*4882a593Smuzhiyun 	mutex_lock(&priv->lock);
1287*4882a593Smuzhiyun 
1288*4882a593Smuzhiyun 	/* params->frequency is in units of 62.5khz */
1289*4882a593Smuzhiyun 	priv->freq_hz = params->frequency * 62500;
1290*4882a593Smuzhiyun 
1291*4882a593Smuzhiyun 	params->std &= V4L2_STD_ALL;
1292*4882a593Smuzhiyun 	/* if std is not defined, choose one */
1293*4882a593Smuzhiyun 	if (!params->std)
1294*4882a593Smuzhiyun 		params->std = V4L2_STD_PAL_BG;
1295*4882a593Smuzhiyun 
1296*4882a593Smuzhiyun 	if (audio_std & XC4000_AUDIO_STD_MONO)
1297*4882a593Smuzhiyun 		type = MONO;
1298*4882a593Smuzhiyun 
1299*4882a593Smuzhiyun 	if (params->std & V4L2_STD_MN) {
1300*4882a593Smuzhiyun 		params->std = V4L2_STD_MN;
1301*4882a593Smuzhiyun 		if (audio_std & XC4000_AUDIO_STD_MONO) {
1302*4882a593Smuzhiyun 			priv->video_standard = XC4000_MN_NTSC_PAL_Mono;
1303*4882a593Smuzhiyun 		} else if (audio_std & XC4000_AUDIO_STD_A2) {
1304*4882a593Smuzhiyun 			params->std |= V4L2_STD_A2;
1305*4882a593Smuzhiyun 			priv->video_standard = XC4000_MN_NTSC_PAL_A2;
1306*4882a593Smuzhiyun 		} else {
1307*4882a593Smuzhiyun 			params->std |= V4L2_STD_BTSC;
1308*4882a593Smuzhiyun 			priv->video_standard = XC4000_MN_NTSC_PAL_BTSC;
1309*4882a593Smuzhiyun 		}
1310*4882a593Smuzhiyun 		goto tune_channel;
1311*4882a593Smuzhiyun 	}
1312*4882a593Smuzhiyun 
1313*4882a593Smuzhiyun 	if (params->std & V4L2_STD_PAL_BG) {
1314*4882a593Smuzhiyun 		params->std = V4L2_STD_PAL_BG;
1315*4882a593Smuzhiyun 		if (audio_std & XC4000_AUDIO_STD_MONO) {
1316*4882a593Smuzhiyun 			priv->video_standard = XC4000_BG_PAL_MONO;
1317*4882a593Smuzhiyun 		} else if (!(audio_std & XC4000_AUDIO_STD_A2)) {
1318*4882a593Smuzhiyun 			if (!(audio_std & XC4000_AUDIO_STD_B)) {
1319*4882a593Smuzhiyun 				params->std |= V4L2_STD_NICAM_A;
1320*4882a593Smuzhiyun 				priv->video_standard = XC4000_BG_PAL_NICAM;
1321*4882a593Smuzhiyun 			} else {
1322*4882a593Smuzhiyun 				params->std |= V4L2_STD_NICAM_B;
1323*4882a593Smuzhiyun 				priv->video_standard = XC4000_BG_PAL_NICAM;
1324*4882a593Smuzhiyun 			}
1325*4882a593Smuzhiyun 		} else {
1326*4882a593Smuzhiyun 			if (!(audio_std & XC4000_AUDIO_STD_B)) {
1327*4882a593Smuzhiyun 				params->std |= V4L2_STD_A2_A;
1328*4882a593Smuzhiyun 				priv->video_standard = XC4000_BG_PAL_A2;
1329*4882a593Smuzhiyun 			} else {
1330*4882a593Smuzhiyun 				params->std |= V4L2_STD_A2_B;
1331*4882a593Smuzhiyun 				priv->video_standard = XC4000_BG_PAL_A2;
1332*4882a593Smuzhiyun 			}
1333*4882a593Smuzhiyun 		}
1334*4882a593Smuzhiyun 		goto tune_channel;
1335*4882a593Smuzhiyun 	}
1336*4882a593Smuzhiyun 
1337*4882a593Smuzhiyun 	if (params->std & V4L2_STD_PAL_I) {
1338*4882a593Smuzhiyun 		/* default to NICAM audio standard */
1339*4882a593Smuzhiyun 		params->std = V4L2_STD_PAL_I | V4L2_STD_NICAM;
1340*4882a593Smuzhiyun 		if (audio_std & XC4000_AUDIO_STD_MONO)
1341*4882a593Smuzhiyun 			priv->video_standard = XC4000_I_PAL_NICAM_MONO;
1342*4882a593Smuzhiyun 		else
1343*4882a593Smuzhiyun 			priv->video_standard = XC4000_I_PAL_NICAM;
1344*4882a593Smuzhiyun 		goto tune_channel;
1345*4882a593Smuzhiyun 	}
1346*4882a593Smuzhiyun 
1347*4882a593Smuzhiyun 	if (params->std & V4L2_STD_PAL_DK) {
1348*4882a593Smuzhiyun 		params->std = V4L2_STD_PAL_DK;
1349*4882a593Smuzhiyun 		if (audio_std & XC4000_AUDIO_STD_MONO) {
1350*4882a593Smuzhiyun 			priv->video_standard = XC4000_DK_PAL_MONO;
1351*4882a593Smuzhiyun 		} else if (audio_std & XC4000_AUDIO_STD_A2) {
1352*4882a593Smuzhiyun 			params->std |= V4L2_STD_A2;
1353*4882a593Smuzhiyun 			priv->video_standard = XC4000_DK_PAL_A2;
1354*4882a593Smuzhiyun 		} else {
1355*4882a593Smuzhiyun 			params->std |= V4L2_STD_NICAM;
1356*4882a593Smuzhiyun 			priv->video_standard = XC4000_DK_PAL_NICAM;
1357*4882a593Smuzhiyun 		}
1358*4882a593Smuzhiyun 		goto tune_channel;
1359*4882a593Smuzhiyun 	}
1360*4882a593Smuzhiyun 
1361*4882a593Smuzhiyun 	if (params->std & V4L2_STD_SECAM_DK) {
1362*4882a593Smuzhiyun 		/* default to A2 audio standard */
1363*4882a593Smuzhiyun 		params->std = V4L2_STD_SECAM_DK | V4L2_STD_A2;
1364*4882a593Smuzhiyun 		if (audio_std & XC4000_AUDIO_STD_L) {
1365*4882a593Smuzhiyun 			type = 0;
1366*4882a593Smuzhiyun 			priv->video_standard = XC4000_DK_SECAM_NICAM;
1367*4882a593Smuzhiyun 		} else if (audio_std & XC4000_AUDIO_STD_MONO) {
1368*4882a593Smuzhiyun 			priv->video_standard = XC4000_DK_SECAM_A2MONO;
1369*4882a593Smuzhiyun 		} else if (audio_std & XC4000_AUDIO_STD_K3) {
1370*4882a593Smuzhiyun 			params->std |= V4L2_STD_SECAM_K3;
1371*4882a593Smuzhiyun 			priv->video_standard = XC4000_DK_SECAM_A2LDK3;
1372*4882a593Smuzhiyun 		} else {
1373*4882a593Smuzhiyun 			priv->video_standard = XC4000_DK_SECAM_A2DK1;
1374*4882a593Smuzhiyun 		}
1375*4882a593Smuzhiyun 		goto tune_channel;
1376*4882a593Smuzhiyun 	}
1377*4882a593Smuzhiyun 
1378*4882a593Smuzhiyun 	if (params->std & V4L2_STD_SECAM_L) {
1379*4882a593Smuzhiyun 		/* default to NICAM audio standard */
1380*4882a593Smuzhiyun 		type = 0;
1381*4882a593Smuzhiyun 		params->std = V4L2_STD_SECAM_L | V4L2_STD_NICAM;
1382*4882a593Smuzhiyun 		priv->video_standard = XC4000_L_SECAM_NICAM;
1383*4882a593Smuzhiyun 		goto tune_channel;
1384*4882a593Smuzhiyun 	}
1385*4882a593Smuzhiyun 
1386*4882a593Smuzhiyun 	if (params->std & V4L2_STD_SECAM_LC) {
1387*4882a593Smuzhiyun 		/* default to NICAM audio standard */
1388*4882a593Smuzhiyun 		type = 0;
1389*4882a593Smuzhiyun 		params->std = V4L2_STD_SECAM_LC | V4L2_STD_NICAM;
1390*4882a593Smuzhiyun 		priv->video_standard = XC4000_LC_SECAM_NICAM;
1391*4882a593Smuzhiyun 		goto tune_channel;
1392*4882a593Smuzhiyun 	}
1393*4882a593Smuzhiyun 
1394*4882a593Smuzhiyun tune_channel:
1395*4882a593Smuzhiyun 	/* FIXME: it could be air. */
1396*4882a593Smuzhiyun 	priv->rf_mode = XC_RF_MODE_CABLE;
1397*4882a593Smuzhiyun 
1398*4882a593Smuzhiyun 	if (check_firmware(fe, type, params->std,
1399*4882a593Smuzhiyun 			   xc4000_standard[priv->video_standard].int_freq) != 0)
1400*4882a593Smuzhiyun 		goto fail;
1401*4882a593Smuzhiyun 
1402*4882a593Smuzhiyun 	ret = xc_set_signal_source(priv, priv->rf_mode);
1403*4882a593Smuzhiyun 	if (ret != 0) {
1404*4882a593Smuzhiyun 		printk(KERN_ERR
1405*4882a593Smuzhiyun 		       "xc4000: xc_set_signal_source(%d) failed\n",
1406*4882a593Smuzhiyun 		       priv->rf_mode);
1407*4882a593Smuzhiyun 		goto fail;
1408*4882a593Smuzhiyun 	} else {
1409*4882a593Smuzhiyun 		u16	video_mode, audio_mode;
1410*4882a593Smuzhiyun 		video_mode = xc4000_standard[priv->video_standard].video_mode;
1411*4882a593Smuzhiyun 		audio_mode = xc4000_standard[priv->video_standard].audio_mode;
1412*4882a593Smuzhiyun 		if (priv->video_standard < XC4000_BG_PAL_A2) {
1413*4882a593Smuzhiyun 			if (type & NOGD)
1414*4882a593Smuzhiyun 				video_mode &= 0xFF7F;
1415*4882a593Smuzhiyun 		} else if (priv->video_standard < XC4000_I_PAL_NICAM) {
1416*4882a593Smuzhiyun 			if (priv->firm_version == 0x0102)
1417*4882a593Smuzhiyun 				video_mode &= 0xFEFF;
1418*4882a593Smuzhiyun 			if (audio_std & XC4000_AUDIO_STD_B)
1419*4882a593Smuzhiyun 				video_mode |= 0x0080;
1420*4882a593Smuzhiyun 		}
1421*4882a593Smuzhiyun 		ret = xc_set_tv_standard(priv, video_mode, audio_mode);
1422*4882a593Smuzhiyun 		if (ret != 0) {
1423*4882a593Smuzhiyun 			printk(KERN_ERR "xc4000: xc_set_tv_standard failed\n");
1424*4882a593Smuzhiyun 			goto fail;
1425*4882a593Smuzhiyun 		}
1426*4882a593Smuzhiyun 	}
1427*4882a593Smuzhiyun 
1428*4882a593Smuzhiyun 	if (xc_write_reg(priv, XREG_D_CODE, 0) == 0)
1429*4882a593Smuzhiyun 		ret = 0;
1430*4882a593Smuzhiyun 	if (xc_write_reg(priv, XREG_AMPLITUDE, 1) != 0)
1431*4882a593Smuzhiyun 		ret = -EREMOTEIO;
1432*4882a593Smuzhiyun 	if (priv->set_smoothedcvbs != 0) {
1433*4882a593Smuzhiyun 		if (xc_write_reg(priv, XREG_SMOOTHEDCVBS, 1) != 0)
1434*4882a593Smuzhiyun 			ret = -EREMOTEIO;
1435*4882a593Smuzhiyun 	}
1436*4882a593Smuzhiyun 	if (ret != 0) {
1437*4882a593Smuzhiyun 		printk(KERN_ERR "xc4000: setting registers failed\n");
1438*4882a593Smuzhiyun 		goto fail;
1439*4882a593Smuzhiyun 	}
1440*4882a593Smuzhiyun 
1441*4882a593Smuzhiyun 	xc_tune_channel(priv, priv->freq_hz);
1442*4882a593Smuzhiyun 
1443*4882a593Smuzhiyun 	ret = 0;
1444*4882a593Smuzhiyun 
1445*4882a593Smuzhiyun fail:
1446*4882a593Smuzhiyun 	mutex_unlock(&priv->lock);
1447*4882a593Smuzhiyun 
1448*4882a593Smuzhiyun 	return ret;
1449*4882a593Smuzhiyun }
1450*4882a593Smuzhiyun 
xc4000_get_signal(struct dvb_frontend * fe,u16 * strength)1451*4882a593Smuzhiyun static int xc4000_get_signal(struct dvb_frontend *fe, u16 *strength)
1452*4882a593Smuzhiyun {
1453*4882a593Smuzhiyun 	struct xc4000_priv *priv = fe->tuner_priv;
1454*4882a593Smuzhiyun 	u16 value = 0;
1455*4882a593Smuzhiyun 	int rc;
1456*4882a593Smuzhiyun 
1457*4882a593Smuzhiyun 	mutex_lock(&priv->lock);
1458*4882a593Smuzhiyun 	rc = xc4000_readreg(priv, XREG_SIGNAL_LEVEL, &value);
1459*4882a593Smuzhiyun 	mutex_unlock(&priv->lock);
1460*4882a593Smuzhiyun 
1461*4882a593Smuzhiyun 	if (rc < 0)
1462*4882a593Smuzhiyun 		goto ret;
1463*4882a593Smuzhiyun 
1464*4882a593Smuzhiyun 	/* Information from real testing of DVB-T and radio part,
1465*4882a593Smuzhiyun 	   coefficient for one dB is 0xff.
1466*4882a593Smuzhiyun 	 */
1467*4882a593Smuzhiyun 	tuner_dbg("Signal strength: -%ddB (%05d)\n", value >> 8, value);
1468*4882a593Smuzhiyun 
1469*4882a593Smuzhiyun 	/* all known digital modes */
1470*4882a593Smuzhiyun 	if ((priv->video_standard == XC4000_DTV6) ||
1471*4882a593Smuzhiyun 	    (priv->video_standard == XC4000_DTV7) ||
1472*4882a593Smuzhiyun 	    (priv->video_standard == XC4000_DTV7_8) ||
1473*4882a593Smuzhiyun 	    (priv->video_standard == XC4000_DTV8))
1474*4882a593Smuzhiyun 		goto digital;
1475*4882a593Smuzhiyun 
1476*4882a593Smuzhiyun 	/* Analog mode has NOISE LEVEL important, signal
1477*4882a593Smuzhiyun 	   depends only on gain of antenna and amplifiers,
1478*4882a593Smuzhiyun 	   but it doesn't tell anything about real quality
1479*4882a593Smuzhiyun 	   of reception.
1480*4882a593Smuzhiyun 	 */
1481*4882a593Smuzhiyun 	mutex_lock(&priv->lock);
1482*4882a593Smuzhiyun 	rc = xc4000_readreg(priv, XREG_NOISE_LEVEL, &value);
1483*4882a593Smuzhiyun 	mutex_unlock(&priv->lock);
1484*4882a593Smuzhiyun 
1485*4882a593Smuzhiyun 	tuner_dbg("Noise level: %ddB (%05d)\n", value >> 8, value);
1486*4882a593Smuzhiyun 
1487*4882a593Smuzhiyun 	/* highest noise level: 32dB */
1488*4882a593Smuzhiyun 	if (value >= 0x2000) {
1489*4882a593Smuzhiyun 		value = 0;
1490*4882a593Smuzhiyun 	} else {
1491*4882a593Smuzhiyun 		value = (~value << 3) & 0xffff;
1492*4882a593Smuzhiyun 	}
1493*4882a593Smuzhiyun 
1494*4882a593Smuzhiyun 	goto ret;
1495*4882a593Smuzhiyun 
1496*4882a593Smuzhiyun 	/* Digital mode has SIGNAL LEVEL important and real
1497*4882a593Smuzhiyun 	   noise level is stored in demodulator registers.
1498*4882a593Smuzhiyun 	 */
1499*4882a593Smuzhiyun digital:
1500*4882a593Smuzhiyun 	/* best signal: -50dB */
1501*4882a593Smuzhiyun 	if (value <= 0x3200) {
1502*4882a593Smuzhiyun 		value = 0xffff;
1503*4882a593Smuzhiyun 	/* minimum: -114dB - should be 0x7200 but real zero is 0x713A */
1504*4882a593Smuzhiyun 	} else if (value >= 0x713A) {
1505*4882a593Smuzhiyun 		value = 0;
1506*4882a593Smuzhiyun 	} else {
1507*4882a593Smuzhiyun 		value = ~(value - 0x3200) << 2;
1508*4882a593Smuzhiyun 	}
1509*4882a593Smuzhiyun 
1510*4882a593Smuzhiyun ret:
1511*4882a593Smuzhiyun 	*strength = value;
1512*4882a593Smuzhiyun 
1513*4882a593Smuzhiyun 	return rc;
1514*4882a593Smuzhiyun }
1515*4882a593Smuzhiyun 
xc4000_get_frequency(struct dvb_frontend * fe,u32 * freq)1516*4882a593Smuzhiyun static int xc4000_get_frequency(struct dvb_frontend *fe, u32 *freq)
1517*4882a593Smuzhiyun {
1518*4882a593Smuzhiyun 	struct xc4000_priv *priv = fe->tuner_priv;
1519*4882a593Smuzhiyun 
1520*4882a593Smuzhiyun 	*freq = priv->freq_hz + priv->freq_offset;
1521*4882a593Smuzhiyun 
1522*4882a593Smuzhiyun 	if (debug) {
1523*4882a593Smuzhiyun 		mutex_lock(&priv->lock);
1524*4882a593Smuzhiyun 		if ((priv->cur_fw.type
1525*4882a593Smuzhiyun 		     & (BASE | FM | DTV6 | DTV7 | DTV78 | DTV8)) == BASE) {
1526*4882a593Smuzhiyun 			u16	snr = 0;
1527*4882a593Smuzhiyun 			if (xc4000_readreg(priv, XREG_SNR, &snr) == 0) {
1528*4882a593Smuzhiyun 				mutex_unlock(&priv->lock);
1529*4882a593Smuzhiyun 				dprintk(1, "%s() freq = %u, SNR = %d\n",
1530*4882a593Smuzhiyun 					__func__, *freq, snr);
1531*4882a593Smuzhiyun 				return 0;
1532*4882a593Smuzhiyun 			}
1533*4882a593Smuzhiyun 		}
1534*4882a593Smuzhiyun 		mutex_unlock(&priv->lock);
1535*4882a593Smuzhiyun 	}
1536*4882a593Smuzhiyun 
1537*4882a593Smuzhiyun 	dprintk(1, "%s()\n", __func__);
1538*4882a593Smuzhiyun 
1539*4882a593Smuzhiyun 	return 0;
1540*4882a593Smuzhiyun }
1541*4882a593Smuzhiyun 
xc4000_get_bandwidth(struct dvb_frontend * fe,u32 * bw)1542*4882a593Smuzhiyun static int xc4000_get_bandwidth(struct dvb_frontend *fe, u32 *bw)
1543*4882a593Smuzhiyun {
1544*4882a593Smuzhiyun 	struct xc4000_priv *priv = fe->tuner_priv;
1545*4882a593Smuzhiyun 	dprintk(1, "%s()\n", __func__);
1546*4882a593Smuzhiyun 
1547*4882a593Smuzhiyun 	*bw = priv->bandwidth;
1548*4882a593Smuzhiyun 	return 0;
1549*4882a593Smuzhiyun }
1550*4882a593Smuzhiyun 
xc4000_get_status(struct dvb_frontend * fe,u32 * status)1551*4882a593Smuzhiyun static int xc4000_get_status(struct dvb_frontend *fe, u32 *status)
1552*4882a593Smuzhiyun {
1553*4882a593Smuzhiyun 	struct xc4000_priv *priv = fe->tuner_priv;
1554*4882a593Smuzhiyun 	u16	lock_status = 0;
1555*4882a593Smuzhiyun 
1556*4882a593Smuzhiyun 	mutex_lock(&priv->lock);
1557*4882a593Smuzhiyun 
1558*4882a593Smuzhiyun 	if (priv->cur_fw.type & BASE)
1559*4882a593Smuzhiyun 		xc_get_lock_status(priv, &lock_status);
1560*4882a593Smuzhiyun 
1561*4882a593Smuzhiyun 	*status = (lock_status == 1 ?
1562*4882a593Smuzhiyun 		   TUNER_STATUS_LOCKED | TUNER_STATUS_STEREO : 0);
1563*4882a593Smuzhiyun 	if (priv->cur_fw.type & (DTV6 | DTV7 | DTV78 | DTV8))
1564*4882a593Smuzhiyun 		*status &= (~TUNER_STATUS_STEREO);
1565*4882a593Smuzhiyun 
1566*4882a593Smuzhiyun 	mutex_unlock(&priv->lock);
1567*4882a593Smuzhiyun 
1568*4882a593Smuzhiyun 	dprintk(2, "%s() lock_status = %d\n", __func__, lock_status);
1569*4882a593Smuzhiyun 
1570*4882a593Smuzhiyun 	return 0;
1571*4882a593Smuzhiyun }
1572*4882a593Smuzhiyun 
xc4000_sleep(struct dvb_frontend * fe)1573*4882a593Smuzhiyun static int xc4000_sleep(struct dvb_frontend *fe)
1574*4882a593Smuzhiyun {
1575*4882a593Smuzhiyun 	struct xc4000_priv *priv = fe->tuner_priv;
1576*4882a593Smuzhiyun 	int	ret = 0;
1577*4882a593Smuzhiyun 
1578*4882a593Smuzhiyun 	dprintk(1, "%s()\n", __func__);
1579*4882a593Smuzhiyun 
1580*4882a593Smuzhiyun 	mutex_lock(&priv->lock);
1581*4882a593Smuzhiyun 
1582*4882a593Smuzhiyun 	/* Avoid firmware reload on slow devices */
1583*4882a593Smuzhiyun 	if ((no_poweroff == 2 ||
1584*4882a593Smuzhiyun 	     (no_poweroff == 0 && priv->default_pm != 0)) &&
1585*4882a593Smuzhiyun 	    (priv->cur_fw.type & BASE) != 0) {
1586*4882a593Smuzhiyun 		/* force reset and firmware reload */
1587*4882a593Smuzhiyun 		priv->cur_fw.type = XC_POWERED_DOWN;
1588*4882a593Smuzhiyun 
1589*4882a593Smuzhiyun 		if (xc_write_reg(priv, XREG_POWER_DOWN, 0) != 0) {
1590*4882a593Smuzhiyun 			printk(KERN_ERR
1591*4882a593Smuzhiyun 			       "xc4000: %s() unable to shutdown tuner\n",
1592*4882a593Smuzhiyun 			       __func__);
1593*4882a593Smuzhiyun 			ret = -EREMOTEIO;
1594*4882a593Smuzhiyun 		}
1595*4882a593Smuzhiyun 		msleep(20);
1596*4882a593Smuzhiyun 	}
1597*4882a593Smuzhiyun 
1598*4882a593Smuzhiyun 	mutex_unlock(&priv->lock);
1599*4882a593Smuzhiyun 
1600*4882a593Smuzhiyun 	return ret;
1601*4882a593Smuzhiyun }
1602*4882a593Smuzhiyun 
xc4000_init(struct dvb_frontend * fe)1603*4882a593Smuzhiyun static int xc4000_init(struct dvb_frontend *fe)
1604*4882a593Smuzhiyun {
1605*4882a593Smuzhiyun 	dprintk(1, "%s()\n", __func__);
1606*4882a593Smuzhiyun 
1607*4882a593Smuzhiyun 	return 0;
1608*4882a593Smuzhiyun }
1609*4882a593Smuzhiyun 
xc4000_release(struct dvb_frontend * fe)1610*4882a593Smuzhiyun static void xc4000_release(struct dvb_frontend *fe)
1611*4882a593Smuzhiyun {
1612*4882a593Smuzhiyun 	struct xc4000_priv *priv = fe->tuner_priv;
1613*4882a593Smuzhiyun 
1614*4882a593Smuzhiyun 	dprintk(1, "%s()\n", __func__);
1615*4882a593Smuzhiyun 
1616*4882a593Smuzhiyun 	mutex_lock(&xc4000_list_mutex);
1617*4882a593Smuzhiyun 
1618*4882a593Smuzhiyun 	if (priv)
1619*4882a593Smuzhiyun 		hybrid_tuner_release_state(priv);
1620*4882a593Smuzhiyun 
1621*4882a593Smuzhiyun 	mutex_unlock(&xc4000_list_mutex);
1622*4882a593Smuzhiyun 
1623*4882a593Smuzhiyun 	fe->tuner_priv = NULL;
1624*4882a593Smuzhiyun }
1625*4882a593Smuzhiyun 
1626*4882a593Smuzhiyun static const struct dvb_tuner_ops xc4000_tuner_ops = {
1627*4882a593Smuzhiyun 	.info = {
1628*4882a593Smuzhiyun 		.name              = "Xceive XC4000",
1629*4882a593Smuzhiyun 		.frequency_min_hz  =    1 * MHz,
1630*4882a593Smuzhiyun 		.frequency_max_hz  = 1023 * MHz,
1631*4882a593Smuzhiyun 		.frequency_step_hz =   50 * kHz,
1632*4882a593Smuzhiyun 	},
1633*4882a593Smuzhiyun 
1634*4882a593Smuzhiyun 	.release	   = xc4000_release,
1635*4882a593Smuzhiyun 	.init		   = xc4000_init,
1636*4882a593Smuzhiyun 	.sleep		   = xc4000_sleep,
1637*4882a593Smuzhiyun 
1638*4882a593Smuzhiyun 	.set_params	   = xc4000_set_params,
1639*4882a593Smuzhiyun 	.set_analog_params = xc4000_set_analog_params,
1640*4882a593Smuzhiyun 	.get_frequency	   = xc4000_get_frequency,
1641*4882a593Smuzhiyun 	.get_rf_strength   = xc4000_get_signal,
1642*4882a593Smuzhiyun 	.get_bandwidth	   = xc4000_get_bandwidth,
1643*4882a593Smuzhiyun 	.get_status	   = xc4000_get_status
1644*4882a593Smuzhiyun };
1645*4882a593Smuzhiyun 
xc4000_attach(struct dvb_frontend * fe,struct i2c_adapter * i2c,struct xc4000_config * cfg)1646*4882a593Smuzhiyun struct dvb_frontend *xc4000_attach(struct dvb_frontend *fe,
1647*4882a593Smuzhiyun 				   struct i2c_adapter *i2c,
1648*4882a593Smuzhiyun 				   struct xc4000_config *cfg)
1649*4882a593Smuzhiyun {
1650*4882a593Smuzhiyun 	struct xc4000_priv *priv = NULL;
1651*4882a593Smuzhiyun 	int	instance;
1652*4882a593Smuzhiyun 	u16	id = 0;
1653*4882a593Smuzhiyun 
1654*4882a593Smuzhiyun 	dprintk(1, "%s(%d-%04x)\n", __func__,
1655*4882a593Smuzhiyun 		i2c ? i2c_adapter_id(i2c) : -1,
1656*4882a593Smuzhiyun 		cfg ? cfg->i2c_address : -1);
1657*4882a593Smuzhiyun 
1658*4882a593Smuzhiyun 	mutex_lock(&xc4000_list_mutex);
1659*4882a593Smuzhiyun 
1660*4882a593Smuzhiyun 	instance = hybrid_tuner_request_state(struct xc4000_priv, priv,
1661*4882a593Smuzhiyun 					      hybrid_tuner_instance_list,
1662*4882a593Smuzhiyun 					      i2c, cfg->i2c_address, "xc4000");
1663*4882a593Smuzhiyun 	switch (instance) {
1664*4882a593Smuzhiyun 	case 0:
1665*4882a593Smuzhiyun 		goto fail;
1666*4882a593Smuzhiyun 	case 1:
1667*4882a593Smuzhiyun 		/* new tuner instance */
1668*4882a593Smuzhiyun 		priv->bandwidth = 6000000;
1669*4882a593Smuzhiyun 		/* set default configuration */
1670*4882a593Smuzhiyun 		priv->if_khz = 4560;
1671*4882a593Smuzhiyun 		priv->default_pm = 0;
1672*4882a593Smuzhiyun 		priv->dvb_amplitude = 134;
1673*4882a593Smuzhiyun 		priv->set_smoothedcvbs = 1;
1674*4882a593Smuzhiyun 		mutex_init(&priv->lock);
1675*4882a593Smuzhiyun 		fe->tuner_priv = priv;
1676*4882a593Smuzhiyun 		break;
1677*4882a593Smuzhiyun 	default:
1678*4882a593Smuzhiyun 		/* existing tuner instance */
1679*4882a593Smuzhiyun 		fe->tuner_priv = priv;
1680*4882a593Smuzhiyun 		break;
1681*4882a593Smuzhiyun 	}
1682*4882a593Smuzhiyun 
1683*4882a593Smuzhiyun 	if (cfg->if_khz != 0) {
1684*4882a593Smuzhiyun 		/* copy configuration if provided by the caller */
1685*4882a593Smuzhiyun 		priv->if_khz = cfg->if_khz;
1686*4882a593Smuzhiyun 		priv->default_pm = cfg->default_pm;
1687*4882a593Smuzhiyun 		priv->dvb_amplitude = cfg->dvb_amplitude;
1688*4882a593Smuzhiyun 		priv->set_smoothedcvbs = cfg->set_smoothedcvbs;
1689*4882a593Smuzhiyun 	}
1690*4882a593Smuzhiyun 
1691*4882a593Smuzhiyun 	/* Check if firmware has been loaded. It is possible that another
1692*4882a593Smuzhiyun 	   instance of the driver has loaded the firmware.
1693*4882a593Smuzhiyun 	 */
1694*4882a593Smuzhiyun 
1695*4882a593Smuzhiyun 	if (instance == 1) {
1696*4882a593Smuzhiyun 		if (xc4000_readreg(priv, XREG_PRODUCT_ID, &id) != 0)
1697*4882a593Smuzhiyun 			goto fail;
1698*4882a593Smuzhiyun 	} else {
1699*4882a593Smuzhiyun 		id = ((priv->cur_fw.type & BASE) != 0 ?
1700*4882a593Smuzhiyun 		      priv->hwmodel : XC_PRODUCT_ID_FW_NOT_LOADED);
1701*4882a593Smuzhiyun 	}
1702*4882a593Smuzhiyun 
1703*4882a593Smuzhiyun 	switch (id) {
1704*4882a593Smuzhiyun 	case XC_PRODUCT_ID_XC4000:
1705*4882a593Smuzhiyun 	case XC_PRODUCT_ID_XC4100:
1706*4882a593Smuzhiyun 		printk(KERN_INFO
1707*4882a593Smuzhiyun 			"xc4000: Successfully identified at address 0x%02x\n",
1708*4882a593Smuzhiyun 			cfg->i2c_address);
1709*4882a593Smuzhiyun 		printk(KERN_INFO
1710*4882a593Smuzhiyun 			"xc4000: Firmware has been loaded previously\n");
1711*4882a593Smuzhiyun 		break;
1712*4882a593Smuzhiyun 	case XC_PRODUCT_ID_FW_NOT_LOADED:
1713*4882a593Smuzhiyun 		printk(KERN_INFO
1714*4882a593Smuzhiyun 			"xc4000: Successfully identified at address 0x%02x\n",
1715*4882a593Smuzhiyun 			cfg->i2c_address);
1716*4882a593Smuzhiyun 		printk(KERN_INFO
1717*4882a593Smuzhiyun 			"xc4000: Firmware has not been loaded previously\n");
1718*4882a593Smuzhiyun 		break;
1719*4882a593Smuzhiyun 	default:
1720*4882a593Smuzhiyun 		printk(KERN_ERR
1721*4882a593Smuzhiyun 			"xc4000: Device not found at addr 0x%02x (0x%x)\n",
1722*4882a593Smuzhiyun 			cfg->i2c_address, id);
1723*4882a593Smuzhiyun 		goto fail;
1724*4882a593Smuzhiyun 	}
1725*4882a593Smuzhiyun 
1726*4882a593Smuzhiyun 	mutex_unlock(&xc4000_list_mutex);
1727*4882a593Smuzhiyun 
1728*4882a593Smuzhiyun 	memcpy(&fe->ops.tuner_ops, &xc4000_tuner_ops,
1729*4882a593Smuzhiyun 		sizeof(struct dvb_tuner_ops));
1730*4882a593Smuzhiyun 
1731*4882a593Smuzhiyun 	if (instance == 1) {
1732*4882a593Smuzhiyun 		int	ret;
1733*4882a593Smuzhiyun 		mutex_lock(&priv->lock);
1734*4882a593Smuzhiyun 		ret = xc4000_fwupload(fe);
1735*4882a593Smuzhiyun 		mutex_unlock(&priv->lock);
1736*4882a593Smuzhiyun 		if (ret != 0)
1737*4882a593Smuzhiyun 			goto fail2;
1738*4882a593Smuzhiyun 	}
1739*4882a593Smuzhiyun 
1740*4882a593Smuzhiyun 	return fe;
1741*4882a593Smuzhiyun fail:
1742*4882a593Smuzhiyun 	mutex_unlock(&xc4000_list_mutex);
1743*4882a593Smuzhiyun fail2:
1744*4882a593Smuzhiyun 	xc4000_release(fe);
1745*4882a593Smuzhiyun 	return NULL;
1746*4882a593Smuzhiyun }
1747*4882a593Smuzhiyun EXPORT_SYMBOL(xc4000_attach);
1748*4882a593Smuzhiyun 
1749*4882a593Smuzhiyun MODULE_AUTHOR("Steven Toth, Davide Ferri");
1750*4882a593Smuzhiyun MODULE_DESCRIPTION("Xceive xc4000 silicon tuner driver");
1751*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1752*4882a593Smuzhiyun MODULE_FIRMWARE(XC4000_DEFAULT_FIRMWARE_NEW);
1753*4882a593Smuzhiyun MODULE_FIRMWARE(XC4000_DEFAULT_FIRMWARE);
1754