xref: /OK3568_Linux_fs/kernel/drivers/media/tuners/tea5767.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun // For Philips TEA5767 FM Chip used on some TV Cards like Prolink Pixelview
3*4882a593Smuzhiyun // I2C address is always 0xC0.
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright (c) 2005 Mauro Carvalho Chehab <mchehab@kernel.org>
6*4882a593Smuzhiyun //
7*4882a593Smuzhiyun // tea5767 autodetection thanks to Torsten Seeboth and Atsushi Nakagawa
8*4882a593Smuzhiyun // from their contributions on DScaler.
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <linux/i2c.h>
13*4882a593Smuzhiyun #include <linux/slab.h>
14*4882a593Smuzhiyun #include <linux/delay.h>
15*4882a593Smuzhiyun #include <linux/videodev2.h>
16*4882a593Smuzhiyun #include "tuner-i2c.h"
17*4882a593Smuzhiyun #include "tea5767.h"
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun static int debug;
20*4882a593Smuzhiyun module_param(debug, int, 0644);
21*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "enable verbose debug messages");
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun /*****************************************************************************/
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun struct tea5767_priv {
26*4882a593Smuzhiyun 	struct tuner_i2c_props	i2c_props;
27*4882a593Smuzhiyun 	u32			frequency;
28*4882a593Smuzhiyun 	struct tea5767_ctrl	ctrl;
29*4882a593Smuzhiyun };
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun /*****************************************************************************/
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun /******************************
34*4882a593Smuzhiyun  * Write mode register values *
35*4882a593Smuzhiyun  ******************************/
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun /* First register */
38*4882a593Smuzhiyun #define TEA5767_MUTE		0x80	/* Mutes output */
39*4882a593Smuzhiyun #define TEA5767_SEARCH		0x40	/* Activates station search */
40*4882a593Smuzhiyun /* Bits 0-5 for divider MSB */
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun /* Second register */
43*4882a593Smuzhiyun /* Bits 0-7 for divider LSB */
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun /* Third register */
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun /* Station search from botton to up */
48*4882a593Smuzhiyun #define TEA5767_SEARCH_UP	0x80
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun /* Searches with ADC output = 10 */
51*4882a593Smuzhiyun #define TEA5767_SRCH_HIGH_LVL	0x60
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun /* Searches with ADC output = 10 */
54*4882a593Smuzhiyun #define TEA5767_SRCH_MID_LVL	0x40
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun /* Searches with ADC output = 5 */
57*4882a593Smuzhiyun #define TEA5767_SRCH_LOW_LVL	0x20
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun /* if on, div=4*(Frf+Fif)/Fref otherwise, div=4*(Frf-Fif)/Freq) */
60*4882a593Smuzhiyun #define TEA5767_HIGH_LO_INJECT	0x10
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun /* Disable stereo */
63*4882a593Smuzhiyun #define TEA5767_MONO		0x08
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun /* Disable right channel and turns to mono */
66*4882a593Smuzhiyun #define TEA5767_MUTE_RIGHT	0x04
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun /* Disable left channel and turns to mono */
69*4882a593Smuzhiyun #define TEA5767_MUTE_LEFT	0x02
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun #define TEA5767_PORT1_HIGH	0x01
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun /* Fourth register */
74*4882a593Smuzhiyun #define TEA5767_PORT2_HIGH	0x80
75*4882a593Smuzhiyun /* Chips stops working. Only I2C bus remains on */
76*4882a593Smuzhiyun #define TEA5767_STDBY		0x40
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun /* Japan freq (76-108 MHz. If disabled, 87.5-108 MHz */
79*4882a593Smuzhiyun #define TEA5767_JAPAN_BAND	0x20
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun /* Unselected means 32.768 KHz freq as reference. Otherwise Xtal at 13 MHz */
82*4882a593Smuzhiyun #define TEA5767_XTAL_32768	0x10
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun /* Cuts weak signals */
85*4882a593Smuzhiyun #define TEA5767_SOFT_MUTE	0x08
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun /* Activates high cut control */
88*4882a593Smuzhiyun #define TEA5767_HIGH_CUT_CTRL	0x04
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun /* Activates stereo noise control */
91*4882a593Smuzhiyun #define TEA5767_ST_NOISE_CTL	0x02
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun /* If activate PORT 1 indicates SEARCH or else it is used as PORT1 */
94*4882a593Smuzhiyun #define TEA5767_SRCH_IND	0x01
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun /* Fifth register */
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun /* By activating, it will use Xtal at 13 MHz as reference for divider */
99*4882a593Smuzhiyun #define TEA5767_PLLREF_ENABLE	0x80
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun /* By activating, deemphasis=50, or else, deemphasis of 50us */
102*4882a593Smuzhiyun #define TEA5767_DEEMPH_75	0X40
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun /*****************************
105*4882a593Smuzhiyun  * Read mode register values *
106*4882a593Smuzhiyun  *****************************/
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun /* First register */
109*4882a593Smuzhiyun #define TEA5767_READY_FLAG_MASK	0x80
110*4882a593Smuzhiyun #define TEA5767_BAND_LIMIT_MASK	0X40
111*4882a593Smuzhiyun /* Bits 0-5 for divider MSB after search or preset */
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun /* Second register */
114*4882a593Smuzhiyun /* Bits 0-7 for divider LSB after search or preset */
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun /* Third register */
117*4882a593Smuzhiyun #define TEA5767_STEREO_MASK	0x80
118*4882a593Smuzhiyun #define TEA5767_IF_CNTR_MASK	0x7f
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun /* Fourth register */
121*4882a593Smuzhiyun #define TEA5767_ADC_LEVEL_MASK	0xf0
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun /* should be 0 */
124*4882a593Smuzhiyun #define TEA5767_CHIP_ID_MASK	0x0f
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun /* Fifth register */
127*4882a593Smuzhiyun /* Reserved for future extensions */
128*4882a593Smuzhiyun #define TEA5767_RESERVED_MASK	0xff
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun /*****************************************************************************/
131*4882a593Smuzhiyun 
tea5767_status_dump(struct tea5767_priv * priv,unsigned char * buffer)132*4882a593Smuzhiyun static void tea5767_status_dump(struct tea5767_priv *priv,
133*4882a593Smuzhiyun 				unsigned char *buffer)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun 	unsigned int div, frq;
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	if (TEA5767_READY_FLAG_MASK & buffer[0])
138*4882a593Smuzhiyun 		tuner_info("Ready Flag ON\n");
139*4882a593Smuzhiyun 	else
140*4882a593Smuzhiyun 		tuner_info("Ready Flag OFF\n");
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	if (TEA5767_BAND_LIMIT_MASK & buffer[0])
143*4882a593Smuzhiyun 		tuner_info("Tuner at band limit\n");
144*4882a593Smuzhiyun 	else
145*4882a593Smuzhiyun 		tuner_info("Tuner not at band limit\n");
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	div = ((buffer[0] & 0x3f) << 8) | buffer[1];
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	switch (priv->ctrl.xtal_freq) {
150*4882a593Smuzhiyun 	case TEA5767_HIGH_LO_13MHz:
151*4882a593Smuzhiyun 		frq = (div * 50000 - 700000 - 225000) / 4;	/* Freq in KHz */
152*4882a593Smuzhiyun 		break;
153*4882a593Smuzhiyun 	case TEA5767_LOW_LO_13MHz:
154*4882a593Smuzhiyun 		frq = (div * 50000 + 700000 + 225000) / 4;	/* Freq in KHz */
155*4882a593Smuzhiyun 		break;
156*4882a593Smuzhiyun 	case TEA5767_LOW_LO_32768:
157*4882a593Smuzhiyun 		frq = (div * 32768 + 700000 + 225000) / 4;	/* Freq in KHz */
158*4882a593Smuzhiyun 		break;
159*4882a593Smuzhiyun 	case TEA5767_HIGH_LO_32768:
160*4882a593Smuzhiyun 	default:
161*4882a593Smuzhiyun 		frq = (div * 32768 - 700000 - 225000) / 4;	/* Freq in KHz */
162*4882a593Smuzhiyun 		break;
163*4882a593Smuzhiyun 	}
164*4882a593Smuzhiyun 	buffer[0] = (div >> 8) & 0x3f;
165*4882a593Smuzhiyun 	buffer[1] = div & 0xff;
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 	tuner_info("Frequency %d.%03d KHz (divider = 0x%04x)\n",
168*4882a593Smuzhiyun 		   frq / 1000, frq % 1000, div);
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	if (TEA5767_STEREO_MASK & buffer[2])
171*4882a593Smuzhiyun 		tuner_info("Stereo\n");
172*4882a593Smuzhiyun 	else
173*4882a593Smuzhiyun 		tuner_info("Mono\n");
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	tuner_info("IF Counter = %d\n", buffer[2] & TEA5767_IF_CNTR_MASK);
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	tuner_info("ADC Level = %d\n",
178*4882a593Smuzhiyun 		   (buffer[3] & TEA5767_ADC_LEVEL_MASK) >> 4);
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	tuner_info("Chip ID = %d\n", (buffer[3] & TEA5767_CHIP_ID_MASK));
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	tuner_info("Reserved = 0x%02x\n",
183*4882a593Smuzhiyun 		   (buffer[4] & TEA5767_RESERVED_MASK));
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun /* Freq should be specifyed at 62.5 Hz */
set_radio_freq(struct dvb_frontend * fe,struct analog_parameters * params)187*4882a593Smuzhiyun static int set_radio_freq(struct dvb_frontend *fe,
188*4882a593Smuzhiyun 			  struct analog_parameters *params)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun 	struct tea5767_priv *priv = fe->tuner_priv;
191*4882a593Smuzhiyun 	unsigned int frq = params->frequency;
192*4882a593Smuzhiyun 	unsigned char buffer[5];
193*4882a593Smuzhiyun 	unsigned div;
194*4882a593Smuzhiyun 	int rc;
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	tuner_dbg("radio freq = %d.%03d MHz\n", frq/16000,(frq/16)%1000);
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	buffer[2] = 0;
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	if (priv->ctrl.port1)
201*4882a593Smuzhiyun 		buffer[2] |= TEA5767_PORT1_HIGH;
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	if (params->audmode == V4L2_TUNER_MODE_MONO) {
204*4882a593Smuzhiyun 		tuner_dbg("TEA5767 set to mono\n");
205*4882a593Smuzhiyun 		buffer[2] |= TEA5767_MONO;
206*4882a593Smuzhiyun 	} else {
207*4882a593Smuzhiyun 		tuner_dbg("TEA5767 set to stereo\n");
208*4882a593Smuzhiyun 	}
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 	buffer[3] = 0;
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	if (priv->ctrl.port2)
214*4882a593Smuzhiyun 		buffer[3] |= TEA5767_PORT2_HIGH;
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 	if (priv->ctrl.high_cut)
217*4882a593Smuzhiyun 		buffer[3] |= TEA5767_HIGH_CUT_CTRL;
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 	if (priv->ctrl.st_noise)
220*4882a593Smuzhiyun 		buffer[3] |= TEA5767_ST_NOISE_CTL;
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 	if (priv->ctrl.soft_mute)
223*4882a593Smuzhiyun 		buffer[3] |= TEA5767_SOFT_MUTE;
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	if (priv->ctrl.japan_band)
226*4882a593Smuzhiyun 		buffer[3] |= TEA5767_JAPAN_BAND;
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 	buffer[4] = 0;
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	if (priv->ctrl.deemph_75)
231*4882a593Smuzhiyun 		buffer[4] |= TEA5767_DEEMPH_75;
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun 	if (priv->ctrl.pllref)
234*4882a593Smuzhiyun 		buffer[4] |= TEA5767_PLLREF_ENABLE;
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	/* Rounds freq to next decimal value - for 62.5 KHz step */
238*4882a593Smuzhiyun 	/* frq = 20*(frq/16)+radio_frq[frq%16]; */
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun 	switch (priv->ctrl.xtal_freq) {
241*4882a593Smuzhiyun 	case TEA5767_HIGH_LO_13MHz:
242*4882a593Smuzhiyun 		tuner_dbg("radio HIGH LO inject xtal @ 13 MHz\n");
243*4882a593Smuzhiyun 		buffer[2] |= TEA5767_HIGH_LO_INJECT;
244*4882a593Smuzhiyun 		div = (frq * (4000 / 16) + 700000 + 225000 + 25000) / 50000;
245*4882a593Smuzhiyun 		break;
246*4882a593Smuzhiyun 	case TEA5767_LOW_LO_13MHz:
247*4882a593Smuzhiyun 		tuner_dbg("radio LOW LO inject xtal @ 13 MHz\n");
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun 		div = (frq * (4000 / 16) - 700000 - 225000 + 25000) / 50000;
250*4882a593Smuzhiyun 		break;
251*4882a593Smuzhiyun 	case TEA5767_LOW_LO_32768:
252*4882a593Smuzhiyun 		tuner_dbg("radio LOW LO inject xtal @ 32,768 MHz\n");
253*4882a593Smuzhiyun 		buffer[3] |= TEA5767_XTAL_32768;
254*4882a593Smuzhiyun 		/* const 700=4000*175 Khz - to adjust freq to right value */
255*4882a593Smuzhiyun 		div = ((frq * (4000 / 16) - 700000 - 225000) + 16384) >> 15;
256*4882a593Smuzhiyun 		break;
257*4882a593Smuzhiyun 	case TEA5767_HIGH_LO_32768:
258*4882a593Smuzhiyun 	default:
259*4882a593Smuzhiyun 		tuner_dbg("radio HIGH LO inject xtal @ 32,768 MHz\n");
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 		buffer[2] |= TEA5767_HIGH_LO_INJECT;
262*4882a593Smuzhiyun 		buffer[3] |= TEA5767_XTAL_32768;
263*4882a593Smuzhiyun 		div = ((frq * (4000 / 16) + 700000 + 225000) + 16384) >> 15;
264*4882a593Smuzhiyun 		break;
265*4882a593Smuzhiyun 	}
266*4882a593Smuzhiyun 	buffer[0] = (div >> 8) & 0x3f;
267*4882a593Smuzhiyun 	buffer[1] = div & 0xff;
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	if (5 != (rc = tuner_i2c_xfer_send(&priv->i2c_props, buffer, 5)))
270*4882a593Smuzhiyun 		tuner_warn("i2c i/o error: rc == %d (should be 5)\n", rc);
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun 	if (debug) {
273*4882a593Smuzhiyun 		if (5 != (rc = tuner_i2c_xfer_recv(&priv->i2c_props, buffer, 5)))
274*4882a593Smuzhiyun 			tuner_warn("i2c i/o error: rc == %d (should be 5)\n", rc);
275*4882a593Smuzhiyun 		else
276*4882a593Smuzhiyun 			tea5767_status_dump(priv, buffer);
277*4882a593Smuzhiyun 	}
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun 	priv->frequency = frq * 125 / 2;
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 	return 0;
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun 
tea5767_read_status(struct dvb_frontend * fe,char * buffer)284*4882a593Smuzhiyun static int tea5767_read_status(struct dvb_frontend *fe, char *buffer)
285*4882a593Smuzhiyun {
286*4882a593Smuzhiyun 	struct tea5767_priv *priv = fe->tuner_priv;
287*4882a593Smuzhiyun 	int rc;
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 	memset(buffer, 0, 5);
290*4882a593Smuzhiyun 	if (5 != (rc = tuner_i2c_xfer_recv(&priv->i2c_props, buffer, 5))) {
291*4882a593Smuzhiyun 		tuner_warn("i2c i/o error: rc == %d (should be 5)\n", rc);
292*4882a593Smuzhiyun 		return -EREMOTEIO;
293*4882a593Smuzhiyun 	}
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	return 0;
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun 
tea5767_signal(struct dvb_frontend * fe,const char * buffer)298*4882a593Smuzhiyun static inline int tea5767_signal(struct dvb_frontend *fe, const char *buffer)
299*4882a593Smuzhiyun {
300*4882a593Smuzhiyun 	struct tea5767_priv *priv = fe->tuner_priv;
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun 	int signal = ((buffer[3] & TEA5767_ADC_LEVEL_MASK) << 8);
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun 	tuner_dbg("Signal strength: %d\n", signal);
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 	return signal;
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun 
tea5767_stereo(struct dvb_frontend * fe,const char * buffer)309*4882a593Smuzhiyun static inline int tea5767_stereo(struct dvb_frontend *fe, const char *buffer)
310*4882a593Smuzhiyun {
311*4882a593Smuzhiyun 	struct tea5767_priv *priv = fe->tuner_priv;
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	int stereo = buffer[2] & TEA5767_STEREO_MASK;
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	tuner_dbg("Radio ST GET = %02x\n", stereo);
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	return (stereo ? V4L2_TUNER_SUB_STEREO : 0);
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun 
tea5767_get_status(struct dvb_frontend * fe,u32 * status)320*4882a593Smuzhiyun static int tea5767_get_status(struct dvb_frontend *fe, u32 *status)
321*4882a593Smuzhiyun {
322*4882a593Smuzhiyun 	unsigned char buffer[5];
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun 	*status = 0;
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 	if (0 == tea5767_read_status(fe, buffer)) {
327*4882a593Smuzhiyun 		if (tea5767_signal(fe, buffer))
328*4882a593Smuzhiyun 			*status = TUNER_STATUS_LOCKED;
329*4882a593Smuzhiyun 		if (tea5767_stereo(fe, buffer))
330*4882a593Smuzhiyun 			*status |= TUNER_STATUS_STEREO;
331*4882a593Smuzhiyun 	}
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun 	return 0;
334*4882a593Smuzhiyun }
335*4882a593Smuzhiyun 
tea5767_get_rf_strength(struct dvb_frontend * fe,u16 * strength)336*4882a593Smuzhiyun static int tea5767_get_rf_strength(struct dvb_frontend *fe, u16 *strength)
337*4882a593Smuzhiyun {
338*4882a593Smuzhiyun 	unsigned char buffer[5];
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun 	*strength = 0;
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun 	if (0 == tea5767_read_status(fe, buffer))
343*4882a593Smuzhiyun 		*strength = tea5767_signal(fe, buffer);
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 	return 0;
346*4882a593Smuzhiyun }
347*4882a593Smuzhiyun 
tea5767_standby(struct dvb_frontend * fe)348*4882a593Smuzhiyun static int tea5767_standby(struct dvb_frontend *fe)
349*4882a593Smuzhiyun {
350*4882a593Smuzhiyun 	unsigned char buffer[5];
351*4882a593Smuzhiyun 	struct tea5767_priv *priv = fe->tuner_priv;
352*4882a593Smuzhiyun 	unsigned div, rc;
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	div = (87500 * 4 + 700 + 225 + 25) / 50; /* Set frequency to 87.5 MHz */
355*4882a593Smuzhiyun 	buffer[0] = (div >> 8) & 0x3f;
356*4882a593Smuzhiyun 	buffer[1] = div & 0xff;
357*4882a593Smuzhiyun 	buffer[2] = TEA5767_PORT1_HIGH;
358*4882a593Smuzhiyun 	buffer[3] = TEA5767_PORT2_HIGH | TEA5767_HIGH_CUT_CTRL |
359*4882a593Smuzhiyun 		    TEA5767_ST_NOISE_CTL | TEA5767_JAPAN_BAND | TEA5767_STDBY;
360*4882a593Smuzhiyun 	buffer[4] = 0;
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun 	if (5 != (rc = tuner_i2c_xfer_send(&priv->i2c_props, buffer, 5)))
363*4882a593Smuzhiyun 		tuner_warn("i2c i/o error: rc == %d (should be 5)\n", rc);
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun 	return 0;
366*4882a593Smuzhiyun }
367*4882a593Smuzhiyun 
tea5767_autodetection(struct i2c_adapter * i2c_adap,u8 i2c_addr)368*4882a593Smuzhiyun int tea5767_autodetection(struct i2c_adapter* i2c_adap, u8 i2c_addr)
369*4882a593Smuzhiyun {
370*4882a593Smuzhiyun 	struct tuner_i2c_props i2c = { .adap = i2c_adap, .addr = i2c_addr };
371*4882a593Smuzhiyun 	unsigned char buffer[7] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun 	int rc;
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun 	if ((rc = tuner_i2c_xfer_recv(&i2c, buffer, 7))< 5) {
376*4882a593Smuzhiyun 		pr_warn("It is not a TEA5767. Received %i bytes.\n", rc);
377*4882a593Smuzhiyun 		return -EINVAL;
378*4882a593Smuzhiyun 	}
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun 	/* If all bytes are the same then it's a TV tuner and not a tea5767 */
381*4882a593Smuzhiyun 	if (buffer[0] == buffer[1] && buffer[0] == buffer[2] &&
382*4882a593Smuzhiyun 	    buffer[0] == buffer[3] && buffer[0] == buffer[4]) {
383*4882a593Smuzhiyun 		pr_warn("All bytes are equal. It is not a TEA5767\n");
384*4882a593Smuzhiyun 		return -EINVAL;
385*4882a593Smuzhiyun 	}
386*4882a593Smuzhiyun 
387*4882a593Smuzhiyun 	/*  Status bytes:
388*4882a593Smuzhiyun 	 *  Byte 4: bit 3:1 : CI (Chip Identification) == 0
389*4882a593Smuzhiyun 	 *          bit 0   : internally set to 0
390*4882a593Smuzhiyun 	 *  Byte 5: bit 7:0 : == 0
391*4882a593Smuzhiyun 	 */
392*4882a593Smuzhiyun 	if (((buffer[3] & 0x0f) != 0x00) || (buffer[4] != 0x00)) {
393*4882a593Smuzhiyun 		pr_warn("Chip ID is not zero. It is not a TEA5767\n");
394*4882a593Smuzhiyun 		return -EINVAL;
395*4882a593Smuzhiyun 	}
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 
398*4882a593Smuzhiyun 	return 0;
399*4882a593Smuzhiyun }
400*4882a593Smuzhiyun 
tea5767_release(struct dvb_frontend * fe)401*4882a593Smuzhiyun static void tea5767_release(struct dvb_frontend *fe)
402*4882a593Smuzhiyun {
403*4882a593Smuzhiyun 	kfree(fe->tuner_priv);
404*4882a593Smuzhiyun 	fe->tuner_priv = NULL;
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun 
tea5767_get_frequency(struct dvb_frontend * fe,u32 * frequency)407*4882a593Smuzhiyun static int tea5767_get_frequency(struct dvb_frontend *fe, u32 *frequency)
408*4882a593Smuzhiyun {
409*4882a593Smuzhiyun 	struct tea5767_priv *priv = fe->tuner_priv;
410*4882a593Smuzhiyun 	*frequency = priv->frequency;
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun 	return 0;
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun 
tea5767_set_config(struct dvb_frontend * fe,void * priv_cfg)415*4882a593Smuzhiyun static int tea5767_set_config (struct dvb_frontend *fe, void *priv_cfg)
416*4882a593Smuzhiyun {
417*4882a593Smuzhiyun 	struct tea5767_priv *priv = fe->tuner_priv;
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun 	memcpy(&priv->ctrl, priv_cfg, sizeof(priv->ctrl));
420*4882a593Smuzhiyun 
421*4882a593Smuzhiyun 	return 0;
422*4882a593Smuzhiyun }
423*4882a593Smuzhiyun 
424*4882a593Smuzhiyun static const struct dvb_tuner_ops tea5767_tuner_ops = {
425*4882a593Smuzhiyun 	.info = {
426*4882a593Smuzhiyun 		.name           = "tea5767", // Philips TEA5767HN FM Radio
427*4882a593Smuzhiyun 	},
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun 	.set_analog_params = set_radio_freq,
430*4882a593Smuzhiyun 	.set_config	   = tea5767_set_config,
431*4882a593Smuzhiyun 	.sleep             = tea5767_standby,
432*4882a593Smuzhiyun 	.release           = tea5767_release,
433*4882a593Smuzhiyun 	.get_frequency     = tea5767_get_frequency,
434*4882a593Smuzhiyun 	.get_status        = tea5767_get_status,
435*4882a593Smuzhiyun 	.get_rf_strength   = tea5767_get_rf_strength,
436*4882a593Smuzhiyun };
437*4882a593Smuzhiyun 
tea5767_attach(struct dvb_frontend * fe,struct i2c_adapter * i2c_adap,u8 i2c_addr)438*4882a593Smuzhiyun struct dvb_frontend *tea5767_attach(struct dvb_frontend *fe,
439*4882a593Smuzhiyun 				    struct i2c_adapter* i2c_adap,
440*4882a593Smuzhiyun 				    u8 i2c_addr)
441*4882a593Smuzhiyun {
442*4882a593Smuzhiyun 	struct tea5767_priv *priv = NULL;
443*4882a593Smuzhiyun 
444*4882a593Smuzhiyun 	priv = kzalloc(sizeof(struct tea5767_priv), GFP_KERNEL);
445*4882a593Smuzhiyun 	if (priv == NULL)
446*4882a593Smuzhiyun 		return NULL;
447*4882a593Smuzhiyun 	fe->tuner_priv = priv;
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun 	priv->i2c_props.addr  = i2c_addr;
450*4882a593Smuzhiyun 	priv->i2c_props.adap  = i2c_adap;
451*4882a593Smuzhiyun 	priv->i2c_props.name  = "tea5767";
452*4882a593Smuzhiyun 
453*4882a593Smuzhiyun 	priv->ctrl.xtal_freq  = TEA5767_HIGH_LO_32768;
454*4882a593Smuzhiyun 	priv->ctrl.port1      = 1;
455*4882a593Smuzhiyun 	priv->ctrl.port2      = 1;
456*4882a593Smuzhiyun 	priv->ctrl.high_cut   = 1;
457*4882a593Smuzhiyun 	priv->ctrl.st_noise   = 1;
458*4882a593Smuzhiyun 	priv->ctrl.japan_band = 1;
459*4882a593Smuzhiyun 
460*4882a593Smuzhiyun 	memcpy(&fe->ops.tuner_ops, &tea5767_tuner_ops,
461*4882a593Smuzhiyun 	       sizeof(struct dvb_tuner_ops));
462*4882a593Smuzhiyun 
463*4882a593Smuzhiyun 	tuner_info("type set to %s\n", "Philips TEA5767HN FM Radio");
464*4882a593Smuzhiyun 
465*4882a593Smuzhiyun 	return fe;
466*4882a593Smuzhiyun }
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(tea5767_attach);
469*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(tea5767_autodetection);
470*4882a593Smuzhiyun 
471*4882a593Smuzhiyun MODULE_DESCRIPTION("Philips TEA5767 FM tuner driver");
472*4882a593Smuzhiyun MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@kernel.org>");
473*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
474