1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * (c) 2005 Hartmut Hackmann
5*4882a593Smuzhiyun * (c) 2007 Michael Krufky
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/slab.h>
10*4882a593Smuzhiyun #include <asm/types.h>
11*4882a593Smuzhiyun #include <linux/dvb/frontend.h>
12*4882a593Smuzhiyun #include <linux/videodev2.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include "tda827x.h"
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun static int debug;
17*4882a593Smuzhiyun module_param(debug, int, 0644);
18*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #define dprintk(args...) \
21*4882a593Smuzhiyun do { \
22*4882a593Smuzhiyun if (debug) printk(KERN_DEBUG "tda827x: " args); \
23*4882a593Smuzhiyun } while (0)
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun struct tda827x_priv {
26*4882a593Smuzhiyun int i2c_addr;
27*4882a593Smuzhiyun struct i2c_adapter *i2c_adap;
28*4882a593Smuzhiyun struct tda827x_config *cfg;
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun unsigned int sgIF;
31*4882a593Smuzhiyun unsigned char lpsel;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun u32 frequency;
34*4882a593Smuzhiyun u32 bandwidth;
35*4882a593Smuzhiyun };
36*4882a593Smuzhiyun
tda827x_set_std(struct dvb_frontend * fe,struct analog_parameters * params)37*4882a593Smuzhiyun static void tda827x_set_std(struct dvb_frontend *fe,
38*4882a593Smuzhiyun struct analog_parameters *params)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun struct tda827x_priv *priv = fe->tuner_priv;
41*4882a593Smuzhiyun char *mode;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun priv->lpsel = 0;
44*4882a593Smuzhiyun if (params->std & V4L2_STD_MN) {
45*4882a593Smuzhiyun priv->sgIF = 92;
46*4882a593Smuzhiyun priv->lpsel = 1;
47*4882a593Smuzhiyun mode = "MN";
48*4882a593Smuzhiyun } else if (params->std & V4L2_STD_B) {
49*4882a593Smuzhiyun priv->sgIF = 108;
50*4882a593Smuzhiyun mode = "B";
51*4882a593Smuzhiyun } else if (params->std & V4L2_STD_GH) {
52*4882a593Smuzhiyun priv->sgIF = 124;
53*4882a593Smuzhiyun mode = "GH";
54*4882a593Smuzhiyun } else if (params->std & V4L2_STD_PAL_I) {
55*4882a593Smuzhiyun priv->sgIF = 124;
56*4882a593Smuzhiyun mode = "I";
57*4882a593Smuzhiyun } else if (params->std & V4L2_STD_DK) {
58*4882a593Smuzhiyun priv->sgIF = 124;
59*4882a593Smuzhiyun mode = "DK";
60*4882a593Smuzhiyun } else if (params->std & V4L2_STD_SECAM_L) {
61*4882a593Smuzhiyun priv->sgIF = 124;
62*4882a593Smuzhiyun mode = "L";
63*4882a593Smuzhiyun } else if (params->std & V4L2_STD_SECAM_LC) {
64*4882a593Smuzhiyun priv->sgIF = 20;
65*4882a593Smuzhiyun mode = "LC";
66*4882a593Smuzhiyun } else {
67*4882a593Smuzhiyun priv->sgIF = 124;
68*4882a593Smuzhiyun mode = "xx";
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun if (params->mode == V4L2_TUNER_RADIO) {
72*4882a593Smuzhiyun priv->sgIF = 88; /* if frequency is 5.5 MHz */
73*4882a593Smuzhiyun dprintk("setting tda827x to radio FM\n");
74*4882a593Smuzhiyun } else
75*4882a593Smuzhiyun dprintk("setting tda827x to system %s\n", mode);
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun /* ------------------------------------------------------------------ */
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun struct tda827x_data {
82*4882a593Smuzhiyun u32 lomax;
83*4882a593Smuzhiyun u8 spd;
84*4882a593Smuzhiyun u8 bs;
85*4882a593Smuzhiyun u8 bp;
86*4882a593Smuzhiyun u8 cp;
87*4882a593Smuzhiyun u8 gc3;
88*4882a593Smuzhiyun u8 div1p5;
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun static const struct tda827x_data tda827x_table[] = {
92*4882a593Smuzhiyun { .lomax = 62000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
93*4882a593Smuzhiyun { .lomax = 66000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
94*4882a593Smuzhiyun { .lomax = 76000000, .spd = 3, .bs = 1, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
95*4882a593Smuzhiyun { .lomax = 84000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
96*4882a593Smuzhiyun { .lomax = 93000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
97*4882a593Smuzhiyun { .lomax = 98000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
98*4882a593Smuzhiyun { .lomax = 109000000, .spd = 3, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
99*4882a593Smuzhiyun { .lomax = 123000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
100*4882a593Smuzhiyun { .lomax = 133000000, .spd = 2, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
101*4882a593Smuzhiyun { .lomax = 151000000, .spd = 2, .bs = 1, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
102*4882a593Smuzhiyun { .lomax = 154000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
103*4882a593Smuzhiyun { .lomax = 181000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 0, .div1p5 = 0},
104*4882a593Smuzhiyun { .lomax = 185000000, .spd = 2, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
105*4882a593Smuzhiyun { .lomax = 217000000, .spd = 2, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
106*4882a593Smuzhiyun { .lomax = 244000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
107*4882a593Smuzhiyun { .lomax = 265000000, .spd = 1, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
108*4882a593Smuzhiyun { .lomax = 302000000, .spd = 1, .bs = 1, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
109*4882a593Smuzhiyun { .lomax = 324000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
110*4882a593Smuzhiyun { .lomax = 370000000, .spd = 1, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
111*4882a593Smuzhiyun { .lomax = 454000000, .spd = 1, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
112*4882a593Smuzhiyun { .lomax = 493000000, .spd = 0, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
113*4882a593Smuzhiyun { .lomax = 530000000, .spd = 0, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
114*4882a593Smuzhiyun { .lomax = 554000000, .spd = 0, .bs = 1, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
115*4882a593Smuzhiyun { .lomax = 604000000, .spd = 0, .bs = 1, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
116*4882a593Smuzhiyun { .lomax = 696000000, .spd = 0, .bs = 2, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
117*4882a593Smuzhiyun { .lomax = 740000000, .spd = 0, .bs = 2, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
118*4882a593Smuzhiyun { .lomax = 820000000, .spd = 0, .bs = 3, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
119*4882a593Smuzhiyun { .lomax = 865000000, .spd = 0, .bs = 3, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
120*4882a593Smuzhiyun { .lomax = 0, .spd = 0, .bs = 0, .bp = 0, .cp = 0, .gc3 = 0, .div1p5 = 0}
121*4882a593Smuzhiyun };
122*4882a593Smuzhiyun
tuner_transfer(struct dvb_frontend * fe,struct i2c_msg * msg,const int size)123*4882a593Smuzhiyun static int tuner_transfer(struct dvb_frontend *fe,
124*4882a593Smuzhiyun struct i2c_msg *msg,
125*4882a593Smuzhiyun const int size)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun int rc;
128*4882a593Smuzhiyun struct tda827x_priv *priv = fe->tuner_priv;
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun if (fe->ops.i2c_gate_ctrl)
131*4882a593Smuzhiyun fe->ops.i2c_gate_ctrl(fe, 1);
132*4882a593Smuzhiyun rc = i2c_transfer(priv->i2c_adap, msg, size);
133*4882a593Smuzhiyun if (fe->ops.i2c_gate_ctrl)
134*4882a593Smuzhiyun fe->ops.i2c_gate_ctrl(fe, 0);
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun if (rc >= 0 && rc != size)
137*4882a593Smuzhiyun return -EIO;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun return rc;
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
tda827xo_set_params(struct dvb_frontend * fe)142*4882a593Smuzhiyun static int tda827xo_set_params(struct dvb_frontend *fe)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun struct dtv_frontend_properties *c = &fe->dtv_property_cache;
145*4882a593Smuzhiyun struct tda827x_priv *priv = fe->tuner_priv;
146*4882a593Smuzhiyun u8 buf[14];
147*4882a593Smuzhiyun int rc;
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = 0,
150*4882a593Smuzhiyun .buf = buf, .len = sizeof(buf) };
151*4882a593Smuzhiyun int i, tuner_freq, if_freq;
152*4882a593Smuzhiyun u32 N;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun dprintk("%s:\n", __func__);
155*4882a593Smuzhiyun if (c->bandwidth_hz == 0) {
156*4882a593Smuzhiyun if_freq = 5000000;
157*4882a593Smuzhiyun } else if (c->bandwidth_hz <= 6000000) {
158*4882a593Smuzhiyun if_freq = 4000000;
159*4882a593Smuzhiyun } else if (c->bandwidth_hz <= 7000000) {
160*4882a593Smuzhiyun if_freq = 4500000;
161*4882a593Smuzhiyun } else { /* 8 MHz */
162*4882a593Smuzhiyun if_freq = 5000000;
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun tuner_freq = c->frequency;
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun i = 0;
167*4882a593Smuzhiyun while (tda827x_table[i].lomax < tuner_freq) {
168*4882a593Smuzhiyun if (tda827x_table[i + 1].lomax == 0)
169*4882a593Smuzhiyun break;
170*4882a593Smuzhiyun i++;
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun tuner_freq += if_freq;
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun N = ((tuner_freq + 125000) / 250000) << (tda827x_table[i].spd + 2);
176*4882a593Smuzhiyun buf[0] = 0;
177*4882a593Smuzhiyun buf[1] = (N>>8) | 0x40;
178*4882a593Smuzhiyun buf[2] = N & 0xff;
179*4882a593Smuzhiyun buf[3] = 0;
180*4882a593Smuzhiyun buf[4] = 0x52;
181*4882a593Smuzhiyun buf[5] = (tda827x_table[i].spd << 6) + (tda827x_table[i].div1p5 << 5) +
182*4882a593Smuzhiyun (tda827x_table[i].bs << 3) +
183*4882a593Smuzhiyun tda827x_table[i].bp;
184*4882a593Smuzhiyun buf[6] = (tda827x_table[i].gc3 << 4) + 0x8f;
185*4882a593Smuzhiyun buf[7] = 0xbf;
186*4882a593Smuzhiyun buf[8] = 0x2a;
187*4882a593Smuzhiyun buf[9] = 0x05;
188*4882a593Smuzhiyun buf[10] = 0xff;
189*4882a593Smuzhiyun buf[11] = 0x00;
190*4882a593Smuzhiyun buf[12] = 0x00;
191*4882a593Smuzhiyun buf[13] = 0x40;
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun msg.len = 14;
194*4882a593Smuzhiyun rc = tuner_transfer(fe, &msg, 1);
195*4882a593Smuzhiyun if (rc < 0)
196*4882a593Smuzhiyun goto err;
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun msleep(500);
199*4882a593Smuzhiyun /* correct CP value */
200*4882a593Smuzhiyun buf[0] = 0x30;
201*4882a593Smuzhiyun buf[1] = 0x50 + tda827x_table[i].cp;
202*4882a593Smuzhiyun msg.len = 2;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun rc = tuner_transfer(fe, &msg, 1);
205*4882a593Smuzhiyun if (rc < 0)
206*4882a593Smuzhiyun goto err;
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun priv->frequency = c->frequency;
209*4882a593Smuzhiyun priv->bandwidth = c->bandwidth_hz;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun return 0;
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun err:
214*4882a593Smuzhiyun printk(KERN_ERR "%s: could not write to tuner at addr: 0x%02x\n",
215*4882a593Smuzhiyun __func__, priv->i2c_addr << 1);
216*4882a593Smuzhiyun return rc;
217*4882a593Smuzhiyun }
218*4882a593Smuzhiyun
tda827xo_sleep(struct dvb_frontend * fe)219*4882a593Smuzhiyun static int tda827xo_sleep(struct dvb_frontend *fe)
220*4882a593Smuzhiyun {
221*4882a593Smuzhiyun struct tda827x_priv *priv = fe->tuner_priv;
222*4882a593Smuzhiyun static u8 buf[] = { 0x30, 0xd0 };
223*4882a593Smuzhiyun struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = 0,
224*4882a593Smuzhiyun .buf = buf, .len = sizeof(buf) };
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun dprintk("%s:\n", __func__);
227*4882a593Smuzhiyun tuner_transfer(fe, &msg, 1);
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun if (priv->cfg && priv->cfg->sleep)
230*4882a593Smuzhiyun priv->cfg->sleep(fe);
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun return 0;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun /* ------------------------------------------------------------------ */
236*4882a593Smuzhiyun
tda827xo_set_analog_params(struct dvb_frontend * fe,struct analog_parameters * params)237*4882a593Smuzhiyun static int tda827xo_set_analog_params(struct dvb_frontend *fe,
238*4882a593Smuzhiyun struct analog_parameters *params)
239*4882a593Smuzhiyun {
240*4882a593Smuzhiyun unsigned char tuner_reg[8];
241*4882a593Smuzhiyun unsigned char reg2[2];
242*4882a593Smuzhiyun u32 N;
243*4882a593Smuzhiyun int i;
244*4882a593Smuzhiyun struct tda827x_priv *priv = fe->tuner_priv;
245*4882a593Smuzhiyun struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = 0 };
246*4882a593Smuzhiyun unsigned int freq = params->frequency;
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun tda827x_set_std(fe, params);
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun if (params->mode == V4L2_TUNER_RADIO)
251*4882a593Smuzhiyun freq = freq / 1000;
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun N = freq + priv->sgIF;
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun i = 0;
256*4882a593Smuzhiyun while (tda827x_table[i].lomax < N * 62500) {
257*4882a593Smuzhiyun if (tda827x_table[i + 1].lomax == 0)
258*4882a593Smuzhiyun break;
259*4882a593Smuzhiyun i++;
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun N = N << tda827x_table[i].spd;
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun tuner_reg[0] = 0;
265*4882a593Smuzhiyun tuner_reg[1] = (unsigned char)(N>>8);
266*4882a593Smuzhiyun tuner_reg[2] = (unsigned char) N;
267*4882a593Smuzhiyun tuner_reg[3] = 0x40;
268*4882a593Smuzhiyun tuner_reg[4] = 0x52 + (priv->lpsel << 5);
269*4882a593Smuzhiyun tuner_reg[5] = (tda827x_table[i].spd << 6) +
270*4882a593Smuzhiyun (tda827x_table[i].div1p5 << 5) +
271*4882a593Smuzhiyun (tda827x_table[i].bs << 3) + tda827x_table[i].bp;
272*4882a593Smuzhiyun tuner_reg[6] = 0x8f + (tda827x_table[i].gc3 << 4);
273*4882a593Smuzhiyun tuner_reg[7] = 0x8f;
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun msg.buf = tuner_reg;
276*4882a593Smuzhiyun msg.len = 8;
277*4882a593Smuzhiyun tuner_transfer(fe, &msg, 1);
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun msg.buf = reg2;
280*4882a593Smuzhiyun msg.len = 2;
281*4882a593Smuzhiyun reg2[0] = 0x80;
282*4882a593Smuzhiyun reg2[1] = 0;
283*4882a593Smuzhiyun tuner_transfer(fe, &msg, 1);
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun reg2[0] = 0x60;
286*4882a593Smuzhiyun reg2[1] = 0xbf;
287*4882a593Smuzhiyun tuner_transfer(fe, &msg, 1);
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun reg2[0] = 0x30;
290*4882a593Smuzhiyun reg2[1] = tuner_reg[4] + 0x80;
291*4882a593Smuzhiyun tuner_transfer(fe, &msg, 1);
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun msleep(1);
294*4882a593Smuzhiyun reg2[0] = 0x30;
295*4882a593Smuzhiyun reg2[1] = tuner_reg[4] + 4;
296*4882a593Smuzhiyun tuner_transfer(fe, &msg, 1);
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun msleep(1);
299*4882a593Smuzhiyun reg2[0] = 0x30;
300*4882a593Smuzhiyun reg2[1] = tuner_reg[4];
301*4882a593Smuzhiyun tuner_transfer(fe, &msg, 1);
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun msleep(550);
304*4882a593Smuzhiyun reg2[0] = 0x30;
305*4882a593Smuzhiyun reg2[1] = (tuner_reg[4] & 0xfc) + tda827x_table[i].cp;
306*4882a593Smuzhiyun tuner_transfer(fe, &msg, 1);
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun reg2[0] = 0x60;
309*4882a593Smuzhiyun reg2[1] = 0x3f;
310*4882a593Smuzhiyun tuner_transfer(fe, &msg, 1);
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun reg2[0] = 0x80;
313*4882a593Smuzhiyun reg2[1] = 0x08; /* Vsync en */
314*4882a593Smuzhiyun tuner_transfer(fe, &msg, 1);
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun priv->frequency = params->frequency;
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun return 0;
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun
tda827xo_agcf(struct dvb_frontend * fe)321*4882a593Smuzhiyun static void tda827xo_agcf(struct dvb_frontend *fe)
322*4882a593Smuzhiyun {
323*4882a593Smuzhiyun struct tda827x_priv *priv = fe->tuner_priv;
324*4882a593Smuzhiyun unsigned char data[] = { 0x80, 0x0c };
325*4882a593Smuzhiyun struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = 0,
326*4882a593Smuzhiyun .buf = data, .len = 2};
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun tuner_transfer(fe, &msg, 1);
329*4882a593Smuzhiyun }
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun /* ------------------------------------------------------------------ */
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun struct tda827xa_data {
334*4882a593Smuzhiyun u32 lomax;
335*4882a593Smuzhiyun u8 svco;
336*4882a593Smuzhiyun u8 spd;
337*4882a593Smuzhiyun u8 scr;
338*4882a593Smuzhiyun u8 sbs;
339*4882a593Smuzhiyun u8 gc3;
340*4882a593Smuzhiyun };
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun static struct tda827xa_data tda827xa_dvbt[] = {
343*4882a593Smuzhiyun { .lomax = 56875000, .svco = 3, .spd = 4, .scr = 0, .sbs = 0, .gc3 = 1},
344*4882a593Smuzhiyun { .lomax = 67250000, .svco = 0, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
345*4882a593Smuzhiyun { .lomax = 81250000, .svco = 1, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
346*4882a593Smuzhiyun { .lomax = 97500000, .svco = 2, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
347*4882a593Smuzhiyun { .lomax = 113750000, .svco = 3, .spd = 3, .scr = 0, .sbs = 1, .gc3 = 1},
348*4882a593Smuzhiyun { .lomax = 134500000, .svco = 0, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
349*4882a593Smuzhiyun { .lomax = 154000000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
350*4882a593Smuzhiyun { .lomax = 162500000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
351*4882a593Smuzhiyun { .lomax = 183000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
352*4882a593Smuzhiyun { .lomax = 195000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
353*4882a593Smuzhiyun { .lomax = 227500000, .svco = 3, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
354*4882a593Smuzhiyun { .lomax = 269000000, .svco = 0, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
355*4882a593Smuzhiyun { .lomax = 290000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
356*4882a593Smuzhiyun { .lomax = 325000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
357*4882a593Smuzhiyun { .lomax = 390000000, .svco = 2, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
358*4882a593Smuzhiyun { .lomax = 455000000, .svco = 3, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
359*4882a593Smuzhiyun { .lomax = 520000000, .svco = 0, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
360*4882a593Smuzhiyun { .lomax = 538000000, .svco = 0, .spd = 0, .scr = 1, .sbs = 3, .gc3 = 1},
361*4882a593Smuzhiyun { .lomax = 550000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
362*4882a593Smuzhiyun { .lomax = 620000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
363*4882a593Smuzhiyun { .lomax = 650000000, .svco = 1, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
364*4882a593Smuzhiyun { .lomax = 700000000, .svco = 2, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
365*4882a593Smuzhiyun { .lomax = 780000000, .svco = 2, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
366*4882a593Smuzhiyun { .lomax = 820000000, .svco = 3, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
367*4882a593Smuzhiyun { .lomax = 870000000, .svco = 3, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
368*4882a593Smuzhiyun { .lomax = 911000000, .svco = 3, .spd = 0, .scr = 2, .sbs = 4, .gc3 = 0},
369*4882a593Smuzhiyun { .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0}
370*4882a593Smuzhiyun };
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun static struct tda827xa_data tda827xa_dvbc[] = {
373*4882a593Smuzhiyun { .lomax = 50125000, .svco = 2, .spd = 4, .scr = 2, .sbs = 0, .gc3 = 3},
374*4882a593Smuzhiyun { .lomax = 58500000, .svco = 3, .spd = 4, .scr = 2, .sbs = 0, .gc3 = 3},
375*4882a593Smuzhiyun { .lomax = 69250000, .svco = 0, .spd = 3, .scr = 2, .sbs = 0, .gc3 = 3},
376*4882a593Smuzhiyun { .lomax = 83625000, .svco = 1, .spd = 3, .scr = 2, .sbs = 0, .gc3 = 3},
377*4882a593Smuzhiyun { .lomax = 97500000, .svco = 2, .spd = 3, .scr = 2, .sbs = 0, .gc3 = 3},
378*4882a593Smuzhiyun { .lomax = 100250000, .svco = 2, .spd = 3, .scr = 2, .sbs = 1, .gc3 = 1},
379*4882a593Smuzhiyun { .lomax = 117000000, .svco = 3, .spd = 3, .scr = 2, .sbs = 1, .gc3 = 1},
380*4882a593Smuzhiyun { .lomax = 138500000, .svco = 0, .spd = 2, .scr = 2, .sbs = 1, .gc3 = 1},
381*4882a593Smuzhiyun { .lomax = 167250000, .svco = 1, .spd = 2, .scr = 2, .sbs = 1, .gc3 = 1},
382*4882a593Smuzhiyun { .lomax = 187000000, .svco = 2, .spd = 2, .scr = 2, .sbs = 1, .gc3 = 1},
383*4882a593Smuzhiyun { .lomax = 200500000, .svco = 2, .spd = 2, .scr = 2, .sbs = 2, .gc3 = 1},
384*4882a593Smuzhiyun { .lomax = 234000000, .svco = 3, .spd = 2, .scr = 2, .sbs = 2, .gc3 = 3},
385*4882a593Smuzhiyun { .lomax = 277000000, .svco = 0, .spd = 1, .scr = 2, .sbs = 2, .gc3 = 3},
386*4882a593Smuzhiyun { .lomax = 325000000, .svco = 1, .spd = 1, .scr = 2, .sbs = 2, .gc3 = 1},
387*4882a593Smuzhiyun { .lomax = 334500000, .svco = 1, .spd = 1, .scr = 2, .sbs = 3, .gc3 = 3},
388*4882a593Smuzhiyun { .lomax = 401000000, .svco = 2, .spd = 1, .scr = 2, .sbs = 3, .gc3 = 3},
389*4882a593Smuzhiyun { .lomax = 468000000, .svco = 3, .spd = 1, .scr = 2, .sbs = 3, .gc3 = 1},
390*4882a593Smuzhiyun { .lomax = 535000000, .svco = 0, .spd = 0, .scr = 1, .sbs = 3, .gc3 = 1},
391*4882a593Smuzhiyun { .lomax = 554000000, .svco = 0, .spd = 0, .scr = 2, .sbs = 3, .gc3 = 1},
392*4882a593Smuzhiyun { .lomax = 638000000, .svco = 1, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 1},
393*4882a593Smuzhiyun { .lomax = 669000000, .svco = 1, .spd = 0, .scr = 2, .sbs = 4, .gc3 = 1},
394*4882a593Smuzhiyun { .lomax = 720000000, .svco = 2, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 1},
395*4882a593Smuzhiyun { .lomax = 802000000, .svco = 2, .spd = 0, .scr = 2, .sbs = 4, .gc3 = 1},
396*4882a593Smuzhiyun { .lomax = 835000000, .svco = 3, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 1},
397*4882a593Smuzhiyun { .lomax = 885000000, .svco = 3, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 1},
398*4882a593Smuzhiyun { .lomax = 911000000, .svco = 3, .spd = 0, .scr = 2, .sbs = 4, .gc3 = 1},
399*4882a593Smuzhiyun { .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0}
400*4882a593Smuzhiyun };
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun static struct tda827xa_data tda827xa_analog[] = {
403*4882a593Smuzhiyun { .lomax = 56875000, .svco = 3, .spd = 4, .scr = 0, .sbs = 0, .gc3 = 3},
404*4882a593Smuzhiyun { .lomax = 67250000, .svco = 0, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 3},
405*4882a593Smuzhiyun { .lomax = 81250000, .svco = 1, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 3},
406*4882a593Smuzhiyun { .lomax = 97500000, .svco = 2, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 3},
407*4882a593Smuzhiyun { .lomax = 113750000, .svco = 3, .spd = 3, .scr = 0, .sbs = 1, .gc3 = 1},
408*4882a593Smuzhiyun { .lomax = 134500000, .svco = 0, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
409*4882a593Smuzhiyun { .lomax = 154000000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
410*4882a593Smuzhiyun { .lomax = 162500000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
411*4882a593Smuzhiyun { .lomax = 183000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
412*4882a593Smuzhiyun { .lomax = 195000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
413*4882a593Smuzhiyun { .lomax = 227500000, .svco = 3, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 3},
414*4882a593Smuzhiyun { .lomax = 269000000, .svco = 0, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 3},
415*4882a593Smuzhiyun { .lomax = 325000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
416*4882a593Smuzhiyun { .lomax = 390000000, .svco = 2, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 3},
417*4882a593Smuzhiyun { .lomax = 455000000, .svco = 3, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 3},
418*4882a593Smuzhiyun { .lomax = 520000000, .svco = 0, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
419*4882a593Smuzhiyun { .lomax = 538000000, .svco = 0, .spd = 0, .scr = 1, .sbs = 3, .gc3 = 1},
420*4882a593Smuzhiyun { .lomax = 554000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
421*4882a593Smuzhiyun { .lomax = 620000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
422*4882a593Smuzhiyun { .lomax = 650000000, .svco = 1, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
423*4882a593Smuzhiyun { .lomax = 700000000, .svco = 2, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
424*4882a593Smuzhiyun { .lomax = 780000000, .svco = 2, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
425*4882a593Smuzhiyun { .lomax = 820000000, .svco = 3, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
426*4882a593Smuzhiyun { .lomax = 870000000, .svco = 3, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
427*4882a593Smuzhiyun { .lomax = 911000000, .svco = 3, .spd = 0, .scr = 2, .sbs = 4, .gc3 = 0},
428*4882a593Smuzhiyun { .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0}
429*4882a593Smuzhiyun };
430*4882a593Smuzhiyun
tda827xa_sleep(struct dvb_frontend * fe)431*4882a593Smuzhiyun static int tda827xa_sleep(struct dvb_frontend *fe)
432*4882a593Smuzhiyun {
433*4882a593Smuzhiyun struct tda827x_priv *priv = fe->tuner_priv;
434*4882a593Smuzhiyun static u8 buf[] = { 0x30, 0x90 };
435*4882a593Smuzhiyun struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = 0,
436*4882a593Smuzhiyun .buf = buf, .len = sizeof(buf) };
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun dprintk("%s:\n", __func__);
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun tuner_transfer(fe, &msg, 1);
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun if (priv->cfg && priv->cfg->sleep)
443*4882a593Smuzhiyun priv->cfg->sleep(fe);
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun return 0;
446*4882a593Smuzhiyun }
447*4882a593Smuzhiyun
tda827xa_lna_gain(struct dvb_frontend * fe,int high,struct analog_parameters * params)448*4882a593Smuzhiyun static void tda827xa_lna_gain(struct dvb_frontend *fe, int high,
449*4882a593Smuzhiyun struct analog_parameters *params)
450*4882a593Smuzhiyun {
451*4882a593Smuzhiyun struct tda827x_priv *priv = fe->tuner_priv;
452*4882a593Smuzhiyun unsigned char buf[] = {0x22, 0x01};
453*4882a593Smuzhiyun int arg;
454*4882a593Smuzhiyun int gp_func;
455*4882a593Smuzhiyun struct i2c_msg msg = { .flags = 0, .buf = buf, .len = sizeof(buf) };
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun if (NULL == priv->cfg) {
458*4882a593Smuzhiyun dprintk("tda827x_config not defined, cannot set LNA gain!\n");
459*4882a593Smuzhiyun return;
460*4882a593Smuzhiyun }
461*4882a593Smuzhiyun msg.addr = priv->cfg->switch_addr;
462*4882a593Smuzhiyun if (priv->cfg->config) {
463*4882a593Smuzhiyun if (high)
464*4882a593Smuzhiyun dprintk("setting LNA to high gain\n");
465*4882a593Smuzhiyun else
466*4882a593Smuzhiyun dprintk("setting LNA to low gain\n");
467*4882a593Smuzhiyun }
468*4882a593Smuzhiyun switch (priv->cfg->config) {
469*4882a593Smuzhiyun case TDA8290_LNA_OFF: /* no LNA */
470*4882a593Smuzhiyun break;
471*4882a593Smuzhiyun case TDA8290_LNA_GP0_HIGH_ON: /* switch is GPIO 0 of tda8290 */
472*4882a593Smuzhiyun case TDA8290_LNA_GP0_HIGH_OFF:
473*4882a593Smuzhiyun if (params == NULL) {
474*4882a593Smuzhiyun gp_func = 0;
475*4882a593Smuzhiyun arg = 0;
476*4882a593Smuzhiyun } else {
477*4882a593Smuzhiyun /* turn Vsync on */
478*4882a593Smuzhiyun gp_func = 1;
479*4882a593Smuzhiyun if (params->std & V4L2_STD_MN)
480*4882a593Smuzhiyun arg = 1;
481*4882a593Smuzhiyun else
482*4882a593Smuzhiyun arg = 0;
483*4882a593Smuzhiyun }
484*4882a593Smuzhiyun if (fe->callback)
485*4882a593Smuzhiyun fe->callback(priv->i2c_adap->algo_data,
486*4882a593Smuzhiyun DVB_FRONTEND_COMPONENT_TUNER,
487*4882a593Smuzhiyun gp_func, arg);
488*4882a593Smuzhiyun buf[1] = high ? 0 : 1;
489*4882a593Smuzhiyun if (priv->cfg->config == TDA8290_LNA_GP0_HIGH_OFF)
490*4882a593Smuzhiyun buf[1] = high ? 1 : 0;
491*4882a593Smuzhiyun tuner_transfer(fe, &msg, 1);
492*4882a593Smuzhiyun break;
493*4882a593Smuzhiyun case TDA8290_LNA_ON_BRIDGE: /* switch with GPIO of saa713x */
494*4882a593Smuzhiyun if (fe->callback)
495*4882a593Smuzhiyun fe->callback(priv->i2c_adap->algo_data,
496*4882a593Smuzhiyun DVB_FRONTEND_COMPONENT_TUNER, 0, high);
497*4882a593Smuzhiyun break;
498*4882a593Smuzhiyun }
499*4882a593Smuzhiyun }
500*4882a593Smuzhiyun
tda827xa_set_params(struct dvb_frontend * fe)501*4882a593Smuzhiyun static int tda827xa_set_params(struct dvb_frontend *fe)
502*4882a593Smuzhiyun {
503*4882a593Smuzhiyun struct dtv_frontend_properties *c = &fe->dtv_property_cache;
504*4882a593Smuzhiyun struct tda827x_priv *priv = fe->tuner_priv;
505*4882a593Smuzhiyun struct tda827xa_data *frequency_map = tda827xa_dvbt;
506*4882a593Smuzhiyun u8 buf[11];
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = 0,
509*4882a593Smuzhiyun .buf = buf, .len = sizeof(buf) };
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun int i, tuner_freq, if_freq, rc;
512*4882a593Smuzhiyun u32 N;
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun dprintk("%s:\n", __func__);
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun tda827xa_lna_gain(fe, 1, NULL);
517*4882a593Smuzhiyun msleep(20);
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun if (c->bandwidth_hz == 0) {
520*4882a593Smuzhiyun if_freq = 5000000;
521*4882a593Smuzhiyun } else if (c->bandwidth_hz <= 6000000) {
522*4882a593Smuzhiyun if_freq = 4000000;
523*4882a593Smuzhiyun } else if (c->bandwidth_hz <= 7000000) {
524*4882a593Smuzhiyun if_freq = 4500000;
525*4882a593Smuzhiyun } else { /* 8 MHz */
526*4882a593Smuzhiyun if_freq = 5000000;
527*4882a593Smuzhiyun }
528*4882a593Smuzhiyun tuner_freq = c->frequency;
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun switch (c->delivery_system) {
531*4882a593Smuzhiyun case SYS_DVBC_ANNEX_A:
532*4882a593Smuzhiyun case SYS_DVBC_ANNEX_C:
533*4882a593Smuzhiyun dprintk("%s select tda827xa_dvbc\n", __func__);
534*4882a593Smuzhiyun frequency_map = tda827xa_dvbc;
535*4882a593Smuzhiyun break;
536*4882a593Smuzhiyun default:
537*4882a593Smuzhiyun break;
538*4882a593Smuzhiyun }
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun i = 0;
541*4882a593Smuzhiyun while (frequency_map[i].lomax < tuner_freq) {
542*4882a593Smuzhiyun if (frequency_map[i + 1].lomax == 0)
543*4882a593Smuzhiyun break;
544*4882a593Smuzhiyun i++;
545*4882a593Smuzhiyun }
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun tuner_freq += if_freq;
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun N = ((tuner_freq + 31250) / 62500) << frequency_map[i].spd;
550*4882a593Smuzhiyun buf[0] = 0; // subaddress
551*4882a593Smuzhiyun buf[1] = N >> 8;
552*4882a593Smuzhiyun buf[2] = N & 0xff;
553*4882a593Smuzhiyun buf[3] = 0;
554*4882a593Smuzhiyun buf[4] = 0x16;
555*4882a593Smuzhiyun buf[5] = (frequency_map[i].spd << 5) + (frequency_map[i].svco << 3) +
556*4882a593Smuzhiyun frequency_map[i].sbs;
557*4882a593Smuzhiyun buf[6] = 0x4b + (frequency_map[i].gc3 << 4);
558*4882a593Smuzhiyun buf[7] = 0x1c;
559*4882a593Smuzhiyun buf[8] = 0x06;
560*4882a593Smuzhiyun buf[9] = 0x24;
561*4882a593Smuzhiyun buf[10] = 0x00;
562*4882a593Smuzhiyun msg.len = 11;
563*4882a593Smuzhiyun rc = tuner_transfer(fe, &msg, 1);
564*4882a593Smuzhiyun if (rc < 0)
565*4882a593Smuzhiyun goto err;
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun buf[0] = 0x90;
568*4882a593Smuzhiyun buf[1] = 0xff;
569*4882a593Smuzhiyun buf[2] = 0x60;
570*4882a593Smuzhiyun buf[3] = 0x00;
571*4882a593Smuzhiyun buf[4] = 0x59; // lpsel, for 6MHz + 2
572*4882a593Smuzhiyun msg.len = 5;
573*4882a593Smuzhiyun rc = tuner_transfer(fe, &msg, 1);
574*4882a593Smuzhiyun if (rc < 0)
575*4882a593Smuzhiyun goto err;
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun buf[0] = 0xa0;
578*4882a593Smuzhiyun buf[1] = 0x40;
579*4882a593Smuzhiyun msg.len = 2;
580*4882a593Smuzhiyun rc = tuner_transfer(fe, &msg, 1);
581*4882a593Smuzhiyun if (rc < 0)
582*4882a593Smuzhiyun goto err;
583*4882a593Smuzhiyun
584*4882a593Smuzhiyun msleep(11);
585*4882a593Smuzhiyun msg.flags = I2C_M_RD;
586*4882a593Smuzhiyun rc = tuner_transfer(fe, &msg, 1);
587*4882a593Smuzhiyun if (rc < 0)
588*4882a593Smuzhiyun goto err;
589*4882a593Smuzhiyun msg.flags = 0;
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun buf[1] >>= 4;
592*4882a593Smuzhiyun dprintk("tda8275a AGC2 gain is: %d\n", buf[1]);
593*4882a593Smuzhiyun if ((buf[1]) < 2) {
594*4882a593Smuzhiyun tda827xa_lna_gain(fe, 0, NULL);
595*4882a593Smuzhiyun buf[0] = 0x60;
596*4882a593Smuzhiyun buf[1] = 0x0c;
597*4882a593Smuzhiyun rc = tuner_transfer(fe, &msg, 1);
598*4882a593Smuzhiyun if (rc < 0)
599*4882a593Smuzhiyun goto err;
600*4882a593Smuzhiyun }
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun buf[0] = 0xc0;
603*4882a593Smuzhiyun buf[1] = 0x99; // lpsel, for 6MHz + 2
604*4882a593Smuzhiyun rc = tuner_transfer(fe, &msg, 1);
605*4882a593Smuzhiyun if (rc < 0)
606*4882a593Smuzhiyun goto err;
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun buf[0] = 0x60;
609*4882a593Smuzhiyun buf[1] = 0x3c;
610*4882a593Smuzhiyun rc = tuner_transfer(fe, &msg, 1);
611*4882a593Smuzhiyun if (rc < 0)
612*4882a593Smuzhiyun goto err;
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun /* correct CP value */
615*4882a593Smuzhiyun buf[0] = 0x30;
616*4882a593Smuzhiyun buf[1] = 0x10 + frequency_map[i].scr;
617*4882a593Smuzhiyun rc = tuner_transfer(fe, &msg, 1);
618*4882a593Smuzhiyun if (rc < 0)
619*4882a593Smuzhiyun goto err;
620*4882a593Smuzhiyun
621*4882a593Smuzhiyun msleep(163);
622*4882a593Smuzhiyun buf[0] = 0xc0;
623*4882a593Smuzhiyun buf[1] = 0x39; // lpsel, for 6MHz + 2
624*4882a593Smuzhiyun rc = tuner_transfer(fe, &msg, 1);
625*4882a593Smuzhiyun if (rc < 0)
626*4882a593Smuzhiyun goto err;
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun msleep(3);
629*4882a593Smuzhiyun /* freeze AGC1 */
630*4882a593Smuzhiyun buf[0] = 0x50;
631*4882a593Smuzhiyun buf[1] = 0x4f + (frequency_map[i].gc3 << 4);
632*4882a593Smuzhiyun rc = tuner_transfer(fe, &msg, 1);
633*4882a593Smuzhiyun if (rc < 0)
634*4882a593Smuzhiyun goto err;
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun priv->frequency = c->frequency;
637*4882a593Smuzhiyun priv->bandwidth = c->bandwidth_hz;
638*4882a593Smuzhiyun
639*4882a593Smuzhiyun return 0;
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun err:
642*4882a593Smuzhiyun printk(KERN_ERR "%s: could not write to tuner at addr: 0x%02x\n",
643*4882a593Smuzhiyun __func__, priv->i2c_addr << 1);
644*4882a593Smuzhiyun return rc;
645*4882a593Smuzhiyun }
646*4882a593Smuzhiyun
647*4882a593Smuzhiyun
tda827xa_set_analog_params(struct dvb_frontend * fe,struct analog_parameters * params)648*4882a593Smuzhiyun static int tda827xa_set_analog_params(struct dvb_frontend *fe,
649*4882a593Smuzhiyun struct analog_parameters *params)
650*4882a593Smuzhiyun {
651*4882a593Smuzhiyun unsigned char tuner_reg[11];
652*4882a593Smuzhiyun u32 N;
653*4882a593Smuzhiyun int i;
654*4882a593Smuzhiyun struct tda827x_priv *priv = fe->tuner_priv;
655*4882a593Smuzhiyun struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = 0,
656*4882a593Smuzhiyun .buf = tuner_reg, .len = sizeof(tuner_reg) };
657*4882a593Smuzhiyun unsigned int freq = params->frequency;
658*4882a593Smuzhiyun
659*4882a593Smuzhiyun tda827x_set_std(fe, params);
660*4882a593Smuzhiyun
661*4882a593Smuzhiyun tda827xa_lna_gain(fe, 1, params);
662*4882a593Smuzhiyun msleep(10);
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun if (params->mode == V4L2_TUNER_RADIO)
665*4882a593Smuzhiyun freq = freq / 1000;
666*4882a593Smuzhiyun
667*4882a593Smuzhiyun N = freq + priv->sgIF;
668*4882a593Smuzhiyun
669*4882a593Smuzhiyun i = 0;
670*4882a593Smuzhiyun while (tda827xa_analog[i].lomax < N * 62500) {
671*4882a593Smuzhiyun if (tda827xa_analog[i + 1].lomax == 0)
672*4882a593Smuzhiyun break;
673*4882a593Smuzhiyun i++;
674*4882a593Smuzhiyun }
675*4882a593Smuzhiyun
676*4882a593Smuzhiyun N = N << tda827xa_analog[i].spd;
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun tuner_reg[0] = 0;
679*4882a593Smuzhiyun tuner_reg[1] = (unsigned char)(N>>8);
680*4882a593Smuzhiyun tuner_reg[2] = (unsigned char) N;
681*4882a593Smuzhiyun tuner_reg[3] = 0;
682*4882a593Smuzhiyun tuner_reg[4] = 0x16;
683*4882a593Smuzhiyun tuner_reg[5] = (tda827xa_analog[i].spd << 5) +
684*4882a593Smuzhiyun (tda827xa_analog[i].svco << 3) +
685*4882a593Smuzhiyun tda827xa_analog[i].sbs;
686*4882a593Smuzhiyun tuner_reg[6] = 0x8b + (tda827xa_analog[i].gc3 << 4);
687*4882a593Smuzhiyun tuner_reg[7] = 0x1c;
688*4882a593Smuzhiyun tuner_reg[8] = 4;
689*4882a593Smuzhiyun tuner_reg[9] = 0x20;
690*4882a593Smuzhiyun tuner_reg[10] = 0x00;
691*4882a593Smuzhiyun msg.len = 11;
692*4882a593Smuzhiyun tuner_transfer(fe, &msg, 1);
693*4882a593Smuzhiyun
694*4882a593Smuzhiyun tuner_reg[0] = 0x90;
695*4882a593Smuzhiyun tuner_reg[1] = 0xff;
696*4882a593Smuzhiyun tuner_reg[2] = 0xe0;
697*4882a593Smuzhiyun tuner_reg[3] = 0;
698*4882a593Smuzhiyun tuner_reg[4] = 0x99 + (priv->lpsel << 1);
699*4882a593Smuzhiyun msg.len = 5;
700*4882a593Smuzhiyun tuner_transfer(fe, &msg, 1);
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun tuner_reg[0] = 0xa0;
703*4882a593Smuzhiyun tuner_reg[1] = 0xc0;
704*4882a593Smuzhiyun msg.len = 2;
705*4882a593Smuzhiyun tuner_transfer(fe, &msg, 1);
706*4882a593Smuzhiyun
707*4882a593Smuzhiyun tuner_reg[0] = 0x30;
708*4882a593Smuzhiyun tuner_reg[1] = 0x10 + tda827xa_analog[i].scr;
709*4882a593Smuzhiyun tuner_transfer(fe, &msg, 1);
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun msg.flags = I2C_M_RD;
712*4882a593Smuzhiyun tuner_transfer(fe, &msg, 1);
713*4882a593Smuzhiyun msg.flags = 0;
714*4882a593Smuzhiyun tuner_reg[1] >>= 4;
715*4882a593Smuzhiyun dprintk("AGC2 gain is: %d\n", tuner_reg[1]);
716*4882a593Smuzhiyun if (tuner_reg[1] < 1)
717*4882a593Smuzhiyun tda827xa_lna_gain(fe, 0, params);
718*4882a593Smuzhiyun
719*4882a593Smuzhiyun msleep(100);
720*4882a593Smuzhiyun tuner_reg[0] = 0x60;
721*4882a593Smuzhiyun tuner_reg[1] = 0x3c;
722*4882a593Smuzhiyun tuner_transfer(fe, &msg, 1);
723*4882a593Smuzhiyun
724*4882a593Smuzhiyun msleep(163);
725*4882a593Smuzhiyun tuner_reg[0] = 0x50;
726*4882a593Smuzhiyun tuner_reg[1] = 0x8f + (tda827xa_analog[i].gc3 << 4);
727*4882a593Smuzhiyun tuner_transfer(fe, &msg, 1);
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun tuner_reg[0] = 0x80;
730*4882a593Smuzhiyun tuner_reg[1] = 0x28;
731*4882a593Smuzhiyun tuner_transfer(fe, &msg, 1);
732*4882a593Smuzhiyun
733*4882a593Smuzhiyun tuner_reg[0] = 0xb0;
734*4882a593Smuzhiyun tuner_reg[1] = 0x01;
735*4882a593Smuzhiyun tuner_transfer(fe, &msg, 1);
736*4882a593Smuzhiyun
737*4882a593Smuzhiyun tuner_reg[0] = 0xc0;
738*4882a593Smuzhiyun tuner_reg[1] = 0x19 + (priv->lpsel << 1);
739*4882a593Smuzhiyun tuner_transfer(fe, &msg, 1);
740*4882a593Smuzhiyun
741*4882a593Smuzhiyun priv->frequency = params->frequency;
742*4882a593Smuzhiyun
743*4882a593Smuzhiyun return 0;
744*4882a593Smuzhiyun }
745*4882a593Smuzhiyun
tda827xa_agcf(struct dvb_frontend * fe)746*4882a593Smuzhiyun static void tda827xa_agcf(struct dvb_frontend *fe)
747*4882a593Smuzhiyun {
748*4882a593Smuzhiyun struct tda827x_priv *priv = fe->tuner_priv;
749*4882a593Smuzhiyun unsigned char data[] = {0x80, 0x2c};
750*4882a593Smuzhiyun struct i2c_msg msg = {.addr = priv->i2c_addr, .flags = 0,
751*4882a593Smuzhiyun .buf = data, .len = 2};
752*4882a593Smuzhiyun tuner_transfer(fe, &msg, 1);
753*4882a593Smuzhiyun }
754*4882a593Smuzhiyun
755*4882a593Smuzhiyun /* ------------------------------------------------------------------ */
756*4882a593Smuzhiyun
tda827x_release(struct dvb_frontend * fe)757*4882a593Smuzhiyun static void tda827x_release(struct dvb_frontend *fe)
758*4882a593Smuzhiyun {
759*4882a593Smuzhiyun kfree(fe->tuner_priv);
760*4882a593Smuzhiyun fe->tuner_priv = NULL;
761*4882a593Smuzhiyun }
762*4882a593Smuzhiyun
tda827x_get_frequency(struct dvb_frontend * fe,u32 * frequency)763*4882a593Smuzhiyun static int tda827x_get_frequency(struct dvb_frontend *fe, u32 *frequency)
764*4882a593Smuzhiyun {
765*4882a593Smuzhiyun struct tda827x_priv *priv = fe->tuner_priv;
766*4882a593Smuzhiyun *frequency = priv->frequency;
767*4882a593Smuzhiyun return 0;
768*4882a593Smuzhiyun }
769*4882a593Smuzhiyun
tda827x_get_bandwidth(struct dvb_frontend * fe,u32 * bandwidth)770*4882a593Smuzhiyun static int tda827x_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
771*4882a593Smuzhiyun {
772*4882a593Smuzhiyun struct tda827x_priv *priv = fe->tuner_priv;
773*4882a593Smuzhiyun *bandwidth = priv->bandwidth;
774*4882a593Smuzhiyun return 0;
775*4882a593Smuzhiyun }
776*4882a593Smuzhiyun
tda827x_init(struct dvb_frontend * fe)777*4882a593Smuzhiyun static int tda827x_init(struct dvb_frontend *fe)
778*4882a593Smuzhiyun {
779*4882a593Smuzhiyun struct tda827x_priv *priv = fe->tuner_priv;
780*4882a593Smuzhiyun dprintk("%s:\n", __func__);
781*4882a593Smuzhiyun if (priv->cfg && priv->cfg->init)
782*4882a593Smuzhiyun priv->cfg->init(fe);
783*4882a593Smuzhiyun
784*4882a593Smuzhiyun return 0;
785*4882a593Smuzhiyun }
786*4882a593Smuzhiyun
787*4882a593Smuzhiyun static int tda827x_probe_version(struct dvb_frontend *fe);
788*4882a593Smuzhiyun
tda827x_initial_init(struct dvb_frontend * fe)789*4882a593Smuzhiyun static int tda827x_initial_init(struct dvb_frontend *fe)
790*4882a593Smuzhiyun {
791*4882a593Smuzhiyun int ret;
792*4882a593Smuzhiyun ret = tda827x_probe_version(fe);
793*4882a593Smuzhiyun if (ret)
794*4882a593Smuzhiyun return ret;
795*4882a593Smuzhiyun return fe->ops.tuner_ops.init(fe);
796*4882a593Smuzhiyun }
797*4882a593Smuzhiyun
tda827x_initial_sleep(struct dvb_frontend * fe)798*4882a593Smuzhiyun static int tda827x_initial_sleep(struct dvb_frontend *fe)
799*4882a593Smuzhiyun {
800*4882a593Smuzhiyun int ret;
801*4882a593Smuzhiyun ret = tda827x_probe_version(fe);
802*4882a593Smuzhiyun if (ret)
803*4882a593Smuzhiyun return ret;
804*4882a593Smuzhiyun return fe->ops.tuner_ops.sleep(fe);
805*4882a593Smuzhiyun }
806*4882a593Smuzhiyun
807*4882a593Smuzhiyun static const struct dvb_tuner_ops tda827xo_tuner_ops = {
808*4882a593Smuzhiyun .info = {
809*4882a593Smuzhiyun .name = "Philips TDA827X",
810*4882a593Smuzhiyun .frequency_min_hz = 55 * MHz,
811*4882a593Smuzhiyun .frequency_max_hz = 860 * MHz,
812*4882a593Smuzhiyun .frequency_step_hz = 250 * kHz
813*4882a593Smuzhiyun },
814*4882a593Smuzhiyun .release = tda827x_release,
815*4882a593Smuzhiyun .init = tda827x_initial_init,
816*4882a593Smuzhiyun .sleep = tda827x_initial_sleep,
817*4882a593Smuzhiyun .set_params = tda827xo_set_params,
818*4882a593Smuzhiyun .set_analog_params = tda827xo_set_analog_params,
819*4882a593Smuzhiyun .get_frequency = tda827x_get_frequency,
820*4882a593Smuzhiyun .get_bandwidth = tda827x_get_bandwidth,
821*4882a593Smuzhiyun };
822*4882a593Smuzhiyun
823*4882a593Smuzhiyun static const struct dvb_tuner_ops tda827xa_tuner_ops = {
824*4882a593Smuzhiyun .info = {
825*4882a593Smuzhiyun .name = "Philips TDA827XA",
826*4882a593Smuzhiyun .frequency_min_hz = 44 * MHz,
827*4882a593Smuzhiyun .frequency_max_hz = 906 * MHz,
828*4882a593Smuzhiyun .frequency_step_hz = 62500
829*4882a593Smuzhiyun },
830*4882a593Smuzhiyun .release = tda827x_release,
831*4882a593Smuzhiyun .init = tda827x_init,
832*4882a593Smuzhiyun .sleep = tda827xa_sleep,
833*4882a593Smuzhiyun .set_params = tda827xa_set_params,
834*4882a593Smuzhiyun .set_analog_params = tda827xa_set_analog_params,
835*4882a593Smuzhiyun .get_frequency = tda827x_get_frequency,
836*4882a593Smuzhiyun .get_bandwidth = tda827x_get_bandwidth,
837*4882a593Smuzhiyun };
838*4882a593Smuzhiyun
tda827x_probe_version(struct dvb_frontend * fe)839*4882a593Smuzhiyun static int tda827x_probe_version(struct dvb_frontend *fe)
840*4882a593Smuzhiyun {
841*4882a593Smuzhiyun u8 data;
842*4882a593Smuzhiyun int rc;
843*4882a593Smuzhiyun struct tda827x_priv *priv = fe->tuner_priv;
844*4882a593Smuzhiyun struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = I2C_M_RD,
845*4882a593Smuzhiyun .buf = &data, .len = 1 };
846*4882a593Smuzhiyun
847*4882a593Smuzhiyun rc = tuner_transfer(fe, &msg, 1);
848*4882a593Smuzhiyun
849*4882a593Smuzhiyun if (rc < 0) {
850*4882a593Smuzhiyun printk("%s: could not read from tuner at addr: 0x%02x\n",
851*4882a593Smuzhiyun __func__, msg.addr << 1);
852*4882a593Smuzhiyun return rc;
853*4882a593Smuzhiyun }
854*4882a593Smuzhiyun if ((data & 0x3c) == 0) {
855*4882a593Smuzhiyun dprintk("tda827x tuner found\n");
856*4882a593Smuzhiyun fe->ops.tuner_ops.init = tda827x_init;
857*4882a593Smuzhiyun fe->ops.tuner_ops.sleep = tda827xo_sleep;
858*4882a593Smuzhiyun if (priv->cfg)
859*4882a593Smuzhiyun priv->cfg->agcf = tda827xo_agcf;
860*4882a593Smuzhiyun } else {
861*4882a593Smuzhiyun dprintk("tda827xa tuner found\n");
862*4882a593Smuzhiyun memcpy(&fe->ops.tuner_ops, &tda827xa_tuner_ops, sizeof(struct dvb_tuner_ops));
863*4882a593Smuzhiyun if (priv->cfg)
864*4882a593Smuzhiyun priv->cfg->agcf = tda827xa_agcf;
865*4882a593Smuzhiyun }
866*4882a593Smuzhiyun return 0;
867*4882a593Smuzhiyun }
868*4882a593Smuzhiyun
tda827x_attach(struct dvb_frontend * fe,int addr,struct i2c_adapter * i2c,struct tda827x_config * cfg)869*4882a593Smuzhiyun struct dvb_frontend *tda827x_attach(struct dvb_frontend *fe, int addr,
870*4882a593Smuzhiyun struct i2c_adapter *i2c,
871*4882a593Smuzhiyun struct tda827x_config *cfg)
872*4882a593Smuzhiyun {
873*4882a593Smuzhiyun struct tda827x_priv *priv = NULL;
874*4882a593Smuzhiyun
875*4882a593Smuzhiyun dprintk("%s:\n", __func__);
876*4882a593Smuzhiyun priv = kzalloc(sizeof(struct tda827x_priv), GFP_KERNEL);
877*4882a593Smuzhiyun if (priv == NULL)
878*4882a593Smuzhiyun return NULL;
879*4882a593Smuzhiyun
880*4882a593Smuzhiyun priv->i2c_addr = addr;
881*4882a593Smuzhiyun priv->i2c_adap = i2c;
882*4882a593Smuzhiyun priv->cfg = cfg;
883*4882a593Smuzhiyun memcpy(&fe->ops.tuner_ops, &tda827xo_tuner_ops, sizeof(struct dvb_tuner_ops));
884*4882a593Smuzhiyun fe->tuner_priv = priv;
885*4882a593Smuzhiyun
886*4882a593Smuzhiyun dprintk("type set to %s\n", fe->ops.tuner_ops.info.name);
887*4882a593Smuzhiyun
888*4882a593Smuzhiyun return fe;
889*4882a593Smuzhiyun }
890*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(tda827x_attach);
891*4882a593Smuzhiyun
892*4882a593Smuzhiyun MODULE_DESCRIPTION("DVB TDA827x driver");
893*4882a593Smuzhiyun MODULE_AUTHOR("Hartmut Hackmann <hartmut.hackmann@t-online.de>");
894*4882a593Smuzhiyun MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
895*4882a593Smuzhiyun MODULE_LICENSE("GPL");
896