1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun MaxLinear MXL5005S VSB/QAM/DVBT tuner driver 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun Copyright (C) 2008 MaxLinear 6*4882a593Smuzhiyun Copyright (C) 2008 Steven Toth <stoth@linuxtv.org> 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #ifndef __MXL5005S_H 12*4882a593Smuzhiyun #define __MXL5005S_H 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #include <linux/i2c.h> 15*4882a593Smuzhiyun #include <media/dvb_frontend.h> 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun struct mxl5005s_config { 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /* 7 bit i2c address */ 20*4882a593Smuzhiyun u8 i2c_address; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define IF_FREQ_4570000HZ 4570000 23*4882a593Smuzhiyun #define IF_FREQ_4571429HZ 4571429 24*4882a593Smuzhiyun #define IF_FREQ_5380000HZ 5380000 25*4882a593Smuzhiyun #define IF_FREQ_36000000HZ 36000000 26*4882a593Smuzhiyun #define IF_FREQ_36125000HZ 36125000 27*4882a593Smuzhiyun #define IF_FREQ_36166667HZ 36166667 28*4882a593Smuzhiyun #define IF_FREQ_44000000HZ 44000000 29*4882a593Smuzhiyun u32 if_freq; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define CRYSTAL_FREQ_4000000HZ 4000000 32*4882a593Smuzhiyun #define CRYSTAL_FREQ_16000000HZ 16000000 33*4882a593Smuzhiyun #define CRYSTAL_FREQ_25000000HZ 25000000 34*4882a593Smuzhiyun #define CRYSTAL_FREQ_28800000HZ 28800000 35*4882a593Smuzhiyun u32 xtal_freq; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #define MXL_DUAL_AGC 0 38*4882a593Smuzhiyun #define MXL_SINGLE_AGC 1 39*4882a593Smuzhiyun u8 agc_mode; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun #define MXL_TF_DEFAULT 0 42*4882a593Smuzhiyun #define MXL_TF_OFF 1 43*4882a593Smuzhiyun #define MXL_TF_C 2 44*4882a593Smuzhiyun #define MXL_TF_C_H 3 45*4882a593Smuzhiyun #define MXL_TF_D 4 46*4882a593Smuzhiyun #define MXL_TF_D_L 5 47*4882a593Smuzhiyun #define MXL_TF_E 6 48*4882a593Smuzhiyun #define MXL_TF_F 7 49*4882a593Smuzhiyun #define MXL_TF_E_2 8 50*4882a593Smuzhiyun #define MXL_TF_E_NA 9 51*4882a593Smuzhiyun #define MXL_TF_G 10 52*4882a593Smuzhiyun u8 tracking_filter; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun #define MXL_RSSI_DISABLE 0 55*4882a593Smuzhiyun #define MXL_RSSI_ENABLE 1 56*4882a593Smuzhiyun u8 rssi_enable; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun #define MXL_CAP_SEL_DISABLE 0 59*4882a593Smuzhiyun #define MXL_CAP_SEL_ENABLE 1 60*4882a593Smuzhiyun u8 cap_select; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun #define MXL_DIV_OUT_1 0 63*4882a593Smuzhiyun #define MXL_DIV_OUT_4 1 64*4882a593Smuzhiyun u8 div_out; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun #define MXL_CLOCK_OUT_DISABLE 0 67*4882a593Smuzhiyun #define MXL_CLOCK_OUT_ENABLE 1 68*4882a593Smuzhiyun u8 clock_out; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun #define MXL5005S_IF_OUTPUT_LOAD_200_OHM 200 71*4882a593Smuzhiyun #define MXL5005S_IF_OUTPUT_LOAD_300_OHM 300 72*4882a593Smuzhiyun u32 output_load; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun #define MXL5005S_TOP_5P5 55 75*4882a593Smuzhiyun #define MXL5005S_TOP_7P2 72 76*4882a593Smuzhiyun #define MXL5005S_TOP_9P2 92 77*4882a593Smuzhiyun #define MXL5005S_TOP_11P0 110 78*4882a593Smuzhiyun #define MXL5005S_TOP_12P9 129 79*4882a593Smuzhiyun #define MXL5005S_TOP_14P7 147 80*4882a593Smuzhiyun #define MXL5005S_TOP_16P8 168 81*4882a593Smuzhiyun #define MXL5005S_TOP_19P4 194 82*4882a593Smuzhiyun #define MXL5005S_TOP_21P2 212 83*4882a593Smuzhiyun #define MXL5005S_TOP_23P2 232 84*4882a593Smuzhiyun #define MXL5005S_TOP_25P2 252 85*4882a593Smuzhiyun #define MXL5005S_TOP_27P1 271 86*4882a593Smuzhiyun #define MXL5005S_TOP_29P2 292 87*4882a593Smuzhiyun #define MXL5005S_TOP_31P7 317 88*4882a593Smuzhiyun #define MXL5005S_TOP_34P9 349 89*4882a593Smuzhiyun u32 top; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun #define MXL_ANALOG_MODE 0 92*4882a593Smuzhiyun #define MXL_DIGITAL_MODE 1 93*4882a593Smuzhiyun u8 mod_mode; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun #define MXL_ZERO_IF 0 96*4882a593Smuzhiyun #define MXL_LOW_IF 1 97*4882a593Smuzhiyun u8 if_mode; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun /* Some boards need to override the built-in logic for determining 100*4882a593Smuzhiyun the gain when in QAM mode (the HVR-1600 is one such case) */ 101*4882a593Smuzhiyun u8 qam_gain; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun /* Stuff I don't know what to do with */ 104*4882a593Smuzhiyun u8 AgcMasterByte; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun #if IS_REACHABLE(CONFIG_MEDIA_TUNER_MXL5005S) 108*4882a593Smuzhiyun extern struct dvb_frontend *mxl5005s_attach(struct dvb_frontend *fe, 109*4882a593Smuzhiyun struct i2c_adapter *i2c, 110*4882a593Smuzhiyun struct mxl5005s_config *config); 111*4882a593Smuzhiyun #else mxl5005s_attach(struct dvb_frontend * fe,struct i2c_adapter * i2c,struct mxl5005s_config * config)112*4882a593Smuzhiyunstatic inline struct dvb_frontend *mxl5005s_attach(struct dvb_frontend *fe, 113*4882a593Smuzhiyun struct i2c_adapter *i2c, 114*4882a593Smuzhiyun struct mxl5005s_config *config) 115*4882a593Smuzhiyun { 116*4882a593Smuzhiyun printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); 117*4882a593Smuzhiyun return NULL; 118*4882a593Smuzhiyun } 119*4882a593Smuzhiyun #endif /* CONFIG_DVB_TUNER_MXL5005S */ 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun #endif /* __MXL5005S_H */ 122*4882a593Smuzhiyun 123