xref: /OK3568_Linux_fs/kernel/drivers/media/tuners/mxl301rf.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * MaxLinear MxL301RF OFDM tuner driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2014 Akihiro Tsukada <tskd08@gmail.com>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun /*
9*4882a593Smuzhiyun  * NOTICE:
10*4882a593Smuzhiyun  * This driver is incomplete and lacks init/config of the chips,
11*4882a593Smuzhiyun  * as the necessary info is not disclosed.
12*4882a593Smuzhiyun  * Other features like get_if_frequency() are missing as well.
13*4882a593Smuzhiyun  * It assumes that users of this driver (such as a PCI bridge of
14*4882a593Smuzhiyun  * DTV receiver cards) properly init and configure the chip
15*4882a593Smuzhiyun  * via I2C *before* calling this driver's init() function.
16*4882a593Smuzhiyun  *
17*4882a593Smuzhiyun  * Currently, PT3 driver is the only one that uses this driver,
18*4882a593Smuzhiyun  * and contains init/config code in its firmware.
19*4882a593Smuzhiyun  * Thus some part of the code might be dependent on PT3 specific config.
20*4882a593Smuzhiyun  */
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #include <linux/kernel.h>
23*4882a593Smuzhiyun #include "mxl301rf.h"
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun struct mxl301rf_state {
26*4882a593Smuzhiyun 	struct mxl301rf_config cfg;
27*4882a593Smuzhiyun 	struct i2c_client *i2c;
28*4882a593Smuzhiyun };
29*4882a593Smuzhiyun 
cfg_to_state(struct mxl301rf_config * c)30*4882a593Smuzhiyun static struct mxl301rf_state *cfg_to_state(struct mxl301rf_config *c)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun 	return container_of(c, struct mxl301rf_state, cfg);
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun 
raw_write(struct mxl301rf_state * state,const u8 * buf,int len)35*4882a593Smuzhiyun static int raw_write(struct mxl301rf_state *state, const u8 *buf, int len)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun 	int ret;
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun 	ret = i2c_master_send(state->i2c, buf, len);
40*4882a593Smuzhiyun 	if (ret >= 0 && ret < len)
41*4882a593Smuzhiyun 		ret = -EIO;
42*4882a593Smuzhiyun 	return (ret == len) ? 0 : ret;
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun 
reg_write(struct mxl301rf_state * state,u8 reg,u8 val)45*4882a593Smuzhiyun static int reg_write(struct mxl301rf_state *state, u8 reg, u8 val)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun 	u8 buf[2] = { reg, val };
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	return raw_write(state, buf, 2);
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun 
reg_read(struct mxl301rf_state * state,u8 reg,u8 * val)52*4882a593Smuzhiyun static int reg_read(struct mxl301rf_state *state, u8 reg, u8 *val)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun 	u8 wbuf[2] = { 0xfb, reg };
55*4882a593Smuzhiyun 	int ret;
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	ret = raw_write(state, wbuf, sizeof(wbuf));
58*4882a593Smuzhiyun 	if (ret == 0)
59*4882a593Smuzhiyun 		ret = i2c_master_recv(state->i2c, val, 1);
60*4882a593Smuzhiyun 	if (ret >= 0 && ret < 1)
61*4882a593Smuzhiyun 		ret = -EIO;
62*4882a593Smuzhiyun 	return (ret == 1) ? 0 : ret;
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun /* tuner_ops */
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun /* get RSSI and update propery cache, set to *out in % */
mxl301rf_get_rf_strength(struct dvb_frontend * fe,u16 * out)68*4882a593Smuzhiyun static int mxl301rf_get_rf_strength(struct dvb_frontend *fe, u16 *out)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun 	struct mxl301rf_state *state;
71*4882a593Smuzhiyun 	int ret;
72*4882a593Smuzhiyun 	u8  rf_in1, rf_in2, rf_off1, rf_off2;
73*4882a593Smuzhiyun 	u16 rf_in, rf_off;
74*4882a593Smuzhiyun 	s64 level;
75*4882a593Smuzhiyun 	struct dtv_fe_stats *rssi;
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	rssi = &fe->dtv_property_cache.strength;
78*4882a593Smuzhiyun 	rssi->len = 1;
79*4882a593Smuzhiyun 	rssi->stat[0].scale = FE_SCALE_NOT_AVAILABLE;
80*4882a593Smuzhiyun 	*out = 0;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	state = fe->tuner_priv;
83*4882a593Smuzhiyun 	ret = reg_write(state, 0x14, 0x01);
84*4882a593Smuzhiyun 	if (ret < 0)
85*4882a593Smuzhiyun 		return ret;
86*4882a593Smuzhiyun 	usleep_range(1000, 2000);
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	ret = reg_read(state, 0x18, &rf_in1);
89*4882a593Smuzhiyun 	if (ret == 0)
90*4882a593Smuzhiyun 		ret = reg_read(state, 0x19, &rf_in2);
91*4882a593Smuzhiyun 	if (ret == 0)
92*4882a593Smuzhiyun 		ret = reg_read(state, 0xd6, &rf_off1);
93*4882a593Smuzhiyun 	if (ret == 0)
94*4882a593Smuzhiyun 		ret = reg_read(state, 0xd7, &rf_off2);
95*4882a593Smuzhiyun 	if (ret != 0)
96*4882a593Smuzhiyun 		return ret;
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	rf_in = (rf_in2 & 0x07) << 8 | rf_in1;
99*4882a593Smuzhiyun 	rf_off = (rf_off2 & 0x0f) << 5 | (rf_off1 >> 3);
100*4882a593Smuzhiyun 	level = rf_in - rf_off - (113 << 3); /* x8 dBm */
101*4882a593Smuzhiyun 	level = level * 1000 / 8;
102*4882a593Smuzhiyun 	rssi->stat[0].svalue = level;
103*4882a593Smuzhiyun 	rssi->stat[0].scale = FE_SCALE_DECIBEL;
104*4882a593Smuzhiyun 	/* *out = (level - min) * 100 / (max - min) */
105*4882a593Smuzhiyun 	*out = (rf_in - rf_off + (1 << 9) - 1) * 100 / ((5 << 9) - 2);
106*4882a593Smuzhiyun 	return 0;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun /* spur shift parameters */
110*4882a593Smuzhiyun struct shf {
111*4882a593Smuzhiyun 	u32	freq;		/* Channel center frequency */
112*4882a593Smuzhiyun 	u32	ofst_th;	/* Offset frequency threshold */
113*4882a593Smuzhiyun 	u8	shf_val;	/* Spur shift value */
114*4882a593Smuzhiyun 	u8	shf_dir;	/* Spur shift direction */
115*4882a593Smuzhiyun };
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun static const struct shf shf_tab[] = {
118*4882a593Smuzhiyun 	{  64500, 500, 0x92, 0x07 },
119*4882a593Smuzhiyun 	{ 191500, 300, 0xe2, 0x07 },
120*4882a593Smuzhiyun 	{ 205500, 500, 0x2c, 0x04 },
121*4882a593Smuzhiyun 	{ 212500, 500, 0x1e, 0x04 },
122*4882a593Smuzhiyun 	{ 226500, 500, 0xd4, 0x07 },
123*4882a593Smuzhiyun 	{  99143, 500, 0x9c, 0x07 },
124*4882a593Smuzhiyun 	{ 173143, 500, 0xd4, 0x07 },
125*4882a593Smuzhiyun 	{ 191143, 300, 0xd4, 0x07 },
126*4882a593Smuzhiyun 	{ 207143, 500, 0xce, 0x07 },
127*4882a593Smuzhiyun 	{ 225143, 500, 0xce, 0x07 },
128*4882a593Smuzhiyun 	{ 243143, 500, 0xd4, 0x07 },
129*4882a593Smuzhiyun 	{ 261143, 500, 0xd4, 0x07 },
130*4882a593Smuzhiyun 	{ 291143, 500, 0xd4, 0x07 },
131*4882a593Smuzhiyun 	{ 339143, 500, 0x2c, 0x04 },
132*4882a593Smuzhiyun 	{ 117143, 500, 0x7a, 0x07 },
133*4882a593Smuzhiyun 	{ 135143, 300, 0x7a, 0x07 },
134*4882a593Smuzhiyun 	{ 153143, 500, 0x01, 0x07 }
135*4882a593Smuzhiyun };
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun struct reg_val {
138*4882a593Smuzhiyun 	u8 reg;
139*4882a593Smuzhiyun 	u8 val;
140*4882a593Smuzhiyun } __attribute__ ((__packed__));
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun static const struct reg_val set_idac[] = {
143*4882a593Smuzhiyun 	{ 0x0d, 0x00 },
144*4882a593Smuzhiyun 	{ 0x0c, 0x67 },
145*4882a593Smuzhiyun 	{ 0x6f, 0x89 },
146*4882a593Smuzhiyun 	{ 0x70, 0x0c },
147*4882a593Smuzhiyun 	{ 0x6f, 0x8a },
148*4882a593Smuzhiyun 	{ 0x70, 0x0e },
149*4882a593Smuzhiyun 	{ 0x6f, 0x8b },
150*4882a593Smuzhiyun 	{ 0x70, 0x1c },
151*4882a593Smuzhiyun };
152*4882a593Smuzhiyun 
mxl301rf_set_params(struct dvb_frontend * fe)153*4882a593Smuzhiyun static int mxl301rf_set_params(struct dvb_frontend *fe)
154*4882a593Smuzhiyun {
155*4882a593Smuzhiyun 	struct reg_val tune0[] = {
156*4882a593Smuzhiyun 		{ 0x13, 0x00 },		/* abort tuning */
157*4882a593Smuzhiyun 		{ 0x3b, 0xc0 },
158*4882a593Smuzhiyun 		{ 0x3b, 0x80 },
159*4882a593Smuzhiyun 		{ 0x10, 0x95 },		/* BW */
160*4882a593Smuzhiyun 		{ 0x1a, 0x05 },
161*4882a593Smuzhiyun 		{ 0x61, 0x00 },		/* spur shift value (placeholder) */
162*4882a593Smuzhiyun 		{ 0x62, 0xa0 }		/* spur shift direction (placeholder) */
163*4882a593Smuzhiyun 	};
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	struct reg_val tune1[] = {
166*4882a593Smuzhiyun 		{ 0x11, 0x40 },		/* RF frequency L (placeholder) */
167*4882a593Smuzhiyun 		{ 0x12, 0x0e },		/* RF frequency H (placeholder) */
168*4882a593Smuzhiyun 		{ 0x13, 0x01 }		/* start tune */
169*4882a593Smuzhiyun 	};
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	struct mxl301rf_state *state;
172*4882a593Smuzhiyun 	u32 freq;
173*4882a593Smuzhiyun 	u16 f;
174*4882a593Smuzhiyun 	u32 tmp, div;
175*4882a593Smuzhiyun 	int i, ret;
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	state = fe->tuner_priv;
178*4882a593Smuzhiyun 	freq = fe->dtv_property_cache.frequency;
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	/* spur shift function (for analog) */
181*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(shf_tab); i++) {
182*4882a593Smuzhiyun 		if (freq >= (shf_tab[i].freq - shf_tab[i].ofst_th) * 1000 &&
183*4882a593Smuzhiyun 		    freq <= (shf_tab[i].freq + shf_tab[i].ofst_th) * 1000) {
184*4882a593Smuzhiyun 			tune0[5].val = shf_tab[i].shf_val;
185*4882a593Smuzhiyun 			tune0[6].val = 0xa0 | shf_tab[i].shf_dir;
186*4882a593Smuzhiyun 			break;
187*4882a593Smuzhiyun 		}
188*4882a593Smuzhiyun 	}
189*4882a593Smuzhiyun 	ret = raw_write(state, (u8 *) tune0, sizeof(tune0));
190*4882a593Smuzhiyun 	if (ret < 0)
191*4882a593Smuzhiyun 		goto failed;
192*4882a593Smuzhiyun 	usleep_range(3000, 4000);
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	/* convert freq to 10.6 fixed point float [MHz] */
195*4882a593Smuzhiyun 	f = freq / 1000000;
196*4882a593Smuzhiyun 	tmp = freq % 1000000;
197*4882a593Smuzhiyun 	div = 1000000;
198*4882a593Smuzhiyun 	for (i = 0; i < 6; i++) {
199*4882a593Smuzhiyun 		f <<= 1;
200*4882a593Smuzhiyun 		div >>= 1;
201*4882a593Smuzhiyun 		if (tmp > div) {
202*4882a593Smuzhiyun 			tmp -= div;
203*4882a593Smuzhiyun 			f |= 1;
204*4882a593Smuzhiyun 		}
205*4882a593Smuzhiyun 	}
206*4882a593Smuzhiyun 	if (tmp > 7812)
207*4882a593Smuzhiyun 		f++;
208*4882a593Smuzhiyun 	tune1[0].val = f & 0xff;
209*4882a593Smuzhiyun 	tune1[1].val = f >> 8;
210*4882a593Smuzhiyun 	ret = raw_write(state, (u8 *) tune1, sizeof(tune1));
211*4882a593Smuzhiyun 	if (ret < 0)
212*4882a593Smuzhiyun 		goto failed;
213*4882a593Smuzhiyun 	msleep(31);
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	ret = reg_write(state, 0x1a, 0x0d);
216*4882a593Smuzhiyun 	if (ret < 0)
217*4882a593Smuzhiyun 		goto failed;
218*4882a593Smuzhiyun 	ret = raw_write(state, (u8 *) set_idac, sizeof(set_idac));
219*4882a593Smuzhiyun 	if (ret < 0)
220*4882a593Smuzhiyun 		goto failed;
221*4882a593Smuzhiyun 	return 0;
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun failed:
224*4882a593Smuzhiyun 	dev_warn(&state->i2c->dev, "(%s) failed. [adap%d-fe%d]\n",
225*4882a593Smuzhiyun 		__func__, fe->dvb->num, fe->id);
226*4882a593Smuzhiyun 	return ret;
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun static const struct reg_val standby_data[] = {
230*4882a593Smuzhiyun 	{ 0x01, 0x00 },
231*4882a593Smuzhiyun 	{ 0x13, 0x00 }
232*4882a593Smuzhiyun };
233*4882a593Smuzhiyun 
mxl301rf_sleep(struct dvb_frontend * fe)234*4882a593Smuzhiyun static int mxl301rf_sleep(struct dvb_frontend *fe)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun 	struct mxl301rf_state *state;
237*4882a593Smuzhiyun 	int ret;
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	state = fe->tuner_priv;
240*4882a593Smuzhiyun 	ret = raw_write(state, (u8 *)standby_data, sizeof(standby_data));
241*4882a593Smuzhiyun 	if (ret < 0)
242*4882a593Smuzhiyun 		dev_warn(&state->i2c->dev, "(%s) failed. [adap%d-fe%d]\n",
243*4882a593Smuzhiyun 			__func__, fe->dvb->num, fe->id);
244*4882a593Smuzhiyun 	return ret;
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun /* init sequence is not public.
249*4882a593Smuzhiyun  * the parent must have init'ed the device.
250*4882a593Smuzhiyun  * just wake up here.
251*4882a593Smuzhiyun  */
mxl301rf_init(struct dvb_frontend * fe)252*4882a593Smuzhiyun static int mxl301rf_init(struct dvb_frontend *fe)
253*4882a593Smuzhiyun {
254*4882a593Smuzhiyun 	struct mxl301rf_state *state;
255*4882a593Smuzhiyun 	int ret;
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	state = fe->tuner_priv;
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	ret = reg_write(state, 0x01, 0x01);
260*4882a593Smuzhiyun 	if (ret < 0) {
261*4882a593Smuzhiyun 		dev_warn(&state->i2c->dev, "(%s) failed. [adap%d-fe%d]\n",
262*4882a593Smuzhiyun 			 __func__, fe->dvb->num, fe->id);
263*4882a593Smuzhiyun 		return ret;
264*4882a593Smuzhiyun 	}
265*4882a593Smuzhiyun 	return 0;
266*4882a593Smuzhiyun }
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun /* I2C driver functions */
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun static const struct dvb_tuner_ops mxl301rf_ops = {
271*4882a593Smuzhiyun 	.info = {
272*4882a593Smuzhiyun 		.name = "MaxLinear MxL301RF",
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 		.frequency_min_hz =  93 * MHz,
275*4882a593Smuzhiyun 		.frequency_max_hz = 803 * MHz + 142857,
276*4882a593Smuzhiyun 	},
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	.init = mxl301rf_init,
279*4882a593Smuzhiyun 	.sleep = mxl301rf_sleep,
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 	.set_params = mxl301rf_set_params,
282*4882a593Smuzhiyun 	.get_rf_strength = mxl301rf_get_rf_strength,
283*4882a593Smuzhiyun };
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 
mxl301rf_probe(struct i2c_client * client,const struct i2c_device_id * id)286*4882a593Smuzhiyun static int mxl301rf_probe(struct i2c_client *client,
287*4882a593Smuzhiyun 			  const struct i2c_device_id *id)
288*4882a593Smuzhiyun {
289*4882a593Smuzhiyun 	struct mxl301rf_state *state;
290*4882a593Smuzhiyun 	struct mxl301rf_config *cfg;
291*4882a593Smuzhiyun 	struct dvb_frontend *fe;
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 	state = kzalloc(sizeof(*state), GFP_KERNEL);
294*4882a593Smuzhiyun 	if (!state)
295*4882a593Smuzhiyun 		return -ENOMEM;
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	state->i2c = client;
298*4882a593Smuzhiyun 	cfg = client->dev.platform_data;
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun 	memcpy(&state->cfg, cfg, sizeof(state->cfg));
301*4882a593Smuzhiyun 	fe = cfg->fe;
302*4882a593Smuzhiyun 	fe->tuner_priv = state;
303*4882a593Smuzhiyun 	memcpy(&fe->ops.tuner_ops, &mxl301rf_ops, sizeof(mxl301rf_ops));
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	i2c_set_clientdata(client, &state->cfg);
306*4882a593Smuzhiyun 	dev_info(&client->dev, "MaxLinear MxL301RF attached.\n");
307*4882a593Smuzhiyun 	return 0;
308*4882a593Smuzhiyun }
309*4882a593Smuzhiyun 
mxl301rf_remove(struct i2c_client * client)310*4882a593Smuzhiyun static int mxl301rf_remove(struct i2c_client *client)
311*4882a593Smuzhiyun {
312*4882a593Smuzhiyun 	struct mxl301rf_state *state;
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun 	state = cfg_to_state(i2c_get_clientdata(client));
315*4882a593Smuzhiyun 	state->cfg.fe->tuner_priv = NULL;
316*4882a593Smuzhiyun 	kfree(state);
317*4882a593Smuzhiyun 	return 0;
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun static const struct i2c_device_id mxl301rf_id[] = {
322*4882a593Smuzhiyun 	{"mxl301rf", 0},
323*4882a593Smuzhiyun 	{}
324*4882a593Smuzhiyun };
325*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, mxl301rf_id);
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun static struct i2c_driver mxl301rf_driver = {
328*4882a593Smuzhiyun 	.driver = {
329*4882a593Smuzhiyun 		.name	= "mxl301rf",
330*4882a593Smuzhiyun 	},
331*4882a593Smuzhiyun 	.probe		= mxl301rf_probe,
332*4882a593Smuzhiyun 	.remove		= mxl301rf_remove,
333*4882a593Smuzhiyun 	.id_table	= mxl301rf_id,
334*4882a593Smuzhiyun };
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun module_i2c_driver(mxl301rf_driver);
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun MODULE_DESCRIPTION("MaxLinear MXL301RF tuner");
339*4882a593Smuzhiyun MODULE_AUTHOR("Akihiro TSUKADA");
340*4882a593Smuzhiyun MODULE_LICENSE("GPL");
341