1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * FCI FC2580 silicon tuner driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include "fc2580_priv.h"
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun /*
11*4882a593Smuzhiyun * TODO:
12*4882a593Smuzhiyun * I2C write and read works only for one single register. Multiple registers
13*4882a593Smuzhiyun * could not be accessed using normal register address auto-increment.
14*4882a593Smuzhiyun * There could be (very likely) register to change that behavior....
15*4882a593Smuzhiyun */
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun /* write single register conditionally only when value differs from 0xff
18*4882a593Smuzhiyun * XXX: This is special routine meant only for writing fc2580_freq_regs_lut[]
19*4882a593Smuzhiyun * values. Do not use for the other purposes. */
fc2580_wr_reg_ff(struct fc2580_dev * dev,u8 reg,u8 val)20*4882a593Smuzhiyun static int fc2580_wr_reg_ff(struct fc2580_dev *dev, u8 reg, u8 val)
21*4882a593Smuzhiyun {
22*4882a593Smuzhiyun if (val == 0xff)
23*4882a593Smuzhiyun return 0;
24*4882a593Smuzhiyun else
25*4882a593Smuzhiyun return regmap_write(dev->regmap, reg, val);
26*4882a593Smuzhiyun }
27*4882a593Smuzhiyun
fc2580_set_params(struct fc2580_dev * dev)28*4882a593Smuzhiyun static int fc2580_set_params(struct fc2580_dev *dev)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun struct i2c_client *client = dev->client;
31*4882a593Smuzhiyun int ret, i;
32*4882a593Smuzhiyun unsigned int uitmp, div_ref, div_ref_val, div_n, k, k_cw, div_out;
33*4882a593Smuzhiyun u64 f_vco;
34*4882a593Smuzhiyun u8 synth_config;
35*4882a593Smuzhiyun unsigned long timeout;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun if (!dev->active) {
38*4882a593Smuzhiyun dev_dbg(&client->dev, "tuner is sleeping\n");
39*4882a593Smuzhiyun return 0;
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun /*
43*4882a593Smuzhiyun * Fractional-N synthesizer
44*4882a593Smuzhiyun *
45*4882a593Smuzhiyun * +---------------------------------------+
46*4882a593Smuzhiyun * v |
47*4882a593Smuzhiyun * Fref +----+ +----+ +-------+ +----+ +------+ +---+
48*4882a593Smuzhiyun * ------> | /R | --> | PD | --> | VCO | ------> | /2 | --> | /N.F | <-- | K |
49*4882a593Smuzhiyun * +----+ +----+ +-------+ +----+ +------+ +---+
50*4882a593Smuzhiyun * |
51*4882a593Smuzhiyun * |
52*4882a593Smuzhiyun * v
53*4882a593Smuzhiyun * +-------+ Fout
54*4882a593Smuzhiyun * | /Rout | ------>
55*4882a593Smuzhiyun * +-------+
56*4882a593Smuzhiyun */
57*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(fc2580_pll_lut); i++) {
58*4882a593Smuzhiyun if (dev->f_frequency <= fc2580_pll_lut[i].freq)
59*4882a593Smuzhiyun break;
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun if (i == ARRAY_SIZE(fc2580_pll_lut)) {
62*4882a593Smuzhiyun ret = -EINVAL;
63*4882a593Smuzhiyun goto err;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun #define DIV_PRE_N 2
67*4882a593Smuzhiyun #define F_REF dev->clk
68*4882a593Smuzhiyun div_out = fc2580_pll_lut[i].div_out;
69*4882a593Smuzhiyun f_vco = (u64) dev->f_frequency * div_out;
70*4882a593Smuzhiyun synth_config = fc2580_pll_lut[i].band;
71*4882a593Smuzhiyun if (f_vco < 2600000000ULL)
72*4882a593Smuzhiyun synth_config |= 0x06;
73*4882a593Smuzhiyun else
74*4882a593Smuzhiyun synth_config |= 0x0e;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun /* select reference divider R (keep PLL div N in valid range) */
77*4882a593Smuzhiyun #define DIV_N_MIN 76
78*4882a593Smuzhiyun if (f_vco >= div_u64((u64) DIV_PRE_N * DIV_N_MIN * F_REF, 1)) {
79*4882a593Smuzhiyun div_ref = 1;
80*4882a593Smuzhiyun div_ref_val = 0x00;
81*4882a593Smuzhiyun } else if (f_vco >= div_u64((u64) DIV_PRE_N * DIV_N_MIN * F_REF, 2)) {
82*4882a593Smuzhiyun div_ref = 2;
83*4882a593Smuzhiyun div_ref_val = 0x10;
84*4882a593Smuzhiyun } else {
85*4882a593Smuzhiyun div_ref = 4;
86*4882a593Smuzhiyun div_ref_val = 0x20;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun /* calculate PLL integer and fractional control word */
90*4882a593Smuzhiyun uitmp = DIV_PRE_N * F_REF / div_ref;
91*4882a593Smuzhiyun div_n = div_u64_rem(f_vco, uitmp, &k);
92*4882a593Smuzhiyun k_cw = div_u64((u64) k * 0x100000, uitmp);
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun dev_dbg(&client->dev,
95*4882a593Smuzhiyun "frequency=%u bandwidth=%u f_vco=%llu F_REF=%u div_ref=%u div_n=%u k=%u div_out=%u k_cw=%0x\n",
96*4882a593Smuzhiyun dev->f_frequency, dev->f_bandwidth, f_vco, F_REF, div_ref,
97*4882a593Smuzhiyun div_n, k, div_out, k_cw);
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun ret = regmap_write(dev->regmap, 0x02, synth_config);
100*4882a593Smuzhiyun if (ret)
101*4882a593Smuzhiyun goto err;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun ret = regmap_write(dev->regmap, 0x18, div_ref_val << 0 | k_cw >> 16);
104*4882a593Smuzhiyun if (ret)
105*4882a593Smuzhiyun goto err;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun ret = regmap_write(dev->regmap, 0x1a, (k_cw >> 8) & 0xff);
108*4882a593Smuzhiyun if (ret)
109*4882a593Smuzhiyun goto err;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun ret = regmap_write(dev->regmap, 0x1b, (k_cw >> 0) & 0xff);
112*4882a593Smuzhiyun if (ret)
113*4882a593Smuzhiyun goto err;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun ret = regmap_write(dev->regmap, 0x1c, div_n);
116*4882a593Smuzhiyun if (ret)
117*4882a593Smuzhiyun goto err;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun /* registers */
120*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(fc2580_freq_regs_lut); i++) {
121*4882a593Smuzhiyun if (dev->f_frequency <= fc2580_freq_regs_lut[i].freq)
122*4882a593Smuzhiyun break;
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun if (i == ARRAY_SIZE(fc2580_freq_regs_lut)) {
125*4882a593Smuzhiyun ret = -EINVAL;
126*4882a593Smuzhiyun goto err;
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun ret = fc2580_wr_reg_ff(dev, 0x25, fc2580_freq_regs_lut[i].r25_val);
130*4882a593Smuzhiyun if (ret)
131*4882a593Smuzhiyun goto err;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun ret = fc2580_wr_reg_ff(dev, 0x27, fc2580_freq_regs_lut[i].r27_val);
134*4882a593Smuzhiyun if (ret)
135*4882a593Smuzhiyun goto err;
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun ret = fc2580_wr_reg_ff(dev, 0x28, fc2580_freq_regs_lut[i].r28_val);
138*4882a593Smuzhiyun if (ret)
139*4882a593Smuzhiyun goto err;
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun ret = fc2580_wr_reg_ff(dev, 0x29, fc2580_freq_regs_lut[i].r29_val);
142*4882a593Smuzhiyun if (ret)
143*4882a593Smuzhiyun goto err;
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun ret = fc2580_wr_reg_ff(dev, 0x2b, fc2580_freq_regs_lut[i].r2b_val);
146*4882a593Smuzhiyun if (ret)
147*4882a593Smuzhiyun goto err;
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun ret = fc2580_wr_reg_ff(dev, 0x2c, fc2580_freq_regs_lut[i].r2c_val);
150*4882a593Smuzhiyun if (ret)
151*4882a593Smuzhiyun goto err;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun ret = fc2580_wr_reg_ff(dev, 0x2d, fc2580_freq_regs_lut[i].r2d_val);
154*4882a593Smuzhiyun if (ret)
155*4882a593Smuzhiyun goto err;
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun ret = fc2580_wr_reg_ff(dev, 0x30, fc2580_freq_regs_lut[i].r30_val);
158*4882a593Smuzhiyun if (ret)
159*4882a593Smuzhiyun goto err;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun ret = fc2580_wr_reg_ff(dev, 0x44, fc2580_freq_regs_lut[i].r44_val);
162*4882a593Smuzhiyun if (ret)
163*4882a593Smuzhiyun goto err;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun ret = fc2580_wr_reg_ff(dev, 0x50, fc2580_freq_regs_lut[i].r50_val);
166*4882a593Smuzhiyun if (ret)
167*4882a593Smuzhiyun goto err;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun ret = fc2580_wr_reg_ff(dev, 0x53, fc2580_freq_regs_lut[i].r53_val);
170*4882a593Smuzhiyun if (ret)
171*4882a593Smuzhiyun goto err;
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun ret = fc2580_wr_reg_ff(dev, 0x5f, fc2580_freq_regs_lut[i].r5f_val);
174*4882a593Smuzhiyun if (ret)
175*4882a593Smuzhiyun goto err;
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun ret = fc2580_wr_reg_ff(dev, 0x61, fc2580_freq_regs_lut[i].r61_val);
178*4882a593Smuzhiyun if (ret)
179*4882a593Smuzhiyun goto err;
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun ret = fc2580_wr_reg_ff(dev, 0x62, fc2580_freq_regs_lut[i].r62_val);
182*4882a593Smuzhiyun if (ret)
183*4882a593Smuzhiyun goto err;
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun ret = fc2580_wr_reg_ff(dev, 0x63, fc2580_freq_regs_lut[i].r63_val);
186*4882a593Smuzhiyun if (ret)
187*4882a593Smuzhiyun goto err;
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun ret = fc2580_wr_reg_ff(dev, 0x67, fc2580_freq_regs_lut[i].r67_val);
190*4882a593Smuzhiyun if (ret)
191*4882a593Smuzhiyun goto err;
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun ret = fc2580_wr_reg_ff(dev, 0x68, fc2580_freq_regs_lut[i].r68_val);
194*4882a593Smuzhiyun if (ret)
195*4882a593Smuzhiyun goto err;
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun ret = fc2580_wr_reg_ff(dev, 0x69, fc2580_freq_regs_lut[i].r69_val);
198*4882a593Smuzhiyun if (ret)
199*4882a593Smuzhiyun goto err;
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun ret = fc2580_wr_reg_ff(dev, 0x6a, fc2580_freq_regs_lut[i].r6a_val);
202*4882a593Smuzhiyun if (ret)
203*4882a593Smuzhiyun goto err;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun ret = fc2580_wr_reg_ff(dev, 0x6b, fc2580_freq_regs_lut[i].r6b_val);
206*4882a593Smuzhiyun if (ret)
207*4882a593Smuzhiyun goto err;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun ret = fc2580_wr_reg_ff(dev, 0x6c, fc2580_freq_regs_lut[i].r6c_val);
210*4882a593Smuzhiyun if (ret)
211*4882a593Smuzhiyun goto err;
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun ret = fc2580_wr_reg_ff(dev, 0x6d, fc2580_freq_regs_lut[i].r6d_val);
214*4882a593Smuzhiyun if (ret)
215*4882a593Smuzhiyun goto err;
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun ret = fc2580_wr_reg_ff(dev, 0x6e, fc2580_freq_regs_lut[i].r6e_val);
218*4882a593Smuzhiyun if (ret)
219*4882a593Smuzhiyun goto err;
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun ret = fc2580_wr_reg_ff(dev, 0x6f, fc2580_freq_regs_lut[i].r6f_val);
222*4882a593Smuzhiyun if (ret)
223*4882a593Smuzhiyun goto err;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun /* IF filters */
226*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(fc2580_if_filter_lut); i++) {
227*4882a593Smuzhiyun if (dev->f_bandwidth <= fc2580_if_filter_lut[i].freq)
228*4882a593Smuzhiyun break;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun if (i == ARRAY_SIZE(fc2580_if_filter_lut)) {
231*4882a593Smuzhiyun ret = -EINVAL;
232*4882a593Smuzhiyun goto err;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun ret = regmap_write(dev->regmap, 0x36, fc2580_if_filter_lut[i].r36_val);
236*4882a593Smuzhiyun if (ret)
237*4882a593Smuzhiyun goto err;
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun uitmp = (unsigned int) 8058000 - (dev->f_bandwidth * 122 / 100 / 2);
240*4882a593Smuzhiyun uitmp = div64_u64((u64) dev->clk * uitmp, 1000000000000ULL);
241*4882a593Smuzhiyun ret = regmap_write(dev->regmap, 0x37, uitmp);
242*4882a593Smuzhiyun if (ret)
243*4882a593Smuzhiyun goto err;
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun ret = regmap_write(dev->regmap, 0x39, fc2580_if_filter_lut[i].r39_val);
246*4882a593Smuzhiyun if (ret)
247*4882a593Smuzhiyun goto err;
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun timeout = jiffies + msecs_to_jiffies(30);
250*4882a593Smuzhiyun for (uitmp = ~0xc0; !time_after(jiffies, timeout) && uitmp != 0xc0;) {
251*4882a593Smuzhiyun /* trigger filter */
252*4882a593Smuzhiyun ret = regmap_write(dev->regmap, 0x2e, 0x09);
253*4882a593Smuzhiyun if (ret)
254*4882a593Smuzhiyun goto err;
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun /* locked when [7:6] are set (val: d7 6MHz, d5 7MHz, cd 8MHz) */
257*4882a593Smuzhiyun ret = regmap_read(dev->regmap, 0x2f, &uitmp);
258*4882a593Smuzhiyun if (ret)
259*4882a593Smuzhiyun goto err;
260*4882a593Smuzhiyun uitmp &= 0xc0;
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun ret = regmap_write(dev->regmap, 0x2e, 0x01);
263*4882a593Smuzhiyun if (ret)
264*4882a593Smuzhiyun goto err;
265*4882a593Smuzhiyun }
266*4882a593Smuzhiyun if (uitmp != 0xc0)
267*4882a593Smuzhiyun dev_dbg(&client->dev, "filter did not lock %02x\n", uitmp);
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun return 0;
270*4882a593Smuzhiyun err:
271*4882a593Smuzhiyun dev_dbg(&client->dev, "failed=%d\n", ret);
272*4882a593Smuzhiyun return ret;
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun
fc2580_init(struct fc2580_dev * dev)275*4882a593Smuzhiyun static int fc2580_init(struct fc2580_dev *dev)
276*4882a593Smuzhiyun {
277*4882a593Smuzhiyun struct i2c_client *client = dev->client;
278*4882a593Smuzhiyun int ret, i;
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun dev_dbg(&client->dev, "\n");
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(fc2580_init_reg_vals); i++) {
283*4882a593Smuzhiyun ret = regmap_write(dev->regmap, fc2580_init_reg_vals[i].reg,
284*4882a593Smuzhiyun fc2580_init_reg_vals[i].val);
285*4882a593Smuzhiyun if (ret)
286*4882a593Smuzhiyun goto err;
287*4882a593Smuzhiyun }
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun dev->active = true;
290*4882a593Smuzhiyun return 0;
291*4882a593Smuzhiyun err:
292*4882a593Smuzhiyun dev_dbg(&client->dev, "failed=%d\n", ret);
293*4882a593Smuzhiyun return ret;
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun
fc2580_sleep(struct fc2580_dev * dev)296*4882a593Smuzhiyun static int fc2580_sleep(struct fc2580_dev *dev)
297*4882a593Smuzhiyun {
298*4882a593Smuzhiyun struct i2c_client *client = dev->client;
299*4882a593Smuzhiyun int ret;
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun dev_dbg(&client->dev, "\n");
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun dev->active = false;
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun ret = regmap_write(dev->regmap, 0x02, 0x0a);
306*4882a593Smuzhiyun if (ret)
307*4882a593Smuzhiyun goto err;
308*4882a593Smuzhiyun return 0;
309*4882a593Smuzhiyun err:
310*4882a593Smuzhiyun dev_dbg(&client->dev, "failed=%d\n", ret);
311*4882a593Smuzhiyun return ret;
312*4882a593Smuzhiyun }
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun /*
315*4882a593Smuzhiyun * DVB API
316*4882a593Smuzhiyun */
fc2580_dvb_set_params(struct dvb_frontend * fe)317*4882a593Smuzhiyun static int fc2580_dvb_set_params(struct dvb_frontend *fe)
318*4882a593Smuzhiyun {
319*4882a593Smuzhiyun struct fc2580_dev *dev = fe->tuner_priv;
320*4882a593Smuzhiyun struct dtv_frontend_properties *c = &fe->dtv_property_cache;
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun dev->f_frequency = c->frequency;
323*4882a593Smuzhiyun dev->f_bandwidth = c->bandwidth_hz;
324*4882a593Smuzhiyun return fc2580_set_params(dev);
325*4882a593Smuzhiyun }
326*4882a593Smuzhiyun
fc2580_dvb_init(struct dvb_frontend * fe)327*4882a593Smuzhiyun static int fc2580_dvb_init(struct dvb_frontend *fe)
328*4882a593Smuzhiyun {
329*4882a593Smuzhiyun return fc2580_init(fe->tuner_priv);
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun
fc2580_dvb_sleep(struct dvb_frontend * fe)332*4882a593Smuzhiyun static int fc2580_dvb_sleep(struct dvb_frontend *fe)
333*4882a593Smuzhiyun {
334*4882a593Smuzhiyun return fc2580_sleep(fe->tuner_priv);
335*4882a593Smuzhiyun }
336*4882a593Smuzhiyun
fc2580_dvb_get_if_frequency(struct dvb_frontend * fe,u32 * frequency)337*4882a593Smuzhiyun static int fc2580_dvb_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
338*4882a593Smuzhiyun {
339*4882a593Smuzhiyun *frequency = 0; /* Zero-IF */
340*4882a593Smuzhiyun return 0;
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun static const struct dvb_tuner_ops fc2580_dvb_tuner_ops = {
344*4882a593Smuzhiyun .info = {
345*4882a593Smuzhiyun .name = "FCI FC2580",
346*4882a593Smuzhiyun .frequency_min_hz = 174 * MHz,
347*4882a593Smuzhiyun .frequency_max_hz = 862 * MHz,
348*4882a593Smuzhiyun },
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun .init = fc2580_dvb_init,
351*4882a593Smuzhiyun .sleep = fc2580_dvb_sleep,
352*4882a593Smuzhiyun .set_params = fc2580_dvb_set_params,
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun .get_if_frequency = fc2580_dvb_get_if_frequency,
355*4882a593Smuzhiyun };
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun /*
358*4882a593Smuzhiyun * V4L2 API
359*4882a593Smuzhiyun */
360*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_VIDEO_V4L2)
361*4882a593Smuzhiyun static const struct v4l2_frequency_band bands[] = {
362*4882a593Smuzhiyun {
363*4882a593Smuzhiyun .type = V4L2_TUNER_RF,
364*4882a593Smuzhiyun .index = 0,
365*4882a593Smuzhiyun .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
366*4882a593Smuzhiyun .rangelow = 130000000,
367*4882a593Smuzhiyun .rangehigh = 2000000000,
368*4882a593Smuzhiyun },
369*4882a593Smuzhiyun };
370*4882a593Smuzhiyun
fc2580_subdev_to_dev(struct v4l2_subdev * sd)371*4882a593Smuzhiyun static inline struct fc2580_dev *fc2580_subdev_to_dev(struct v4l2_subdev *sd)
372*4882a593Smuzhiyun {
373*4882a593Smuzhiyun return container_of(sd, struct fc2580_dev, subdev);
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun
fc2580_standby(struct v4l2_subdev * sd)376*4882a593Smuzhiyun static int fc2580_standby(struct v4l2_subdev *sd)
377*4882a593Smuzhiyun {
378*4882a593Smuzhiyun struct fc2580_dev *dev = fc2580_subdev_to_dev(sd);
379*4882a593Smuzhiyun int ret;
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun ret = fc2580_sleep(dev);
382*4882a593Smuzhiyun if (ret)
383*4882a593Smuzhiyun return ret;
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun return fc2580_set_params(dev);
386*4882a593Smuzhiyun }
387*4882a593Smuzhiyun
fc2580_g_tuner(struct v4l2_subdev * sd,struct v4l2_tuner * v)388*4882a593Smuzhiyun static int fc2580_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *v)
389*4882a593Smuzhiyun {
390*4882a593Smuzhiyun struct fc2580_dev *dev = fc2580_subdev_to_dev(sd);
391*4882a593Smuzhiyun struct i2c_client *client = dev->client;
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun dev_dbg(&client->dev, "index=%d\n", v->index);
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun strscpy(v->name, "FCI FC2580", sizeof(v->name));
396*4882a593Smuzhiyun v->type = V4L2_TUNER_RF;
397*4882a593Smuzhiyun v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS;
398*4882a593Smuzhiyun v->rangelow = bands[0].rangelow;
399*4882a593Smuzhiyun v->rangehigh = bands[0].rangehigh;
400*4882a593Smuzhiyun return 0;
401*4882a593Smuzhiyun }
402*4882a593Smuzhiyun
fc2580_s_tuner(struct v4l2_subdev * sd,const struct v4l2_tuner * v)403*4882a593Smuzhiyun static int fc2580_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *v)
404*4882a593Smuzhiyun {
405*4882a593Smuzhiyun struct fc2580_dev *dev = fc2580_subdev_to_dev(sd);
406*4882a593Smuzhiyun struct i2c_client *client = dev->client;
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun dev_dbg(&client->dev, "index=%d\n", v->index);
409*4882a593Smuzhiyun return 0;
410*4882a593Smuzhiyun }
411*4882a593Smuzhiyun
fc2580_g_frequency(struct v4l2_subdev * sd,struct v4l2_frequency * f)412*4882a593Smuzhiyun static int fc2580_g_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f)
413*4882a593Smuzhiyun {
414*4882a593Smuzhiyun struct fc2580_dev *dev = fc2580_subdev_to_dev(sd);
415*4882a593Smuzhiyun struct i2c_client *client = dev->client;
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun dev_dbg(&client->dev, "tuner=%d\n", f->tuner);
418*4882a593Smuzhiyun f->frequency = dev->f_frequency;
419*4882a593Smuzhiyun return 0;
420*4882a593Smuzhiyun }
421*4882a593Smuzhiyun
fc2580_s_frequency(struct v4l2_subdev * sd,const struct v4l2_frequency * f)422*4882a593Smuzhiyun static int fc2580_s_frequency(struct v4l2_subdev *sd,
423*4882a593Smuzhiyun const struct v4l2_frequency *f)
424*4882a593Smuzhiyun {
425*4882a593Smuzhiyun struct fc2580_dev *dev = fc2580_subdev_to_dev(sd);
426*4882a593Smuzhiyun struct i2c_client *client = dev->client;
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun dev_dbg(&client->dev, "tuner=%d type=%d frequency=%u\n",
429*4882a593Smuzhiyun f->tuner, f->type, f->frequency);
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun dev->f_frequency = clamp_t(unsigned int, f->frequency,
432*4882a593Smuzhiyun bands[0].rangelow, bands[0].rangehigh);
433*4882a593Smuzhiyun return fc2580_set_params(dev);
434*4882a593Smuzhiyun }
435*4882a593Smuzhiyun
fc2580_enum_freq_bands(struct v4l2_subdev * sd,struct v4l2_frequency_band * band)436*4882a593Smuzhiyun static int fc2580_enum_freq_bands(struct v4l2_subdev *sd,
437*4882a593Smuzhiyun struct v4l2_frequency_band *band)
438*4882a593Smuzhiyun {
439*4882a593Smuzhiyun struct fc2580_dev *dev = fc2580_subdev_to_dev(sd);
440*4882a593Smuzhiyun struct i2c_client *client = dev->client;
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun dev_dbg(&client->dev, "tuner=%d type=%d index=%d\n",
443*4882a593Smuzhiyun band->tuner, band->type, band->index);
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun if (band->index >= ARRAY_SIZE(bands))
446*4882a593Smuzhiyun return -EINVAL;
447*4882a593Smuzhiyun
448*4882a593Smuzhiyun band->capability = bands[band->index].capability;
449*4882a593Smuzhiyun band->rangelow = bands[band->index].rangelow;
450*4882a593Smuzhiyun band->rangehigh = bands[band->index].rangehigh;
451*4882a593Smuzhiyun return 0;
452*4882a593Smuzhiyun }
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun static const struct v4l2_subdev_tuner_ops fc2580_subdev_tuner_ops = {
455*4882a593Smuzhiyun .standby = fc2580_standby,
456*4882a593Smuzhiyun .g_tuner = fc2580_g_tuner,
457*4882a593Smuzhiyun .s_tuner = fc2580_s_tuner,
458*4882a593Smuzhiyun .g_frequency = fc2580_g_frequency,
459*4882a593Smuzhiyun .s_frequency = fc2580_s_frequency,
460*4882a593Smuzhiyun .enum_freq_bands = fc2580_enum_freq_bands,
461*4882a593Smuzhiyun };
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun static const struct v4l2_subdev_ops fc2580_subdev_ops = {
464*4882a593Smuzhiyun .tuner = &fc2580_subdev_tuner_ops,
465*4882a593Smuzhiyun };
466*4882a593Smuzhiyun
fc2580_s_ctrl(struct v4l2_ctrl * ctrl)467*4882a593Smuzhiyun static int fc2580_s_ctrl(struct v4l2_ctrl *ctrl)
468*4882a593Smuzhiyun {
469*4882a593Smuzhiyun struct fc2580_dev *dev = container_of(ctrl->handler, struct fc2580_dev, hdl);
470*4882a593Smuzhiyun struct i2c_client *client = dev->client;
471*4882a593Smuzhiyun int ret;
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun dev_dbg(&client->dev, "ctrl: id=%d name=%s cur.val=%d val=%d\n",
474*4882a593Smuzhiyun ctrl->id, ctrl->name, ctrl->cur.val, ctrl->val);
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun switch (ctrl->id) {
477*4882a593Smuzhiyun case V4L2_CID_RF_TUNER_BANDWIDTH_AUTO:
478*4882a593Smuzhiyun case V4L2_CID_RF_TUNER_BANDWIDTH:
479*4882a593Smuzhiyun /*
480*4882a593Smuzhiyun * TODO: Auto logic does not work 100% correctly as tuner driver
481*4882a593Smuzhiyun * do not have information to calculate maximum suitable
482*4882a593Smuzhiyun * bandwidth. Calculating it is responsible of master driver.
483*4882a593Smuzhiyun */
484*4882a593Smuzhiyun dev->f_bandwidth = dev->bandwidth->val;
485*4882a593Smuzhiyun ret = fc2580_set_params(dev);
486*4882a593Smuzhiyun break;
487*4882a593Smuzhiyun default:
488*4882a593Smuzhiyun dev_dbg(&client->dev, "unknown ctrl");
489*4882a593Smuzhiyun ret = -EINVAL;
490*4882a593Smuzhiyun }
491*4882a593Smuzhiyun return ret;
492*4882a593Smuzhiyun }
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun static const struct v4l2_ctrl_ops fc2580_ctrl_ops = {
495*4882a593Smuzhiyun .s_ctrl = fc2580_s_ctrl,
496*4882a593Smuzhiyun };
497*4882a593Smuzhiyun #endif
498*4882a593Smuzhiyun
fc2580_get_v4l2_subdev(struct i2c_client * client)499*4882a593Smuzhiyun static struct v4l2_subdev *fc2580_get_v4l2_subdev(struct i2c_client *client)
500*4882a593Smuzhiyun {
501*4882a593Smuzhiyun struct fc2580_dev *dev = i2c_get_clientdata(client);
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun if (dev->subdev.ops)
504*4882a593Smuzhiyun return &dev->subdev;
505*4882a593Smuzhiyun else
506*4882a593Smuzhiyun return NULL;
507*4882a593Smuzhiyun }
508*4882a593Smuzhiyun
fc2580_probe(struct i2c_client * client,const struct i2c_device_id * id)509*4882a593Smuzhiyun static int fc2580_probe(struct i2c_client *client,
510*4882a593Smuzhiyun const struct i2c_device_id *id)
511*4882a593Smuzhiyun {
512*4882a593Smuzhiyun struct fc2580_dev *dev;
513*4882a593Smuzhiyun struct fc2580_platform_data *pdata = client->dev.platform_data;
514*4882a593Smuzhiyun struct dvb_frontend *fe = pdata->dvb_frontend;
515*4882a593Smuzhiyun int ret;
516*4882a593Smuzhiyun unsigned int uitmp;
517*4882a593Smuzhiyun static const struct regmap_config regmap_config = {
518*4882a593Smuzhiyun .reg_bits = 8,
519*4882a593Smuzhiyun .val_bits = 8,
520*4882a593Smuzhiyun };
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun dev = kzalloc(sizeof(*dev), GFP_KERNEL);
523*4882a593Smuzhiyun if (!dev) {
524*4882a593Smuzhiyun ret = -ENOMEM;
525*4882a593Smuzhiyun goto err;
526*4882a593Smuzhiyun }
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun if (pdata->clk)
529*4882a593Smuzhiyun dev->clk = pdata->clk;
530*4882a593Smuzhiyun else
531*4882a593Smuzhiyun dev->clk = 16384000; /* internal clock */
532*4882a593Smuzhiyun dev->client = client;
533*4882a593Smuzhiyun dev->regmap = devm_regmap_init_i2c(client, ®map_config);
534*4882a593Smuzhiyun if (IS_ERR(dev->regmap)) {
535*4882a593Smuzhiyun ret = PTR_ERR(dev->regmap);
536*4882a593Smuzhiyun goto err_kfree;
537*4882a593Smuzhiyun }
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun /* check if the tuner is there */
540*4882a593Smuzhiyun ret = regmap_read(dev->regmap, 0x01, &uitmp);
541*4882a593Smuzhiyun if (ret)
542*4882a593Smuzhiyun goto err_kfree;
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun dev_dbg(&client->dev, "chip_id=%02x\n", uitmp);
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun switch (uitmp) {
547*4882a593Smuzhiyun case 0x56:
548*4882a593Smuzhiyun case 0x5a:
549*4882a593Smuzhiyun break;
550*4882a593Smuzhiyun default:
551*4882a593Smuzhiyun ret = -ENODEV;
552*4882a593Smuzhiyun goto err_kfree;
553*4882a593Smuzhiyun }
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_VIDEO_V4L2)
556*4882a593Smuzhiyun /* Register controls */
557*4882a593Smuzhiyun v4l2_ctrl_handler_init(&dev->hdl, 2);
558*4882a593Smuzhiyun dev->bandwidth_auto = v4l2_ctrl_new_std(&dev->hdl, &fc2580_ctrl_ops,
559*4882a593Smuzhiyun V4L2_CID_RF_TUNER_BANDWIDTH_AUTO,
560*4882a593Smuzhiyun 0, 1, 1, 1);
561*4882a593Smuzhiyun dev->bandwidth = v4l2_ctrl_new_std(&dev->hdl, &fc2580_ctrl_ops,
562*4882a593Smuzhiyun V4L2_CID_RF_TUNER_BANDWIDTH,
563*4882a593Smuzhiyun 3000, 10000000, 1, 3000);
564*4882a593Smuzhiyun v4l2_ctrl_auto_cluster(2, &dev->bandwidth_auto, 0, false);
565*4882a593Smuzhiyun if (dev->hdl.error) {
566*4882a593Smuzhiyun ret = dev->hdl.error;
567*4882a593Smuzhiyun dev_err(&client->dev, "Could not initialize controls\n");
568*4882a593Smuzhiyun v4l2_ctrl_handler_free(&dev->hdl);
569*4882a593Smuzhiyun goto err_kfree;
570*4882a593Smuzhiyun }
571*4882a593Smuzhiyun dev->subdev.ctrl_handler = &dev->hdl;
572*4882a593Smuzhiyun dev->f_frequency = bands[0].rangelow;
573*4882a593Smuzhiyun dev->f_bandwidth = dev->bandwidth->val;
574*4882a593Smuzhiyun v4l2_i2c_subdev_init(&dev->subdev, client, &fc2580_subdev_ops);
575*4882a593Smuzhiyun #endif
576*4882a593Smuzhiyun fe->tuner_priv = dev;
577*4882a593Smuzhiyun memcpy(&fe->ops.tuner_ops, &fc2580_dvb_tuner_ops,
578*4882a593Smuzhiyun sizeof(fe->ops.tuner_ops));
579*4882a593Smuzhiyun pdata->get_v4l2_subdev = fc2580_get_v4l2_subdev;
580*4882a593Smuzhiyun i2c_set_clientdata(client, dev);
581*4882a593Smuzhiyun
582*4882a593Smuzhiyun dev_info(&client->dev, "FCI FC2580 successfully identified\n");
583*4882a593Smuzhiyun return 0;
584*4882a593Smuzhiyun err_kfree:
585*4882a593Smuzhiyun kfree(dev);
586*4882a593Smuzhiyun err:
587*4882a593Smuzhiyun dev_dbg(&client->dev, "failed=%d\n", ret);
588*4882a593Smuzhiyun return ret;
589*4882a593Smuzhiyun }
590*4882a593Smuzhiyun
fc2580_remove(struct i2c_client * client)591*4882a593Smuzhiyun static int fc2580_remove(struct i2c_client *client)
592*4882a593Smuzhiyun {
593*4882a593Smuzhiyun struct fc2580_dev *dev = i2c_get_clientdata(client);
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun dev_dbg(&client->dev, "\n");
596*4882a593Smuzhiyun
597*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_VIDEO_V4L2)
598*4882a593Smuzhiyun v4l2_ctrl_handler_free(&dev->hdl);
599*4882a593Smuzhiyun #endif
600*4882a593Smuzhiyun kfree(dev);
601*4882a593Smuzhiyun return 0;
602*4882a593Smuzhiyun }
603*4882a593Smuzhiyun
604*4882a593Smuzhiyun static const struct i2c_device_id fc2580_id_table[] = {
605*4882a593Smuzhiyun {"fc2580", 0},
606*4882a593Smuzhiyun {}
607*4882a593Smuzhiyun };
608*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, fc2580_id_table);
609*4882a593Smuzhiyun
610*4882a593Smuzhiyun static struct i2c_driver fc2580_driver = {
611*4882a593Smuzhiyun .driver = {
612*4882a593Smuzhiyun .name = "fc2580",
613*4882a593Smuzhiyun .suppress_bind_attrs = true,
614*4882a593Smuzhiyun },
615*4882a593Smuzhiyun .probe = fc2580_probe,
616*4882a593Smuzhiyun .remove = fc2580_remove,
617*4882a593Smuzhiyun .id_table = fc2580_id_table,
618*4882a593Smuzhiyun };
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun module_i2c_driver(fc2580_driver);
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun MODULE_DESCRIPTION("FCI FC2580 silicon tuner driver");
623*4882a593Smuzhiyun MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
624*4882a593Smuzhiyun MODULE_LICENSE("GPL");
625