xref: /OK3568_Linux_fs/kernel/drivers/media/rc/sir_ir.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * IR SIR driver, (C) 2000 Milan Pikula <www@fornax.sk>
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * sir_ir - Device driver for use with SIR (serial infra red)
6*4882a593Smuzhiyun  * mode of IrDA on many notebooks.
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/interrupt.h>
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/serial_reg.h>
15*4882a593Smuzhiyun #include <linux/ktime.h>
16*4882a593Smuzhiyun #include <linux/delay.h>
17*4882a593Smuzhiyun #include <linux/platform_device.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include <media/rc-core.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun /* SECTION: Definitions */
22*4882a593Smuzhiyun #define PULSE '['
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun /* 9bit * 1s/115200bit in milli seconds = 78.125ms*/
25*4882a593Smuzhiyun #define TIME_CONST (9000000ul / 115200ul)
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun /* timeout for sequences in jiffies (=5/100s), must be longer than TIME_CONST */
28*4882a593Smuzhiyun #define SIR_TIMEOUT	(HZ * 5 / 100)
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun /* onboard sir ports are typically com3 */
31*4882a593Smuzhiyun static int io = 0x3e8;
32*4882a593Smuzhiyun static int irq = 4;
33*4882a593Smuzhiyun static int threshold = 3;
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun static DEFINE_SPINLOCK(timer_lock);
36*4882a593Smuzhiyun static struct timer_list timerlist;
37*4882a593Smuzhiyun /* time of last signal change detected */
38*4882a593Smuzhiyun static ktime_t last;
39*4882a593Smuzhiyun /* time of last UART data ready interrupt */
40*4882a593Smuzhiyun static ktime_t last_intr_time;
41*4882a593Smuzhiyun static int last_value;
42*4882a593Smuzhiyun static struct rc_dev *rcdev;
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun static struct platform_device *sir_ir_dev;
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun static DEFINE_SPINLOCK(hardware_lock);
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun /* SECTION: Prototypes */
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun /* Communication with user-space */
51*4882a593Smuzhiyun static void add_read_queue(int flag, unsigned long val);
52*4882a593Smuzhiyun /* Hardware */
53*4882a593Smuzhiyun static irqreturn_t sir_interrupt(int irq, void *dev_id);
54*4882a593Smuzhiyun static void send_space(unsigned long len);
55*4882a593Smuzhiyun static void send_pulse(unsigned long len);
56*4882a593Smuzhiyun static int init_hardware(void);
57*4882a593Smuzhiyun static void drop_hardware(void);
58*4882a593Smuzhiyun /* Initialisation */
59*4882a593Smuzhiyun 
sinp(int offset)60*4882a593Smuzhiyun static inline unsigned int sinp(int offset)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun 	return inb(io + offset);
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun 
soutp(int offset,int value)65*4882a593Smuzhiyun static inline void soutp(int offset, int value)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun 	outb(value, io + offset);
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun /* SECTION: Communication with user-space */
sir_tx_ir(struct rc_dev * dev,unsigned int * tx_buf,unsigned int count)71*4882a593Smuzhiyun static int sir_tx_ir(struct rc_dev *dev, unsigned int *tx_buf,
72*4882a593Smuzhiyun 		     unsigned int count)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun 	unsigned long flags;
75*4882a593Smuzhiyun 	int i;
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	local_irq_save(flags);
78*4882a593Smuzhiyun 	for (i = 0; i < count;) {
79*4882a593Smuzhiyun 		if (tx_buf[i])
80*4882a593Smuzhiyun 			send_pulse(tx_buf[i]);
81*4882a593Smuzhiyun 		i++;
82*4882a593Smuzhiyun 		if (i >= count)
83*4882a593Smuzhiyun 			break;
84*4882a593Smuzhiyun 		if (tx_buf[i])
85*4882a593Smuzhiyun 			send_space(tx_buf[i]);
86*4882a593Smuzhiyun 		i++;
87*4882a593Smuzhiyun 	}
88*4882a593Smuzhiyun 	local_irq_restore(flags);
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	return count;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun 
add_read_queue(int flag,unsigned long val)93*4882a593Smuzhiyun static void add_read_queue(int flag, unsigned long val)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun 	struct ir_raw_event ev = {};
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	pr_debug("add flag %d with val %lu\n", flag, val);
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 	/*
100*4882a593Smuzhiyun 	 * statistically, pulses are ~TIME_CONST/2 too long. we could
101*4882a593Smuzhiyun 	 * maybe make this more exact, but this is good enough
102*4882a593Smuzhiyun 	 */
103*4882a593Smuzhiyun 	if (flag) {
104*4882a593Smuzhiyun 		/* pulse */
105*4882a593Smuzhiyun 		if (val > TIME_CONST / 2)
106*4882a593Smuzhiyun 			val -= TIME_CONST / 2;
107*4882a593Smuzhiyun 		else /* should not ever happen */
108*4882a593Smuzhiyun 			val = 1;
109*4882a593Smuzhiyun 		ev.pulse = true;
110*4882a593Smuzhiyun 	} else {
111*4882a593Smuzhiyun 		val += TIME_CONST / 2;
112*4882a593Smuzhiyun 	}
113*4882a593Smuzhiyun 	ev.duration = val;
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	ir_raw_event_store_with_filter(rcdev, &ev);
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun /* SECTION: Hardware */
sir_timeout(struct timer_list * unused)119*4882a593Smuzhiyun static void sir_timeout(struct timer_list *unused)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun 	/*
122*4882a593Smuzhiyun 	 * if last received signal was a pulse, but receiving stopped
123*4882a593Smuzhiyun 	 * within the 9 bit frame, we need to finish this pulse and
124*4882a593Smuzhiyun 	 * simulate a signal change to from pulse to space. Otherwise
125*4882a593Smuzhiyun 	 * upper layers will receive two sequences next time.
126*4882a593Smuzhiyun 	 */
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	unsigned long flags;
129*4882a593Smuzhiyun 	unsigned long pulse_end;
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	/* avoid interference with interrupt */
132*4882a593Smuzhiyun 	spin_lock_irqsave(&timer_lock, flags);
133*4882a593Smuzhiyun 	if (last_value) {
134*4882a593Smuzhiyun 		/* clear unread bits in UART and restart */
135*4882a593Smuzhiyun 		outb(UART_FCR_CLEAR_RCVR, io + UART_FCR);
136*4882a593Smuzhiyun 		/* determine 'virtual' pulse end: */
137*4882a593Smuzhiyun 		pulse_end = min_t(unsigned long,
138*4882a593Smuzhiyun 				  ktime_us_delta(last, last_intr_time),
139*4882a593Smuzhiyun 				  IR_MAX_DURATION);
140*4882a593Smuzhiyun 		dev_dbg(&sir_ir_dev->dev, "timeout add %d for %lu usec\n",
141*4882a593Smuzhiyun 			last_value, pulse_end);
142*4882a593Smuzhiyun 		add_read_queue(last_value, pulse_end);
143*4882a593Smuzhiyun 		last_value = 0;
144*4882a593Smuzhiyun 		last = last_intr_time;
145*4882a593Smuzhiyun 	}
146*4882a593Smuzhiyun 	spin_unlock_irqrestore(&timer_lock, flags);
147*4882a593Smuzhiyun 	ir_raw_event_handle(rcdev);
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun 
sir_interrupt(int irq,void * dev_id)150*4882a593Smuzhiyun static irqreturn_t sir_interrupt(int irq, void *dev_id)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun 	unsigned char data;
153*4882a593Smuzhiyun 	ktime_t curr_time;
154*4882a593Smuzhiyun 	unsigned long delt;
155*4882a593Smuzhiyun 	unsigned long deltintr;
156*4882a593Smuzhiyun 	unsigned long flags;
157*4882a593Smuzhiyun 	int counter = 0;
158*4882a593Smuzhiyun 	int iir, lsr;
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	while ((iir = inb(io + UART_IIR) & UART_IIR_ID)) {
161*4882a593Smuzhiyun 		if (++counter > 256) {
162*4882a593Smuzhiyun 			dev_err(&sir_ir_dev->dev, "Trapped in interrupt");
163*4882a593Smuzhiyun 			break;
164*4882a593Smuzhiyun 		}
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 		switch (iir & UART_IIR_ID) { /* FIXME toto treba preriedit */
167*4882a593Smuzhiyun 		case UART_IIR_MSI:
168*4882a593Smuzhiyun 			(void)inb(io + UART_MSR);
169*4882a593Smuzhiyun 			break;
170*4882a593Smuzhiyun 		case UART_IIR_RLSI:
171*4882a593Smuzhiyun 		case UART_IIR_THRI:
172*4882a593Smuzhiyun 			(void)inb(io + UART_LSR);
173*4882a593Smuzhiyun 			break;
174*4882a593Smuzhiyun 		case UART_IIR_RDI:
175*4882a593Smuzhiyun 			/* avoid interference with timer */
176*4882a593Smuzhiyun 			spin_lock_irqsave(&timer_lock, flags);
177*4882a593Smuzhiyun 			do {
178*4882a593Smuzhiyun 				del_timer(&timerlist);
179*4882a593Smuzhiyun 				data = inb(io + UART_RX);
180*4882a593Smuzhiyun 				curr_time = ktime_get();
181*4882a593Smuzhiyun 				delt = min_t(unsigned long,
182*4882a593Smuzhiyun 					     ktime_us_delta(last, curr_time),
183*4882a593Smuzhiyun 					     IR_MAX_DURATION);
184*4882a593Smuzhiyun 				deltintr = min_t(unsigned long,
185*4882a593Smuzhiyun 						 ktime_us_delta(last_intr_time,
186*4882a593Smuzhiyun 								curr_time),
187*4882a593Smuzhiyun 						 IR_MAX_DURATION);
188*4882a593Smuzhiyun 				dev_dbg(&sir_ir_dev->dev, "t %lu, d %d\n",
189*4882a593Smuzhiyun 					deltintr, (int)data);
190*4882a593Smuzhiyun 				/*
191*4882a593Smuzhiyun 				 * if nothing came in last X cycles,
192*4882a593Smuzhiyun 				 * it was gap
193*4882a593Smuzhiyun 				 */
194*4882a593Smuzhiyun 				if (deltintr > TIME_CONST * threshold) {
195*4882a593Smuzhiyun 					if (last_value) {
196*4882a593Smuzhiyun 						dev_dbg(&sir_ir_dev->dev, "GAP\n");
197*4882a593Smuzhiyun 						/* simulate signal change */
198*4882a593Smuzhiyun 						add_read_queue(last_value,
199*4882a593Smuzhiyun 							       delt -
200*4882a593Smuzhiyun 							       deltintr);
201*4882a593Smuzhiyun 						last_value = 0;
202*4882a593Smuzhiyun 						last = last_intr_time;
203*4882a593Smuzhiyun 						delt = deltintr;
204*4882a593Smuzhiyun 					}
205*4882a593Smuzhiyun 				}
206*4882a593Smuzhiyun 				data = 1;
207*4882a593Smuzhiyun 				if (data ^ last_value) {
208*4882a593Smuzhiyun 					/*
209*4882a593Smuzhiyun 					 * deltintr > 2*TIME_CONST, remember?
210*4882a593Smuzhiyun 					 * the other case is timeout
211*4882a593Smuzhiyun 					 */
212*4882a593Smuzhiyun 					add_read_queue(last_value,
213*4882a593Smuzhiyun 						       delt - TIME_CONST);
214*4882a593Smuzhiyun 					last_value = data;
215*4882a593Smuzhiyun 					last = curr_time;
216*4882a593Smuzhiyun 					last = ktime_sub_us(last,
217*4882a593Smuzhiyun 							    TIME_CONST);
218*4882a593Smuzhiyun 				}
219*4882a593Smuzhiyun 				last_intr_time = curr_time;
220*4882a593Smuzhiyun 				if (data) {
221*4882a593Smuzhiyun 					/*
222*4882a593Smuzhiyun 					 * start timer for end of
223*4882a593Smuzhiyun 					 * sequence detection
224*4882a593Smuzhiyun 					 */
225*4882a593Smuzhiyun 					timerlist.expires = jiffies +
226*4882a593Smuzhiyun 								SIR_TIMEOUT;
227*4882a593Smuzhiyun 					add_timer(&timerlist);
228*4882a593Smuzhiyun 				}
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 				lsr = inb(io + UART_LSR);
231*4882a593Smuzhiyun 			} while (lsr & UART_LSR_DR); /* data ready */
232*4882a593Smuzhiyun 			spin_unlock_irqrestore(&timer_lock, flags);
233*4882a593Smuzhiyun 			break;
234*4882a593Smuzhiyun 		default:
235*4882a593Smuzhiyun 			break;
236*4882a593Smuzhiyun 		}
237*4882a593Smuzhiyun 	}
238*4882a593Smuzhiyun 	ir_raw_event_handle(rcdev);
239*4882a593Smuzhiyun 	return IRQ_RETVAL(IRQ_HANDLED);
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun 
send_space(unsigned long len)242*4882a593Smuzhiyun static void send_space(unsigned long len)
243*4882a593Smuzhiyun {
244*4882a593Smuzhiyun 	usleep_range(len, len + 25);
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun 
send_pulse(unsigned long len)247*4882a593Smuzhiyun static void send_pulse(unsigned long len)
248*4882a593Smuzhiyun {
249*4882a593Smuzhiyun 	long bytes_out = len / TIME_CONST;
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun 	if (bytes_out == 0)
252*4882a593Smuzhiyun 		bytes_out++;
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	while (bytes_out--) {
255*4882a593Smuzhiyun 		outb(PULSE, io + UART_TX);
256*4882a593Smuzhiyun 		/* FIXME treba seriozne cakanie z char/serial.c */
257*4882a593Smuzhiyun 		while (!(inb(io + UART_LSR) & UART_LSR_THRE))
258*4882a593Smuzhiyun 			;
259*4882a593Smuzhiyun 	}
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun 
init_hardware(void)262*4882a593Smuzhiyun static int init_hardware(void)
263*4882a593Smuzhiyun {
264*4882a593Smuzhiyun 	u8 scratch, scratch2, scratch3;
265*4882a593Smuzhiyun 	unsigned long flags;
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	spin_lock_irqsave(&hardware_lock, flags);
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	/*
270*4882a593Smuzhiyun 	 * This is a simple port existence test, borrowed from the autoconfig
271*4882a593Smuzhiyun 	 * function in drivers/tty/serial/8250/8250_port.c
272*4882a593Smuzhiyun 	 */
273*4882a593Smuzhiyun 	scratch = sinp(UART_IER);
274*4882a593Smuzhiyun 	soutp(UART_IER, 0);
275*4882a593Smuzhiyun #ifdef __i386__
276*4882a593Smuzhiyun 	outb(0xff, 0x080);
277*4882a593Smuzhiyun #endif
278*4882a593Smuzhiyun 	scratch2 = sinp(UART_IER) & 0x0f;
279*4882a593Smuzhiyun 	soutp(UART_IER, 0x0f);
280*4882a593Smuzhiyun #ifdef __i386__
281*4882a593Smuzhiyun 	outb(0x00, 0x080);
282*4882a593Smuzhiyun #endif
283*4882a593Smuzhiyun 	scratch3 = sinp(UART_IER) & 0x0f;
284*4882a593Smuzhiyun 	soutp(UART_IER, scratch);
285*4882a593Smuzhiyun 	if (scratch2 != 0 || scratch3 != 0x0f) {
286*4882a593Smuzhiyun 		/* we fail, there's nothing here */
287*4882a593Smuzhiyun 		spin_unlock_irqrestore(&hardware_lock, flags);
288*4882a593Smuzhiyun 		pr_err("port existence test failed, cannot continue\n");
289*4882a593Smuzhiyun 		return -ENODEV;
290*4882a593Smuzhiyun 	}
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	/* reset UART */
293*4882a593Smuzhiyun 	outb(0, io + UART_MCR);
294*4882a593Smuzhiyun 	outb(0, io + UART_IER);
295*4882a593Smuzhiyun 	/* init UART */
296*4882a593Smuzhiyun 	/* set DLAB, speed = 115200 */
297*4882a593Smuzhiyun 	outb(UART_LCR_DLAB | UART_LCR_WLEN7, io + UART_LCR);
298*4882a593Smuzhiyun 	outb(1, io + UART_DLL); outb(0, io + UART_DLM);
299*4882a593Smuzhiyun 	/* 7N1+start = 9 bits at 115200 ~ 3 bits at 44000 */
300*4882a593Smuzhiyun 	outb(UART_LCR_WLEN7, io + UART_LCR);
301*4882a593Smuzhiyun 	/* FIFO operation */
302*4882a593Smuzhiyun 	outb(UART_FCR_ENABLE_FIFO, io + UART_FCR);
303*4882a593Smuzhiyun 	/* interrupts */
304*4882a593Smuzhiyun 	/* outb(UART_IER_RLSI|UART_IER_RDI|UART_IER_THRI, io + UART_IER); */
305*4882a593Smuzhiyun 	outb(UART_IER_RDI, io + UART_IER);
306*4882a593Smuzhiyun 	/* turn on UART */
307*4882a593Smuzhiyun 	outb(UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2, io + UART_MCR);
308*4882a593Smuzhiyun 	spin_unlock_irqrestore(&hardware_lock, flags);
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 	return 0;
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun 
drop_hardware(void)313*4882a593Smuzhiyun static void drop_hardware(void)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun 	unsigned long flags;
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	spin_lock_irqsave(&hardware_lock, flags);
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 	/* turn off interrupts */
320*4882a593Smuzhiyun 	outb(0, io + UART_IER);
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun 	spin_unlock_irqrestore(&hardware_lock, flags);
323*4882a593Smuzhiyun }
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun /* SECTION: Initialisation */
sir_ir_probe(struct platform_device * dev)326*4882a593Smuzhiyun static int sir_ir_probe(struct platform_device *dev)
327*4882a593Smuzhiyun {
328*4882a593Smuzhiyun 	int retval;
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 	rcdev = devm_rc_allocate_device(&sir_ir_dev->dev, RC_DRIVER_IR_RAW);
331*4882a593Smuzhiyun 	if (!rcdev)
332*4882a593Smuzhiyun 		return -ENOMEM;
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 	rcdev->device_name = "SIR IrDA port";
335*4882a593Smuzhiyun 	rcdev->input_phys = KBUILD_MODNAME "/input0";
336*4882a593Smuzhiyun 	rcdev->input_id.bustype = BUS_HOST;
337*4882a593Smuzhiyun 	rcdev->input_id.vendor = 0x0001;
338*4882a593Smuzhiyun 	rcdev->input_id.product = 0x0001;
339*4882a593Smuzhiyun 	rcdev->input_id.version = 0x0100;
340*4882a593Smuzhiyun 	rcdev->tx_ir = sir_tx_ir;
341*4882a593Smuzhiyun 	rcdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER;
342*4882a593Smuzhiyun 	rcdev->driver_name = KBUILD_MODNAME;
343*4882a593Smuzhiyun 	rcdev->map_name = RC_MAP_RC6_MCE;
344*4882a593Smuzhiyun 	rcdev->timeout = IR_DEFAULT_TIMEOUT;
345*4882a593Smuzhiyun 	rcdev->dev.parent = &sir_ir_dev->dev;
346*4882a593Smuzhiyun 
347*4882a593Smuzhiyun 	timer_setup(&timerlist, sir_timeout, 0);
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun 	/* get I/O port access and IRQ line */
350*4882a593Smuzhiyun 	if (!devm_request_region(&sir_ir_dev->dev, io, 8, KBUILD_MODNAME)) {
351*4882a593Smuzhiyun 		pr_err("i/o port 0x%.4x already in use.\n", io);
352*4882a593Smuzhiyun 		return -EBUSY;
353*4882a593Smuzhiyun 	}
354*4882a593Smuzhiyun 	retval = devm_request_irq(&sir_ir_dev->dev, irq, sir_interrupt, 0,
355*4882a593Smuzhiyun 				  KBUILD_MODNAME, NULL);
356*4882a593Smuzhiyun 	if (retval < 0) {
357*4882a593Smuzhiyun 		pr_err("IRQ %d already in use.\n", irq);
358*4882a593Smuzhiyun 		return retval;
359*4882a593Smuzhiyun 	}
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	retval = init_hardware();
362*4882a593Smuzhiyun 	if (retval) {
363*4882a593Smuzhiyun 		del_timer_sync(&timerlist);
364*4882a593Smuzhiyun 		return retval;
365*4882a593Smuzhiyun 	}
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 	pr_info("I/O port 0x%.4x, IRQ %d.\n", io, irq);
368*4882a593Smuzhiyun 
369*4882a593Smuzhiyun 	retval = devm_rc_register_device(&sir_ir_dev->dev, rcdev);
370*4882a593Smuzhiyun 	if (retval < 0)
371*4882a593Smuzhiyun 		return retval;
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun 	return 0;
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun 
sir_ir_remove(struct platform_device * dev)376*4882a593Smuzhiyun static int sir_ir_remove(struct platform_device *dev)
377*4882a593Smuzhiyun {
378*4882a593Smuzhiyun 	drop_hardware();
379*4882a593Smuzhiyun 	del_timer_sync(&timerlist);
380*4882a593Smuzhiyun 	return 0;
381*4882a593Smuzhiyun }
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun static struct platform_driver sir_ir_driver = {
384*4882a593Smuzhiyun 	.probe		= sir_ir_probe,
385*4882a593Smuzhiyun 	.remove		= sir_ir_remove,
386*4882a593Smuzhiyun 	.driver		= {
387*4882a593Smuzhiyun 		.name	= "sir_ir",
388*4882a593Smuzhiyun 	},
389*4882a593Smuzhiyun };
390*4882a593Smuzhiyun 
sir_ir_init(void)391*4882a593Smuzhiyun static int __init sir_ir_init(void)
392*4882a593Smuzhiyun {
393*4882a593Smuzhiyun 	int retval;
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 	retval = platform_driver_register(&sir_ir_driver);
396*4882a593Smuzhiyun 	if (retval)
397*4882a593Smuzhiyun 		return retval;
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun 	sir_ir_dev = platform_device_alloc("sir_ir", 0);
400*4882a593Smuzhiyun 	if (!sir_ir_dev) {
401*4882a593Smuzhiyun 		retval = -ENOMEM;
402*4882a593Smuzhiyun 		goto pdev_alloc_fail;
403*4882a593Smuzhiyun 	}
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 	retval = platform_device_add(sir_ir_dev);
406*4882a593Smuzhiyun 	if (retval)
407*4882a593Smuzhiyun 		goto pdev_add_fail;
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun 	return 0;
410*4882a593Smuzhiyun 
411*4882a593Smuzhiyun pdev_add_fail:
412*4882a593Smuzhiyun 	platform_device_put(sir_ir_dev);
413*4882a593Smuzhiyun pdev_alloc_fail:
414*4882a593Smuzhiyun 	platform_driver_unregister(&sir_ir_driver);
415*4882a593Smuzhiyun 	return retval;
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun 
sir_ir_exit(void)418*4882a593Smuzhiyun static void __exit sir_ir_exit(void)
419*4882a593Smuzhiyun {
420*4882a593Smuzhiyun 	platform_device_unregister(sir_ir_dev);
421*4882a593Smuzhiyun 	platform_driver_unregister(&sir_ir_driver);
422*4882a593Smuzhiyun }
423*4882a593Smuzhiyun 
424*4882a593Smuzhiyun module_init(sir_ir_init);
425*4882a593Smuzhiyun module_exit(sir_ir_exit);
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun MODULE_DESCRIPTION("Infrared receiver driver for SIR type serial ports");
428*4882a593Smuzhiyun MODULE_AUTHOR("Milan Pikula");
429*4882a593Smuzhiyun MODULE_LICENSE("GPL");
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun module_param_hw(io, int, ioport, 0444);
432*4882a593Smuzhiyun MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)");
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun module_param_hw(irq, int, irq, 0444);
435*4882a593Smuzhiyun MODULE_PARM_DESC(irq, "Interrupt (4 or 3)");
436*4882a593Smuzhiyun 
437*4882a593Smuzhiyun module_param(threshold, int, 0444);
438*4882a593Smuzhiyun MODULE_PARM_DESC(threshold, "space detection threshold (3)");
439