1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * serial_ir.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * serial_ir - Device driver that records pulse- and pause-lengths
6*4882a593Smuzhiyun * (space-lengths) between DDCD event on a serial port.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Copyright (C) 1996,97 Ralph Metzler <rjkm@thp.uni-koeln.de>
9*4882a593Smuzhiyun * Copyright (C) 1998 Trent Piepho <xyzzy@u.washington.edu>
10*4882a593Smuzhiyun * Copyright (C) 1998 Ben Pfaff <blp@gnu.org>
11*4882a593Smuzhiyun * Copyright (C) 1999 Christoph Bartelmus <lirc@bartelmus.de>
12*4882a593Smuzhiyun * Copyright (C) 2007 Andrei Tanas <andrei@tanas.ca> (suspend/resume support)
13*4882a593Smuzhiyun * Copyright (C) 2016 Sean Young <sean@mess.org> (port to rc-core)
14*4882a593Smuzhiyun */
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/errno.h>
20*4882a593Smuzhiyun #include <linux/interrupt.h>
21*4882a593Smuzhiyun #include <linux/kernel.h>
22*4882a593Smuzhiyun #include <linux/serial_reg.h>
23*4882a593Smuzhiyun #include <linux/types.h>
24*4882a593Smuzhiyun #include <linux/delay.h>
25*4882a593Smuzhiyun #include <linux/platform_device.h>
26*4882a593Smuzhiyun #include <linux/spinlock.h>
27*4882a593Smuzhiyun #include <media/rc-core.h>
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun struct serial_ir_hw {
30*4882a593Smuzhiyun int signal_pin;
31*4882a593Smuzhiyun int signal_pin_change;
32*4882a593Smuzhiyun u8 on;
33*4882a593Smuzhiyun u8 off;
34*4882a593Smuzhiyun unsigned set_send_carrier:1;
35*4882a593Smuzhiyun unsigned set_duty_cycle:1;
36*4882a593Smuzhiyun void (*send_pulse)(unsigned int length, ktime_t edge);
37*4882a593Smuzhiyun void (*send_space)(void);
38*4882a593Smuzhiyun spinlock_t lock;
39*4882a593Smuzhiyun };
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun #define IR_HOMEBREW 0
42*4882a593Smuzhiyun #define IR_IRDEO 1
43*4882a593Smuzhiyun #define IR_IRDEO_REMOTE 2
44*4882a593Smuzhiyun #define IR_ANIMAX 3
45*4882a593Smuzhiyun #define IR_IGOR 4
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun /* module parameters */
48*4882a593Smuzhiyun static int type;
49*4882a593Smuzhiyun static int io;
50*4882a593Smuzhiyun static int irq;
51*4882a593Smuzhiyun static ulong iommap;
52*4882a593Smuzhiyun static int ioshift;
53*4882a593Smuzhiyun static bool softcarrier = true;
54*4882a593Smuzhiyun static bool share_irq;
55*4882a593Smuzhiyun static int sense = -1; /* -1 = auto, 0 = active high, 1 = active low */
56*4882a593Smuzhiyun static bool txsense; /* 0 = active high, 1 = active low */
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun /* forward declarations */
59*4882a593Smuzhiyun static void send_pulse_irdeo(unsigned int length, ktime_t edge);
60*4882a593Smuzhiyun static void send_space_irdeo(void);
61*4882a593Smuzhiyun #ifdef CONFIG_IR_SERIAL_TRANSMITTER
62*4882a593Smuzhiyun static void send_pulse_homebrew(unsigned int length, ktime_t edge);
63*4882a593Smuzhiyun static void send_space_homebrew(void);
64*4882a593Smuzhiyun #endif
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun static struct serial_ir_hw hardware[] = {
67*4882a593Smuzhiyun [IR_HOMEBREW] = {
68*4882a593Smuzhiyun .lock = __SPIN_LOCK_UNLOCKED(hardware[IR_HOMEBREW].lock),
69*4882a593Smuzhiyun .signal_pin = UART_MSR_DCD,
70*4882a593Smuzhiyun .signal_pin_change = UART_MSR_DDCD,
71*4882a593Smuzhiyun .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
72*4882a593Smuzhiyun .off = (UART_MCR_RTS | UART_MCR_OUT2),
73*4882a593Smuzhiyun #ifdef CONFIG_IR_SERIAL_TRANSMITTER
74*4882a593Smuzhiyun .send_pulse = send_pulse_homebrew,
75*4882a593Smuzhiyun .send_space = send_space_homebrew,
76*4882a593Smuzhiyun .set_send_carrier = true,
77*4882a593Smuzhiyun .set_duty_cycle = true,
78*4882a593Smuzhiyun #endif
79*4882a593Smuzhiyun },
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun [IR_IRDEO] = {
82*4882a593Smuzhiyun .lock = __SPIN_LOCK_UNLOCKED(hardware[IR_IRDEO].lock),
83*4882a593Smuzhiyun .signal_pin = UART_MSR_DSR,
84*4882a593Smuzhiyun .signal_pin_change = UART_MSR_DDSR,
85*4882a593Smuzhiyun .on = UART_MCR_OUT2,
86*4882a593Smuzhiyun .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
87*4882a593Smuzhiyun .send_pulse = send_pulse_irdeo,
88*4882a593Smuzhiyun .send_space = send_space_irdeo,
89*4882a593Smuzhiyun .set_duty_cycle = true,
90*4882a593Smuzhiyun },
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun [IR_IRDEO_REMOTE] = {
93*4882a593Smuzhiyun .lock = __SPIN_LOCK_UNLOCKED(hardware[IR_IRDEO_REMOTE].lock),
94*4882a593Smuzhiyun .signal_pin = UART_MSR_DSR,
95*4882a593Smuzhiyun .signal_pin_change = UART_MSR_DDSR,
96*4882a593Smuzhiyun .on = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
97*4882a593Smuzhiyun .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
98*4882a593Smuzhiyun .send_pulse = send_pulse_irdeo,
99*4882a593Smuzhiyun .send_space = send_space_irdeo,
100*4882a593Smuzhiyun .set_duty_cycle = true,
101*4882a593Smuzhiyun },
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun [IR_ANIMAX] = {
104*4882a593Smuzhiyun .lock = __SPIN_LOCK_UNLOCKED(hardware[IR_ANIMAX].lock),
105*4882a593Smuzhiyun .signal_pin = UART_MSR_DCD,
106*4882a593Smuzhiyun .signal_pin_change = UART_MSR_DDCD,
107*4882a593Smuzhiyun .on = 0,
108*4882a593Smuzhiyun .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
109*4882a593Smuzhiyun },
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun [IR_IGOR] = {
112*4882a593Smuzhiyun .lock = __SPIN_LOCK_UNLOCKED(hardware[IR_IGOR].lock),
113*4882a593Smuzhiyun .signal_pin = UART_MSR_DSR,
114*4882a593Smuzhiyun .signal_pin_change = UART_MSR_DDSR,
115*4882a593Smuzhiyun .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
116*4882a593Smuzhiyun .off = (UART_MCR_RTS | UART_MCR_OUT2),
117*4882a593Smuzhiyun #ifdef CONFIG_IR_SERIAL_TRANSMITTER
118*4882a593Smuzhiyun .send_pulse = send_pulse_homebrew,
119*4882a593Smuzhiyun .send_space = send_space_homebrew,
120*4882a593Smuzhiyun .set_send_carrier = true,
121*4882a593Smuzhiyun .set_duty_cycle = true,
122*4882a593Smuzhiyun #endif
123*4882a593Smuzhiyun },
124*4882a593Smuzhiyun };
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun #define RS_ISR_PASS_LIMIT 256
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun struct serial_ir {
129*4882a593Smuzhiyun ktime_t lastkt;
130*4882a593Smuzhiyun struct rc_dev *rcdev;
131*4882a593Smuzhiyun struct platform_device *pdev;
132*4882a593Smuzhiyun struct timer_list timeout_timer;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun unsigned int carrier;
135*4882a593Smuzhiyun unsigned int duty_cycle;
136*4882a593Smuzhiyun };
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun static struct serial_ir serial_ir;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun /* fetch serial input packet (1 byte) from register offset */
sinp(int offset)141*4882a593Smuzhiyun static u8 sinp(int offset)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun if (iommap)
144*4882a593Smuzhiyun /* the register is memory-mapped */
145*4882a593Smuzhiyun offset <<= ioshift;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun return inb(io + offset);
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun /* write serial output packet (1 byte) of value to register offset */
soutp(int offset,u8 value)151*4882a593Smuzhiyun static void soutp(int offset, u8 value)
152*4882a593Smuzhiyun {
153*4882a593Smuzhiyun if (iommap)
154*4882a593Smuzhiyun /* the register is memory-mapped */
155*4882a593Smuzhiyun offset <<= ioshift;
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun outb(value, io + offset);
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun
on(void)160*4882a593Smuzhiyun static void on(void)
161*4882a593Smuzhiyun {
162*4882a593Smuzhiyun if (txsense)
163*4882a593Smuzhiyun soutp(UART_MCR, hardware[type].off);
164*4882a593Smuzhiyun else
165*4882a593Smuzhiyun soutp(UART_MCR, hardware[type].on);
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
off(void)168*4882a593Smuzhiyun static void off(void)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun if (txsense)
171*4882a593Smuzhiyun soutp(UART_MCR, hardware[type].on);
172*4882a593Smuzhiyun else
173*4882a593Smuzhiyun soutp(UART_MCR, hardware[type].off);
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun
send_pulse_irdeo(unsigned int length,ktime_t target)176*4882a593Smuzhiyun static void send_pulse_irdeo(unsigned int length, ktime_t target)
177*4882a593Smuzhiyun {
178*4882a593Smuzhiyun long rawbits;
179*4882a593Smuzhiyun int i;
180*4882a593Smuzhiyun unsigned char output;
181*4882a593Smuzhiyun unsigned char chunk, shifted;
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun /* how many bits have to be sent ? */
184*4882a593Smuzhiyun rawbits = length * 1152 / 10000;
185*4882a593Smuzhiyun if (serial_ir.duty_cycle > 50)
186*4882a593Smuzhiyun chunk = 3;
187*4882a593Smuzhiyun else
188*4882a593Smuzhiyun chunk = 1;
189*4882a593Smuzhiyun for (i = 0, output = 0x7f; rawbits > 0; rawbits -= 3) {
190*4882a593Smuzhiyun shifted = chunk << (i * 3);
191*4882a593Smuzhiyun shifted >>= 1;
192*4882a593Smuzhiyun output &= (~shifted);
193*4882a593Smuzhiyun i++;
194*4882a593Smuzhiyun if (i == 3) {
195*4882a593Smuzhiyun soutp(UART_TX, output);
196*4882a593Smuzhiyun while (!(sinp(UART_LSR) & UART_LSR_THRE))
197*4882a593Smuzhiyun ;
198*4882a593Smuzhiyun output = 0x7f;
199*4882a593Smuzhiyun i = 0;
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun if (i != 0) {
203*4882a593Smuzhiyun soutp(UART_TX, output);
204*4882a593Smuzhiyun while (!(sinp(UART_LSR) & UART_LSR_TEMT))
205*4882a593Smuzhiyun ;
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun
send_space_irdeo(void)209*4882a593Smuzhiyun static void send_space_irdeo(void)
210*4882a593Smuzhiyun {
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun #ifdef CONFIG_IR_SERIAL_TRANSMITTER
send_pulse_homebrew_softcarrier(unsigned int length,ktime_t edge)214*4882a593Smuzhiyun static void send_pulse_homebrew_softcarrier(unsigned int length, ktime_t edge)
215*4882a593Smuzhiyun {
216*4882a593Smuzhiyun ktime_t now, target = ktime_add_us(edge, length);
217*4882a593Smuzhiyun /*
218*4882a593Smuzhiyun * delta should never exceed 4 seconds and on m68k
219*4882a593Smuzhiyun * ndelay(s64) does not compile; so use s32 rather than s64.
220*4882a593Smuzhiyun */
221*4882a593Smuzhiyun s32 delta;
222*4882a593Smuzhiyun unsigned int pulse, space;
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun /* Ensure the dividend fits into 32 bit */
225*4882a593Smuzhiyun pulse = DIV_ROUND_CLOSEST(serial_ir.duty_cycle * (NSEC_PER_SEC / 100),
226*4882a593Smuzhiyun serial_ir.carrier);
227*4882a593Smuzhiyun space = DIV_ROUND_CLOSEST((100 - serial_ir.duty_cycle) *
228*4882a593Smuzhiyun (NSEC_PER_SEC / 100), serial_ir.carrier);
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun for (;;) {
231*4882a593Smuzhiyun now = ktime_get();
232*4882a593Smuzhiyun if (ktime_compare(now, target) >= 0)
233*4882a593Smuzhiyun break;
234*4882a593Smuzhiyun on();
235*4882a593Smuzhiyun edge = ktime_add_ns(edge, pulse);
236*4882a593Smuzhiyun delta = ktime_to_ns(ktime_sub(edge, now));
237*4882a593Smuzhiyun if (delta > 0)
238*4882a593Smuzhiyun ndelay(delta);
239*4882a593Smuzhiyun now = ktime_get();
240*4882a593Smuzhiyun off();
241*4882a593Smuzhiyun if (ktime_compare(now, target) >= 0)
242*4882a593Smuzhiyun break;
243*4882a593Smuzhiyun edge = ktime_add_ns(edge, space);
244*4882a593Smuzhiyun delta = ktime_to_ns(ktime_sub(edge, now));
245*4882a593Smuzhiyun if (delta > 0)
246*4882a593Smuzhiyun ndelay(delta);
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun
send_pulse_homebrew(unsigned int length,ktime_t edge)250*4882a593Smuzhiyun static void send_pulse_homebrew(unsigned int length, ktime_t edge)
251*4882a593Smuzhiyun {
252*4882a593Smuzhiyun if (softcarrier)
253*4882a593Smuzhiyun send_pulse_homebrew_softcarrier(length, edge);
254*4882a593Smuzhiyun else
255*4882a593Smuzhiyun on();
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun
send_space_homebrew(void)258*4882a593Smuzhiyun static void send_space_homebrew(void)
259*4882a593Smuzhiyun {
260*4882a593Smuzhiyun off();
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun #endif
263*4882a593Smuzhiyun
frbwrite(unsigned int l,bool is_pulse)264*4882a593Smuzhiyun static void frbwrite(unsigned int l, bool is_pulse)
265*4882a593Smuzhiyun {
266*4882a593Smuzhiyun /* simple noise filter */
267*4882a593Smuzhiyun static unsigned int ptr, pulse, space;
268*4882a593Smuzhiyun struct ir_raw_event ev = {};
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun if (ptr > 0 && is_pulse) {
271*4882a593Smuzhiyun pulse += l;
272*4882a593Smuzhiyun if (pulse > 250) {
273*4882a593Smuzhiyun ev.duration = space;
274*4882a593Smuzhiyun ev.pulse = false;
275*4882a593Smuzhiyun ir_raw_event_store_with_filter(serial_ir.rcdev, &ev);
276*4882a593Smuzhiyun ev.duration = pulse;
277*4882a593Smuzhiyun ev.pulse = true;
278*4882a593Smuzhiyun ir_raw_event_store_with_filter(serial_ir.rcdev, &ev);
279*4882a593Smuzhiyun ptr = 0;
280*4882a593Smuzhiyun pulse = 0;
281*4882a593Smuzhiyun }
282*4882a593Smuzhiyun return;
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun if (!is_pulse) {
285*4882a593Smuzhiyun if (ptr == 0) {
286*4882a593Smuzhiyun if (l > 20000) {
287*4882a593Smuzhiyun space = l;
288*4882a593Smuzhiyun ptr++;
289*4882a593Smuzhiyun return;
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun } else {
292*4882a593Smuzhiyun if (l > 20000) {
293*4882a593Smuzhiyun space += pulse;
294*4882a593Smuzhiyun if (space > IR_MAX_DURATION)
295*4882a593Smuzhiyun space = IR_MAX_DURATION;
296*4882a593Smuzhiyun space += l;
297*4882a593Smuzhiyun if (space > IR_MAX_DURATION)
298*4882a593Smuzhiyun space = IR_MAX_DURATION;
299*4882a593Smuzhiyun pulse = 0;
300*4882a593Smuzhiyun return;
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun ev.duration = space;
304*4882a593Smuzhiyun ev.pulse = false;
305*4882a593Smuzhiyun ir_raw_event_store_with_filter(serial_ir.rcdev, &ev);
306*4882a593Smuzhiyun ev.duration = pulse;
307*4882a593Smuzhiyun ev.pulse = true;
308*4882a593Smuzhiyun ir_raw_event_store_with_filter(serial_ir.rcdev, &ev);
309*4882a593Smuzhiyun ptr = 0;
310*4882a593Smuzhiyun pulse = 0;
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun }
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun ev.duration = l;
315*4882a593Smuzhiyun ev.pulse = is_pulse;
316*4882a593Smuzhiyun ir_raw_event_store_with_filter(serial_ir.rcdev, &ev);
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun
serial_ir_irq_handler(int i,void * blah)319*4882a593Smuzhiyun static irqreturn_t serial_ir_irq_handler(int i, void *blah)
320*4882a593Smuzhiyun {
321*4882a593Smuzhiyun ktime_t kt;
322*4882a593Smuzhiyun int counter, dcd;
323*4882a593Smuzhiyun u8 status;
324*4882a593Smuzhiyun ktime_t delkt;
325*4882a593Smuzhiyun unsigned int data;
326*4882a593Smuzhiyun static int last_dcd = -1;
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun if ((sinp(UART_IIR) & UART_IIR_NO_INT)) {
329*4882a593Smuzhiyun /* not our interrupt */
330*4882a593Smuzhiyun return IRQ_NONE;
331*4882a593Smuzhiyun }
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun counter = 0;
334*4882a593Smuzhiyun do {
335*4882a593Smuzhiyun counter++;
336*4882a593Smuzhiyun status = sinp(UART_MSR);
337*4882a593Smuzhiyun if (counter > RS_ISR_PASS_LIMIT) {
338*4882a593Smuzhiyun dev_err(&serial_ir.pdev->dev, "Trapped in interrupt");
339*4882a593Smuzhiyun break;
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun if ((status & hardware[type].signal_pin_change) &&
342*4882a593Smuzhiyun sense != -1) {
343*4882a593Smuzhiyun /* get current time */
344*4882a593Smuzhiyun kt = ktime_get();
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun /*
347*4882a593Smuzhiyun * The driver needs to know if your receiver is
348*4882a593Smuzhiyun * active high or active low, or the space/pulse
349*4882a593Smuzhiyun * sense could be inverted.
350*4882a593Smuzhiyun */
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun /* calc time since last interrupt in nanoseconds */
353*4882a593Smuzhiyun dcd = (status & hardware[type].signal_pin) ? 1 : 0;
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun if (dcd == last_dcd) {
356*4882a593Smuzhiyun dev_dbg(&serial_ir.pdev->dev,
357*4882a593Smuzhiyun "ignoring spike: %d %d %lldns %lldns\n",
358*4882a593Smuzhiyun dcd, sense, ktime_to_ns(kt),
359*4882a593Smuzhiyun ktime_to_ns(serial_ir.lastkt));
360*4882a593Smuzhiyun continue;
361*4882a593Smuzhiyun }
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun delkt = ktime_sub(kt, serial_ir.lastkt);
364*4882a593Smuzhiyun if (ktime_compare(delkt, ktime_set(15, 0)) > 0) {
365*4882a593Smuzhiyun data = IR_MAX_DURATION; /* really long time */
366*4882a593Smuzhiyun if (!(dcd ^ sense)) {
367*4882a593Smuzhiyun /* sanity check */
368*4882a593Smuzhiyun dev_err(&serial_ir.pdev->dev,
369*4882a593Smuzhiyun "dcd unexpected: %d %d %lldns %lldns\n",
370*4882a593Smuzhiyun dcd, sense, ktime_to_ns(kt),
371*4882a593Smuzhiyun ktime_to_ns(serial_ir.lastkt));
372*4882a593Smuzhiyun /*
373*4882a593Smuzhiyun * detecting pulse while this
374*4882a593Smuzhiyun * MUST be a space!
375*4882a593Smuzhiyun */
376*4882a593Smuzhiyun sense = sense ? 0 : 1;
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun } else {
379*4882a593Smuzhiyun data = ktime_to_us(delkt);
380*4882a593Smuzhiyun }
381*4882a593Smuzhiyun frbwrite(data, !(dcd ^ sense));
382*4882a593Smuzhiyun serial_ir.lastkt = kt;
383*4882a593Smuzhiyun last_dcd = dcd;
384*4882a593Smuzhiyun }
385*4882a593Smuzhiyun } while (!(sinp(UART_IIR) & UART_IIR_NO_INT)); /* still pending ? */
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun mod_timer(&serial_ir.timeout_timer,
388*4882a593Smuzhiyun jiffies + usecs_to_jiffies(serial_ir.rcdev->timeout));
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun ir_raw_event_handle(serial_ir.rcdev);
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun return IRQ_HANDLED;
393*4882a593Smuzhiyun }
394*4882a593Smuzhiyun
hardware_init_port(void)395*4882a593Smuzhiyun static int hardware_init_port(void)
396*4882a593Smuzhiyun {
397*4882a593Smuzhiyun u8 scratch, scratch2, scratch3;
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun /*
400*4882a593Smuzhiyun * This is a simple port existence test, borrowed from the autoconfig
401*4882a593Smuzhiyun * function in drivers/tty/serial/8250/8250_port.c
402*4882a593Smuzhiyun */
403*4882a593Smuzhiyun scratch = sinp(UART_IER);
404*4882a593Smuzhiyun soutp(UART_IER, 0);
405*4882a593Smuzhiyun #ifdef __i386__
406*4882a593Smuzhiyun outb(0xff, 0x080);
407*4882a593Smuzhiyun #endif
408*4882a593Smuzhiyun scratch2 = sinp(UART_IER) & 0x0f;
409*4882a593Smuzhiyun soutp(UART_IER, 0x0f);
410*4882a593Smuzhiyun #ifdef __i386__
411*4882a593Smuzhiyun outb(0x00, 0x080);
412*4882a593Smuzhiyun #endif
413*4882a593Smuzhiyun scratch3 = sinp(UART_IER) & 0x0f;
414*4882a593Smuzhiyun soutp(UART_IER, scratch);
415*4882a593Smuzhiyun if (scratch2 != 0 || scratch3 != 0x0f) {
416*4882a593Smuzhiyun /* we fail, there's nothing here */
417*4882a593Smuzhiyun pr_err("port existence test failed, cannot continue\n");
418*4882a593Smuzhiyun return -ENODEV;
419*4882a593Smuzhiyun }
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun /* Set DLAB 0. */
422*4882a593Smuzhiyun soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun /* First of all, disable all interrupts */
425*4882a593Smuzhiyun soutp(UART_IER, sinp(UART_IER) &
426*4882a593Smuzhiyun (~(UART_IER_MSI | UART_IER_RLSI | UART_IER_THRI | UART_IER_RDI)));
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun /* Clear registers. */
429*4882a593Smuzhiyun sinp(UART_LSR);
430*4882a593Smuzhiyun sinp(UART_RX);
431*4882a593Smuzhiyun sinp(UART_IIR);
432*4882a593Smuzhiyun sinp(UART_MSR);
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun /* Set line for power source */
435*4882a593Smuzhiyun off();
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun /* Clear registers again to be sure. */
438*4882a593Smuzhiyun sinp(UART_LSR);
439*4882a593Smuzhiyun sinp(UART_RX);
440*4882a593Smuzhiyun sinp(UART_IIR);
441*4882a593Smuzhiyun sinp(UART_MSR);
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun switch (type) {
444*4882a593Smuzhiyun case IR_IRDEO:
445*4882a593Smuzhiyun case IR_IRDEO_REMOTE:
446*4882a593Smuzhiyun /* setup port to 7N1 @ 115200 Baud */
447*4882a593Smuzhiyun /* 7N1+start = 9 bits at 115200 ~ 3 bits at 38kHz */
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun /* Set DLAB 1. */
450*4882a593Smuzhiyun soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
451*4882a593Smuzhiyun /* Set divisor to 1 => 115200 Baud */
452*4882a593Smuzhiyun soutp(UART_DLM, 0);
453*4882a593Smuzhiyun soutp(UART_DLL, 1);
454*4882a593Smuzhiyun /* Set DLAB 0 + 7N1 */
455*4882a593Smuzhiyun soutp(UART_LCR, UART_LCR_WLEN7);
456*4882a593Smuzhiyun /* THR interrupt already disabled at this point */
457*4882a593Smuzhiyun break;
458*4882a593Smuzhiyun default:
459*4882a593Smuzhiyun break;
460*4882a593Smuzhiyun }
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun return 0;
463*4882a593Smuzhiyun }
464*4882a593Smuzhiyun
serial_ir_timeout(struct timer_list * unused)465*4882a593Smuzhiyun static void serial_ir_timeout(struct timer_list *unused)
466*4882a593Smuzhiyun {
467*4882a593Smuzhiyun struct ir_raw_event ev = {
468*4882a593Smuzhiyun .timeout = true,
469*4882a593Smuzhiyun .duration = serial_ir.rcdev->timeout
470*4882a593Smuzhiyun };
471*4882a593Smuzhiyun ir_raw_event_store_with_filter(serial_ir.rcdev, &ev);
472*4882a593Smuzhiyun ir_raw_event_handle(serial_ir.rcdev);
473*4882a593Smuzhiyun }
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun /* Needed by serial_ir_probe() */
476*4882a593Smuzhiyun static int serial_ir_tx(struct rc_dev *dev, unsigned int *txbuf,
477*4882a593Smuzhiyun unsigned int count);
478*4882a593Smuzhiyun static int serial_ir_tx_duty_cycle(struct rc_dev *dev, u32 cycle);
479*4882a593Smuzhiyun static int serial_ir_tx_carrier(struct rc_dev *dev, u32 carrier);
480*4882a593Smuzhiyun static int serial_ir_open(struct rc_dev *rcdev);
481*4882a593Smuzhiyun static void serial_ir_close(struct rc_dev *rcdev);
482*4882a593Smuzhiyun
serial_ir_probe(struct platform_device * dev)483*4882a593Smuzhiyun static int serial_ir_probe(struct platform_device *dev)
484*4882a593Smuzhiyun {
485*4882a593Smuzhiyun struct rc_dev *rcdev;
486*4882a593Smuzhiyun int i, nlow, nhigh, result;
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun rcdev = devm_rc_allocate_device(&dev->dev, RC_DRIVER_IR_RAW);
489*4882a593Smuzhiyun if (!rcdev)
490*4882a593Smuzhiyun return -ENOMEM;
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun if (hardware[type].send_pulse && hardware[type].send_space)
493*4882a593Smuzhiyun rcdev->tx_ir = serial_ir_tx;
494*4882a593Smuzhiyun if (hardware[type].set_send_carrier)
495*4882a593Smuzhiyun rcdev->s_tx_carrier = serial_ir_tx_carrier;
496*4882a593Smuzhiyun if (hardware[type].set_duty_cycle)
497*4882a593Smuzhiyun rcdev->s_tx_duty_cycle = serial_ir_tx_duty_cycle;
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun switch (type) {
500*4882a593Smuzhiyun case IR_HOMEBREW:
501*4882a593Smuzhiyun rcdev->device_name = "Serial IR type home-brew";
502*4882a593Smuzhiyun break;
503*4882a593Smuzhiyun case IR_IRDEO:
504*4882a593Smuzhiyun rcdev->device_name = "Serial IR type IRdeo";
505*4882a593Smuzhiyun break;
506*4882a593Smuzhiyun case IR_IRDEO_REMOTE:
507*4882a593Smuzhiyun rcdev->device_name = "Serial IR type IRdeo remote";
508*4882a593Smuzhiyun break;
509*4882a593Smuzhiyun case IR_ANIMAX:
510*4882a593Smuzhiyun rcdev->device_name = "Serial IR type AnimaX";
511*4882a593Smuzhiyun break;
512*4882a593Smuzhiyun case IR_IGOR:
513*4882a593Smuzhiyun rcdev->device_name = "Serial IR type IgorPlug";
514*4882a593Smuzhiyun break;
515*4882a593Smuzhiyun }
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun rcdev->input_phys = KBUILD_MODNAME "/input0";
518*4882a593Smuzhiyun rcdev->input_id.bustype = BUS_HOST;
519*4882a593Smuzhiyun rcdev->input_id.vendor = 0x0001;
520*4882a593Smuzhiyun rcdev->input_id.product = 0x0001;
521*4882a593Smuzhiyun rcdev->input_id.version = 0x0100;
522*4882a593Smuzhiyun rcdev->open = serial_ir_open;
523*4882a593Smuzhiyun rcdev->close = serial_ir_close;
524*4882a593Smuzhiyun rcdev->dev.parent = &serial_ir.pdev->dev;
525*4882a593Smuzhiyun rcdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER;
526*4882a593Smuzhiyun rcdev->driver_name = KBUILD_MODNAME;
527*4882a593Smuzhiyun rcdev->map_name = RC_MAP_RC6_MCE;
528*4882a593Smuzhiyun rcdev->min_timeout = 1;
529*4882a593Smuzhiyun rcdev->timeout = IR_DEFAULT_TIMEOUT;
530*4882a593Smuzhiyun rcdev->max_timeout = 10 * IR_DEFAULT_TIMEOUT;
531*4882a593Smuzhiyun rcdev->rx_resolution = 250;
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun serial_ir.rcdev = rcdev;
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun timer_setup(&serial_ir.timeout_timer, serial_ir_timeout, 0);
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun result = devm_request_irq(&dev->dev, irq, serial_ir_irq_handler,
538*4882a593Smuzhiyun share_irq ? IRQF_SHARED : 0,
539*4882a593Smuzhiyun KBUILD_MODNAME, &hardware);
540*4882a593Smuzhiyun if (result < 0) {
541*4882a593Smuzhiyun if (result == -EBUSY)
542*4882a593Smuzhiyun dev_err(&dev->dev, "IRQ %d busy\n", irq);
543*4882a593Smuzhiyun else if (result == -EINVAL)
544*4882a593Smuzhiyun dev_err(&dev->dev, "Bad irq number or handler\n");
545*4882a593Smuzhiyun return result;
546*4882a593Smuzhiyun }
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun /* Reserve io region. */
549*4882a593Smuzhiyun if ((iommap &&
550*4882a593Smuzhiyun (devm_request_mem_region(&dev->dev, iommap, 8UL << ioshift,
551*4882a593Smuzhiyun KBUILD_MODNAME) == NULL)) ||
552*4882a593Smuzhiyun (!iommap && (devm_request_region(&dev->dev, io, 8,
553*4882a593Smuzhiyun KBUILD_MODNAME) == NULL))) {
554*4882a593Smuzhiyun dev_err(&dev->dev, "port %04x already in use\n", io);
555*4882a593Smuzhiyun dev_warn(&dev->dev, "use 'setserial /dev/ttySX uart none'\n");
556*4882a593Smuzhiyun dev_warn(&dev->dev,
557*4882a593Smuzhiyun "or compile the serial port driver as module and\n");
558*4882a593Smuzhiyun dev_warn(&dev->dev, "make sure this module is loaded first\n");
559*4882a593Smuzhiyun return -EBUSY;
560*4882a593Smuzhiyun }
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun result = hardware_init_port();
563*4882a593Smuzhiyun if (result < 0)
564*4882a593Smuzhiyun return result;
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun /* Initialize pulse/space widths */
567*4882a593Smuzhiyun serial_ir.duty_cycle = 50;
568*4882a593Smuzhiyun serial_ir.carrier = 38000;
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun /* If pin is high, then this must be an active low receiver. */
571*4882a593Smuzhiyun if (sense == -1) {
572*4882a593Smuzhiyun /* wait 1/2 sec for the power supply */
573*4882a593Smuzhiyun msleep(500);
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun /*
576*4882a593Smuzhiyun * probe 9 times every 0.04s, collect "votes" for
577*4882a593Smuzhiyun * active high/low
578*4882a593Smuzhiyun */
579*4882a593Smuzhiyun nlow = 0;
580*4882a593Smuzhiyun nhigh = 0;
581*4882a593Smuzhiyun for (i = 0; i < 9; i++) {
582*4882a593Smuzhiyun if (sinp(UART_MSR) & hardware[type].signal_pin)
583*4882a593Smuzhiyun nlow++;
584*4882a593Smuzhiyun else
585*4882a593Smuzhiyun nhigh++;
586*4882a593Smuzhiyun msleep(40);
587*4882a593Smuzhiyun }
588*4882a593Smuzhiyun sense = nlow >= nhigh ? 1 : 0;
589*4882a593Smuzhiyun dev_info(&dev->dev, "auto-detected active %s receiver\n",
590*4882a593Smuzhiyun sense ? "low" : "high");
591*4882a593Smuzhiyun } else
592*4882a593Smuzhiyun dev_info(&dev->dev, "Manually using active %s receiver\n",
593*4882a593Smuzhiyun sense ? "low" : "high");
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun dev_dbg(&dev->dev, "Interrupt %d, port %04x obtained\n", irq, io);
596*4882a593Smuzhiyun
597*4882a593Smuzhiyun return devm_rc_register_device(&dev->dev, rcdev);
598*4882a593Smuzhiyun }
599*4882a593Smuzhiyun
serial_ir_open(struct rc_dev * rcdev)600*4882a593Smuzhiyun static int serial_ir_open(struct rc_dev *rcdev)
601*4882a593Smuzhiyun {
602*4882a593Smuzhiyun unsigned long flags;
603*4882a593Smuzhiyun
604*4882a593Smuzhiyun /* initialize timestamp */
605*4882a593Smuzhiyun serial_ir.lastkt = ktime_get();
606*4882a593Smuzhiyun
607*4882a593Smuzhiyun spin_lock_irqsave(&hardware[type].lock, flags);
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun /* Set DLAB 0. */
610*4882a593Smuzhiyun soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
611*4882a593Smuzhiyun
612*4882a593Smuzhiyun soutp(UART_IER, sinp(UART_IER) | UART_IER_MSI);
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun spin_unlock_irqrestore(&hardware[type].lock, flags);
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun return 0;
617*4882a593Smuzhiyun }
618*4882a593Smuzhiyun
serial_ir_close(struct rc_dev * rcdev)619*4882a593Smuzhiyun static void serial_ir_close(struct rc_dev *rcdev)
620*4882a593Smuzhiyun {
621*4882a593Smuzhiyun unsigned long flags;
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun spin_lock_irqsave(&hardware[type].lock, flags);
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun /* Set DLAB 0. */
626*4882a593Smuzhiyun soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun /* First of all, disable all interrupts */
629*4882a593Smuzhiyun soutp(UART_IER, sinp(UART_IER) &
630*4882a593Smuzhiyun (~(UART_IER_MSI | UART_IER_RLSI | UART_IER_THRI | UART_IER_RDI)));
631*4882a593Smuzhiyun spin_unlock_irqrestore(&hardware[type].lock, flags);
632*4882a593Smuzhiyun }
633*4882a593Smuzhiyun
serial_ir_tx(struct rc_dev * dev,unsigned int * txbuf,unsigned int count)634*4882a593Smuzhiyun static int serial_ir_tx(struct rc_dev *dev, unsigned int *txbuf,
635*4882a593Smuzhiyun unsigned int count)
636*4882a593Smuzhiyun {
637*4882a593Smuzhiyun unsigned long flags;
638*4882a593Smuzhiyun ktime_t edge;
639*4882a593Smuzhiyun s64 delta;
640*4882a593Smuzhiyun int i;
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun spin_lock_irqsave(&hardware[type].lock, flags);
643*4882a593Smuzhiyun if (type == IR_IRDEO) {
644*4882a593Smuzhiyun /* DTR, RTS down */
645*4882a593Smuzhiyun on();
646*4882a593Smuzhiyun }
647*4882a593Smuzhiyun
648*4882a593Smuzhiyun edge = ktime_get();
649*4882a593Smuzhiyun for (i = 0; i < count; i++) {
650*4882a593Smuzhiyun if (i % 2)
651*4882a593Smuzhiyun hardware[type].send_space();
652*4882a593Smuzhiyun else
653*4882a593Smuzhiyun hardware[type].send_pulse(txbuf[i], edge);
654*4882a593Smuzhiyun
655*4882a593Smuzhiyun edge = ktime_add_us(edge, txbuf[i]);
656*4882a593Smuzhiyun delta = ktime_us_delta(edge, ktime_get());
657*4882a593Smuzhiyun if (delta > 25) {
658*4882a593Smuzhiyun spin_unlock_irqrestore(&hardware[type].lock, flags);
659*4882a593Smuzhiyun usleep_range(delta - 25, delta + 25);
660*4882a593Smuzhiyun spin_lock_irqsave(&hardware[type].lock, flags);
661*4882a593Smuzhiyun } else if (delta > 0) {
662*4882a593Smuzhiyun udelay(delta);
663*4882a593Smuzhiyun }
664*4882a593Smuzhiyun }
665*4882a593Smuzhiyun off();
666*4882a593Smuzhiyun spin_unlock_irqrestore(&hardware[type].lock, flags);
667*4882a593Smuzhiyun return count;
668*4882a593Smuzhiyun }
669*4882a593Smuzhiyun
serial_ir_tx_duty_cycle(struct rc_dev * dev,u32 cycle)670*4882a593Smuzhiyun static int serial_ir_tx_duty_cycle(struct rc_dev *dev, u32 cycle)
671*4882a593Smuzhiyun {
672*4882a593Smuzhiyun serial_ir.duty_cycle = cycle;
673*4882a593Smuzhiyun return 0;
674*4882a593Smuzhiyun }
675*4882a593Smuzhiyun
serial_ir_tx_carrier(struct rc_dev * dev,u32 carrier)676*4882a593Smuzhiyun static int serial_ir_tx_carrier(struct rc_dev *dev, u32 carrier)
677*4882a593Smuzhiyun {
678*4882a593Smuzhiyun if (carrier > 500000 || carrier < 20000)
679*4882a593Smuzhiyun return -EINVAL;
680*4882a593Smuzhiyun
681*4882a593Smuzhiyun serial_ir.carrier = carrier;
682*4882a593Smuzhiyun return 0;
683*4882a593Smuzhiyun }
684*4882a593Smuzhiyun
serial_ir_suspend(struct platform_device * dev,pm_message_t state)685*4882a593Smuzhiyun static int serial_ir_suspend(struct platform_device *dev,
686*4882a593Smuzhiyun pm_message_t state)
687*4882a593Smuzhiyun {
688*4882a593Smuzhiyun /* Set DLAB 0. */
689*4882a593Smuzhiyun soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
690*4882a593Smuzhiyun
691*4882a593Smuzhiyun /* Disable all interrupts */
692*4882a593Smuzhiyun soutp(UART_IER, sinp(UART_IER) &
693*4882a593Smuzhiyun (~(UART_IER_MSI | UART_IER_RLSI | UART_IER_THRI | UART_IER_RDI)));
694*4882a593Smuzhiyun
695*4882a593Smuzhiyun /* Clear registers. */
696*4882a593Smuzhiyun sinp(UART_LSR);
697*4882a593Smuzhiyun sinp(UART_RX);
698*4882a593Smuzhiyun sinp(UART_IIR);
699*4882a593Smuzhiyun sinp(UART_MSR);
700*4882a593Smuzhiyun
701*4882a593Smuzhiyun return 0;
702*4882a593Smuzhiyun }
703*4882a593Smuzhiyun
serial_ir_resume(struct platform_device * dev)704*4882a593Smuzhiyun static int serial_ir_resume(struct platform_device *dev)
705*4882a593Smuzhiyun {
706*4882a593Smuzhiyun unsigned long flags;
707*4882a593Smuzhiyun int result;
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun result = hardware_init_port();
710*4882a593Smuzhiyun if (result < 0)
711*4882a593Smuzhiyun return result;
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun spin_lock_irqsave(&hardware[type].lock, flags);
714*4882a593Smuzhiyun /* Enable Interrupt */
715*4882a593Smuzhiyun serial_ir.lastkt = ktime_get();
716*4882a593Smuzhiyun soutp(UART_IER, sinp(UART_IER) | UART_IER_MSI);
717*4882a593Smuzhiyun off();
718*4882a593Smuzhiyun
719*4882a593Smuzhiyun spin_unlock_irqrestore(&hardware[type].lock, flags);
720*4882a593Smuzhiyun
721*4882a593Smuzhiyun return 0;
722*4882a593Smuzhiyun }
723*4882a593Smuzhiyun
724*4882a593Smuzhiyun static struct platform_driver serial_ir_driver = {
725*4882a593Smuzhiyun .probe = serial_ir_probe,
726*4882a593Smuzhiyun .suspend = serial_ir_suspend,
727*4882a593Smuzhiyun .resume = serial_ir_resume,
728*4882a593Smuzhiyun .driver = {
729*4882a593Smuzhiyun .name = "serial_ir",
730*4882a593Smuzhiyun },
731*4882a593Smuzhiyun };
732*4882a593Smuzhiyun
serial_ir_init(void)733*4882a593Smuzhiyun static int __init serial_ir_init(void)
734*4882a593Smuzhiyun {
735*4882a593Smuzhiyun int result;
736*4882a593Smuzhiyun
737*4882a593Smuzhiyun result = platform_driver_register(&serial_ir_driver);
738*4882a593Smuzhiyun if (result)
739*4882a593Smuzhiyun return result;
740*4882a593Smuzhiyun
741*4882a593Smuzhiyun serial_ir.pdev = platform_device_alloc("serial_ir", 0);
742*4882a593Smuzhiyun if (!serial_ir.pdev) {
743*4882a593Smuzhiyun result = -ENOMEM;
744*4882a593Smuzhiyun goto exit_driver_unregister;
745*4882a593Smuzhiyun }
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun result = platform_device_add(serial_ir.pdev);
748*4882a593Smuzhiyun if (result)
749*4882a593Smuzhiyun goto exit_device_put;
750*4882a593Smuzhiyun
751*4882a593Smuzhiyun return 0;
752*4882a593Smuzhiyun
753*4882a593Smuzhiyun exit_device_put:
754*4882a593Smuzhiyun platform_device_put(serial_ir.pdev);
755*4882a593Smuzhiyun exit_driver_unregister:
756*4882a593Smuzhiyun platform_driver_unregister(&serial_ir_driver);
757*4882a593Smuzhiyun return result;
758*4882a593Smuzhiyun }
759*4882a593Smuzhiyun
serial_ir_exit(void)760*4882a593Smuzhiyun static void serial_ir_exit(void)
761*4882a593Smuzhiyun {
762*4882a593Smuzhiyun platform_device_unregister(serial_ir.pdev);
763*4882a593Smuzhiyun platform_driver_unregister(&serial_ir_driver);
764*4882a593Smuzhiyun }
765*4882a593Smuzhiyun
serial_ir_init_module(void)766*4882a593Smuzhiyun static int __init serial_ir_init_module(void)
767*4882a593Smuzhiyun {
768*4882a593Smuzhiyun switch (type) {
769*4882a593Smuzhiyun case IR_HOMEBREW:
770*4882a593Smuzhiyun case IR_IRDEO:
771*4882a593Smuzhiyun case IR_IRDEO_REMOTE:
772*4882a593Smuzhiyun case IR_ANIMAX:
773*4882a593Smuzhiyun case IR_IGOR:
774*4882a593Smuzhiyun /* if nothing specified, use ttyS0/com1 and irq 4 */
775*4882a593Smuzhiyun io = io ? io : 0x3f8;
776*4882a593Smuzhiyun irq = irq ? irq : 4;
777*4882a593Smuzhiyun break;
778*4882a593Smuzhiyun default:
779*4882a593Smuzhiyun return -EINVAL;
780*4882a593Smuzhiyun }
781*4882a593Smuzhiyun if (!softcarrier) {
782*4882a593Smuzhiyun switch (type) {
783*4882a593Smuzhiyun case IR_HOMEBREW:
784*4882a593Smuzhiyun case IR_IGOR:
785*4882a593Smuzhiyun hardware[type].set_send_carrier = false;
786*4882a593Smuzhiyun hardware[type].set_duty_cycle = false;
787*4882a593Smuzhiyun break;
788*4882a593Smuzhiyun }
789*4882a593Smuzhiyun }
790*4882a593Smuzhiyun
791*4882a593Smuzhiyun /* make sure sense is either -1, 0, or 1 */
792*4882a593Smuzhiyun if (sense != -1)
793*4882a593Smuzhiyun sense = !!sense;
794*4882a593Smuzhiyun
795*4882a593Smuzhiyun return serial_ir_init();
796*4882a593Smuzhiyun }
797*4882a593Smuzhiyun
serial_ir_exit_module(void)798*4882a593Smuzhiyun static void __exit serial_ir_exit_module(void)
799*4882a593Smuzhiyun {
800*4882a593Smuzhiyun del_timer_sync(&serial_ir.timeout_timer);
801*4882a593Smuzhiyun serial_ir_exit();
802*4882a593Smuzhiyun }
803*4882a593Smuzhiyun
804*4882a593Smuzhiyun module_init(serial_ir_init_module);
805*4882a593Smuzhiyun module_exit(serial_ir_exit_module);
806*4882a593Smuzhiyun
807*4882a593Smuzhiyun MODULE_DESCRIPTION("Infra-red receiver driver for serial ports.");
808*4882a593Smuzhiyun MODULE_AUTHOR("Ralph Metzler, Trent Piepho, Ben Pfaff, Christoph Bartelmus, Andrei Tanas");
809*4882a593Smuzhiyun MODULE_LICENSE("GPL");
810*4882a593Smuzhiyun
811*4882a593Smuzhiyun module_param(type, int, 0444);
812*4882a593Smuzhiyun MODULE_PARM_DESC(type, "Hardware type (0 = home-brew, 1 = IRdeo, 2 = IRdeo Remote, 3 = AnimaX, 4 = IgorPlug");
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun module_param_hw(io, int, ioport, 0444);
815*4882a593Smuzhiyun MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)");
816*4882a593Smuzhiyun
817*4882a593Smuzhiyun /* some architectures (e.g. intel xscale) have memory mapped registers */
818*4882a593Smuzhiyun module_param_hw(iommap, ulong, other, 0444);
819*4882a593Smuzhiyun MODULE_PARM_DESC(iommap, "physical base for memory mapped I/O (0 = no memory mapped io)");
820*4882a593Smuzhiyun
821*4882a593Smuzhiyun /*
822*4882a593Smuzhiyun * some architectures (e.g. intel xscale) align the 8bit serial registers
823*4882a593Smuzhiyun * on 32bit word boundaries.
824*4882a593Smuzhiyun * See linux-kernel/drivers/tty/serial/8250/8250.c serial_in()/out()
825*4882a593Smuzhiyun */
826*4882a593Smuzhiyun module_param_hw(ioshift, int, other, 0444);
827*4882a593Smuzhiyun MODULE_PARM_DESC(ioshift, "shift I/O register offset (0 = no shift)");
828*4882a593Smuzhiyun
829*4882a593Smuzhiyun module_param_hw(irq, int, irq, 0444);
830*4882a593Smuzhiyun MODULE_PARM_DESC(irq, "Interrupt (4 or 3)");
831*4882a593Smuzhiyun
832*4882a593Smuzhiyun module_param_hw(share_irq, bool, other, 0444);
833*4882a593Smuzhiyun MODULE_PARM_DESC(share_irq, "Share interrupts (0 = off, 1 = on)");
834*4882a593Smuzhiyun
835*4882a593Smuzhiyun module_param(sense, int, 0444);
836*4882a593Smuzhiyun MODULE_PARM_DESC(sense, "Override autodetection of IR receiver circuit (0 = active high, 1 = active low )");
837*4882a593Smuzhiyun
838*4882a593Smuzhiyun #ifdef CONFIG_IR_SERIAL_TRANSMITTER
839*4882a593Smuzhiyun module_param(txsense, bool, 0444);
840*4882a593Smuzhiyun MODULE_PARM_DESC(txsense, "Sense of transmitter circuit (0 = active high, 1 = active low )");
841*4882a593Smuzhiyun #endif
842*4882a593Smuzhiyun
843*4882a593Smuzhiyun module_param(softcarrier, bool, 0444);
844*4882a593Smuzhiyun MODULE_PARM_DESC(softcarrier, "Software carrier (0 = off, 1 = on, default on)");
845