1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * vsp1_uds.c -- R-Car VSP1 Up and Down Scaler
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2013-2014 Renesas Electronics Corporation
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/device.h>
11*4882a593Smuzhiyun #include <linux/gfp.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <media/v4l2-subdev.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include "vsp1.h"
16*4882a593Smuzhiyun #include "vsp1_dl.h"
17*4882a593Smuzhiyun #include "vsp1_pipe.h"
18*4882a593Smuzhiyun #include "vsp1_uds.h"
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #define UDS_MIN_SIZE 4U
21*4882a593Smuzhiyun #define UDS_MAX_SIZE 8190U
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #define UDS_MIN_FACTOR 0x0100
24*4882a593Smuzhiyun #define UDS_MAX_FACTOR 0xffff
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun /* -----------------------------------------------------------------------------
27*4882a593Smuzhiyun * Device Access
28*4882a593Smuzhiyun */
29*4882a593Smuzhiyun
vsp1_uds_write(struct vsp1_uds * uds,struct vsp1_dl_body * dlb,u32 reg,u32 data)30*4882a593Smuzhiyun static inline void vsp1_uds_write(struct vsp1_uds *uds,
31*4882a593Smuzhiyun struct vsp1_dl_body *dlb, u32 reg, u32 data)
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun vsp1_dl_body_write(dlb, reg + uds->entity.index * VI6_UDS_OFFSET, data);
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun /* -----------------------------------------------------------------------------
37*4882a593Smuzhiyun * Scaling Computation
38*4882a593Smuzhiyun */
39*4882a593Smuzhiyun
vsp1_uds_set_alpha(struct vsp1_entity * entity,struct vsp1_dl_body * dlb,unsigned int alpha)40*4882a593Smuzhiyun void vsp1_uds_set_alpha(struct vsp1_entity *entity, struct vsp1_dl_body *dlb,
41*4882a593Smuzhiyun unsigned int alpha)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun struct vsp1_uds *uds = to_uds(&entity->subdev);
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun vsp1_uds_write(uds, dlb, VI6_UDS_ALPVAL,
46*4882a593Smuzhiyun alpha << VI6_UDS_ALPVAL_VAL0_SHIFT);
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun /*
50*4882a593Smuzhiyun * uds_output_size - Return the output size for an input size and scaling ratio
51*4882a593Smuzhiyun * @input: input size in pixels
52*4882a593Smuzhiyun * @ratio: scaling ratio in U4.12 fixed-point format
53*4882a593Smuzhiyun */
uds_output_size(unsigned int input,unsigned int ratio)54*4882a593Smuzhiyun static unsigned int uds_output_size(unsigned int input, unsigned int ratio)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun if (ratio > 4096) {
57*4882a593Smuzhiyun /* Down-scaling */
58*4882a593Smuzhiyun unsigned int mp;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun mp = ratio / 4096;
61*4882a593Smuzhiyun mp = mp < 4 ? 1 : (mp < 8 ? 2 : 4);
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun return (input - 1) / mp * mp * 4096 / ratio + 1;
64*4882a593Smuzhiyun } else {
65*4882a593Smuzhiyun /* Up-scaling */
66*4882a593Smuzhiyun return (input - 1) * 4096 / ratio + 1;
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun /*
71*4882a593Smuzhiyun * uds_output_limits - Return the min and max output sizes for an input size
72*4882a593Smuzhiyun * @input: input size in pixels
73*4882a593Smuzhiyun * @minimum: minimum output size (returned)
74*4882a593Smuzhiyun * @maximum: maximum output size (returned)
75*4882a593Smuzhiyun */
uds_output_limits(unsigned int input,unsigned int * minimum,unsigned int * maximum)76*4882a593Smuzhiyun static void uds_output_limits(unsigned int input,
77*4882a593Smuzhiyun unsigned int *minimum, unsigned int *maximum)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun *minimum = max(uds_output_size(input, UDS_MAX_FACTOR), UDS_MIN_SIZE);
80*4882a593Smuzhiyun *maximum = min(uds_output_size(input, UDS_MIN_FACTOR), UDS_MAX_SIZE);
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun /*
84*4882a593Smuzhiyun * uds_passband_width - Return the passband filter width for a scaling ratio
85*4882a593Smuzhiyun * @ratio: scaling ratio in U4.12 fixed-point format
86*4882a593Smuzhiyun */
uds_passband_width(unsigned int ratio)87*4882a593Smuzhiyun static unsigned int uds_passband_width(unsigned int ratio)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun if (ratio >= 4096) {
90*4882a593Smuzhiyun /* Down-scaling */
91*4882a593Smuzhiyun unsigned int mp;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun mp = ratio / 4096;
94*4882a593Smuzhiyun mp = mp < 4 ? 1 : (mp < 8 ? 2 : 4);
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun return 64 * 4096 * mp / ratio;
97*4882a593Smuzhiyun } else {
98*4882a593Smuzhiyun /* Up-scaling */
99*4882a593Smuzhiyun return 64;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
uds_compute_ratio(unsigned int input,unsigned int output)103*4882a593Smuzhiyun static unsigned int uds_compute_ratio(unsigned int input, unsigned int output)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun /* TODO: This is an approximation that will need to be refined. */
106*4882a593Smuzhiyun return (input - 1) * 4096 / (output - 1);
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun /* -----------------------------------------------------------------------------
110*4882a593Smuzhiyun * V4L2 Subdevice Pad Operations
111*4882a593Smuzhiyun */
112*4882a593Smuzhiyun
uds_enum_mbus_code(struct v4l2_subdev * subdev,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)113*4882a593Smuzhiyun static int uds_enum_mbus_code(struct v4l2_subdev *subdev,
114*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
115*4882a593Smuzhiyun struct v4l2_subdev_mbus_code_enum *code)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun static const unsigned int codes[] = {
118*4882a593Smuzhiyun MEDIA_BUS_FMT_ARGB8888_1X32,
119*4882a593Smuzhiyun MEDIA_BUS_FMT_AYUV8_1X32,
120*4882a593Smuzhiyun };
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun return vsp1_subdev_enum_mbus_code(subdev, cfg, code, codes,
123*4882a593Smuzhiyun ARRAY_SIZE(codes));
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun
uds_enum_frame_size(struct v4l2_subdev * subdev,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)126*4882a593Smuzhiyun static int uds_enum_frame_size(struct v4l2_subdev *subdev,
127*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
128*4882a593Smuzhiyun struct v4l2_subdev_frame_size_enum *fse)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun struct vsp1_uds *uds = to_uds(subdev);
131*4882a593Smuzhiyun struct v4l2_subdev_pad_config *config;
132*4882a593Smuzhiyun struct v4l2_mbus_framefmt *format;
133*4882a593Smuzhiyun int ret = 0;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun config = vsp1_entity_get_pad_config(&uds->entity, cfg, fse->which);
136*4882a593Smuzhiyun if (!config)
137*4882a593Smuzhiyun return -EINVAL;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun format = vsp1_entity_get_pad_format(&uds->entity, config,
140*4882a593Smuzhiyun UDS_PAD_SINK);
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun mutex_lock(&uds->entity.lock);
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun if (fse->index || fse->code != format->code) {
145*4882a593Smuzhiyun ret = -EINVAL;
146*4882a593Smuzhiyun goto done;
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun if (fse->pad == UDS_PAD_SINK) {
150*4882a593Smuzhiyun fse->min_width = UDS_MIN_SIZE;
151*4882a593Smuzhiyun fse->max_width = UDS_MAX_SIZE;
152*4882a593Smuzhiyun fse->min_height = UDS_MIN_SIZE;
153*4882a593Smuzhiyun fse->max_height = UDS_MAX_SIZE;
154*4882a593Smuzhiyun } else {
155*4882a593Smuzhiyun uds_output_limits(format->width, &fse->min_width,
156*4882a593Smuzhiyun &fse->max_width);
157*4882a593Smuzhiyun uds_output_limits(format->height, &fse->min_height,
158*4882a593Smuzhiyun &fse->max_height);
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun done:
162*4882a593Smuzhiyun mutex_unlock(&uds->entity.lock);
163*4882a593Smuzhiyun return ret;
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun
uds_try_format(struct vsp1_uds * uds,struct v4l2_subdev_pad_config * config,unsigned int pad,struct v4l2_mbus_framefmt * fmt)166*4882a593Smuzhiyun static void uds_try_format(struct vsp1_uds *uds,
167*4882a593Smuzhiyun struct v4l2_subdev_pad_config *config,
168*4882a593Smuzhiyun unsigned int pad, struct v4l2_mbus_framefmt *fmt)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun struct v4l2_mbus_framefmt *format;
171*4882a593Smuzhiyun unsigned int minimum;
172*4882a593Smuzhiyun unsigned int maximum;
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun switch (pad) {
175*4882a593Smuzhiyun case UDS_PAD_SINK:
176*4882a593Smuzhiyun /* Default to YUV if the requested format is not supported. */
177*4882a593Smuzhiyun if (fmt->code != MEDIA_BUS_FMT_ARGB8888_1X32 &&
178*4882a593Smuzhiyun fmt->code != MEDIA_BUS_FMT_AYUV8_1X32)
179*4882a593Smuzhiyun fmt->code = MEDIA_BUS_FMT_AYUV8_1X32;
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun fmt->width = clamp(fmt->width, UDS_MIN_SIZE, UDS_MAX_SIZE);
182*4882a593Smuzhiyun fmt->height = clamp(fmt->height, UDS_MIN_SIZE, UDS_MAX_SIZE);
183*4882a593Smuzhiyun break;
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun case UDS_PAD_SOURCE:
186*4882a593Smuzhiyun /* The UDS scales but can't perform format conversion. */
187*4882a593Smuzhiyun format = vsp1_entity_get_pad_format(&uds->entity, config,
188*4882a593Smuzhiyun UDS_PAD_SINK);
189*4882a593Smuzhiyun fmt->code = format->code;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun uds_output_limits(format->width, &minimum, &maximum);
192*4882a593Smuzhiyun fmt->width = clamp(fmt->width, minimum, maximum);
193*4882a593Smuzhiyun uds_output_limits(format->height, &minimum, &maximum);
194*4882a593Smuzhiyun fmt->height = clamp(fmt->height, minimum, maximum);
195*4882a593Smuzhiyun break;
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun fmt->field = V4L2_FIELD_NONE;
199*4882a593Smuzhiyun fmt->colorspace = V4L2_COLORSPACE_SRGB;
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun
uds_set_format(struct v4l2_subdev * subdev,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)202*4882a593Smuzhiyun static int uds_set_format(struct v4l2_subdev *subdev,
203*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
204*4882a593Smuzhiyun struct v4l2_subdev_format *fmt)
205*4882a593Smuzhiyun {
206*4882a593Smuzhiyun struct vsp1_uds *uds = to_uds(subdev);
207*4882a593Smuzhiyun struct v4l2_subdev_pad_config *config;
208*4882a593Smuzhiyun struct v4l2_mbus_framefmt *format;
209*4882a593Smuzhiyun int ret = 0;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun mutex_lock(&uds->entity.lock);
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun config = vsp1_entity_get_pad_config(&uds->entity, cfg, fmt->which);
214*4882a593Smuzhiyun if (!config) {
215*4882a593Smuzhiyun ret = -EINVAL;
216*4882a593Smuzhiyun goto done;
217*4882a593Smuzhiyun }
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun uds_try_format(uds, config, fmt->pad, &fmt->format);
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun format = vsp1_entity_get_pad_format(&uds->entity, config, fmt->pad);
222*4882a593Smuzhiyun *format = fmt->format;
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun if (fmt->pad == UDS_PAD_SINK) {
225*4882a593Smuzhiyun /* Propagate the format to the source pad. */
226*4882a593Smuzhiyun format = vsp1_entity_get_pad_format(&uds->entity, config,
227*4882a593Smuzhiyun UDS_PAD_SOURCE);
228*4882a593Smuzhiyun *format = fmt->format;
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun uds_try_format(uds, config, UDS_PAD_SOURCE, format);
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun done:
234*4882a593Smuzhiyun mutex_unlock(&uds->entity.lock);
235*4882a593Smuzhiyun return ret;
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun /* -----------------------------------------------------------------------------
239*4882a593Smuzhiyun * V4L2 Subdevice Operations
240*4882a593Smuzhiyun */
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun static const struct v4l2_subdev_pad_ops uds_pad_ops = {
243*4882a593Smuzhiyun .init_cfg = vsp1_entity_init_cfg,
244*4882a593Smuzhiyun .enum_mbus_code = uds_enum_mbus_code,
245*4882a593Smuzhiyun .enum_frame_size = uds_enum_frame_size,
246*4882a593Smuzhiyun .get_fmt = vsp1_subdev_get_pad_format,
247*4882a593Smuzhiyun .set_fmt = uds_set_format,
248*4882a593Smuzhiyun };
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun static const struct v4l2_subdev_ops uds_ops = {
251*4882a593Smuzhiyun .pad = &uds_pad_ops,
252*4882a593Smuzhiyun };
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun /* -----------------------------------------------------------------------------
255*4882a593Smuzhiyun * VSP1 Entity Operations
256*4882a593Smuzhiyun */
257*4882a593Smuzhiyun
uds_configure_stream(struct vsp1_entity * entity,struct vsp1_pipeline * pipe,struct vsp1_dl_list * dl,struct vsp1_dl_body * dlb)258*4882a593Smuzhiyun static void uds_configure_stream(struct vsp1_entity *entity,
259*4882a593Smuzhiyun struct vsp1_pipeline *pipe,
260*4882a593Smuzhiyun struct vsp1_dl_list *dl,
261*4882a593Smuzhiyun struct vsp1_dl_body *dlb)
262*4882a593Smuzhiyun {
263*4882a593Smuzhiyun struct vsp1_uds *uds = to_uds(&entity->subdev);
264*4882a593Smuzhiyun const struct v4l2_mbus_framefmt *output;
265*4882a593Smuzhiyun const struct v4l2_mbus_framefmt *input;
266*4882a593Smuzhiyun unsigned int hscale;
267*4882a593Smuzhiyun unsigned int vscale;
268*4882a593Smuzhiyun bool multitap;
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun input = vsp1_entity_get_pad_format(&uds->entity, uds->entity.config,
271*4882a593Smuzhiyun UDS_PAD_SINK);
272*4882a593Smuzhiyun output = vsp1_entity_get_pad_format(&uds->entity, uds->entity.config,
273*4882a593Smuzhiyun UDS_PAD_SOURCE);
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun hscale = uds_compute_ratio(input->width, output->width);
276*4882a593Smuzhiyun vscale = uds_compute_ratio(input->height, output->height);
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun dev_dbg(uds->entity.vsp1->dev, "hscale %u vscale %u\n", hscale, vscale);
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun /*
281*4882a593Smuzhiyun * Multi-tap scaling can't be enabled along with alpha scaling when
282*4882a593Smuzhiyun * scaling down with a factor lower than or equal to 1/2 in either
283*4882a593Smuzhiyun * direction.
284*4882a593Smuzhiyun */
285*4882a593Smuzhiyun if (uds->scale_alpha && (hscale >= 8192 || vscale >= 8192))
286*4882a593Smuzhiyun multitap = false;
287*4882a593Smuzhiyun else
288*4882a593Smuzhiyun multitap = true;
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun vsp1_uds_write(uds, dlb, VI6_UDS_CTRL,
291*4882a593Smuzhiyun (uds->scale_alpha ? VI6_UDS_CTRL_AON : 0) |
292*4882a593Smuzhiyun (multitap ? VI6_UDS_CTRL_BC : 0));
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun vsp1_uds_write(uds, dlb, VI6_UDS_PASS_BWIDTH,
295*4882a593Smuzhiyun (uds_passband_width(hscale)
296*4882a593Smuzhiyun << VI6_UDS_PASS_BWIDTH_H_SHIFT) |
297*4882a593Smuzhiyun (uds_passband_width(vscale)
298*4882a593Smuzhiyun << VI6_UDS_PASS_BWIDTH_V_SHIFT));
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun /* Set the scaling ratios. */
301*4882a593Smuzhiyun vsp1_uds_write(uds, dlb, VI6_UDS_SCALE,
302*4882a593Smuzhiyun (hscale << VI6_UDS_SCALE_HFRAC_SHIFT) |
303*4882a593Smuzhiyun (vscale << VI6_UDS_SCALE_VFRAC_SHIFT));
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun
uds_configure_partition(struct vsp1_entity * entity,struct vsp1_pipeline * pipe,struct vsp1_dl_list * dl,struct vsp1_dl_body * dlb)306*4882a593Smuzhiyun static void uds_configure_partition(struct vsp1_entity *entity,
307*4882a593Smuzhiyun struct vsp1_pipeline *pipe,
308*4882a593Smuzhiyun struct vsp1_dl_list *dl,
309*4882a593Smuzhiyun struct vsp1_dl_body *dlb)
310*4882a593Smuzhiyun {
311*4882a593Smuzhiyun struct vsp1_uds *uds = to_uds(&entity->subdev);
312*4882a593Smuzhiyun struct vsp1_partition *partition = pipe->partition;
313*4882a593Smuzhiyun const struct v4l2_mbus_framefmt *output;
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun output = vsp1_entity_get_pad_format(&uds->entity, uds->entity.config,
316*4882a593Smuzhiyun UDS_PAD_SOURCE);
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun /* Input size clipping. */
319*4882a593Smuzhiyun vsp1_uds_write(uds, dlb, VI6_UDS_HSZCLIP, VI6_UDS_HSZCLIP_HCEN |
320*4882a593Smuzhiyun (0 << VI6_UDS_HSZCLIP_HCL_OFST_SHIFT) |
321*4882a593Smuzhiyun (partition->uds_sink.width
322*4882a593Smuzhiyun << VI6_UDS_HSZCLIP_HCL_SIZE_SHIFT));
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun /* Output size clipping. */
325*4882a593Smuzhiyun vsp1_uds_write(uds, dlb, VI6_UDS_CLIP_SIZE,
326*4882a593Smuzhiyun (partition->uds_source.width
327*4882a593Smuzhiyun << VI6_UDS_CLIP_SIZE_HSIZE_SHIFT) |
328*4882a593Smuzhiyun (output->height
329*4882a593Smuzhiyun << VI6_UDS_CLIP_SIZE_VSIZE_SHIFT));
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun
uds_max_width(struct vsp1_entity * entity,struct vsp1_pipeline * pipe)332*4882a593Smuzhiyun static unsigned int uds_max_width(struct vsp1_entity *entity,
333*4882a593Smuzhiyun struct vsp1_pipeline *pipe)
334*4882a593Smuzhiyun {
335*4882a593Smuzhiyun struct vsp1_uds *uds = to_uds(&entity->subdev);
336*4882a593Smuzhiyun const struct v4l2_mbus_framefmt *output;
337*4882a593Smuzhiyun const struct v4l2_mbus_framefmt *input;
338*4882a593Smuzhiyun unsigned int hscale;
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun input = vsp1_entity_get_pad_format(&uds->entity, uds->entity.config,
341*4882a593Smuzhiyun UDS_PAD_SINK);
342*4882a593Smuzhiyun output = vsp1_entity_get_pad_format(&uds->entity, uds->entity.config,
343*4882a593Smuzhiyun UDS_PAD_SOURCE);
344*4882a593Smuzhiyun hscale = output->width / input->width;
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun /*
347*4882a593Smuzhiyun * The maximum width of the UDS is 304 pixels. These are input pixels
348*4882a593Smuzhiyun * in the event of up-scaling, and output pixels in the event of
349*4882a593Smuzhiyun * downscaling.
350*4882a593Smuzhiyun *
351*4882a593Smuzhiyun * To support overlapping partition windows we clamp at units of 256 and
352*4882a593Smuzhiyun * the remaining pixels are reserved.
353*4882a593Smuzhiyun */
354*4882a593Smuzhiyun if (hscale <= 2)
355*4882a593Smuzhiyun return 256;
356*4882a593Smuzhiyun else if (hscale <= 4)
357*4882a593Smuzhiyun return 512;
358*4882a593Smuzhiyun else if (hscale <= 8)
359*4882a593Smuzhiyun return 1024;
360*4882a593Smuzhiyun else
361*4882a593Smuzhiyun return 2048;
362*4882a593Smuzhiyun }
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun /* -----------------------------------------------------------------------------
365*4882a593Smuzhiyun * Partition Algorithm Support
366*4882a593Smuzhiyun */
367*4882a593Smuzhiyun
uds_partition(struct vsp1_entity * entity,struct vsp1_pipeline * pipe,struct vsp1_partition * partition,unsigned int partition_idx,struct vsp1_partition_window * window)368*4882a593Smuzhiyun static void uds_partition(struct vsp1_entity *entity,
369*4882a593Smuzhiyun struct vsp1_pipeline *pipe,
370*4882a593Smuzhiyun struct vsp1_partition *partition,
371*4882a593Smuzhiyun unsigned int partition_idx,
372*4882a593Smuzhiyun struct vsp1_partition_window *window)
373*4882a593Smuzhiyun {
374*4882a593Smuzhiyun struct vsp1_uds *uds = to_uds(&entity->subdev);
375*4882a593Smuzhiyun const struct v4l2_mbus_framefmt *output;
376*4882a593Smuzhiyun const struct v4l2_mbus_framefmt *input;
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun /* Initialise the partition state. */
379*4882a593Smuzhiyun partition->uds_sink = *window;
380*4882a593Smuzhiyun partition->uds_source = *window;
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun input = vsp1_entity_get_pad_format(&uds->entity, uds->entity.config,
383*4882a593Smuzhiyun UDS_PAD_SINK);
384*4882a593Smuzhiyun output = vsp1_entity_get_pad_format(&uds->entity, uds->entity.config,
385*4882a593Smuzhiyun UDS_PAD_SOURCE);
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun partition->uds_sink.width = window->width * input->width
388*4882a593Smuzhiyun / output->width;
389*4882a593Smuzhiyun partition->uds_sink.left = window->left * input->width
390*4882a593Smuzhiyun / output->width;
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun *window = partition->uds_sink;
393*4882a593Smuzhiyun }
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun static const struct vsp1_entity_operations uds_entity_ops = {
396*4882a593Smuzhiyun .configure_stream = uds_configure_stream,
397*4882a593Smuzhiyun .configure_partition = uds_configure_partition,
398*4882a593Smuzhiyun .max_width = uds_max_width,
399*4882a593Smuzhiyun .partition = uds_partition,
400*4882a593Smuzhiyun };
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun /* -----------------------------------------------------------------------------
403*4882a593Smuzhiyun * Initialization and Cleanup
404*4882a593Smuzhiyun */
405*4882a593Smuzhiyun
vsp1_uds_create(struct vsp1_device * vsp1,unsigned int index)406*4882a593Smuzhiyun struct vsp1_uds *vsp1_uds_create(struct vsp1_device *vsp1, unsigned int index)
407*4882a593Smuzhiyun {
408*4882a593Smuzhiyun struct vsp1_uds *uds;
409*4882a593Smuzhiyun char name[6];
410*4882a593Smuzhiyun int ret;
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun uds = devm_kzalloc(vsp1->dev, sizeof(*uds), GFP_KERNEL);
413*4882a593Smuzhiyun if (uds == NULL)
414*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun uds->entity.ops = &uds_entity_ops;
417*4882a593Smuzhiyun uds->entity.type = VSP1_ENTITY_UDS;
418*4882a593Smuzhiyun uds->entity.index = index;
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun sprintf(name, "uds.%u", index);
421*4882a593Smuzhiyun ret = vsp1_entity_init(vsp1, &uds->entity, name, 2, &uds_ops,
422*4882a593Smuzhiyun MEDIA_ENT_F_PROC_VIDEO_SCALER);
423*4882a593Smuzhiyun if (ret < 0)
424*4882a593Smuzhiyun return ERR_PTR(ret);
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun return uds;
427*4882a593Smuzhiyun }
428