1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0+ */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * vsp1_rwpf.h -- R-Car VSP1 Read and Write Pixel Formatters 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2013-2014 Renesas Electronics Corporation 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com) 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun #ifndef __VSP1_RWPF_H__ 10*4882a593Smuzhiyun #define __VSP1_RWPF_H__ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include <linux/spinlock.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #include <media/media-entity.h> 15*4882a593Smuzhiyun #include <media/v4l2-ctrls.h> 16*4882a593Smuzhiyun #include <media/v4l2-subdev.h> 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #include "vsp1.h" 19*4882a593Smuzhiyun #include "vsp1_entity.h" 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define RWPF_PAD_SINK 0 22*4882a593Smuzhiyun #define RWPF_PAD_SOURCE 1 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun struct v4l2_ctrl; 25*4882a593Smuzhiyun struct vsp1_dl_manager; 26*4882a593Smuzhiyun struct vsp1_rwpf; 27*4882a593Smuzhiyun struct vsp1_video; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun struct vsp1_rwpf_memory { 30*4882a593Smuzhiyun dma_addr_t addr[3]; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun struct vsp1_rwpf { 34*4882a593Smuzhiyun struct vsp1_entity entity; 35*4882a593Smuzhiyun struct v4l2_ctrl_handler ctrls; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun struct vsp1_video *video; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun unsigned int max_width; 40*4882a593Smuzhiyun unsigned int max_height; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun struct v4l2_pix_format_mplane format; 43*4882a593Smuzhiyun const struct vsp1_format_info *fmtinfo; 44*4882a593Smuzhiyun unsigned int brx_input; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun unsigned int alpha; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun u32 mult_alpha; 49*4882a593Smuzhiyun u32 outfmt; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun struct { 52*4882a593Smuzhiyun spinlock_t lock; 53*4882a593Smuzhiyun struct { 54*4882a593Smuzhiyun struct v4l2_ctrl *vflip; 55*4882a593Smuzhiyun struct v4l2_ctrl *hflip; 56*4882a593Smuzhiyun struct v4l2_ctrl *rotate; 57*4882a593Smuzhiyun } ctrls; 58*4882a593Smuzhiyun unsigned int pending; 59*4882a593Smuzhiyun unsigned int active; 60*4882a593Smuzhiyun bool rotate; 61*4882a593Smuzhiyun } flip; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun struct vsp1_rwpf_memory mem; 64*4882a593Smuzhiyun bool writeback; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun struct vsp1_dl_manager *dlm; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun to_rwpf(struct v4l2_subdev * subdev)69*4882a593Smuzhiyunstatic inline struct vsp1_rwpf *to_rwpf(struct v4l2_subdev *subdev) 70*4882a593Smuzhiyun { 71*4882a593Smuzhiyun return container_of(subdev, struct vsp1_rwpf, entity.subdev); 72*4882a593Smuzhiyun } 73*4882a593Smuzhiyun entity_to_rwpf(struct vsp1_entity * entity)74*4882a593Smuzhiyunstatic inline struct vsp1_rwpf *entity_to_rwpf(struct vsp1_entity *entity) 75*4882a593Smuzhiyun { 76*4882a593Smuzhiyun return container_of(entity, struct vsp1_rwpf, entity); 77*4882a593Smuzhiyun } 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun struct vsp1_rwpf *vsp1_rpf_create(struct vsp1_device *vsp1, unsigned int index); 80*4882a593Smuzhiyun struct vsp1_rwpf *vsp1_wpf_create(struct vsp1_device *vsp1, unsigned int index); 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun int vsp1_rwpf_init_ctrls(struct vsp1_rwpf *rwpf, unsigned int ncontrols); 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun extern const struct v4l2_subdev_pad_ops vsp1_rwpf_pad_ops; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun struct v4l2_rect *vsp1_rwpf_get_crop(struct vsp1_rwpf *rwpf, 87*4882a593Smuzhiyun struct v4l2_subdev_pad_config *config); 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun #endif /* __VSP1_RWPF_H__ */ 90