1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0+ */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * vsp1_entity.h -- R-Car VSP1 Base Entity
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2013-2014 Renesas Electronics Corporation
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun #ifndef __VSP1_ENTITY_H__
10*4882a593Smuzhiyun #define __VSP1_ENTITY_H__
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/list.h>
13*4882a593Smuzhiyun #include <linux/mutex.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include <media/v4l2-subdev.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun struct vsp1_device;
18*4882a593Smuzhiyun struct vsp1_dl_body;
19*4882a593Smuzhiyun struct vsp1_dl_list;
20*4882a593Smuzhiyun struct vsp1_pipeline;
21*4882a593Smuzhiyun struct vsp1_partition;
22*4882a593Smuzhiyun struct vsp1_partition_window;
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun enum vsp1_entity_type {
25*4882a593Smuzhiyun VSP1_ENTITY_BRS,
26*4882a593Smuzhiyun VSP1_ENTITY_BRU,
27*4882a593Smuzhiyun VSP1_ENTITY_CLU,
28*4882a593Smuzhiyun VSP1_ENTITY_HGO,
29*4882a593Smuzhiyun VSP1_ENTITY_HGT,
30*4882a593Smuzhiyun VSP1_ENTITY_HSI,
31*4882a593Smuzhiyun VSP1_ENTITY_HST,
32*4882a593Smuzhiyun VSP1_ENTITY_LIF,
33*4882a593Smuzhiyun VSP1_ENTITY_LUT,
34*4882a593Smuzhiyun VSP1_ENTITY_RPF,
35*4882a593Smuzhiyun VSP1_ENTITY_SRU,
36*4882a593Smuzhiyun VSP1_ENTITY_UDS,
37*4882a593Smuzhiyun VSP1_ENTITY_UIF,
38*4882a593Smuzhiyun VSP1_ENTITY_WPF,
39*4882a593Smuzhiyun };
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun #define VSP1_ENTITY_MAX_INPUTS 5 /* For the BRU */
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun /*
44*4882a593Smuzhiyun * struct vsp1_route - Entity routing configuration
45*4882a593Smuzhiyun * @type: Entity type this routing entry is associated with
46*4882a593Smuzhiyun * @index: Entity index this routing entry is associated with
47*4882a593Smuzhiyun * @reg: Output routing configuration register
48*4882a593Smuzhiyun * @inputs: Target node value for each input
49*4882a593Smuzhiyun * @output: Target node value for entity output
50*4882a593Smuzhiyun *
51*4882a593Smuzhiyun * Each $vsp1_route entry describes routing configuration for the entity
52*4882a593Smuzhiyun * specified by the entry's @type and @index. @reg indicates the register that
53*4882a593Smuzhiyun * holds output routing configuration for the entity, and the @inputs array
54*4882a593Smuzhiyun * store the target node value for each input of the entity. The @output field
55*4882a593Smuzhiyun * stores the target node value of the entity output when used as a source for
56*4882a593Smuzhiyun * histogram generation.
57*4882a593Smuzhiyun */
58*4882a593Smuzhiyun struct vsp1_route {
59*4882a593Smuzhiyun enum vsp1_entity_type type;
60*4882a593Smuzhiyun unsigned int index;
61*4882a593Smuzhiyun unsigned int reg;
62*4882a593Smuzhiyun unsigned int inputs[VSP1_ENTITY_MAX_INPUTS];
63*4882a593Smuzhiyun unsigned int output;
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun /**
67*4882a593Smuzhiyun * struct vsp1_entity_operations - Entity operations
68*4882a593Smuzhiyun * @destroy: Destroy the entity.
69*4882a593Smuzhiyun * @configure_stream: Setup the hardware parameters for the stream which do
70*4882a593Smuzhiyun * not vary between frames (pipeline, formats). Note that
71*4882a593Smuzhiyun * the vsp1_dl_list argument is only valid for display
72*4882a593Smuzhiyun * pipeline and will be NULL for mem-to-mem pipelines.
73*4882a593Smuzhiyun * @configure_frame: Configure the runtime parameters for each frame.
74*4882a593Smuzhiyun * @configure_partition: Configure partition specific parameters.
75*4882a593Smuzhiyun * @max_width: Return the max supported width of data that the entity can
76*4882a593Smuzhiyun * process in a single operation.
77*4882a593Smuzhiyun * @partition: Process the partition construction based on this entity's
78*4882a593Smuzhiyun * configuration.
79*4882a593Smuzhiyun */
80*4882a593Smuzhiyun struct vsp1_entity_operations {
81*4882a593Smuzhiyun void (*destroy)(struct vsp1_entity *);
82*4882a593Smuzhiyun void (*configure_stream)(struct vsp1_entity *, struct vsp1_pipeline *,
83*4882a593Smuzhiyun struct vsp1_dl_list *, struct vsp1_dl_body *);
84*4882a593Smuzhiyun void (*configure_frame)(struct vsp1_entity *, struct vsp1_pipeline *,
85*4882a593Smuzhiyun struct vsp1_dl_list *, struct vsp1_dl_body *);
86*4882a593Smuzhiyun void (*configure_partition)(struct vsp1_entity *,
87*4882a593Smuzhiyun struct vsp1_pipeline *,
88*4882a593Smuzhiyun struct vsp1_dl_list *,
89*4882a593Smuzhiyun struct vsp1_dl_body *);
90*4882a593Smuzhiyun unsigned int (*max_width)(struct vsp1_entity *, struct vsp1_pipeline *);
91*4882a593Smuzhiyun void (*partition)(struct vsp1_entity *, struct vsp1_pipeline *,
92*4882a593Smuzhiyun struct vsp1_partition *, unsigned int,
93*4882a593Smuzhiyun struct vsp1_partition_window *);
94*4882a593Smuzhiyun };
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun struct vsp1_entity {
97*4882a593Smuzhiyun struct vsp1_device *vsp1;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun const struct vsp1_entity_operations *ops;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun enum vsp1_entity_type type;
102*4882a593Smuzhiyun unsigned int index;
103*4882a593Smuzhiyun const struct vsp1_route *route;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun struct vsp1_pipeline *pipe;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun struct list_head list_dev;
108*4882a593Smuzhiyun struct list_head list_pipe;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun struct media_pad *pads;
111*4882a593Smuzhiyun unsigned int source_pad;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun struct vsp1_entity **sources;
114*4882a593Smuzhiyun struct vsp1_entity *sink;
115*4882a593Smuzhiyun unsigned int sink_pad;
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun struct v4l2_subdev subdev;
118*4882a593Smuzhiyun struct v4l2_subdev_pad_config *config;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun struct mutex lock; /* Protects the pad config */
121*4882a593Smuzhiyun };
122*4882a593Smuzhiyun
to_vsp1_entity(struct v4l2_subdev * subdev)123*4882a593Smuzhiyun static inline struct vsp1_entity *to_vsp1_entity(struct v4l2_subdev *subdev)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun return container_of(subdev, struct vsp1_entity, subdev);
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun int vsp1_entity_init(struct vsp1_device *vsp1, struct vsp1_entity *entity,
129*4882a593Smuzhiyun const char *name, unsigned int num_pads,
130*4882a593Smuzhiyun const struct v4l2_subdev_ops *ops, u32 function);
131*4882a593Smuzhiyun void vsp1_entity_destroy(struct vsp1_entity *entity);
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun extern const struct v4l2_subdev_internal_ops vsp1_subdev_internal_ops;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun int vsp1_entity_link_setup(struct media_entity *entity,
136*4882a593Smuzhiyun const struct media_pad *local,
137*4882a593Smuzhiyun const struct media_pad *remote, u32 flags);
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun struct v4l2_subdev_pad_config *
140*4882a593Smuzhiyun vsp1_entity_get_pad_config(struct vsp1_entity *entity,
141*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
142*4882a593Smuzhiyun enum v4l2_subdev_format_whence which);
143*4882a593Smuzhiyun struct v4l2_mbus_framefmt *
144*4882a593Smuzhiyun vsp1_entity_get_pad_format(struct vsp1_entity *entity,
145*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
146*4882a593Smuzhiyun unsigned int pad);
147*4882a593Smuzhiyun struct v4l2_rect *
148*4882a593Smuzhiyun vsp1_entity_get_pad_selection(struct vsp1_entity *entity,
149*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
150*4882a593Smuzhiyun unsigned int pad, unsigned int target);
151*4882a593Smuzhiyun int vsp1_entity_init_cfg(struct v4l2_subdev *subdev,
152*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg);
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun void vsp1_entity_route_setup(struct vsp1_entity *entity,
155*4882a593Smuzhiyun struct vsp1_pipeline *pipe,
156*4882a593Smuzhiyun struct vsp1_dl_body *dlb);
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun void vsp1_entity_configure_stream(struct vsp1_entity *entity,
159*4882a593Smuzhiyun struct vsp1_pipeline *pipe,
160*4882a593Smuzhiyun struct vsp1_dl_list *dl,
161*4882a593Smuzhiyun struct vsp1_dl_body *dlb);
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun void vsp1_entity_configure_frame(struct vsp1_entity *entity,
164*4882a593Smuzhiyun struct vsp1_pipeline *pipe,
165*4882a593Smuzhiyun struct vsp1_dl_list *dl,
166*4882a593Smuzhiyun struct vsp1_dl_body *dlb);
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun void vsp1_entity_configure_partition(struct vsp1_entity *entity,
169*4882a593Smuzhiyun struct vsp1_pipeline *pipe,
170*4882a593Smuzhiyun struct vsp1_dl_list *dl,
171*4882a593Smuzhiyun struct vsp1_dl_body *dlb);
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun struct media_pad *vsp1_entity_remote_pad(struct media_pad *pad);
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun int vsp1_subdev_get_pad_format(struct v4l2_subdev *subdev,
176*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
177*4882a593Smuzhiyun struct v4l2_subdev_format *fmt);
178*4882a593Smuzhiyun int vsp1_subdev_set_pad_format(struct v4l2_subdev *subdev,
179*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
180*4882a593Smuzhiyun struct v4l2_subdev_format *fmt,
181*4882a593Smuzhiyun const unsigned int *codes, unsigned int ncodes,
182*4882a593Smuzhiyun unsigned int min_width, unsigned int min_height,
183*4882a593Smuzhiyun unsigned int max_width, unsigned int max_height);
184*4882a593Smuzhiyun int vsp1_subdev_enum_mbus_code(struct v4l2_subdev *subdev,
185*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
186*4882a593Smuzhiyun struct v4l2_subdev_mbus_code_enum *code,
187*4882a593Smuzhiyun const unsigned int *codes, unsigned int ncodes);
188*4882a593Smuzhiyun int vsp1_subdev_enum_frame_size(struct v4l2_subdev *subdev,
189*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
190*4882a593Smuzhiyun struct v4l2_subdev_frame_size_enum *fse,
191*4882a593Smuzhiyun unsigned int min_w, unsigned int min_h,
192*4882a593Smuzhiyun unsigned int max_w, unsigned int max_h);
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun #endif /* __VSP1_ENTITY_H__ */
195