1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * vsp1_dl.c -- R-Car VSP1 Display List
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2015 Renesas Corporation
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/device.h>
11*4882a593Smuzhiyun #include <linux/dma-mapping.h>
12*4882a593Smuzhiyun #include <linux/gfp.h>
13*4882a593Smuzhiyun #include <linux/refcount.h>
14*4882a593Smuzhiyun #include <linux/slab.h>
15*4882a593Smuzhiyun #include <linux/workqueue.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include "vsp1.h"
18*4882a593Smuzhiyun #include "vsp1_dl.h"
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #define VSP1_DL_NUM_ENTRIES 256
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define VSP1_DLH_INT_ENABLE (1 << 1)
23*4882a593Smuzhiyun #define VSP1_DLH_AUTO_START (1 << 0)
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #define VSP1_DLH_EXT_PRE_CMD_EXEC (1 << 9)
26*4882a593Smuzhiyun #define VSP1_DLH_EXT_POST_CMD_EXEC (1 << 8)
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun struct vsp1_dl_header_list {
29*4882a593Smuzhiyun u32 num_bytes;
30*4882a593Smuzhiyun u32 addr;
31*4882a593Smuzhiyun } __packed;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun struct vsp1_dl_header {
34*4882a593Smuzhiyun u32 num_lists;
35*4882a593Smuzhiyun struct vsp1_dl_header_list lists[8];
36*4882a593Smuzhiyun u32 next_header;
37*4882a593Smuzhiyun u32 flags;
38*4882a593Smuzhiyun } __packed;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun /**
41*4882a593Smuzhiyun * struct vsp1_dl_ext_header - Extended display list header
42*4882a593Smuzhiyun * @padding: padding zero bytes for alignment
43*4882a593Smuzhiyun * @pre_ext_dl_num_cmd: number of pre-extended command bodies to parse
44*4882a593Smuzhiyun * @flags: enables or disables execution of the pre and post command
45*4882a593Smuzhiyun * @pre_ext_dl_plist: start address of pre-extended display list bodies
46*4882a593Smuzhiyun * @post_ext_dl_num_cmd: number of post-extended command bodies to parse
47*4882a593Smuzhiyun * @post_ext_dl_plist: start address of post-extended display list bodies
48*4882a593Smuzhiyun */
49*4882a593Smuzhiyun struct vsp1_dl_ext_header {
50*4882a593Smuzhiyun u32 padding;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun /*
53*4882a593Smuzhiyun * The datasheet represents flags as stored before pre_ext_dl_num_cmd,
54*4882a593Smuzhiyun * expecting 32-bit accesses. The flags are appropriate to the whole
55*4882a593Smuzhiyun * header, not just the pre_ext command, and thus warrant being
56*4882a593Smuzhiyun * separated out. Due to byte ordering, and representing as 16 bit
57*4882a593Smuzhiyun * values here, the flags must be positioned after the
58*4882a593Smuzhiyun * pre_ext_dl_num_cmd.
59*4882a593Smuzhiyun */
60*4882a593Smuzhiyun u16 pre_ext_dl_num_cmd;
61*4882a593Smuzhiyun u16 flags;
62*4882a593Smuzhiyun u32 pre_ext_dl_plist;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun u32 post_ext_dl_num_cmd;
65*4882a593Smuzhiyun u32 post_ext_dl_plist;
66*4882a593Smuzhiyun } __packed;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun struct vsp1_dl_header_extended {
69*4882a593Smuzhiyun struct vsp1_dl_header header;
70*4882a593Smuzhiyun struct vsp1_dl_ext_header ext;
71*4882a593Smuzhiyun } __packed;
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun struct vsp1_dl_entry {
74*4882a593Smuzhiyun u32 addr;
75*4882a593Smuzhiyun u32 data;
76*4882a593Smuzhiyun } __packed;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun /**
79*4882a593Smuzhiyun * struct vsp1_pre_ext_dl_body - Pre Extended Display List Body
80*4882a593Smuzhiyun * @opcode: Extended display list command operation code
81*4882a593Smuzhiyun * @flags: Pre-extended command flags. These are specific to each command
82*4882a593Smuzhiyun * @address_set: Source address set pointer. Must have 16-byte alignment
83*4882a593Smuzhiyun * @reserved: Zero bits for alignment.
84*4882a593Smuzhiyun */
85*4882a593Smuzhiyun struct vsp1_pre_ext_dl_body {
86*4882a593Smuzhiyun u32 opcode;
87*4882a593Smuzhiyun u32 flags;
88*4882a593Smuzhiyun u32 address_set;
89*4882a593Smuzhiyun u32 reserved;
90*4882a593Smuzhiyun } __packed;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun /**
93*4882a593Smuzhiyun * struct vsp1_dl_body - Display list body
94*4882a593Smuzhiyun * @list: entry in the display list list of bodies
95*4882a593Smuzhiyun * @free: entry in the pool free body list
96*4882a593Smuzhiyun * @refcnt: reference tracking for the body
97*4882a593Smuzhiyun * @pool: pool to which this body belongs
98*4882a593Smuzhiyun * @entries: array of entries
99*4882a593Smuzhiyun * @dma: DMA address of the entries
100*4882a593Smuzhiyun * @size: size of the DMA memory in bytes
101*4882a593Smuzhiyun * @num_entries: number of stored entries
102*4882a593Smuzhiyun * @max_entries: number of entries available
103*4882a593Smuzhiyun */
104*4882a593Smuzhiyun struct vsp1_dl_body {
105*4882a593Smuzhiyun struct list_head list;
106*4882a593Smuzhiyun struct list_head free;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun refcount_t refcnt;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun struct vsp1_dl_body_pool *pool;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun struct vsp1_dl_entry *entries;
113*4882a593Smuzhiyun dma_addr_t dma;
114*4882a593Smuzhiyun size_t size;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun unsigned int num_entries;
117*4882a593Smuzhiyun unsigned int max_entries;
118*4882a593Smuzhiyun };
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun /**
121*4882a593Smuzhiyun * struct vsp1_dl_body_pool - display list body pool
122*4882a593Smuzhiyun * @dma: DMA address of the entries
123*4882a593Smuzhiyun * @size: size of the full DMA memory pool in bytes
124*4882a593Smuzhiyun * @mem: CPU memory pointer for the pool
125*4882a593Smuzhiyun * @bodies: Array of DLB structures for the pool
126*4882a593Smuzhiyun * @free: List of free DLB entries
127*4882a593Smuzhiyun * @lock: Protects the free list
128*4882a593Smuzhiyun * @vsp1: the VSP1 device
129*4882a593Smuzhiyun */
130*4882a593Smuzhiyun struct vsp1_dl_body_pool {
131*4882a593Smuzhiyun /* DMA allocation */
132*4882a593Smuzhiyun dma_addr_t dma;
133*4882a593Smuzhiyun size_t size;
134*4882a593Smuzhiyun void *mem;
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun /* Body management */
137*4882a593Smuzhiyun struct vsp1_dl_body *bodies;
138*4882a593Smuzhiyun struct list_head free;
139*4882a593Smuzhiyun spinlock_t lock;
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun struct vsp1_device *vsp1;
142*4882a593Smuzhiyun };
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun /**
145*4882a593Smuzhiyun * struct vsp1_cmd_pool - Display List commands pool
146*4882a593Smuzhiyun * @dma: DMA address of the entries
147*4882a593Smuzhiyun * @size: size of the full DMA memory pool in bytes
148*4882a593Smuzhiyun * @mem: CPU memory pointer for the pool
149*4882a593Smuzhiyun * @cmds: Array of command structures for the pool
150*4882a593Smuzhiyun * @free: Free pool entries
151*4882a593Smuzhiyun * @lock: Protects the free list
152*4882a593Smuzhiyun * @vsp1: the VSP1 device
153*4882a593Smuzhiyun */
154*4882a593Smuzhiyun struct vsp1_dl_cmd_pool {
155*4882a593Smuzhiyun /* DMA allocation */
156*4882a593Smuzhiyun dma_addr_t dma;
157*4882a593Smuzhiyun size_t size;
158*4882a593Smuzhiyun void *mem;
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun struct vsp1_dl_ext_cmd *cmds;
161*4882a593Smuzhiyun struct list_head free;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun spinlock_t lock;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun struct vsp1_device *vsp1;
166*4882a593Smuzhiyun };
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun /**
169*4882a593Smuzhiyun * struct vsp1_dl_list - Display list
170*4882a593Smuzhiyun * @list: entry in the display list manager lists
171*4882a593Smuzhiyun * @dlm: the display list manager
172*4882a593Smuzhiyun * @header: display list header
173*4882a593Smuzhiyun * @extension: extended display list header. NULL for normal lists
174*4882a593Smuzhiyun * @dma: DMA address for the header
175*4882a593Smuzhiyun * @body0: first display list body
176*4882a593Smuzhiyun * @bodies: list of extra display list bodies
177*4882a593Smuzhiyun * @pre_cmd: pre command to be issued through extended dl header
178*4882a593Smuzhiyun * @post_cmd: post command to be issued through extended dl header
179*4882a593Smuzhiyun * @has_chain: if true, indicates that there's a partition chain
180*4882a593Smuzhiyun * @chain: entry in the display list partition chain
181*4882a593Smuzhiyun * @flags: display list flags, a combination of VSP1_DL_FRAME_END_*
182*4882a593Smuzhiyun */
183*4882a593Smuzhiyun struct vsp1_dl_list {
184*4882a593Smuzhiyun struct list_head list;
185*4882a593Smuzhiyun struct vsp1_dl_manager *dlm;
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun struct vsp1_dl_header *header;
188*4882a593Smuzhiyun struct vsp1_dl_ext_header *extension;
189*4882a593Smuzhiyun dma_addr_t dma;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun struct vsp1_dl_body *body0;
192*4882a593Smuzhiyun struct list_head bodies;
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun struct vsp1_dl_ext_cmd *pre_cmd;
195*4882a593Smuzhiyun struct vsp1_dl_ext_cmd *post_cmd;
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun bool has_chain;
198*4882a593Smuzhiyun struct list_head chain;
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun unsigned int flags;
201*4882a593Smuzhiyun };
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun /**
204*4882a593Smuzhiyun * struct vsp1_dl_manager - Display List manager
205*4882a593Smuzhiyun * @index: index of the related WPF
206*4882a593Smuzhiyun * @singleshot: execute the display list in single-shot mode
207*4882a593Smuzhiyun * @vsp1: the VSP1 device
208*4882a593Smuzhiyun * @lock: protects the free, active, queued, and pending lists
209*4882a593Smuzhiyun * @free: array of all free display lists
210*4882a593Smuzhiyun * @active: list currently being processed (loaded) by hardware
211*4882a593Smuzhiyun * @queued: list queued to the hardware (written to the DL registers)
212*4882a593Smuzhiyun * @pending: list waiting to be queued to the hardware
213*4882a593Smuzhiyun * @pool: body pool for the display list bodies
214*4882a593Smuzhiyun * @cmdpool: commands pool for extended display list
215*4882a593Smuzhiyun */
216*4882a593Smuzhiyun struct vsp1_dl_manager {
217*4882a593Smuzhiyun unsigned int index;
218*4882a593Smuzhiyun bool singleshot;
219*4882a593Smuzhiyun struct vsp1_device *vsp1;
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun spinlock_t lock;
222*4882a593Smuzhiyun struct list_head free;
223*4882a593Smuzhiyun struct vsp1_dl_list *active;
224*4882a593Smuzhiyun struct vsp1_dl_list *queued;
225*4882a593Smuzhiyun struct vsp1_dl_list *pending;
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun struct vsp1_dl_body_pool *pool;
228*4882a593Smuzhiyun struct vsp1_dl_cmd_pool *cmdpool;
229*4882a593Smuzhiyun };
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun /* -----------------------------------------------------------------------------
232*4882a593Smuzhiyun * Display List Body Management
233*4882a593Smuzhiyun */
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun /**
236*4882a593Smuzhiyun * vsp1_dl_body_pool_create - Create a pool of bodies from a single allocation
237*4882a593Smuzhiyun * @vsp1: The VSP1 device
238*4882a593Smuzhiyun * @num_bodies: The number of bodies to allocate
239*4882a593Smuzhiyun * @num_entries: The maximum number of entries that a body can contain
240*4882a593Smuzhiyun * @extra_size: Extra allocation provided for the bodies
241*4882a593Smuzhiyun *
242*4882a593Smuzhiyun * Allocate a pool of display list bodies each with enough memory to contain the
243*4882a593Smuzhiyun * requested number of entries plus the @extra_size.
244*4882a593Smuzhiyun *
245*4882a593Smuzhiyun * Return a pointer to a pool on success or NULL if memory can't be allocated.
246*4882a593Smuzhiyun */
247*4882a593Smuzhiyun struct vsp1_dl_body_pool *
vsp1_dl_body_pool_create(struct vsp1_device * vsp1,unsigned int num_bodies,unsigned int num_entries,size_t extra_size)248*4882a593Smuzhiyun vsp1_dl_body_pool_create(struct vsp1_device *vsp1, unsigned int num_bodies,
249*4882a593Smuzhiyun unsigned int num_entries, size_t extra_size)
250*4882a593Smuzhiyun {
251*4882a593Smuzhiyun struct vsp1_dl_body_pool *pool;
252*4882a593Smuzhiyun size_t dlb_size;
253*4882a593Smuzhiyun unsigned int i;
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun pool = kzalloc(sizeof(*pool), GFP_KERNEL);
256*4882a593Smuzhiyun if (!pool)
257*4882a593Smuzhiyun return NULL;
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun pool->vsp1 = vsp1;
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun /*
262*4882a593Smuzhiyun * TODO: 'extra_size' is only used by vsp1_dlm_create(), to allocate
263*4882a593Smuzhiyun * extra memory for the display list header. We need only one header per
264*4882a593Smuzhiyun * display list, not per display list body, thus this allocation is
265*4882a593Smuzhiyun * extraneous and should be reworked in the future.
266*4882a593Smuzhiyun */
267*4882a593Smuzhiyun dlb_size = num_entries * sizeof(struct vsp1_dl_entry) + extra_size;
268*4882a593Smuzhiyun pool->size = dlb_size * num_bodies;
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun pool->bodies = kcalloc(num_bodies, sizeof(*pool->bodies), GFP_KERNEL);
271*4882a593Smuzhiyun if (!pool->bodies) {
272*4882a593Smuzhiyun kfree(pool);
273*4882a593Smuzhiyun return NULL;
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun pool->mem = dma_alloc_wc(vsp1->bus_master, pool->size, &pool->dma,
277*4882a593Smuzhiyun GFP_KERNEL);
278*4882a593Smuzhiyun if (!pool->mem) {
279*4882a593Smuzhiyun kfree(pool->bodies);
280*4882a593Smuzhiyun kfree(pool);
281*4882a593Smuzhiyun return NULL;
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun spin_lock_init(&pool->lock);
285*4882a593Smuzhiyun INIT_LIST_HEAD(&pool->free);
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun for (i = 0; i < num_bodies; ++i) {
288*4882a593Smuzhiyun struct vsp1_dl_body *dlb = &pool->bodies[i];
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun dlb->pool = pool;
291*4882a593Smuzhiyun dlb->max_entries = num_entries;
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun dlb->dma = pool->dma + i * dlb_size;
294*4882a593Smuzhiyun dlb->entries = pool->mem + i * dlb_size;
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun list_add_tail(&dlb->free, &pool->free);
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun return pool;
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun /**
303*4882a593Smuzhiyun * vsp1_dl_body_pool_destroy - Release a body pool
304*4882a593Smuzhiyun * @pool: The body pool
305*4882a593Smuzhiyun *
306*4882a593Smuzhiyun * Release all components of a pool allocation.
307*4882a593Smuzhiyun */
vsp1_dl_body_pool_destroy(struct vsp1_dl_body_pool * pool)308*4882a593Smuzhiyun void vsp1_dl_body_pool_destroy(struct vsp1_dl_body_pool *pool)
309*4882a593Smuzhiyun {
310*4882a593Smuzhiyun if (!pool)
311*4882a593Smuzhiyun return;
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun if (pool->mem)
314*4882a593Smuzhiyun dma_free_wc(pool->vsp1->bus_master, pool->size, pool->mem,
315*4882a593Smuzhiyun pool->dma);
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun kfree(pool->bodies);
318*4882a593Smuzhiyun kfree(pool);
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun /**
322*4882a593Smuzhiyun * vsp1_dl_body_get - Obtain a body from a pool
323*4882a593Smuzhiyun * @pool: The body pool
324*4882a593Smuzhiyun *
325*4882a593Smuzhiyun * Obtain a body from the pool without blocking.
326*4882a593Smuzhiyun *
327*4882a593Smuzhiyun * Returns a display list body or NULL if there are none available.
328*4882a593Smuzhiyun */
vsp1_dl_body_get(struct vsp1_dl_body_pool * pool)329*4882a593Smuzhiyun struct vsp1_dl_body *vsp1_dl_body_get(struct vsp1_dl_body_pool *pool)
330*4882a593Smuzhiyun {
331*4882a593Smuzhiyun struct vsp1_dl_body *dlb = NULL;
332*4882a593Smuzhiyun unsigned long flags;
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun spin_lock_irqsave(&pool->lock, flags);
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun if (!list_empty(&pool->free)) {
337*4882a593Smuzhiyun dlb = list_first_entry(&pool->free, struct vsp1_dl_body, free);
338*4882a593Smuzhiyun list_del(&dlb->free);
339*4882a593Smuzhiyun refcount_set(&dlb->refcnt, 1);
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun spin_unlock_irqrestore(&pool->lock, flags);
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun return dlb;
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun /**
348*4882a593Smuzhiyun * vsp1_dl_body_put - Return a body back to its pool
349*4882a593Smuzhiyun * @dlb: The display list body
350*4882a593Smuzhiyun *
351*4882a593Smuzhiyun * Return a body back to the pool, and reset the num_entries to clear the list.
352*4882a593Smuzhiyun */
vsp1_dl_body_put(struct vsp1_dl_body * dlb)353*4882a593Smuzhiyun void vsp1_dl_body_put(struct vsp1_dl_body *dlb)
354*4882a593Smuzhiyun {
355*4882a593Smuzhiyun unsigned long flags;
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun if (!dlb)
358*4882a593Smuzhiyun return;
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun if (!refcount_dec_and_test(&dlb->refcnt))
361*4882a593Smuzhiyun return;
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun dlb->num_entries = 0;
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun spin_lock_irqsave(&dlb->pool->lock, flags);
366*4882a593Smuzhiyun list_add_tail(&dlb->free, &dlb->pool->free);
367*4882a593Smuzhiyun spin_unlock_irqrestore(&dlb->pool->lock, flags);
368*4882a593Smuzhiyun }
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun /**
371*4882a593Smuzhiyun * vsp1_dl_body_write - Write a register to a display list body
372*4882a593Smuzhiyun * @dlb: The body
373*4882a593Smuzhiyun * @reg: The register address
374*4882a593Smuzhiyun * @data: The register value
375*4882a593Smuzhiyun *
376*4882a593Smuzhiyun * Write the given register and value to the display list body. The maximum
377*4882a593Smuzhiyun * number of entries that can be written in a body is specified when the body is
378*4882a593Smuzhiyun * allocated by vsp1_dl_body_alloc().
379*4882a593Smuzhiyun */
vsp1_dl_body_write(struct vsp1_dl_body * dlb,u32 reg,u32 data)380*4882a593Smuzhiyun void vsp1_dl_body_write(struct vsp1_dl_body *dlb, u32 reg, u32 data)
381*4882a593Smuzhiyun {
382*4882a593Smuzhiyun if (WARN_ONCE(dlb->num_entries >= dlb->max_entries,
383*4882a593Smuzhiyun "DLB size exceeded (max %u)", dlb->max_entries))
384*4882a593Smuzhiyun return;
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun dlb->entries[dlb->num_entries].addr = reg;
387*4882a593Smuzhiyun dlb->entries[dlb->num_entries].data = data;
388*4882a593Smuzhiyun dlb->num_entries++;
389*4882a593Smuzhiyun }
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun /* -----------------------------------------------------------------------------
392*4882a593Smuzhiyun * Display List Extended Command Management
393*4882a593Smuzhiyun */
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun enum vsp1_extcmd_type {
396*4882a593Smuzhiyun VSP1_EXTCMD_AUTODISP,
397*4882a593Smuzhiyun VSP1_EXTCMD_AUTOFLD,
398*4882a593Smuzhiyun };
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun struct vsp1_extended_command_info {
401*4882a593Smuzhiyun u16 opcode;
402*4882a593Smuzhiyun size_t body_size;
403*4882a593Smuzhiyun };
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun static const struct vsp1_extended_command_info vsp1_extended_commands[] = {
406*4882a593Smuzhiyun [VSP1_EXTCMD_AUTODISP] = { 0x02, 96 },
407*4882a593Smuzhiyun [VSP1_EXTCMD_AUTOFLD] = { 0x03, 160 },
408*4882a593Smuzhiyun };
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun /**
411*4882a593Smuzhiyun * vsp1_dl_cmd_pool_create - Create a pool of commands from a single allocation
412*4882a593Smuzhiyun * @vsp1: The VSP1 device
413*4882a593Smuzhiyun * @type: The command pool type
414*4882a593Smuzhiyun * @num_cmds: The number of commands to allocate
415*4882a593Smuzhiyun *
416*4882a593Smuzhiyun * Allocate a pool of commands each with enough memory to contain the private
417*4882a593Smuzhiyun * data of each command. The allocation sizes are dependent upon the command
418*4882a593Smuzhiyun * type.
419*4882a593Smuzhiyun *
420*4882a593Smuzhiyun * Return a pointer to the pool on success or NULL if memory can't be allocated.
421*4882a593Smuzhiyun */
422*4882a593Smuzhiyun static struct vsp1_dl_cmd_pool *
vsp1_dl_cmd_pool_create(struct vsp1_device * vsp1,enum vsp1_extcmd_type type,unsigned int num_cmds)423*4882a593Smuzhiyun vsp1_dl_cmd_pool_create(struct vsp1_device *vsp1, enum vsp1_extcmd_type type,
424*4882a593Smuzhiyun unsigned int num_cmds)
425*4882a593Smuzhiyun {
426*4882a593Smuzhiyun struct vsp1_dl_cmd_pool *pool;
427*4882a593Smuzhiyun unsigned int i;
428*4882a593Smuzhiyun size_t cmd_size;
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun pool = kzalloc(sizeof(*pool), GFP_KERNEL);
431*4882a593Smuzhiyun if (!pool)
432*4882a593Smuzhiyun return NULL;
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun pool->vsp1 = vsp1;
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun spin_lock_init(&pool->lock);
437*4882a593Smuzhiyun INIT_LIST_HEAD(&pool->free);
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun pool->cmds = kcalloc(num_cmds, sizeof(*pool->cmds), GFP_KERNEL);
440*4882a593Smuzhiyun if (!pool->cmds) {
441*4882a593Smuzhiyun kfree(pool);
442*4882a593Smuzhiyun return NULL;
443*4882a593Smuzhiyun }
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun cmd_size = sizeof(struct vsp1_pre_ext_dl_body) +
446*4882a593Smuzhiyun vsp1_extended_commands[type].body_size;
447*4882a593Smuzhiyun cmd_size = ALIGN(cmd_size, 16);
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun pool->size = cmd_size * num_cmds;
450*4882a593Smuzhiyun pool->mem = dma_alloc_wc(vsp1->bus_master, pool->size, &pool->dma,
451*4882a593Smuzhiyun GFP_KERNEL);
452*4882a593Smuzhiyun if (!pool->mem) {
453*4882a593Smuzhiyun kfree(pool->cmds);
454*4882a593Smuzhiyun kfree(pool);
455*4882a593Smuzhiyun return NULL;
456*4882a593Smuzhiyun }
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun for (i = 0; i < num_cmds; ++i) {
459*4882a593Smuzhiyun struct vsp1_dl_ext_cmd *cmd = &pool->cmds[i];
460*4882a593Smuzhiyun size_t cmd_offset = i * cmd_size;
461*4882a593Smuzhiyun /* data_offset must be 16 byte aligned for DMA. */
462*4882a593Smuzhiyun size_t data_offset = sizeof(struct vsp1_pre_ext_dl_body) +
463*4882a593Smuzhiyun cmd_offset;
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun cmd->pool = pool;
466*4882a593Smuzhiyun cmd->opcode = vsp1_extended_commands[type].opcode;
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun /*
469*4882a593Smuzhiyun * TODO: Auto-disp can utilise more than one extended body
470*4882a593Smuzhiyun * command per cmd.
471*4882a593Smuzhiyun */
472*4882a593Smuzhiyun cmd->num_cmds = 1;
473*4882a593Smuzhiyun cmd->cmds = pool->mem + cmd_offset;
474*4882a593Smuzhiyun cmd->cmd_dma = pool->dma + cmd_offset;
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun cmd->data = pool->mem + data_offset;
477*4882a593Smuzhiyun cmd->data_dma = pool->dma + data_offset;
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun list_add_tail(&cmd->free, &pool->free);
480*4882a593Smuzhiyun }
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun return pool;
483*4882a593Smuzhiyun }
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun static
vsp1_dl_ext_cmd_get(struct vsp1_dl_cmd_pool * pool)486*4882a593Smuzhiyun struct vsp1_dl_ext_cmd *vsp1_dl_ext_cmd_get(struct vsp1_dl_cmd_pool *pool)
487*4882a593Smuzhiyun {
488*4882a593Smuzhiyun struct vsp1_dl_ext_cmd *cmd = NULL;
489*4882a593Smuzhiyun unsigned long flags;
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun spin_lock_irqsave(&pool->lock, flags);
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun if (!list_empty(&pool->free)) {
494*4882a593Smuzhiyun cmd = list_first_entry(&pool->free, struct vsp1_dl_ext_cmd,
495*4882a593Smuzhiyun free);
496*4882a593Smuzhiyun list_del(&cmd->free);
497*4882a593Smuzhiyun }
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun spin_unlock_irqrestore(&pool->lock, flags);
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun return cmd;
502*4882a593Smuzhiyun }
503*4882a593Smuzhiyun
vsp1_dl_ext_cmd_put(struct vsp1_dl_ext_cmd * cmd)504*4882a593Smuzhiyun static void vsp1_dl_ext_cmd_put(struct vsp1_dl_ext_cmd *cmd)
505*4882a593Smuzhiyun {
506*4882a593Smuzhiyun unsigned long flags;
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun if (!cmd)
509*4882a593Smuzhiyun return;
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun /* Reset flags, these mark data usage. */
512*4882a593Smuzhiyun cmd->flags = 0;
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun spin_lock_irqsave(&cmd->pool->lock, flags);
515*4882a593Smuzhiyun list_add_tail(&cmd->free, &cmd->pool->free);
516*4882a593Smuzhiyun spin_unlock_irqrestore(&cmd->pool->lock, flags);
517*4882a593Smuzhiyun }
518*4882a593Smuzhiyun
vsp1_dl_ext_cmd_pool_destroy(struct vsp1_dl_cmd_pool * pool)519*4882a593Smuzhiyun static void vsp1_dl_ext_cmd_pool_destroy(struct vsp1_dl_cmd_pool *pool)
520*4882a593Smuzhiyun {
521*4882a593Smuzhiyun if (!pool)
522*4882a593Smuzhiyun return;
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun if (pool->mem)
525*4882a593Smuzhiyun dma_free_wc(pool->vsp1->bus_master, pool->size, pool->mem,
526*4882a593Smuzhiyun pool->dma);
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun kfree(pool->cmds);
529*4882a593Smuzhiyun kfree(pool);
530*4882a593Smuzhiyun }
531*4882a593Smuzhiyun
vsp1_dl_get_pre_cmd(struct vsp1_dl_list * dl)532*4882a593Smuzhiyun struct vsp1_dl_ext_cmd *vsp1_dl_get_pre_cmd(struct vsp1_dl_list *dl)
533*4882a593Smuzhiyun {
534*4882a593Smuzhiyun struct vsp1_dl_manager *dlm = dl->dlm;
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun if (dl->pre_cmd)
537*4882a593Smuzhiyun return dl->pre_cmd;
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun dl->pre_cmd = vsp1_dl_ext_cmd_get(dlm->cmdpool);
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun return dl->pre_cmd;
542*4882a593Smuzhiyun }
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun /* ----------------------------------------------------------------------------
545*4882a593Smuzhiyun * Display List Transaction Management
546*4882a593Smuzhiyun */
547*4882a593Smuzhiyun
vsp1_dl_list_alloc(struct vsp1_dl_manager * dlm)548*4882a593Smuzhiyun static struct vsp1_dl_list *vsp1_dl_list_alloc(struct vsp1_dl_manager *dlm)
549*4882a593Smuzhiyun {
550*4882a593Smuzhiyun struct vsp1_dl_list *dl;
551*4882a593Smuzhiyun size_t header_offset;
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun dl = kzalloc(sizeof(*dl), GFP_KERNEL);
554*4882a593Smuzhiyun if (!dl)
555*4882a593Smuzhiyun return NULL;
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun INIT_LIST_HEAD(&dl->bodies);
558*4882a593Smuzhiyun dl->dlm = dlm;
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun /* Get a default body for our list. */
561*4882a593Smuzhiyun dl->body0 = vsp1_dl_body_get(dlm->pool);
562*4882a593Smuzhiyun if (!dl->body0) {
563*4882a593Smuzhiyun kfree(dl);
564*4882a593Smuzhiyun return NULL;
565*4882a593Smuzhiyun }
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun header_offset = dl->body0->max_entries * sizeof(*dl->body0->entries);
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun dl->header = ((void *)dl->body0->entries) + header_offset;
570*4882a593Smuzhiyun dl->dma = dl->body0->dma + header_offset;
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun memset(dl->header, 0, sizeof(*dl->header));
573*4882a593Smuzhiyun dl->header->lists[0].addr = dl->body0->dma;
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun return dl;
576*4882a593Smuzhiyun }
577*4882a593Smuzhiyun
vsp1_dl_list_bodies_put(struct vsp1_dl_list * dl)578*4882a593Smuzhiyun static void vsp1_dl_list_bodies_put(struct vsp1_dl_list *dl)
579*4882a593Smuzhiyun {
580*4882a593Smuzhiyun struct vsp1_dl_body *dlb, *tmp;
581*4882a593Smuzhiyun
582*4882a593Smuzhiyun list_for_each_entry_safe(dlb, tmp, &dl->bodies, list) {
583*4882a593Smuzhiyun list_del(&dlb->list);
584*4882a593Smuzhiyun vsp1_dl_body_put(dlb);
585*4882a593Smuzhiyun }
586*4882a593Smuzhiyun }
587*4882a593Smuzhiyun
vsp1_dl_list_free(struct vsp1_dl_list * dl)588*4882a593Smuzhiyun static void vsp1_dl_list_free(struct vsp1_dl_list *dl)
589*4882a593Smuzhiyun {
590*4882a593Smuzhiyun vsp1_dl_body_put(dl->body0);
591*4882a593Smuzhiyun vsp1_dl_list_bodies_put(dl);
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun kfree(dl);
594*4882a593Smuzhiyun }
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun /**
597*4882a593Smuzhiyun * vsp1_dl_list_get - Get a free display list
598*4882a593Smuzhiyun * @dlm: The display list manager
599*4882a593Smuzhiyun *
600*4882a593Smuzhiyun * Get a display list from the pool of free lists and return it.
601*4882a593Smuzhiyun *
602*4882a593Smuzhiyun * This function must be called without the display list manager lock held.
603*4882a593Smuzhiyun */
vsp1_dl_list_get(struct vsp1_dl_manager * dlm)604*4882a593Smuzhiyun struct vsp1_dl_list *vsp1_dl_list_get(struct vsp1_dl_manager *dlm)
605*4882a593Smuzhiyun {
606*4882a593Smuzhiyun struct vsp1_dl_list *dl = NULL;
607*4882a593Smuzhiyun unsigned long flags;
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun spin_lock_irqsave(&dlm->lock, flags);
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun if (!list_empty(&dlm->free)) {
612*4882a593Smuzhiyun dl = list_first_entry(&dlm->free, struct vsp1_dl_list, list);
613*4882a593Smuzhiyun list_del(&dl->list);
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun /*
616*4882a593Smuzhiyun * The display list chain must be initialised to ensure every
617*4882a593Smuzhiyun * display list can assert list_empty() if it is not in a chain.
618*4882a593Smuzhiyun */
619*4882a593Smuzhiyun INIT_LIST_HEAD(&dl->chain);
620*4882a593Smuzhiyun }
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun spin_unlock_irqrestore(&dlm->lock, flags);
623*4882a593Smuzhiyun
624*4882a593Smuzhiyun return dl;
625*4882a593Smuzhiyun }
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun /* This function must be called with the display list manager lock held.*/
__vsp1_dl_list_put(struct vsp1_dl_list * dl)628*4882a593Smuzhiyun static void __vsp1_dl_list_put(struct vsp1_dl_list *dl)
629*4882a593Smuzhiyun {
630*4882a593Smuzhiyun struct vsp1_dl_list *dl_next;
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun if (!dl)
633*4882a593Smuzhiyun return;
634*4882a593Smuzhiyun
635*4882a593Smuzhiyun /*
636*4882a593Smuzhiyun * Release any linked display-lists which were chained for a single
637*4882a593Smuzhiyun * hardware operation.
638*4882a593Smuzhiyun */
639*4882a593Smuzhiyun if (dl->has_chain) {
640*4882a593Smuzhiyun list_for_each_entry(dl_next, &dl->chain, chain)
641*4882a593Smuzhiyun __vsp1_dl_list_put(dl_next);
642*4882a593Smuzhiyun }
643*4882a593Smuzhiyun
644*4882a593Smuzhiyun dl->has_chain = false;
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun vsp1_dl_list_bodies_put(dl);
647*4882a593Smuzhiyun
648*4882a593Smuzhiyun vsp1_dl_ext_cmd_put(dl->pre_cmd);
649*4882a593Smuzhiyun vsp1_dl_ext_cmd_put(dl->post_cmd);
650*4882a593Smuzhiyun
651*4882a593Smuzhiyun dl->pre_cmd = NULL;
652*4882a593Smuzhiyun dl->post_cmd = NULL;
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun /*
655*4882a593Smuzhiyun * body0 is reused as as an optimisation as presently every display list
656*4882a593Smuzhiyun * has at least one body, thus we reinitialise the entries list.
657*4882a593Smuzhiyun */
658*4882a593Smuzhiyun dl->body0->num_entries = 0;
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun list_add_tail(&dl->list, &dl->dlm->free);
661*4882a593Smuzhiyun }
662*4882a593Smuzhiyun
663*4882a593Smuzhiyun /**
664*4882a593Smuzhiyun * vsp1_dl_list_put - Release a display list
665*4882a593Smuzhiyun * @dl: The display list
666*4882a593Smuzhiyun *
667*4882a593Smuzhiyun * Release the display list and return it to the pool of free lists.
668*4882a593Smuzhiyun *
669*4882a593Smuzhiyun * Passing a NULL pointer to this function is safe, in that case no operation
670*4882a593Smuzhiyun * will be performed.
671*4882a593Smuzhiyun */
vsp1_dl_list_put(struct vsp1_dl_list * dl)672*4882a593Smuzhiyun void vsp1_dl_list_put(struct vsp1_dl_list *dl)
673*4882a593Smuzhiyun {
674*4882a593Smuzhiyun unsigned long flags;
675*4882a593Smuzhiyun
676*4882a593Smuzhiyun if (!dl)
677*4882a593Smuzhiyun return;
678*4882a593Smuzhiyun
679*4882a593Smuzhiyun spin_lock_irqsave(&dl->dlm->lock, flags);
680*4882a593Smuzhiyun __vsp1_dl_list_put(dl);
681*4882a593Smuzhiyun spin_unlock_irqrestore(&dl->dlm->lock, flags);
682*4882a593Smuzhiyun }
683*4882a593Smuzhiyun
684*4882a593Smuzhiyun /**
685*4882a593Smuzhiyun * vsp1_dl_list_get_body0 - Obtain the default body for the display list
686*4882a593Smuzhiyun * @dl: The display list
687*4882a593Smuzhiyun *
688*4882a593Smuzhiyun * Obtain a pointer to the internal display list body allowing this to be passed
689*4882a593Smuzhiyun * directly to configure operations.
690*4882a593Smuzhiyun */
vsp1_dl_list_get_body0(struct vsp1_dl_list * dl)691*4882a593Smuzhiyun struct vsp1_dl_body *vsp1_dl_list_get_body0(struct vsp1_dl_list *dl)
692*4882a593Smuzhiyun {
693*4882a593Smuzhiyun return dl->body0;
694*4882a593Smuzhiyun }
695*4882a593Smuzhiyun
696*4882a593Smuzhiyun /**
697*4882a593Smuzhiyun * vsp1_dl_list_add_body - Add a body to the display list
698*4882a593Smuzhiyun * @dl: The display list
699*4882a593Smuzhiyun * @dlb: The body
700*4882a593Smuzhiyun *
701*4882a593Smuzhiyun * Add a display list body to a display list. Registers contained in bodies are
702*4882a593Smuzhiyun * processed after registers contained in the main display list, in the order in
703*4882a593Smuzhiyun * which bodies are added.
704*4882a593Smuzhiyun *
705*4882a593Smuzhiyun * Adding a body to a display list passes ownership of the body to the list. The
706*4882a593Smuzhiyun * caller retains its reference to the body when adding it to the display list,
707*4882a593Smuzhiyun * but is not allowed to add new entries to the body.
708*4882a593Smuzhiyun *
709*4882a593Smuzhiyun * The reference must be explicitly released by a call to vsp1_dl_body_put()
710*4882a593Smuzhiyun * when the body isn't needed anymore.
711*4882a593Smuzhiyun */
vsp1_dl_list_add_body(struct vsp1_dl_list * dl,struct vsp1_dl_body * dlb)712*4882a593Smuzhiyun int vsp1_dl_list_add_body(struct vsp1_dl_list *dl, struct vsp1_dl_body *dlb)
713*4882a593Smuzhiyun {
714*4882a593Smuzhiyun refcount_inc(&dlb->refcnt);
715*4882a593Smuzhiyun
716*4882a593Smuzhiyun list_add_tail(&dlb->list, &dl->bodies);
717*4882a593Smuzhiyun
718*4882a593Smuzhiyun return 0;
719*4882a593Smuzhiyun }
720*4882a593Smuzhiyun
721*4882a593Smuzhiyun /**
722*4882a593Smuzhiyun * vsp1_dl_list_add_chain - Add a display list to a chain
723*4882a593Smuzhiyun * @head: The head display list
724*4882a593Smuzhiyun * @dl: The new display list
725*4882a593Smuzhiyun *
726*4882a593Smuzhiyun * Add a display list to an existing display list chain. The chained lists
727*4882a593Smuzhiyun * will be automatically processed by the hardware without intervention from
728*4882a593Smuzhiyun * the CPU. A display list end interrupt will only complete after the last
729*4882a593Smuzhiyun * display list in the chain has completed processing.
730*4882a593Smuzhiyun *
731*4882a593Smuzhiyun * Adding a display list to a chain passes ownership of the display list to
732*4882a593Smuzhiyun * the head display list item. The chain is released when the head dl item is
733*4882a593Smuzhiyun * put back with __vsp1_dl_list_put().
734*4882a593Smuzhiyun */
vsp1_dl_list_add_chain(struct vsp1_dl_list * head,struct vsp1_dl_list * dl)735*4882a593Smuzhiyun int vsp1_dl_list_add_chain(struct vsp1_dl_list *head,
736*4882a593Smuzhiyun struct vsp1_dl_list *dl)
737*4882a593Smuzhiyun {
738*4882a593Smuzhiyun head->has_chain = true;
739*4882a593Smuzhiyun list_add_tail(&dl->chain, &head->chain);
740*4882a593Smuzhiyun return 0;
741*4882a593Smuzhiyun }
742*4882a593Smuzhiyun
vsp1_dl_ext_cmd_fill_header(struct vsp1_dl_ext_cmd * cmd)743*4882a593Smuzhiyun static void vsp1_dl_ext_cmd_fill_header(struct vsp1_dl_ext_cmd *cmd)
744*4882a593Smuzhiyun {
745*4882a593Smuzhiyun cmd->cmds[0].opcode = cmd->opcode;
746*4882a593Smuzhiyun cmd->cmds[0].flags = cmd->flags;
747*4882a593Smuzhiyun cmd->cmds[0].address_set = cmd->data_dma;
748*4882a593Smuzhiyun cmd->cmds[0].reserved = 0;
749*4882a593Smuzhiyun }
750*4882a593Smuzhiyun
vsp1_dl_list_fill_header(struct vsp1_dl_list * dl,bool is_last)751*4882a593Smuzhiyun static void vsp1_dl_list_fill_header(struct vsp1_dl_list *dl, bool is_last)
752*4882a593Smuzhiyun {
753*4882a593Smuzhiyun struct vsp1_dl_manager *dlm = dl->dlm;
754*4882a593Smuzhiyun struct vsp1_dl_header_list *hdr = dl->header->lists;
755*4882a593Smuzhiyun struct vsp1_dl_body *dlb;
756*4882a593Smuzhiyun unsigned int num_lists = 0;
757*4882a593Smuzhiyun
758*4882a593Smuzhiyun /*
759*4882a593Smuzhiyun * Fill the header with the display list bodies addresses and sizes. The
760*4882a593Smuzhiyun * address of the first body has already been filled when the display
761*4882a593Smuzhiyun * list was allocated.
762*4882a593Smuzhiyun */
763*4882a593Smuzhiyun
764*4882a593Smuzhiyun hdr->num_bytes = dl->body0->num_entries
765*4882a593Smuzhiyun * sizeof(*dl->header->lists);
766*4882a593Smuzhiyun
767*4882a593Smuzhiyun list_for_each_entry(dlb, &dl->bodies, list) {
768*4882a593Smuzhiyun num_lists++;
769*4882a593Smuzhiyun hdr++;
770*4882a593Smuzhiyun
771*4882a593Smuzhiyun hdr->addr = dlb->dma;
772*4882a593Smuzhiyun hdr->num_bytes = dlb->num_entries
773*4882a593Smuzhiyun * sizeof(*dl->header->lists);
774*4882a593Smuzhiyun }
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun dl->header->num_lists = num_lists;
777*4882a593Smuzhiyun dl->header->flags = 0;
778*4882a593Smuzhiyun
779*4882a593Smuzhiyun /*
780*4882a593Smuzhiyun * Enable the interrupt for the end of each frame. In continuous mode
781*4882a593Smuzhiyun * chained lists are used with one list per frame, so enable the
782*4882a593Smuzhiyun * interrupt for each list. In singleshot mode chained lists are used
783*4882a593Smuzhiyun * to partition a single frame, so enable the interrupt for the last
784*4882a593Smuzhiyun * list only.
785*4882a593Smuzhiyun */
786*4882a593Smuzhiyun if (!dlm->singleshot || is_last)
787*4882a593Smuzhiyun dl->header->flags |= VSP1_DLH_INT_ENABLE;
788*4882a593Smuzhiyun
789*4882a593Smuzhiyun /*
790*4882a593Smuzhiyun * In continuous mode enable auto-start for all lists, as the VSP must
791*4882a593Smuzhiyun * loop on the same list until a new one is queued. In singleshot mode
792*4882a593Smuzhiyun * enable auto-start for all lists but the last to chain processing of
793*4882a593Smuzhiyun * partitions without software intervention.
794*4882a593Smuzhiyun */
795*4882a593Smuzhiyun if (!dlm->singleshot || !is_last)
796*4882a593Smuzhiyun dl->header->flags |= VSP1_DLH_AUTO_START;
797*4882a593Smuzhiyun
798*4882a593Smuzhiyun if (!is_last) {
799*4882a593Smuzhiyun /*
800*4882a593Smuzhiyun * If this is not the last display list in the chain, queue the
801*4882a593Smuzhiyun * next item for automatic processing by the hardware.
802*4882a593Smuzhiyun */
803*4882a593Smuzhiyun struct vsp1_dl_list *next = list_next_entry(dl, chain);
804*4882a593Smuzhiyun
805*4882a593Smuzhiyun dl->header->next_header = next->dma;
806*4882a593Smuzhiyun } else if (!dlm->singleshot) {
807*4882a593Smuzhiyun /*
808*4882a593Smuzhiyun * if the display list manager works in continuous mode, the VSP
809*4882a593Smuzhiyun * should loop over the display list continuously until
810*4882a593Smuzhiyun * instructed to do otherwise.
811*4882a593Smuzhiyun */
812*4882a593Smuzhiyun dl->header->next_header = dl->dma;
813*4882a593Smuzhiyun }
814*4882a593Smuzhiyun
815*4882a593Smuzhiyun if (!dl->extension)
816*4882a593Smuzhiyun return;
817*4882a593Smuzhiyun
818*4882a593Smuzhiyun dl->extension->flags = 0;
819*4882a593Smuzhiyun
820*4882a593Smuzhiyun if (dl->pre_cmd) {
821*4882a593Smuzhiyun dl->extension->pre_ext_dl_plist = dl->pre_cmd->cmd_dma;
822*4882a593Smuzhiyun dl->extension->pre_ext_dl_num_cmd = dl->pre_cmd->num_cmds;
823*4882a593Smuzhiyun dl->extension->flags |= VSP1_DLH_EXT_PRE_CMD_EXEC;
824*4882a593Smuzhiyun
825*4882a593Smuzhiyun vsp1_dl_ext_cmd_fill_header(dl->pre_cmd);
826*4882a593Smuzhiyun }
827*4882a593Smuzhiyun
828*4882a593Smuzhiyun if (dl->post_cmd) {
829*4882a593Smuzhiyun dl->extension->post_ext_dl_plist = dl->post_cmd->cmd_dma;
830*4882a593Smuzhiyun dl->extension->post_ext_dl_num_cmd = dl->post_cmd->num_cmds;
831*4882a593Smuzhiyun dl->extension->flags |= VSP1_DLH_EXT_POST_CMD_EXEC;
832*4882a593Smuzhiyun
833*4882a593Smuzhiyun vsp1_dl_ext_cmd_fill_header(dl->post_cmd);
834*4882a593Smuzhiyun }
835*4882a593Smuzhiyun }
836*4882a593Smuzhiyun
vsp1_dl_list_hw_update_pending(struct vsp1_dl_manager * dlm)837*4882a593Smuzhiyun static bool vsp1_dl_list_hw_update_pending(struct vsp1_dl_manager *dlm)
838*4882a593Smuzhiyun {
839*4882a593Smuzhiyun struct vsp1_device *vsp1 = dlm->vsp1;
840*4882a593Smuzhiyun
841*4882a593Smuzhiyun if (!dlm->queued)
842*4882a593Smuzhiyun return false;
843*4882a593Smuzhiyun
844*4882a593Smuzhiyun /*
845*4882a593Smuzhiyun * Check whether the VSP1 has taken the update. The hardware indicates
846*4882a593Smuzhiyun * this by clearing the UPDHDR bit in the CMD register.
847*4882a593Smuzhiyun */
848*4882a593Smuzhiyun return !!(vsp1_read(vsp1, VI6_CMD(dlm->index)) & VI6_CMD_UPDHDR);
849*4882a593Smuzhiyun }
850*4882a593Smuzhiyun
vsp1_dl_list_hw_enqueue(struct vsp1_dl_list * dl)851*4882a593Smuzhiyun static void vsp1_dl_list_hw_enqueue(struct vsp1_dl_list *dl)
852*4882a593Smuzhiyun {
853*4882a593Smuzhiyun struct vsp1_dl_manager *dlm = dl->dlm;
854*4882a593Smuzhiyun struct vsp1_device *vsp1 = dlm->vsp1;
855*4882a593Smuzhiyun
856*4882a593Smuzhiyun /*
857*4882a593Smuzhiyun * Program the display list header address. If the hardware is idle
858*4882a593Smuzhiyun * (single-shot mode or first frame in continuous mode) it will then be
859*4882a593Smuzhiyun * started independently. If the hardware is operating, the
860*4882a593Smuzhiyun * VI6_DL_HDR_REF_ADDR register will be updated with the display list
861*4882a593Smuzhiyun * address.
862*4882a593Smuzhiyun */
863*4882a593Smuzhiyun vsp1_write(vsp1, VI6_DL_HDR_ADDR(dlm->index), dl->dma);
864*4882a593Smuzhiyun }
865*4882a593Smuzhiyun
vsp1_dl_list_commit_continuous(struct vsp1_dl_list * dl)866*4882a593Smuzhiyun static void vsp1_dl_list_commit_continuous(struct vsp1_dl_list *dl)
867*4882a593Smuzhiyun {
868*4882a593Smuzhiyun struct vsp1_dl_manager *dlm = dl->dlm;
869*4882a593Smuzhiyun
870*4882a593Smuzhiyun /*
871*4882a593Smuzhiyun * If a previous display list has been queued to the hardware but not
872*4882a593Smuzhiyun * processed yet, the VSP can start processing it at any time. In that
873*4882a593Smuzhiyun * case we can't replace the queued list by the new one, as we could
874*4882a593Smuzhiyun * race with the hardware. We thus mark the update as pending, it will
875*4882a593Smuzhiyun * be queued up to the hardware by the frame end interrupt handler.
876*4882a593Smuzhiyun *
877*4882a593Smuzhiyun * If a display list is already pending we simply drop it as the new
878*4882a593Smuzhiyun * display list is assumed to contain a more recent configuration. It is
879*4882a593Smuzhiyun * an error if the already pending list has the
880*4882a593Smuzhiyun * VSP1_DL_FRAME_END_INTERNAL flag set, as there is then a process
881*4882a593Smuzhiyun * waiting for that list to complete. This shouldn't happen as the
882*4882a593Smuzhiyun * waiting process should perform proper locking, but warn just in
883*4882a593Smuzhiyun * case.
884*4882a593Smuzhiyun */
885*4882a593Smuzhiyun if (vsp1_dl_list_hw_update_pending(dlm)) {
886*4882a593Smuzhiyun WARN_ON(dlm->pending &&
887*4882a593Smuzhiyun (dlm->pending->flags & VSP1_DL_FRAME_END_INTERNAL));
888*4882a593Smuzhiyun __vsp1_dl_list_put(dlm->pending);
889*4882a593Smuzhiyun dlm->pending = dl;
890*4882a593Smuzhiyun return;
891*4882a593Smuzhiyun }
892*4882a593Smuzhiyun
893*4882a593Smuzhiyun /*
894*4882a593Smuzhiyun * Pass the new display list to the hardware and mark it as queued. It
895*4882a593Smuzhiyun * will become active when the hardware starts processing it.
896*4882a593Smuzhiyun */
897*4882a593Smuzhiyun vsp1_dl_list_hw_enqueue(dl);
898*4882a593Smuzhiyun
899*4882a593Smuzhiyun __vsp1_dl_list_put(dlm->queued);
900*4882a593Smuzhiyun dlm->queued = dl;
901*4882a593Smuzhiyun }
902*4882a593Smuzhiyun
vsp1_dl_list_commit_singleshot(struct vsp1_dl_list * dl)903*4882a593Smuzhiyun static void vsp1_dl_list_commit_singleshot(struct vsp1_dl_list *dl)
904*4882a593Smuzhiyun {
905*4882a593Smuzhiyun struct vsp1_dl_manager *dlm = dl->dlm;
906*4882a593Smuzhiyun
907*4882a593Smuzhiyun /*
908*4882a593Smuzhiyun * When working in single-shot mode, the caller guarantees that the
909*4882a593Smuzhiyun * hardware is idle at this point. Just commit the head display list
910*4882a593Smuzhiyun * to hardware. Chained lists will be started automatically.
911*4882a593Smuzhiyun */
912*4882a593Smuzhiyun vsp1_dl_list_hw_enqueue(dl);
913*4882a593Smuzhiyun
914*4882a593Smuzhiyun dlm->active = dl;
915*4882a593Smuzhiyun }
916*4882a593Smuzhiyun
vsp1_dl_list_commit(struct vsp1_dl_list * dl,unsigned int dl_flags)917*4882a593Smuzhiyun void vsp1_dl_list_commit(struct vsp1_dl_list *dl, unsigned int dl_flags)
918*4882a593Smuzhiyun {
919*4882a593Smuzhiyun struct vsp1_dl_manager *dlm = dl->dlm;
920*4882a593Smuzhiyun struct vsp1_dl_list *dl_next;
921*4882a593Smuzhiyun unsigned long flags;
922*4882a593Smuzhiyun
923*4882a593Smuzhiyun /* Fill the header for the head and chained display lists. */
924*4882a593Smuzhiyun vsp1_dl_list_fill_header(dl, list_empty(&dl->chain));
925*4882a593Smuzhiyun
926*4882a593Smuzhiyun list_for_each_entry(dl_next, &dl->chain, chain) {
927*4882a593Smuzhiyun bool last = list_is_last(&dl_next->chain, &dl->chain);
928*4882a593Smuzhiyun
929*4882a593Smuzhiyun vsp1_dl_list_fill_header(dl_next, last);
930*4882a593Smuzhiyun }
931*4882a593Smuzhiyun
932*4882a593Smuzhiyun dl->flags = dl_flags & ~VSP1_DL_FRAME_END_COMPLETED;
933*4882a593Smuzhiyun
934*4882a593Smuzhiyun spin_lock_irqsave(&dlm->lock, flags);
935*4882a593Smuzhiyun
936*4882a593Smuzhiyun if (dlm->singleshot)
937*4882a593Smuzhiyun vsp1_dl_list_commit_singleshot(dl);
938*4882a593Smuzhiyun else
939*4882a593Smuzhiyun vsp1_dl_list_commit_continuous(dl);
940*4882a593Smuzhiyun
941*4882a593Smuzhiyun spin_unlock_irqrestore(&dlm->lock, flags);
942*4882a593Smuzhiyun }
943*4882a593Smuzhiyun
944*4882a593Smuzhiyun /* -----------------------------------------------------------------------------
945*4882a593Smuzhiyun * Display List Manager
946*4882a593Smuzhiyun */
947*4882a593Smuzhiyun
948*4882a593Smuzhiyun /**
949*4882a593Smuzhiyun * vsp1_dlm_irq_frame_end - Display list handler for the frame end interrupt
950*4882a593Smuzhiyun * @dlm: the display list manager
951*4882a593Smuzhiyun *
952*4882a593Smuzhiyun * Return a set of flags that indicates display list completion status.
953*4882a593Smuzhiyun *
954*4882a593Smuzhiyun * The VSP1_DL_FRAME_END_COMPLETED flag indicates that the previous display list
955*4882a593Smuzhiyun * has completed at frame end. If the flag is not returned display list
956*4882a593Smuzhiyun * completion has been delayed by one frame because the display list commit
957*4882a593Smuzhiyun * raced with the frame end interrupt. The function always returns with the flag
958*4882a593Smuzhiyun * set in single-shot mode as display list processing is then not continuous and
959*4882a593Smuzhiyun * races never occur.
960*4882a593Smuzhiyun *
961*4882a593Smuzhiyun * The following flags are only supported for continuous mode.
962*4882a593Smuzhiyun *
963*4882a593Smuzhiyun * The VSP1_DL_FRAME_END_INTERNAL flag indicates that the display list that just
964*4882a593Smuzhiyun * became active had been queued with the internal notification flag.
965*4882a593Smuzhiyun *
966*4882a593Smuzhiyun * The VSP1_DL_FRAME_END_WRITEBACK flag indicates that the previously active
967*4882a593Smuzhiyun * display list had been queued with the writeback flag.
968*4882a593Smuzhiyun */
vsp1_dlm_irq_frame_end(struct vsp1_dl_manager * dlm)969*4882a593Smuzhiyun unsigned int vsp1_dlm_irq_frame_end(struct vsp1_dl_manager *dlm)
970*4882a593Smuzhiyun {
971*4882a593Smuzhiyun struct vsp1_device *vsp1 = dlm->vsp1;
972*4882a593Smuzhiyun u32 status = vsp1_read(vsp1, VI6_STATUS);
973*4882a593Smuzhiyun unsigned int flags = 0;
974*4882a593Smuzhiyun
975*4882a593Smuzhiyun spin_lock(&dlm->lock);
976*4882a593Smuzhiyun
977*4882a593Smuzhiyun /*
978*4882a593Smuzhiyun * The mem-to-mem pipelines work in single-shot mode. No new display
979*4882a593Smuzhiyun * list can be queued, we don't have to do anything.
980*4882a593Smuzhiyun */
981*4882a593Smuzhiyun if (dlm->singleshot) {
982*4882a593Smuzhiyun __vsp1_dl_list_put(dlm->active);
983*4882a593Smuzhiyun dlm->active = NULL;
984*4882a593Smuzhiyun flags |= VSP1_DL_FRAME_END_COMPLETED;
985*4882a593Smuzhiyun goto done;
986*4882a593Smuzhiyun }
987*4882a593Smuzhiyun
988*4882a593Smuzhiyun /*
989*4882a593Smuzhiyun * If the commit operation raced with the interrupt and occurred after
990*4882a593Smuzhiyun * the frame end event but before interrupt processing, the hardware
991*4882a593Smuzhiyun * hasn't taken the update into account yet. We have to skip one frame
992*4882a593Smuzhiyun * and retry.
993*4882a593Smuzhiyun */
994*4882a593Smuzhiyun if (vsp1_dl_list_hw_update_pending(dlm))
995*4882a593Smuzhiyun goto done;
996*4882a593Smuzhiyun
997*4882a593Smuzhiyun /*
998*4882a593Smuzhiyun * Progressive streams report only TOP fields. If we have a BOTTOM
999*4882a593Smuzhiyun * field, we are interlaced, and expect the frame to complete on the
1000*4882a593Smuzhiyun * next frame end interrupt.
1001*4882a593Smuzhiyun */
1002*4882a593Smuzhiyun if (status & VI6_STATUS_FLD_STD(dlm->index))
1003*4882a593Smuzhiyun goto done;
1004*4882a593Smuzhiyun
1005*4882a593Smuzhiyun /*
1006*4882a593Smuzhiyun * If the active display list has the writeback flag set, the frame
1007*4882a593Smuzhiyun * completion marks the end of the writeback capture. Return the
1008*4882a593Smuzhiyun * VSP1_DL_FRAME_END_WRITEBACK flag and reset the display list's
1009*4882a593Smuzhiyun * writeback flag.
1010*4882a593Smuzhiyun */
1011*4882a593Smuzhiyun if (dlm->active && (dlm->active->flags & VSP1_DL_FRAME_END_WRITEBACK)) {
1012*4882a593Smuzhiyun flags |= VSP1_DL_FRAME_END_WRITEBACK;
1013*4882a593Smuzhiyun dlm->active->flags &= ~VSP1_DL_FRAME_END_WRITEBACK;
1014*4882a593Smuzhiyun }
1015*4882a593Smuzhiyun
1016*4882a593Smuzhiyun /*
1017*4882a593Smuzhiyun * The device starts processing the queued display list right after the
1018*4882a593Smuzhiyun * frame end interrupt. The display list thus becomes active.
1019*4882a593Smuzhiyun */
1020*4882a593Smuzhiyun if (dlm->queued) {
1021*4882a593Smuzhiyun if (dlm->queued->flags & VSP1_DL_FRAME_END_INTERNAL)
1022*4882a593Smuzhiyun flags |= VSP1_DL_FRAME_END_INTERNAL;
1023*4882a593Smuzhiyun dlm->queued->flags &= ~VSP1_DL_FRAME_END_INTERNAL;
1024*4882a593Smuzhiyun
1025*4882a593Smuzhiyun __vsp1_dl_list_put(dlm->active);
1026*4882a593Smuzhiyun dlm->active = dlm->queued;
1027*4882a593Smuzhiyun dlm->queued = NULL;
1028*4882a593Smuzhiyun flags |= VSP1_DL_FRAME_END_COMPLETED;
1029*4882a593Smuzhiyun }
1030*4882a593Smuzhiyun
1031*4882a593Smuzhiyun /*
1032*4882a593Smuzhiyun * Now that the VSP has started processing the queued display list, we
1033*4882a593Smuzhiyun * can queue the pending display list to the hardware if one has been
1034*4882a593Smuzhiyun * prepared.
1035*4882a593Smuzhiyun */
1036*4882a593Smuzhiyun if (dlm->pending) {
1037*4882a593Smuzhiyun vsp1_dl_list_hw_enqueue(dlm->pending);
1038*4882a593Smuzhiyun dlm->queued = dlm->pending;
1039*4882a593Smuzhiyun dlm->pending = NULL;
1040*4882a593Smuzhiyun }
1041*4882a593Smuzhiyun
1042*4882a593Smuzhiyun done:
1043*4882a593Smuzhiyun spin_unlock(&dlm->lock);
1044*4882a593Smuzhiyun
1045*4882a593Smuzhiyun return flags;
1046*4882a593Smuzhiyun }
1047*4882a593Smuzhiyun
1048*4882a593Smuzhiyun /* Hardware Setup */
vsp1_dlm_setup(struct vsp1_device * vsp1)1049*4882a593Smuzhiyun void vsp1_dlm_setup(struct vsp1_device *vsp1)
1050*4882a593Smuzhiyun {
1051*4882a593Smuzhiyun unsigned int i;
1052*4882a593Smuzhiyun u32 ctrl = (256 << VI6_DL_CTRL_AR_WAIT_SHIFT)
1053*4882a593Smuzhiyun | VI6_DL_CTRL_DC2 | VI6_DL_CTRL_DC1 | VI6_DL_CTRL_DC0
1054*4882a593Smuzhiyun | VI6_DL_CTRL_DLE;
1055*4882a593Smuzhiyun u32 ext_dl = (0x02 << VI6_DL_EXT_CTRL_POLINT_SHIFT)
1056*4882a593Smuzhiyun | VI6_DL_EXT_CTRL_DLPRI | VI6_DL_EXT_CTRL_EXT;
1057*4882a593Smuzhiyun
1058*4882a593Smuzhiyun if (vsp1_feature(vsp1, VSP1_HAS_EXT_DL)) {
1059*4882a593Smuzhiyun for (i = 0; i < vsp1->info->wpf_count; ++i)
1060*4882a593Smuzhiyun vsp1_write(vsp1, VI6_DL_EXT_CTRL(i), ext_dl);
1061*4882a593Smuzhiyun }
1062*4882a593Smuzhiyun
1063*4882a593Smuzhiyun vsp1_write(vsp1, VI6_DL_CTRL, ctrl);
1064*4882a593Smuzhiyun vsp1_write(vsp1, VI6_DL_SWAP, VI6_DL_SWAP_LWS);
1065*4882a593Smuzhiyun }
1066*4882a593Smuzhiyun
vsp1_dlm_reset(struct vsp1_dl_manager * dlm)1067*4882a593Smuzhiyun void vsp1_dlm_reset(struct vsp1_dl_manager *dlm)
1068*4882a593Smuzhiyun {
1069*4882a593Smuzhiyun unsigned long flags;
1070*4882a593Smuzhiyun
1071*4882a593Smuzhiyun spin_lock_irqsave(&dlm->lock, flags);
1072*4882a593Smuzhiyun
1073*4882a593Smuzhiyun __vsp1_dl_list_put(dlm->active);
1074*4882a593Smuzhiyun __vsp1_dl_list_put(dlm->queued);
1075*4882a593Smuzhiyun __vsp1_dl_list_put(dlm->pending);
1076*4882a593Smuzhiyun
1077*4882a593Smuzhiyun spin_unlock_irqrestore(&dlm->lock, flags);
1078*4882a593Smuzhiyun
1079*4882a593Smuzhiyun dlm->active = NULL;
1080*4882a593Smuzhiyun dlm->queued = NULL;
1081*4882a593Smuzhiyun dlm->pending = NULL;
1082*4882a593Smuzhiyun }
1083*4882a593Smuzhiyun
vsp1_dlm_dl_body_get(struct vsp1_dl_manager * dlm)1084*4882a593Smuzhiyun struct vsp1_dl_body *vsp1_dlm_dl_body_get(struct vsp1_dl_manager *dlm)
1085*4882a593Smuzhiyun {
1086*4882a593Smuzhiyun return vsp1_dl_body_get(dlm->pool);
1087*4882a593Smuzhiyun }
1088*4882a593Smuzhiyun
vsp1_dlm_create(struct vsp1_device * vsp1,unsigned int index,unsigned int prealloc)1089*4882a593Smuzhiyun struct vsp1_dl_manager *vsp1_dlm_create(struct vsp1_device *vsp1,
1090*4882a593Smuzhiyun unsigned int index,
1091*4882a593Smuzhiyun unsigned int prealloc)
1092*4882a593Smuzhiyun {
1093*4882a593Smuzhiyun struct vsp1_dl_manager *dlm;
1094*4882a593Smuzhiyun size_t header_size;
1095*4882a593Smuzhiyun unsigned int i;
1096*4882a593Smuzhiyun
1097*4882a593Smuzhiyun dlm = devm_kzalloc(vsp1->dev, sizeof(*dlm), GFP_KERNEL);
1098*4882a593Smuzhiyun if (!dlm)
1099*4882a593Smuzhiyun return NULL;
1100*4882a593Smuzhiyun
1101*4882a593Smuzhiyun dlm->index = index;
1102*4882a593Smuzhiyun dlm->singleshot = vsp1->info->uapi;
1103*4882a593Smuzhiyun dlm->vsp1 = vsp1;
1104*4882a593Smuzhiyun
1105*4882a593Smuzhiyun spin_lock_init(&dlm->lock);
1106*4882a593Smuzhiyun INIT_LIST_HEAD(&dlm->free);
1107*4882a593Smuzhiyun
1108*4882a593Smuzhiyun /*
1109*4882a593Smuzhiyun * Initialize the display list body and allocate DMA memory for the body
1110*4882a593Smuzhiyun * and the header. Both are allocated together to avoid memory
1111*4882a593Smuzhiyun * fragmentation, with the header located right after the body in
1112*4882a593Smuzhiyun * memory. An extra body is allocated on top of the prealloc to account
1113*4882a593Smuzhiyun * for the cached body used by the vsp1_pipeline object.
1114*4882a593Smuzhiyun */
1115*4882a593Smuzhiyun header_size = vsp1_feature(vsp1, VSP1_HAS_EXT_DL) ?
1116*4882a593Smuzhiyun sizeof(struct vsp1_dl_header_extended) :
1117*4882a593Smuzhiyun sizeof(struct vsp1_dl_header);
1118*4882a593Smuzhiyun
1119*4882a593Smuzhiyun header_size = ALIGN(header_size, 8);
1120*4882a593Smuzhiyun
1121*4882a593Smuzhiyun dlm->pool = vsp1_dl_body_pool_create(vsp1, prealloc + 1,
1122*4882a593Smuzhiyun VSP1_DL_NUM_ENTRIES, header_size);
1123*4882a593Smuzhiyun if (!dlm->pool)
1124*4882a593Smuzhiyun return NULL;
1125*4882a593Smuzhiyun
1126*4882a593Smuzhiyun for (i = 0; i < prealloc; ++i) {
1127*4882a593Smuzhiyun struct vsp1_dl_list *dl;
1128*4882a593Smuzhiyun
1129*4882a593Smuzhiyun dl = vsp1_dl_list_alloc(dlm);
1130*4882a593Smuzhiyun if (!dl) {
1131*4882a593Smuzhiyun vsp1_dlm_destroy(dlm);
1132*4882a593Smuzhiyun return NULL;
1133*4882a593Smuzhiyun }
1134*4882a593Smuzhiyun
1135*4882a593Smuzhiyun /* The extended header immediately follows the header. */
1136*4882a593Smuzhiyun if (vsp1_feature(vsp1, VSP1_HAS_EXT_DL))
1137*4882a593Smuzhiyun dl->extension = (void *)dl->header
1138*4882a593Smuzhiyun + sizeof(*dl->header);
1139*4882a593Smuzhiyun
1140*4882a593Smuzhiyun list_add_tail(&dl->list, &dlm->free);
1141*4882a593Smuzhiyun }
1142*4882a593Smuzhiyun
1143*4882a593Smuzhiyun if (vsp1_feature(vsp1, VSP1_HAS_EXT_DL)) {
1144*4882a593Smuzhiyun dlm->cmdpool = vsp1_dl_cmd_pool_create(vsp1,
1145*4882a593Smuzhiyun VSP1_EXTCMD_AUTOFLD, prealloc);
1146*4882a593Smuzhiyun if (!dlm->cmdpool) {
1147*4882a593Smuzhiyun vsp1_dlm_destroy(dlm);
1148*4882a593Smuzhiyun return NULL;
1149*4882a593Smuzhiyun }
1150*4882a593Smuzhiyun }
1151*4882a593Smuzhiyun
1152*4882a593Smuzhiyun return dlm;
1153*4882a593Smuzhiyun }
1154*4882a593Smuzhiyun
vsp1_dlm_destroy(struct vsp1_dl_manager * dlm)1155*4882a593Smuzhiyun void vsp1_dlm_destroy(struct vsp1_dl_manager *dlm)
1156*4882a593Smuzhiyun {
1157*4882a593Smuzhiyun struct vsp1_dl_list *dl, *next;
1158*4882a593Smuzhiyun
1159*4882a593Smuzhiyun if (!dlm)
1160*4882a593Smuzhiyun return;
1161*4882a593Smuzhiyun
1162*4882a593Smuzhiyun list_for_each_entry_safe(dl, next, &dlm->free, list) {
1163*4882a593Smuzhiyun list_del(&dl->list);
1164*4882a593Smuzhiyun vsp1_dl_list_free(dl);
1165*4882a593Smuzhiyun }
1166*4882a593Smuzhiyun
1167*4882a593Smuzhiyun vsp1_dl_body_pool_destroy(dlm->pool);
1168*4882a593Smuzhiyun vsp1_dl_ext_cmd_pool_destroy(dlm->cmdpool);
1169*4882a593Smuzhiyun }
1170