xref: /OK3568_Linux_fs/kernel/drivers/media/platform/sunxi/sun8i-rotate/sun8i-rotate.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Allwinner DE2 rotation driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2020 Jernej Skrabec <jernej.skrabec@siol.net>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #ifndef _SUN8I_ROTATE_H_
9*4882a593Smuzhiyun #define _SUN8I_ROTATE_H_
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <media/v4l2-ctrls.h>
12*4882a593Smuzhiyun #include <media/v4l2-device.h>
13*4882a593Smuzhiyun #include <media/v4l2-mem2mem.h>
14*4882a593Smuzhiyun #include <media/videobuf2-v4l2.h>
15*4882a593Smuzhiyun #include <media/videobuf2-dma-contig.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #include <linux/platform_device.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #define ROTATE_NAME		"sun8i-rotate"
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #define ROTATE_GLB_CTL			0x00
22*4882a593Smuzhiyun #define ROTATE_GLB_CTL_START			BIT(31)
23*4882a593Smuzhiyun #define ROTATE_GLB_CTL_RESET			BIT(30)
24*4882a593Smuzhiyun #define ROTATE_GLB_CTL_BURST_LEN(x)		((x) << 16)
25*4882a593Smuzhiyun #define ROTATE_GLB_CTL_HFLIP			BIT(7)
26*4882a593Smuzhiyun #define ROTATE_GLB_CTL_VFLIP			BIT(6)
27*4882a593Smuzhiyun #define ROTATE_GLB_CTL_ROTATION(x)		((x) << 4)
28*4882a593Smuzhiyun #define ROTATE_GLB_CTL_MODE(x)			((x) << 0)
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #define ROTATE_INT			0x04
31*4882a593Smuzhiyun #define ROTATE_INT_FINISH_IRQ_EN		BIT(16)
32*4882a593Smuzhiyun #define ROTATE_INT_FINISH_IRQ			BIT(0)
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define ROTATE_IN_FMT			0x20
35*4882a593Smuzhiyun #define ROTATE_IN_FMT_FORMAT(x)			((x) << 0)
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #define ROTATE_IN_SIZE			0x24
38*4882a593Smuzhiyun #define ROTATE_IN_PITCH0		0x30
39*4882a593Smuzhiyun #define ROTATE_IN_PITCH1		0x34
40*4882a593Smuzhiyun #define ROTATE_IN_PITCH2		0x38
41*4882a593Smuzhiyun #define ROTATE_IN_ADDRL0		0x40
42*4882a593Smuzhiyun #define ROTATE_IN_ADDRH0		0x44
43*4882a593Smuzhiyun #define ROTATE_IN_ADDRL1		0x48
44*4882a593Smuzhiyun #define ROTATE_IN_ADDRH1		0x4c
45*4882a593Smuzhiyun #define ROTATE_IN_ADDRL2		0x50
46*4882a593Smuzhiyun #define ROTATE_IN_ADDRH2		0x54
47*4882a593Smuzhiyun #define ROTATE_OUT_SIZE			0x84
48*4882a593Smuzhiyun #define ROTATE_OUT_PITCH0		0x90
49*4882a593Smuzhiyun #define ROTATE_OUT_PITCH1		0x94
50*4882a593Smuzhiyun #define ROTATE_OUT_PITCH2		0x98
51*4882a593Smuzhiyun #define ROTATE_OUT_ADDRL0		0xA0
52*4882a593Smuzhiyun #define ROTATE_OUT_ADDRH0		0xA4
53*4882a593Smuzhiyun #define ROTATE_OUT_ADDRL1		0xA8
54*4882a593Smuzhiyun #define ROTATE_OUT_ADDRH1		0xAC
55*4882a593Smuzhiyun #define ROTATE_OUT_ADDRL2		0xB0
56*4882a593Smuzhiyun #define ROTATE_OUT_ADDRH2		0xB4
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun #define ROTATE_BURST_8			0x07
59*4882a593Smuzhiyun #define ROTATE_BURST_16			0x0f
60*4882a593Smuzhiyun #define ROTATE_BURST_32			0x1f
61*4882a593Smuzhiyun #define ROTATE_BURST_64			0x3f
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun #define ROTATE_MODE_COPY_ROTATE		0x01
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun #define ROTATE_FORMAT_ARGB32		0x00
66*4882a593Smuzhiyun #define ROTATE_FORMAT_ABGR32		0x01
67*4882a593Smuzhiyun #define ROTATE_FORMAT_RGBA32		0x02
68*4882a593Smuzhiyun #define ROTATE_FORMAT_BGRA32		0x03
69*4882a593Smuzhiyun #define ROTATE_FORMAT_XRGB32		0x04
70*4882a593Smuzhiyun #define ROTATE_FORMAT_XBGR32		0x05
71*4882a593Smuzhiyun #define ROTATE_FORMAT_RGBX32		0x06
72*4882a593Smuzhiyun #define ROTATE_FORMAT_BGRX32		0x07
73*4882a593Smuzhiyun #define ROTATE_FORMAT_RGB24		0x08
74*4882a593Smuzhiyun #define ROTATE_FORMAT_BGR24		0x09
75*4882a593Smuzhiyun #define ROTATE_FORMAT_RGB565		0x0a
76*4882a593Smuzhiyun #define ROTATE_FORMAT_BGR565		0x0b
77*4882a593Smuzhiyun #define ROTATE_FORMAT_ARGB4444		0x0c
78*4882a593Smuzhiyun #define ROTATE_FORMAT_ABGR4444		0x0d
79*4882a593Smuzhiyun #define ROTATE_FORMAT_RGBA4444		0x0e
80*4882a593Smuzhiyun #define ROTATE_FORMAT_BGRA4444		0x0f
81*4882a593Smuzhiyun #define ROTATE_FORMAT_ARGB1555		0x10
82*4882a593Smuzhiyun #define ROTATE_FORMAT_ABGR1555		0x11
83*4882a593Smuzhiyun #define ROTATE_FORMAT_RGBA5551		0x12
84*4882a593Smuzhiyun #define ROTATE_FORMAT_BGRA5551		0x13
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun #define ROTATE_FORMAT_YUYV		0x20
87*4882a593Smuzhiyun #define ROTATE_FORMAT_UYVY		0x21
88*4882a593Smuzhiyun #define ROTATE_FORMAT_YVYU		0x22
89*4882a593Smuzhiyun #define ROTATE_FORMAT_VYUV		0x23
90*4882a593Smuzhiyun #define ROTATE_FORMAT_NV61		0x24
91*4882a593Smuzhiyun #define ROTATE_FORMAT_NV16		0x25
92*4882a593Smuzhiyun #define ROTATE_FORMAT_YUV422P		0x26
93*4882a593Smuzhiyun #define ROTATE_FORMAT_NV21		0x28
94*4882a593Smuzhiyun #define ROTATE_FORMAT_NV12		0x29
95*4882a593Smuzhiyun #define ROTATE_FORMAT_YUV420P		0x2A
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun #define ROTATE_SIZE(w, h)	(((h) - 1) << 16 | ((w) - 1))
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun #define ROTATE_MIN_WIDTH	8U
100*4882a593Smuzhiyun #define ROTATE_MIN_HEIGHT	8U
101*4882a593Smuzhiyun #define ROTATE_MAX_WIDTH	4096U
102*4882a593Smuzhiyun #define ROTATE_MAX_HEIGHT	4096U
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun struct rotate_ctx {
105*4882a593Smuzhiyun 	struct v4l2_fh		fh;
106*4882a593Smuzhiyun 	struct rotate_dev	*dev;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	struct v4l2_pix_format	src_fmt;
109*4882a593Smuzhiyun 	struct v4l2_pix_format	dst_fmt;
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	struct v4l2_ctrl_handler ctrl_handler;
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	u32 hflip;
114*4882a593Smuzhiyun 	u32 vflip;
115*4882a593Smuzhiyun 	u32 rotate;
116*4882a593Smuzhiyun };
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun struct rotate_dev {
119*4882a593Smuzhiyun 	struct v4l2_device	v4l2_dev;
120*4882a593Smuzhiyun 	struct video_device	vfd;
121*4882a593Smuzhiyun 	struct device		*dev;
122*4882a593Smuzhiyun 	struct v4l2_m2m_dev	*m2m_dev;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	/* Device file mutex */
125*4882a593Smuzhiyun 	struct mutex		dev_mutex;
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	void __iomem		*base;
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	struct clk		*bus_clk;
130*4882a593Smuzhiyun 	struct clk		*mod_clk;
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	struct reset_control	*rstc;
133*4882a593Smuzhiyun };
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun #endif
136