1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Register definition file for Samsung MFC V7.x Interface (FIMV) driver 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2013 Samsung Electronics Co., Ltd. 6*4882a593Smuzhiyun * http://www.samsung.com/ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef _REGS_MFC_V7_H 10*4882a593Smuzhiyun #define _REGS_MFC_V7_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include "regs-mfc-v6.h" 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun /* Additional features of v7 */ 15*4882a593Smuzhiyun #define S5P_FIMV_CODEC_VP8_ENC_V7 25 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun /* Additional registers for v7 */ 18*4882a593Smuzhiyun #define S5P_FIMV_E_SOURCE_FIRST_ADDR_V7 0xf9e0 19*4882a593Smuzhiyun #define S5P_FIMV_E_SOURCE_SECOND_ADDR_V7 0xf9e4 20*4882a593Smuzhiyun #define S5P_FIMV_E_SOURCE_THIRD_ADDR_V7 0xf9e8 21*4882a593Smuzhiyun #define S5P_FIMV_E_SOURCE_FIRST_STRIDE_V7 0xf9ec 22*4882a593Smuzhiyun #define S5P_FIMV_E_SOURCE_SECOND_STRIDE_V7 0xf9f0 23*4882a593Smuzhiyun #define S5P_FIMV_E_SOURCE_THIRD_STRIDE_V7 0xf9f4 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #define S5P_FIMV_E_ENCODED_SOURCE_FIRST_ADDR_V7 0xfa70 26*4882a593Smuzhiyun #define S5P_FIMV_E_ENCODED_SOURCE_SECOND_ADDR_V7 0xfa74 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #define S5P_FIMV_E_VP8_OPTIONS_V7 0xfdb0 29*4882a593Smuzhiyun #define S5P_FIMV_E_VP8_FILTER_OPTIONS_V7 0xfdb4 30*4882a593Smuzhiyun #define S5P_FIMV_E_VP8_GOLDEN_FRAME_OPTION_V7 0xfdb8 31*4882a593Smuzhiyun #define S5P_FIMV_E_VP8_NUM_T_LAYER_V7 0xfdc4 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* MFCv7 variant defines */ 34*4882a593Smuzhiyun #define MAX_FW_SIZE_V7 (SZ_512K) /* 512KB */ 35*4882a593Smuzhiyun #define MAX_CPB_SIZE_V7 (3 * SZ_1M) /* 3MB */ 36*4882a593Smuzhiyun #define MFC_VERSION_V7 0x72 37*4882a593Smuzhiyun #define MFC_NUM_PORTS_V7 1 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #define MFC_LUMA_PAD_BYTES_V7 256 40*4882a593Smuzhiyun #define MFC_CHROMA_PAD_BYTES_V7 128 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun /* MFCv7 Context buffer sizes */ 43*4882a593Smuzhiyun #define MFC_CTX_BUF_SIZE_V7 (30 * SZ_1K) /* 30KB */ 44*4882a593Smuzhiyun #define MFC_H264_DEC_CTX_BUF_SIZE_V7 (2 * SZ_1M) /* 2MB */ 45*4882a593Smuzhiyun #define MFC_OTHER_DEC_CTX_BUF_SIZE_V7 (20 * SZ_1K) /* 20KB */ 46*4882a593Smuzhiyun #define MFC_H264_ENC_CTX_BUF_SIZE_V7 (100 * SZ_1K) /* 100KB */ 47*4882a593Smuzhiyun #define MFC_OTHER_ENC_CTX_BUF_SIZE_V7 (10 * SZ_1K) /* 10KB */ 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun /* Buffer size defines */ 50*4882a593Smuzhiyun #define S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_DEC_V7(w, h) \ 51*4882a593Smuzhiyun (SZ_1M + ((w) * 144) + (8192 * (h)) + 49216) 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun #define S5P_FIMV_SCRATCH_BUF_SIZE_VP8_ENC_V7(w, h) \ 54*4882a593Smuzhiyun (((w) * 48) + 8192 + ((((w) + 1) / 2) * 128) + 144 + \ 55*4882a593Smuzhiyun ((((((w) * 16) * ((h) * 16)) * 3) / 2) * 4)) 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #endif /*_REGS_MFC_V7_H*/ 58