1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Register definition file for Samsung MFC V6.x Interface (FIMV) driver 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2012 Samsung Electronics Co., Ltd. 6*4882a593Smuzhiyun * http://www.samsung.com/ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef _REGS_FIMV_V6_H 10*4882a593Smuzhiyun #define _REGS_FIMV_V6_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include <linux/kernel.h> 13*4882a593Smuzhiyun #include <linux/sizes.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define S5P_FIMV_REG_SIZE_V6 (S5P_FIMV_END_ADDR - S5P_FIMV_START_ADDR) 16*4882a593Smuzhiyun #define S5P_FIMV_REG_COUNT_V6 ((S5P_FIMV_END_ADDR - S5P_FIMV_START_ADDR) / 4) 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* Number of bits that the buffer address should be shifted for particular 19*4882a593Smuzhiyun * MFC buffers. */ 20*4882a593Smuzhiyun #define S5P_FIMV_MEM_OFFSET_V6 0 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define S5P_FIMV_START_ADDR_V6 0x0000 23*4882a593Smuzhiyun #define S5P_FIMV_END_ADDR_V6 0xfd80 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #define S5P_FIMV_REG_CLEAR_BEGIN_V6 0xf000 26*4882a593Smuzhiyun #define S5P_FIMV_REG_CLEAR_COUNT_V6 1024 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun /* Codec Common Registers */ 29*4882a593Smuzhiyun #define S5P_FIMV_RISC_ON_V6 0x0000 30*4882a593Smuzhiyun #define S5P_FIMV_RISC2HOST_INT_V6 0x003C 31*4882a593Smuzhiyun #define S5P_FIMV_HOST2RISC_INT_V6 0x0044 32*4882a593Smuzhiyun #define S5P_FIMV_RISC_BASE_ADDRESS_V6 0x0054 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #define S5P_FIMV_MFC_RESET_V6 0x1070 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #define S5P_FIMV_HOST2RISC_CMD_V6 0x1100 37*4882a593Smuzhiyun #define S5P_FIMV_H2R_CMD_EMPTY_V6 0 38*4882a593Smuzhiyun #define S5P_FIMV_H2R_CMD_SYS_INIT_V6 1 39*4882a593Smuzhiyun #define S5P_FIMV_H2R_CMD_OPEN_INSTANCE_V6 2 40*4882a593Smuzhiyun #define S5P_FIMV_CH_SEQ_HEADER_V6 3 41*4882a593Smuzhiyun #define S5P_FIMV_CH_INIT_BUFS_V6 4 42*4882a593Smuzhiyun #define S5P_FIMV_CH_FRAME_START_V6 5 43*4882a593Smuzhiyun #define S5P_FIMV_H2R_CMD_CLOSE_INSTANCE_V6 6 44*4882a593Smuzhiyun #define S5P_FIMV_H2R_CMD_SLEEP_V6 7 45*4882a593Smuzhiyun #define S5P_FIMV_H2R_CMD_WAKEUP_V6 8 46*4882a593Smuzhiyun #define S5P_FIMV_CH_LAST_FRAME_V6 9 47*4882a593Smuzhiyun #define S5P_FIMV_H2R_CMD_FLUSH_V6 10 48*4882a593Smuzhiyun /* RMVME: REALLOC used? */ 49*4882a593Smuzhiyun #define S5P_FIMV_CH_FRAME_START_REALLOC_V6 5 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun #define S5P_FIMV_RISC2HOST_CMD_V6 0x1104 52*4882a593Smuzhiyun #define S5P_FIMV_R2H_CMD_EMPTY_V6 0 53*4882a593Smuzhiyun #define S5P_FIMV_R2H_CMD_SYS_INIT_RET_V6 1 54*4882a593Smuzhiyun #define S5P_FIMV_R2H_CMD_OPEN_INSTANCE_RET_V6 2 55*4882a593Smuzhiyun #define S5P_FIMV_R2H_CMD_SEQ_DONE_RET_V6 3 56*4882a593Smuzhiyun #define S5P_FIMV_R2H_CMD_INIT_BUFFERS_RET_V6 4 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun #define S5P_FIMV_R2H_CMD_CLOSE_INSTANCE_RET_V6 6 59*4882a593Smuzhiyun #define S5P_FIMV_R2H_CMD_SLEEP_RET_V6 7 60*4882a593Smuzhiyun #define S5P_FIMV_R2H_CMD_WAKEUP_RET_V6 8 61*4882a593Smuzhiyun #define S5P_FIMV_R2H_CMD_COMPLETE_SEQ_RET_V6 9 62*4882a593Smuzhiyun #define S5P_FIMV_R2H_CMD_DPB_FLUSH_RET_V6 10 63*4882a593Smuzhiyun #define S5P_FIMV_R2H_CMD_NAL_ABORT_RET_V6 11 64*4882a593Smuzhiyun #define S5P_FIMV_R2H_CMD_FW_STATUS_RET_V6 12 65*4882a593Smuzhiyun #define S5P_FIMV_R2H_CMD_FRAME_DONE_RET_V6 13 66*4882a593Smuzhiyun #define S5P_FIMV_R2H_CMD_FIELD_DONE_RET_V6 14 67*4882a593Smuzhiyun #define S5P_FIMV_R2H_CMD_SLICE_DONE_RET_V6 15 68*4882a593Smuzhiyun #define S5P_FIMV_R2H_CMD_ENC_BUFFER_FUL_RET_V6 16 69*4882a593Smuzhiyun #define S5P_FIMV_R2H_CMD_ERR_RET_V6 32 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun #define S5P_FIMV_MFC_BUS_RESET_CTRL 0x7110 72*4882a593Smuzhiyun #define S5P_FIMV_FW_VERSION_V6 0xf000 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun #define S5P_FIMV_INSTANCE_ID_V6 0xf008 75*4882a593Smuzhiyun #define S5P_FIMV_CODEC_TYPE_V6 0xf00c 76*4882a593Smuzhiyun #define S5P_FIMV_CONTEXT_MEM_ADDR_V6 0xf014 77*4882a593Smuzhiyun #define S5P_FIMV_CONTEXT_MEM_SIZE_V6 0xf018 78*4882a593Smuzhiyun #define S5P_FIMV_PIXEL_FORMAT_V6 0xf020 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun #define S5P_FIMV_METADATA_ENABLE_V6 0xf024 81*4882a593Smuzhiyun #define S5P_FIMV_DBG_BUFFER_ADDR_V6 0xf030 82*4882a593Smuzhiyun #define S5P_FIMV_DBG_BUFFER_SIZE_V6 0xf034 83*4882a593Smuzhiyun #define S5P_FIMV_RET_INSTANCE_ID_V6 0xf070 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun #define S5P_FIMV_ERROR_CODE_V6 0xf074 86*4882a593Smuzhiyun #define S5P_FIMV_ERR_WARNINGS_START_V6 160 87*4882a593Smuzhiyun #define S5P_FIMV_ERR_DEC_MASK_V6 0xffff 88*4882a593Smuzhiyun #define S5P_FIMV_ERR_DEC_SHIFT_V6 0 89*4882a593Smuzhiyun #define S5P_FIMV_ERR_DSPL_MASK_V6 0xffff0000 90*4882a593Smuzhiyun #define S5P_FIMV_ERR_DSPL_SHIFT_V6 16 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun #define S5P_FIMV_DBG_BUFFER_OUTPUT_SIZE_V6 0xf078 93*4882a593Smuzhiyun #define S5P_FIMV_METADATA_STATUS_V6 0xf07C 94*4882a593Smuzhiyun #define S5P_FIMV_METADATA_ADDR_MB_INFO_V6 0xf080 95*4882a593Smuzhiyun #define S5P_FIMV_METADATA_SIZE_MB_INFO_V6 0xf084 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun /* Decoder Registers */ 98*4882a593Smuzhiyun #define S5P_FIMV_D_CRC_CTRL_V6 0xf0b0 99*4882a593Smuzhiyun #define S5P_FIMV_D_DEC_OPTIONS_V6 0xf0b4 100*4882a593Smuzhiyun #define S5P_FIMV_D_OPT_FMO_ASO_CTRL_MASK_V6 4 101*4882a593Smuzhiyun #define S5P_FIMV_D_OPT_DDELAY_EN_SHIFT_V6 3 102*4882a593Smuzhiyun #define S5P_FIMV_D_OPT_LF_CTRL_SHIFT_V6 1 103*4882a593Smuzhiyun #define S5P_FIMV_D_OPT_LF_CTRL_MASK_V6 0x3 104*4882a593Smuzhiyun #define S5P_FIMV_D_OPT_TILE_MODE_SHIFT_V6 0 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun #define S5P_FIMV_D_DISPLAY_DELAY_V6 0xf0b8 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun #define S5P_FIMV_D_SET_FRAME_WIDTH_V6 0xf0bc 109*4882a593Smuzhiyun #define S5P_FIMV_D_SET_FRAME_HEIGHT_V6 0xf0c0 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun #define S5P_FIMV_D_SEI_ENABLE_V6 0xf0c4 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun /* Buffer setting registers */ 114*4882a593Smuzhiyun #define S5P_FIMV_D_MIN_NUM_DPB_V6 0xf0f0 115*4882a593Smuzhiyun #define S5P_FIMV_D_MIN_LUMA_DPB_SIZE_V6 0xf0f4 116*4882a593Smuzhiyun #define S5P_FIMV_D_MIN_CHROMA_DPB_SIZE_V6 0xf0f8 117*4882a593Smuzhiyun #define S5P_FIMV_D_MVC_NUM_VIEWS_V6 0xf0fc 118*4882a593Smuzhiyun #define S5P_FIMV_D_MIN_NUM_MV_V6 0xf100 119*4882a593Smuzhiyun #define S5P_FIMV_D_NUM_DPB_V6 0xf130 120*4882a593Smuzhiyun #define S5P_FIMV_D_LUMA_DPB_SIZE_V6 0xf134 121*4882a593Smuzhiyun #define S5P_FIMV_D_CHROMA_DPB_SIZE_V6 0xf138 122*4882a593Smuzhiyun #define S5P_FIMV_D_MV_BUFFER_SIZE_V6 0xf13c 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun #define S5P_FIMV_D_LUMA_DPB_V6 0xf140 125*4882a593Smuzhiyun #define S5P_FIMV_D_CHROMA_DPB_V6 0xf240 126*4882a593Smuzhiyun #define S5P_FIMV_D_MV_BUFFER_V6 0xf340 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun #define S5P_FIMV_D_SCRATCH_BUFFER_ADDR_V6 0xf440 129*4882a593Smuzhiyun #define S5P_FIMV_D_SCRATCH_BUFFER_SIZE_V6 0xf444 130*4882a593Smuzhiyun #define S5P_FIMV_D_METADATA_BUFFER_ADDR_V6 0xf448 131*4882a593Smuzhiyun #define S5P_FIMV_D_METADATA_BUFFER_SIZE_V6 0xf44c 132*4882a593Smuzhiyun #define S5P_FIMV_D_NUM_MV_V6 0xf478 133*4882a593Smuzhiyun #define S5P_FIMV_D_CPB_BUFFER_ADDR_V6 0xf4b0 134*4882a593Smuzhiyun #define S5P_FIMV_D_CPB_BUFFER_SIZE_V6 0xf4b4 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun #define S5P_FIMV_D_AVAILABLE_DPB_FLAG_UPPER_V6 0xf4b8 137*4882a593Smuzhiyun #define S5P_FIMV_D_AVAILABLE_DPB_FLAG_LOWER_V6 0xf4bc 138*4882a593Smuzhiyun #define S5P_FIMV_D_CPB_BUFFER_OFFSET_V6 0xf4c0 139*4882a593Smuzhiyun #define S5P_FIMV_D_SLICE_IF_ENABLE_V6 0xf4c4 140*4882a593Smuzhiyun #define S5P_FIMV_D_PICTURE_TAG_V6 0xf4c8 141*4882a593Smuzhiyun #define S5P_FIMV_D_STREAM_DATA_SIZE_V6 0xf4d0 142*4882a593Smuzhiyun #define S5P_FIMV_D_INIT_BUFFER_OPTIONS_V6 0xf47c 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun /* Display information register */ 145*4882a593Smuzhiyun #define S5P_FIMV_D_DISPLAY_FRAME_WIDTH_V6 0xf500 146*4882a593Smuzhiyun #define S5P_FIMV_D_DISPLAY_FRAME_HEIGHT_V6 0xf504 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun /* Display status */ 149*4882a593Smuzhiyun #define S5P_FIMV_D_DISPLAY_STATUS_V6 0xf508 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun #define S5P_FIMV_D_DISPLAY_LUMA_ADDR_V6 0xf50c 152*4882a593Smuzhiyun #define S5P_FIMV_D_DISPLAY_CHROMA_ADDR_V6 0xf510 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun #define S5P_FIMV_D_DISPLAY_FRAME_TYPE_V6 0xf514 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun #define S5P_FIMV_D_DISPLAY_CROP_INFO1_V6 0xf518 157*4882a593Smuzhiyun #define S5P_FIMV_D_DISPLAY_CROP_INFO2_V6 0xf51c 158*4882a593Smuzhiyun #define S5P_FIMV_D_DISPLAY_PICTURE_PROFILE_V6 0xf520 159*4882a593Smuzhiyun #define S5P_FIMV_D_DISPLAY_LUMA_CRC_TOP_V6 0xf524 160*4882a593Smuzhiyun #define S5P_FIMV_D_DISPLAY_CHROMA_CRC_TOP_V6 0xf528 161*4882a593Smuzhiyun #define S5P_FIMV_D_DISPLAY_LUMA_CRC_BOT_V6 0xf52c 162*4882a593Smuzhiyun #define S5P_FIMV_D_DISPLAY_CHROMA_CRC_BOT_V6 0xf530 163*4882a593Smuzhiyun #define S5P_FIMV_D_DISPLAY_ASPECT_RATIO_V6 0xf534 164*4882a593Smuzhiyun #define S5P_FIMV_D_DISPLAY_EXTENDED_AR_V6 0xf538 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun /* Decoded picture information register */ 167*4882a593Smuzhiyun #define S5P_FIMV_D_DECODED_FRAME_WIDTH_V6 0xf53c 168*4882a593Smuzhiyun #define S5P_FIMV_D_DECODED_FRAME_HEIGHT_V6 0xf540 169*4882a593Smuzhiyun #define S5P_FIMV_D_DECODED_STATUS_V6 0xf544 170*4882a593Smuzhiyun #define S5P_FIMV_DEC_CRC_GEN_MASK_V6 0x1 171*4882a593Smuzhiyun #define S5P_FIMV_DEC_CRC_GEN_SHIFT_V6 6 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun #define S5P_FIMV_D_DECODED_LUMA_ADDR_V6 0xf548 174*4882a593Smuzhiyun #define S5P_FIMV_D_DECODED_CHROMA_ADDR_V6 0xf54c 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun #define S5P_FIMV_D_DECODED_FRAME_TYPE_V6 0xf550 177*4882a593Smuzhiyun #define S5P_FIMV_DECODE_FRAME_MASK_V6 7 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun #define S5P_FIMV_D_DECODED_CROP_INFO1_V6 0xf554 180*4882a593Smuzhiyun #define S5P_FIMV_D_DECODED_CROP_INFO2_V6 0xf558 181*4882a593Smuzhiyun #define S5P_FIMV_D_DECODED_PICTURE_PROFILE_V6 0xf55c 182*4882a593Smuzhiyun #define S5P_FIMV_D_DECODED_NAL_SIZE_V6 0xf560 183*4882a593Smuzhiyun #define S5P_FIMV_D_DECODED_LUMA_CRC_TOP_V6 0xf564 184*4882a593Smuzhiyun #define S5P_FIMV_D_DECODED_CHROMA_CRC_TOP_V6 0xf568 185*4882a593Smuzhiyun #define S5P_FIMV_D_DECODED_LUMA_CRC_BOT_V6 0xf56c 186*4882a593Smuzhiyun #define S5P_FIMV_D_DECODED_CHROMA_CRC_BOT_V6 0xf570 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun /* Returned value register for specific setting */ 189*4882a593Smuzhiyun #define S5P_FIMV_D_RET_PICTURE_TAG_TOP_V6 0xf574 190*4882a593Smuzhiyun #define S5P_FIMV_D_RET_PICTURE_TAG_BOT_V6 0xf578 191*4882a593Smuzhiyun #define S5P_FIMV_D_RET_PICTURE_TIME_TOP_V6 0xf57c 192*4882a593Smuzhiyun #define S5P_FIMV_D_RET_PICTURE_TIME_BOT_V6 0xf580 193*4882a593Smuzhiyun #define S5P_FIMV_D_CHROMA_FORMAT_V6 0xf588 194*4882a593Smuzhiyun #define S5P_FIMV_D_MPEG4_INFO_V6 0xf58c 195*4882a593Smuzhiyun #define S5P_FIMV_D_H264_INFO_V6 0xf590 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun #define S5P_FIMV_D_METADATA_ADDR_CONCEALED_MB_V6 0xf594 198*4882a593Smuzhiyun #define S5P_FIMV_D_METADATA_SIZE_CONCEALED_MB_V6 0xf598 199*4882a593Smuzhiyun #define S5P_FIMV_D_METADATA_ADDR_VC1_PARAM_V6 0xf59c 200*4882a593Smuzhiyun #define S5P_FIMV_D_METADATA_SIZE_VC1_PARAM_V6 0xf5a0 201*4882a593Smuzhiyun #define S5P_FIMV_D_METADATA_ADDR_SEI_NAL_V6 0xf5a4 202*4882a593Smuzhiyun #define S5P_FIMV_D_METADATA_SIZE_SEI_NAL_V6 0xf5a8 203*4882a593Smuzhiyun #define S5P_FIMV_D_METADATA_ADDR_VUI_V6 0xf5ac 204*4882a593Smuzhiyun #define S5P_FIMV_D_METADATA_SIZE_VUI_V6 0xf5b0 205*4882a593Smuzhiyun 206*4882a593Smuzhiyun #define S5P_FIMV_D_MVC_VIEW_ID_V6 0xf5b4 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun /* SEI related information */ 209*4882a593Smuzhiyun #define S5P_FIMV_D_FRAME_PACK_SEI_AVAIL_V6 0xf5f0 210*4882a593Smuzhiyun #define S5P_FIMV_D_FRAME_PACK_ARRGMENT_ID_V6 0xf5f4 211*4882a593Smuzhiyun #define S5P_FIMV_D_FRAME_PACK_SEI_INFO_V6 0xf5f8 212*4882a593Smuzhiyun #define S5P_FIMV_D_FRAME_PACK_GRID_POS_V6 0xf5fc 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun /* Encoder Registers */ 215*4882a593Smuzhiyun #define S5P_FIMV_E_FRAME_WIDTH_V6 0xf770 216*4882a593Smuzhiyun #define S5P_FIMV_E_FRAME_HEIGHT_V6 0xf774 217*4882a593Smuzhiyun #define S5P_FIMV_E_CROPPED_FRAME_WIDTH_V6 0xf778 218*4882a593Smuzhiyun #define S5P_FIMV_E_CROPPED_FRAME_HEIGHT_V6 0xf77c 219*4882a593Smuzhiyun #define S5P_FIMV_E_FRAME_CROP_OFFSET_V6 0xf780 220*4882a593Smuzhiyun #define S5P_FIMV_E_ENC_OPTIONS_V6 0xf784 221*4882a593Smuzhiyun #define S5P_FIMV_E_PICTURE_PROFILE_V6 0xf788 222*4882a593Smuzhiyun #define S5P_FIMV_E_FIXED_PICTURE_QP_V6 0xf790 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun #define S5P_FIMV_E_RC_CONFIG_V6 0xf794 225*4882a593Smuzhiyun #define S5P_FIMV_E_RC_QP_BOUND_V6 0xf798 226*4882a593Smuzhiyun #define S5P_FIMV_E_RC_RPARAM_V6 0xf79c 227*4882a593Smuzhiyun #define S5P_FIMV_E_MB_RC_CONFIG_V6 0xf7a0 228*4882a593Smuzhiyun #define S5P_FIMV_E_PADDING_CTRL_V6 0xf7a4 229*4882a593Smuzhiyun #define S5P_FIMV_E_MV_HOR_RANGE_V6 0xf7ac 230*4882a593Smuzhiyun #define S5P_FIMV_E_MV_VER_RANGE_V6 0xf7b0 231*4882a593Smuzhiyun #define S5P_FIMV_E_MV_RANGE_V6_MASK 0x3fff 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun #define S5P_FIMV_E_VBV_BUFFER_SIZE_V6 0xf84c 234*4882a593Smuzhiyun #define S5P_FIMV_E_VBV_INIT_DELAY_V6 0xf850 235*4882a593Smuzhiyun #define S5P_FIMV_E_NUM_DPB_V6 0xf890 236*4882a593Smuzhiyun #define S5P_FIMV_E_LUMA_DPB_V6 0xf8c0 237*4882a593Smuzhiyun #define S5P_FIMV_E_CHROMA_DPB_V6 0xf904 238*4882a593Smuzhiyun #define S5P_FIMV_E_ME_BUFFER_V6 0xf948 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun #define S5P_FIMV_E_SCRATCH_BUFFER_ADDR_V6 0xf98c 241*4882a593Smuzhiyun #define S5P_FIMV_E_SCRATCH_BUFFER_SIZE_V6 0xf990 242*4882a593Smuzhiyun #define S5P_FIMV_E_TMV_BUFFER0_V6 0xf994 243*4882a593Smuzhiyun #define S5P_FIMV_E_TMV_BUFFER1_V6 0xf998 244*4882a593Smuzhiyun #define S5P_FIMV_E_SOURCE_LUMA_ADDR_V6 0xf9f0 245*4882a593Smuzhiyun #define S5P_FIMV_E_SOURCE_CHROMA_ADDR_V6 0xf9f4 246*4882a593Smuzhiyun #define S5P_FIMV_E_STREAM_BUFFER_ADDR_V6 0xf9f8 247*4882a593Smuzhiyun #define S5P_FIMV_E_STREAM_BUFFER_SIZE_V6 0xf9fc 248*4882a593Smuzhiyun #define S5P_FIMV_E_ROI_BUFFER_ADDR_V6 0xfA00 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun #define S5P_FIMV_E_PARAM_CHANGE_V6 0xfa04 251*4882a593Smuzhiyun #define S5P_FIMV_E_IR_SIZE_V6 0xfa08 252*4882a593Smuzhiyun #define S5P_FIMV_E_GOP_CONFIG_V6 0xfa0c 253*4882a593Smuzhiyun #define S5P_FIMV_E_MSLICE_MODE_V6 0xfa10 254*4882a593Smuzhiyun #define S5P_FIMV_E_MSLICE_SIZE_MB_V6 0xfa14 255*4882a593Smuzhiyun #define S5P_FIMV_E_MSLICE_SIZE_BITS_V6 0xfa18 256*4882a593Smuzhiyun #define S5P_FIMV_E_FRAME_INSERTION_V6 0xfa1c 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun #define S5P_FIMV_E_RC_FRAME_RATE_V6 0xfa20 259*4882a593Smuzhiyun #define S5P_FIMV_E_RC_BIT_RATE_V6 0xfa24 260*4882a593Smuzhiyun #define S5P_FIMV_E_RC_QP_OFFSET_V6 0xfa28 261*4882a593Smuzhiyun #define S5P_FIMV_E_RC_ROI_CTRL_V6 0xfa2c 262*4882a593Smuzhiyun #define S5P_FIMV_E_PICTURE_TAG_V6 0xfa30 263*4882a593Smuzhiyun #define S5P_FIMV_E_BIT_COUNT_ENABLE_V6 0xfa34 264*4882a593Smuzhiyun #define S5P_FIMV_E_MAX_BIT_COUNT_V6 0xfa38 265*4882a593Smuzhiyun #define S5P_FIMV_E_MIN_BIT_COUNT_V6 0xfa3c 266*4882a593Smuzhiyun 267*4882a593Smuzhiyun #define S5P_FIMV_E_METADATA_BUFFER_ADDR_V6 0xfa40 268*4882a593Smuzhiyun #define S5P_FIMV_E_METADATA_BUFFER_SIZE_V6 0xfa44 269*4882a593Smuzhiyun #define S5P_FIMV_E_STREAM_SIZE_V6 0xfa80 270*4882a593Smuzhiyun #define S5P_FIMV_E_SLICE_TYPE_V6 0xfa84 271*4882a593Smuzhiyun #define S5P_FIMV_E_PICTURE_COUNT_V6 0xfa88 272*4882a593Smuzhiyun #define S5P_FIMV_E_RET_PICTURE_TAG_V6 0xfa8c 273*4882a593Smuzhiyun #define S5P_FIMV_E_STREAM_BUFFER_WRITE_POINTER_V6 0xfa90 274*4882a593Smuzhiyun 275*4882a593Smuzhiyun #define S5P_FIMV_E_ENCODED_SOURCE_LUMA_ADDR_V6 0xfa94 276*4882a593Smuzhiyun #define S5P_FIMV_E_ENCODED_SOURCE_CHROMA_ADDR_V6 0xfa98 277*4882a593Smuzhiyun #define S5P_FIMV_E_RECON_LUMA_DPB_ADDR_V6 0xfa9c 278*4882a593Smuzhiyun #define S5P_FIMV_E_RECON_CHROMA_DPB_ADDR_V6 0xfaa0 279*4882a593Smuzhiyun #define S5P_FIMV_E_METADATA_ADDR_ENC_SLICE_V6 0xfaa4 280*4882a593Smuzhiyun #define S5P_FIMV_E_METADATA_SIZE_ENC_SLICE_V6 0xfaa8 281*4882a593Smuzhiyun 282*4882a593Smuzhiyun #define S5P_FIMV_E_MPEG4_OPTIONS_V6 0xfb10 283*4882a593Smuzhiyun #define S5P_FIMV_E_MPEG4_HEC_PERIOD_V6 0xfb14 284*4882a593Smuzhiyun #define S5P_FIMV_E_ASPECT_RATIO_V6 0xfb50 285*4882a593Smuzhiyun #define S5P_FIMV_E_EXTENDED_SAR_V6 0xfb54 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun #define S5P_FIMV_E_H264_OPTIONS_V6 0xfb58 288*4882a593Smuzhiyun #define S5P_FIMV_E_H264_LF_ALPHA_OFFSET_V6 0xfb5c 289*4882a593Smuzhiyun #define S5P_FIMV_E_H264_LF_BETA_OFFSET_V6 0xfb60 290*4882a593Smuzhiyun #define S5P_FIMV_E_H264_I_PERIOD_V6 0xfb64 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun #define S5P_FIMV_E_H264_FMO_SLICE_GRP_MAP_TYPE_V6 0xfb68 293*4882a593Smuzhiyun #define S5P_FIMV_E_H264_FMO_NUM_SLICE_GRP_MINUS1_V6 0xfb6c 294*4882a593Smuzhiyun #define S5P_FIMV_E_H264_FMO_SLICE_GRP_CHANGE_DIR_V6 0xfb70 295*4882a593Smuzhiyun #define S5P_FIMV_E_H264_FMO_SLICE_GRP_CHANGE_RATE_MINUS1_V6 0xfb74 296*4882a593Smuzhiyun #define S5P_FIMV_E_H264_FMO_RUN_LENGTH_MINUS1_0_V6 0xfb78 297*4882a593Smuzhiyun #define S5P_FIMV_E_H264_FMO_RUN_LENGTH_MINUS1_1_V6 0xfb7c 298*4882a593Smuzhiyun #define S5P_FIMV_E_H264_FMO_RUN_LENGTH_MINUS1_2_V6 0xfb80 299*4882a593Smuzhiyun #define S5P_FIMV_E_H264_FMO_RUN_LENGTH_MINUS1_3_V6 0xfb84 300*4882a593Smuzhiyun 301*4882a593Smuzhiyun #define S5P_FIMV_E_H264_ASO_SLICE_ORDER_0_V6 0xfb88 302*4882a593Smuzhiyun #define S5P_FIMV_E_H264_ASO_SLICE_ORDER_1_V6 0xfb8c 303*4882a593Smuzhiyun #define S5P_FIMV_E_H264_ASO_SLICE_ORDER_2_V6 0xfb90 304*4882a593Smuzhiyun #define S5P_FIMV_E_H264_ASO_SLICE_ORDER_3_V6 0xfb94 305*4882a593Smuzhiyun #define S5P_FIMV_E_H264_ASO_SLICE_ORDER_4_V6 0xfb98 306*4882a593Smuzhiyun #define S5P_FIMV_E_H264_ASO_SLICE_ORDER_5_V6 0xfb9c 307*4882a593Smuzhiyun #define S5P_FIMV_E_H264_ASO_SLICE_ORDER_6_V6 0xfba0 308*4882a593Smuzhiyun #define S5P_FIMV_E_H264_ASO_SLICE_ORDER_7_V6 0xfba4 309*4882a593Smuzhiyun 310*4882a593Smuzhiyun #define S5P_FIMV_E_H264_CHROMA_QP_OFFSET_V6 0xfba8 311*4882a593Smuzhiyun #define S5P_FIMV_E_H264_NUM_T_LAYER_V6 0xfbac 312*4882a593Smuzhiyun 313*4882a593Smuzhiyun #define S5P_FIMV_E_H264_HIERARCHICAL_QP_LAYER0_V6 0xfbb0 314*4882a593Smuzhiyun #define S5P_FIMV_E_H264_HIERARCHICAL_QP_LAYER1_V6 0xfbb4 315*4882a593Smuzhiyun #define S5P_FIMV_E_H264_HIERARCHICAL_QP_LAYER2_V6 0xfbb8 316*4882a593Smuzhiyun #define S5P_FIMV_E_H264_HIERARCHICAL_QP_LAYER3_V6 0xfbbc 317*4882a593Smuzhiyun #define S5P_FIMV_E_H264_HIERARCHICAL_QP_LAYER4_V6 0xfbc0 318*4882a593Smuzhiyun #define S5P_FIMV_E_H264_HIERARCHICAL_QP_LAYER5_V6 0xfbc4 319*4882a593Smuzhiyun #define S5P_FIMV_E_H264_HIERARCHICAL_QP_LAYER6_V6 0xfbc8 320*4882a593Smuzhiyun 321*4882a593Smuzhiyun #define S5P_FIMV_E_H264_FRAME_PACKING_SEI_INFO_V6 0xfc4c 322*4882a593Smuzhiyun #define S5P_FIMV_ENC_FP_ARRANGEMENT_TYPE_SIDE_BY_SIDE_V6 0 323*4882a593Smuzhiyun #define S5P_FIMV_ENC_FP_ARRANGEMENT_TYPE_TOP_BOTTOM_V6 1 324*4882a593Smuzhiyun #define S5P_FIMV_ENC_FP_ARRANGEMENT_TYPE_TEMPORAL_V6 2 325*4882a593Smuzhiyun 326*4882a593Smuzhiyun #define S5P_FIMV_E_MVC_FRAME_QP_VIEW1_V6 0xfd40 327*4882a593Smuzhiyun #define S5P_FIMV_E_MVC_RC_FRAME_RATE_VIEW1_V6 0xfd44 328*4882a593Smuzhiyun #define S5P_FIMV_E_MVC_RC_BIT_RATE_VIEW1_V6 0xfd48 329*4882a593Smuzhiyun #define S5P_FIMV_E_MVC_RC_QBOUND_VIEW1_V6 0xfd4c 330*4882a593Smuzhiyun #define S5P_FIMV_E_MVC_RC_RPARA_VIEW1_V6 0xfd50 331*4882a593Smuzhiyun #define S5P_FIMV_E_MVC_INTER_VIEW_PREDICTION_ON_V6 0xfd80 332*4882a593Smuzhiyun 333*4882a593Smuzhiyun /* Codec numbers */ 334*4882a593Smuzhiyun #define S5P_FIMV_CODEC_NONE_V6 -1 335*4882a593Smuzhiyun 336*4882a593Smuzhiyun 337*4882a593Smuzhiyun #define S5P_FIMV_CODEC_H264_DEC_V6 0 338*4882a593Smuzhiyun #define S5P_FIMV_CODEC_H264_MVC_DEC_V6 1 339*4882a593Smuzhiyun 340*4882a593Smuzhiyun #define S5P_FIMV_CODEC_MPEG4_DEC_V6 3 341*4882a593Smuzhiyun #define S5P_FIMV_CODEC_FIMV1_DEC_V6 4 342*4882a593Smuzhiyun #define S5P_FIMV_CODEC_FIMV2_DEC_V6 5 343*4882a593Smuzhiyun #define S5P_FIMV_CODEC_FIMV3_DEC_V6 6 344*4882a593Smuzhiyun #define S5P_FIMV_CODEC_FIMV4_DEC_V6 7 345*4882a593Smuzhiyun #define S5P_FIMV_CODEC_H263_DEC_V6 8 346*4882a593Smuzhiyun #define S5P_FIMV_CODEC_VC1RCV_DEC_V6 9 347*4882a593Smuzhiyun #define S5P_FIMV_CODEC_VC1_DEC_V6 10 348*4882a593Smuzhiyun /* FIXME: Add 11~12 */ 349*4882a593Smuzhiyun #define S5P_FIMV_CODEC_MPEG2_DEC_V6 13 350*4882a593Smuzhiyun #define S5P_FIMV_CODEC_VP8_DEC_V6 14 351*4882a593Smuzhiyun /* FIXME: Add 15~16 */ 352*4882a593Smuzhiyun #define S5P_FIMV_CODEC_H264_ENC_V6 20 353*4882a593Smuzhiyun #define S5P_FIMV_CODEC_H264_MVC_ENC_V6 21 354*4882a593Smuzhiyun 355*4882a593Smuzhiyun #define S5P_FIMV_CODEC_MPEG4_ENC_V6 23 356*4882a593Smuzhiyun #define S5P_FIMV_CODEC_H263_ENC_V6 24 357*4882a593Smuzhiyun 358*4882a593Smuzhiyun #define S5P_FIMV_NV12M_HALIGN_V6 16 359*4882a593Smuzhiyun #define S5P_FIMV_NV12MT_HALIGN_V6 16 360*4882a593Smuzhiyun #define S5P_FIMV_NV12MT_VALIGN_V6 16 361*4882a593Smuzhiyun 362*4882a593Smuzhiyun #define S5P_FIMV_TMV_BUFFER_ALIGN_V6 16 363*4882a593Smuzhiyun #define S5P_FIMV_LUMA_DPB_BUFFER_ALIGN_V6 256 364*4882a593Smuzhiyun #define S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6 256 365*4882a593Smuzhiyun #define S5P_FIMV_ME_BUFFER_ALIGN_V6 256 366*4882a593Smuzhiyun #define S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6 256 367*4882a593Smuzhiyun 368*4882a593Smuzhiyun #define S5P_FIMV_LUMA_MB_TO_PIXEL_V6 256 369*4882a593Smuzhiyun #define S5P_FIMV_CHROMA_MB_TO_PIXEL_V6 128 370*4882a593Smuzhiyun #define S5P_FIMV_NUM_TMV_BUFFERS_V6 2 371*4882a593Smuzhiyun 372*4882a593Smuzhiyun #define S5P_FIMV_MAX_FRAME_SIZE_V6 (2 * SZ_1M) 373*4882a593Smuzhiyun #define S5P_FIMV_NUM_PIXELS_IN_MB_ROW_V6 16 374*4882a593Smuzhiyun #define S5P_FIMV_NUM_PIXELS_IN_MB_COL_V6 16 375*4882a593Smuzhiyun 376*4882a593Smuzhiyun /* Buffer size requirements defined by hardware */ 377*4882a593Smuzhiyun #define S5P_FIMV_TMV_BUFFER_SIZE_V6(w, h) (((w) + 1) * ((h) + 3) * 8) 378*4882a593Smuzhiyun #define S5P_FIMV_ME_BUFFER_SIZE_V6(imw, imh, mbw, mbh) \ 379*4882a593Smuzhiyun (((((imw + 127) / 64) * 16) * DIV_ROUND_UP(imh, 64) * 256) + \ 380*4882a593Smuzhiyun (DIV_ROUND_UP((mbw) * (mbh), 32) * 16)) 381*4882a593Smuzhiyun #define S5P_FIMV_SCRATCH_BUF_SIZE_H264_DEC_V6(w, h) (((w) * 192) + 64) 382*4882a593Smuzhiyun #define S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_DEC_V6(w, h) \ 383*4882a593Smuzhiyun ((w) * 144 + 8192 * (h) + 49216 + 1048576) 384*4882a593Smuzhiyun #define S5P_FIMV_SCRATCH_BUF_SIZE_VC1_DEC_V6(w, h) \ 385*4882a593Smuzhiyun (2096 * ((w) + (h) + 1)) 386*4882a593Smuzhiyun #define S5P_FIMV_SCRATCH_BUF_SIZE_H263_DEC_V6(w, h) \ 387*4882a593Smuzhiyun S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_DEC_V6(w, h) 388*4882a593Smuzhiyun #define S5P_FIMV_SCRATCH_BUF_SIZE_VP8_DEC_V6(w, h) \ 389*4882a593Smuzhiyun ((w) * 32 + (h) * 128 + (((w) + 1) / 2) * 64 + 2112) 390*4882a593Smuzhiyun #define S5P_FIMV_SCRATCH_BUF_SIZE_H264_ENC_V6(w, h) \ 391*4882a593Smuzhiyun (((w) * 64) + (((w) + 1) * 16) + (4096 * 16)) 392*4882a593Smuzhiyun #define S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_ENC_V6(w, h) \ 393*4882a593Smuzhiyun (((w) * 16) + (((w) + 1) * 16)) 394*4882a593Smuzhiyun 395*4882a593Smuzhiyun /* MFC Context buffer sizes */ 396*4882a593Smuzhiyun #define MFC_CTX_BUF_SIZE_V6 (28 * SZ_1K) /* 28KB */ 397*4882a593Smuzhiyun #define MFC_H264_DEC_CTX_BUF_SIZE_V6 (2 * SZ_1M) /* 2MB */ 398*4882a593Smuzhiyun #define MFC_OTHER_DEC_CTX_BUF_SIZE_V6 (20 * SZ_1K) /* 20KB */ 399*4882a593Smuzhiyun #define MFC_H264_ENC_CTX_BUF_SIZE_V6 (100 * SZ_1K) /* 100KB */ 400*4882a593Smuzhiyun #define MFC_OTHER_ENC_CTX_BUF_SIZE_V6 (12 * SZ_1K) /* 12KB */ 401*4882a593Smuzhiyun 402*4882a593Smuzhiyun /* MFCv6 variant defines */ 403*4882a593Smuzhiyun #define MAX_FW_SIZE_V6 (SZ_512K) /* 512KB */ 404*4882a593Smuzhiyun #define MAX_CPB_SIZE_V6 (3 * SZ_1M) /* 3MB */ 405*4882a593Smuzhiyun #define MFC_VERSION_V6 0x61 406*4882a593Smuzhiyun #define MFC_NUM_PORTS_V6 1 407*4882a593Smuzhiyun 408*4882a593Smuzhiyun #endif /* _REGS_FIMV_V6_H */ 409