xref: /OK3568_Linux_fs/kernel/drivers/media/platform/s5p-g2d/g2d-hw.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Samsung S5P G2D - 2D Graphics Accelerator Driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
6*4882a593Smuzhiyun  * Kamil Debski, <k.debski@samsung.com>
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/io.h>
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include "g2d.h"
12*4882a593Smuzhiyun #include "g2d-regs.h"
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #define w(x, a)	writel((x), d->regs + (a))
15*4882a593Smuzhiyun #define r(a)	readl(d->regs + (a))
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun /* g2d_reset clears all g2d registers */
g2d_reset(struct g2d_dev * d)18*4882a593Smuzhiyun void g2d_reset(struct g2d_dev *d)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun 	w(1, SOFT_RESET_REG);
21*4882a593Smuzhiyun }
22*4882a593Smuzhiyun 
g2d_set_src_size(struct g2d_dev * d,struct g2d_frame * f)23*4882a593Smuzhiyun void g2d_set_src_size(struct g2d_dev *d, struct g2d_frame *f)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun 	u32 n;
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun 	w(0, SRC_SELECT_REG);
28*4882a593Smuzhiyun 	w(f->stride & 0xFFFF, SRC_STRIDE_REG);
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun 	n = f->o_height & 0xFFF;
31*4882a593Smuzhiyun 	n <<= 16;
32*4882a593Smuzhiyun 	n |= f->o_width & 0xFFF;
33*4882a593Smuzhiyun 	w(n, SRC_LEFT_TOP_REG);
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun 	n = f->bottom & 0xFFF;
36*4882a593Smuzhiyun 	n <<= 16;
37*4882a593Smuzhiyun 	n |= f->right & 0xFFF;
38*4882a593Smuzhiyun 	w(n, SRC_RIGHT_BOTTOM_REG);
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 	w(f->fmt->hw, SRC_COLOR_MODE_REG);
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun 
g2d_set_src_addr(struct g2d_dev * d,dma_addr_t a)43*4882a593Smuzhiyun void g2d_set_src_addr(struct g2d_dev *d, dma_addr_t a)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun 	w(a, SRC_BASE_ADDR_REG);
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun 
g2d_set_dst_size(struct g2d_dev * d,struct g2d_frame * f)48*4882a593Smuzhiyun void g2d_set_dst_size(struct g2d_dev *d, struct g2d_frame *f)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun 	u32 n;
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	w(0, DST_SELECT_REG);
53*4882a593Smuzhiyun 	w(f->stride & 0xFFFF, DST_STRIDE_REG);
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	n = f->o_height & 0xFFF;
56*4882a593Smuzhiyun 	n <<= 16;
57*4882a593Smuzhiyun 	n |= f->o_width & 0xFFF;
58*4882a593Smuzhiyun 	w(n, DST_LEFT_TOP_REG);
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 	n = f->bottom & 0xFFF;
61*4882a593Smuzhiyun 	n <<= 16;
62*4882a593Smuzhiyun 	n |= f->right & 0xFFF;
63*4882a593Smuzhiyun 	w(n, DST_RIGHT_BOTTOM_REG);
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 	w(f->fmt->hw, DST_COLOR_MODE_REG);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun 
g2d_set_dst_addr(struct g2d_dev * d,dma_addr_t a)68*4882a593Smuzhiyun void g2d_set_dst_addr(struct g2d_dev *d, dma_addr_t a)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun 	w(a, DST_BASE_ADDR_REG);
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun 
g2d_set_rop4(struct g2d_dev * d,u32 r)73*4882a593Smuzhiyun void g2d_set_rop4(struct g2d_dev *d, u32 r)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun 	w(r, ROP4_REG);
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun 
g2d_set_flip(struct g2d_dev * d,u32 r)78*4882a593Smuzhiyun void g2d_set_flip(struct g2d_dev *d, u32 r)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun 	w(r, SRC_MSK_DIRECT_REG);
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun 
g2d_set_v41_stretch(struct g2d_dev * d,struct g2d_frame * src,struct g2d_frame * dst)83*4882a593Smuzhiyun void g2d_set_v41_stretch(struct g2d_dev *d, struct g2d_frame *src,
84*4882a593Smuzhiyun 					struct g2d_frame *dst)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun 	w(DEFAULT_SCALE_MODE, SRC_SCALE_CTRL_REG);
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	/* inversed scaling factor: src is numerator */
89*4882a593Smuzhiyun 	w((src->c_width << 16) / dst->c_width, SRC_XSCALE_REG);
90*4882a593Smuzhiyun 	w((src->c_height << 16) / dst->c_height, SRC_YSCALE_REG);
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun 
g2d_set_cmd(struct g2d_dev * d,u32 c)93*4882a593Smuzhiyun void g2d_set_cmd(struct g2d_dev *d, u32 c)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun 	w(c, BITBLT_COMMAND_REG);
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun 
g2d_start(struct g2d_dev * d)98*4882a593Smuzhiyun void g2d_start(struct g2d_dev *d)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun 	/* Clear cache */
101*4882a593Smuzhiyun 	if (d->variant->hw_rev == TYPE_G2D_3X)
102*4882a593Smuzhiyun 		w(0x7, CACHECTL_REG);
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	/* Enable interrupt */
105*4882a593Smuzhiyun 	w(1, INTEN_REG);
106*4882a593Smuzhiyun 	/* Start G2D engine */
107*4882a593Smuzhiyun 	w(1, BITBLT_START_REG);
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun 
g2d_clear_int(struct g2d_dev * d)110*4882a593Smuzhiyun void g2d_clear_int(struct g2d_dev *d)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun 	w(1, INTC_PEND_REG);
113*4882a593Smuzhiyun }
114