1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd. */ 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun #ifndef _RKISPP_DEV_H 5*4882a593Smuzhiyun #define _RKISPP_DEV_H 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #include "ispp.h" 8*4882a593Smuzhiyun #include "params.h" 9*4882a593Smuzhiyun #include "stream.h" 10*4882a593Smuzhiyun #include "stats.h" 11*4882a593Smuzhiyun #include "hw.h" 12*4882a593Smuzhiyun #include "procfs.h" 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define DRIVER_NAME "rkispp" 15*4882a593Smuzhiyun #define II_VDEV_NAME DRIVER_NAME "_input_image" 16*4882a593Smuzhiyun #define MB_VDEV_NAME DRIVER_NAME "_m_bypass" 17*4882a593Smuzhiyun #define S0_VDEV_NAME DRIVER_NAME "_scale0" 18*4882a593Smuzhiyun #define S1_VDEV_NAME DRIVER_NAME "_scale1" 19*4882a593Smuzhiyun #define S2_VDEV_NAME DRIVER_NAME "_scale2" 20*4882a593Smuzhiyun #define VIR_VDEV_NAME DRIVER_NAME "_iqtool" 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun enum rkispp_input { 23*4882a593Smuzhiyun INP_INVAL = 0, 24*4882a593Smuzhiyun INP_ISP, 25*4882a593Smuzhiyun INP_DDR, 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun struct rkispp_device { 29*4882a593Smuzhiyun char name[128]; 30*4882a593Smuzhiyun struct device *dev; 31*4882a593Smuzhiyun void *sw_base_addr; 32*4882a593Smuzhiyun struct media_device media_dev; 33*4882a593Smuzhiyun struct v4l2_device v4l2_dev; 34*4882a593Smuzhiyun struct v4l2_ctrl_handler ctrl_handler; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun struct rkispp_hw_dev *hw_dev; 37*4882a593Smuzhiyun struct rkispp_subdev ispp_sdev; 38*4882a593Smuzhiyun struct rkispp_stream_vdev stream_vdev; 39*4882a593Smuzhiyun struct rkispp_params_vdev params_vdev[PARAM_VDEV_MAX]; 40*4882a593Smuzhiyun struct rkispp_stats_vdev stats_vdev[STATS_VDEV_MAX]; 41*4882a593Smuzhiyun struct proc_dir_entry *procfs; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun struct work_struct irq_work; 44*4882a593Smuzhiyun enum rkispp_ver ispp_ver; 45*4882a593Smuzhiyun /* mutex to serialize the calls from user */ 46*4882a593Smuzhiyun struct mutex apilock; 47*4882a593Smuzhiyun /* mutex to serialize the calls of iq */ 48*4882a593Smuzhiyun struct mutex iqlock; 49*4882a593Smuzhiyun enum rkispp_input inp; 50*4882a593Smuzhiyun u32 dev_id; 51*4882a593Smuzhiyun u32 isp_mode; 52*4882a593Smuzhiyun u32 isr_cnt; 53*4882a593Smuzhiyun u32 isr_err_cnt; 54*4882a593Smuzhiyun u32 mis_val; 55*4882a593Smuzhiyun wait_queue_head_t sync_onoff; 56*4882a593Smuzhiyun bool stream_sync; 57*4882a593Smuzhiyun u8 stream_max; 58*4882a593Smuzhiyun void (*irq_hdl)(u32 mis, struct rkispp_device *dev); 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun #endif 61