1 /*
2 * Rockchip isp1 driver
3 *
4 * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
5 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
15 *
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
19 *
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 */
34
35 #include <linux/clk.h>
36 #include <linux/interrupt.h>
37 #include <linux/mfd/syscon.h>
38 #include <linux/module.h>
39 #include <linux/of.h>
40 #include <linux/of_gpio.h>
41 #include <linux/of_graph.h>
42 #include <linux/of_platform.h>
43 #include <linux/of_reserved_mem.h>
44 #include <linux/pm_runtime.h>
45 #include <linux/pinctrl/consumer.h>
46 #include <linux/regmap.h>
47 #include <media/videobuf2-dma-contig.h>
48 #include <dt-bindings/soc/rockchip-system-status.h>
49 #include <soc/rockchip/rockchip-system-status.h>
50 #include "regs.h"
51 #include "rkisp1.h"
52 #include "common.h"
53 #include "version.h"
54
55 #define RKISP_VERNO_LEN 10
56
57 struct isp_irqs_data {
58 const char *name;
59 irqreturn_t (*irq_hdl)(int irq, void *ctx);
60 };
61
62 struct isp_match_data {
63 const char * const *clks;
64 int num_clks;
65 enum rkisp1_isp_ver isp_ver;
66 const unsigned int *clk_rate_tbl;
67 int num_clk_rate_tbl;
68 struct isp_irqs_data *irqs;
69 int num_irqs;
70 };
71
72 int rkisp1_debug;
73 module_param_named(debug, rkisp1_debug, int, 0644);
74 MODULE_PARM_DESC(debug, "Debug level (0-1)");
75
76 static char rkisp1_version[RKISP_VERNO_LEN];
77 module_param_string(version, rkisp1_version, RKISP_VERNO_LEN, 0444);
78 MODULE_PARM_DESC(version, "version number");
79
80 static DEFINE_MUTEX(rkisp1_dev_mutex);
81 static LIST_HEAD(rkisp1_device_list);
82
__rkisp1_clr_unready_dev(void)83 static int __maybe_unused __rkisp1_clr_unready_dev(void)
84 {
85 struct rkisp1_device *isp_dev;
86
87 mutex_lock(&rkisp1_dev_mutex);
88 list_for_each_entry(isp_dev, &rkisp1_device_list, list)
89 v4l2_async_notifier_clr_unready_dev(&isp_dev->notifier);
90 mutex_unlock(&rkisp1_dev_mutex);
91
92 return 0;
93 }
94
rkisp1_clr_unready_dev_param_set(const char * val,const struct kernel_param * kp)95 static int rkisp1_clr_unready_dev_param_set(const char *val, const struct kernel_param *kp)
96 {
97 #ifdef MODULE
98 __rkisp1_clr_unready_dev();
99 #endif
100
101 return 0;
102 }
103
104 module_param_call(clr_unready_dev, rkisp1_clr_unready_dev_param_set, NULL, NULL, 0200);
105 MODULE_PARM_DESC(clr_unready_dev, "clear unready devices");
106
107 /**************************** pipeline operations *****************************/
108
__isp_pipeline_prepare(struct rkisp1_pipeline * p,struct media_entity * me)109 static int __isp_pipeline_prepare(struct rkisp1_pipeline *p,
110 struct media_entity *me)
111 {
112 struct rkisp1_device *dev = container_of(p, struct rkisp1_device, pipe);
113 struct v4l2_subdev *sd;
114 int i;
115
116 p->num_subdevs = 0;
117 memset(p->subdevs, 0, sizeof(p->subdevs));
118
119 if (dev->isp_inp == INP_DMARX_ISP)
120 return 0;
121
122 while (1) {
123 struct media_pad *pad = NULL;
124
125 /* Find remote source pad */
126 for (i = 0; i < me->num_pads; i++) {
127 struct media_pad *spad = &me->pads[i];
128
129 if (!(spad->flags & MEDIA_PAD_FL_SINK))
130 continue;
131 pad = media_entity_remote_pad(spad);
132 if (pad)
133 break;
134 }
135
136 if (!pad)
137 break;
138
139 sd = media_entity_to_v4l2_subdev(pad->entity);
140 if (sd != &dev->isp_sdev.sd)
141 p->subdevs[p->num_subdevs++] = sd;
142
143 me = &sd->entity;
144 if (me->num_pads == 1)
145 break;
146 }
147
148 if (!p->num_subdevs)
149 return -EINVAL;
150
151 return 0;
152 }
153
__isp_pipeline_s_isp_clk(struct rkisp1_pipeline * p)154 static int __isp_pipeline_s_isp_clk(struct rkisp1_pipeline *p)
155 {
156 struct rkisp1_device *dev = container_of(p, struct rkisp1_device, pipe);
157 struct v4l2_subdev *sd;
158 struct v4l2_ctrl *ctrl;
159 u64 data_rate;
160 int i;
161
162 if (dev->isp_inp == INP_DMARX_ISP) {
163 clk_set_rate(dev->clks[0], 400 * 1000000UL);
164 return 0;
165 }
166
167 /* find the subdev of active sensor */
168 sd = p->subdevs[0];
169 for (i = 0; i < p->num_subdevs; i++) {
170 sd = p->subdevs[i];
171 if (sd->entity.function == MEDIA_ENT_F_CAM_SENSOR)
172 break;
173 }
174
175 if (i == p->num_subdevs) {
176 v4l2_warn(sd, "No active sensor\n");
177 return -EPIPE;
178 }
179
180 ctrl = v4l2_ctrl_find(sd->ctrl_handler, V4L2_CID_PIXEL_RATE);
181 if (!ctrl) {
182 v4l2_warn(sd, "No pixel rate control in subdev\n");
183 return -EPIPE;
184 }
185
186 /* calculate data rate */
187 data_rate = v4l2_ctrl_g_ctrl_int64(ctrl) *
188 dev->isp_sdev.in_fmt.bus_width;
189 data_rate >>= 3;
190 do_div(data_rate, 1000 * 1000);
191
192 /* increase 25% margin */
193 data_rate += data_rate >> 2;
194
195 /* compare with isp clock adjustment table */
196 for (i = 0; i < dev->num_clk_rate_tbl; i++)
197 if (data_rate <= dev->clk_rate_tbl[i])
198 break;
199 if (i == dev->num_clk_rate_tbl)
200 i--;
201
202 /* set isp clock rate */
203 clk_set_rate(dev->clks[0], dev->clk_rate_tbl[i] * 1000000UL);
204 v4l2_dbg(1, rkisp1_debug, sd, "set isp clk = %luHz\n",
205 clk_get_rate(dev->clks[0]));
206
207 return 0;
208 }
209
rkisp1_pipeline_open(struct rkisp1_pipeline * p,struct media_entity * me,bool prepare)210 static int rkisp1_pipeline_open(struct rkisp1_pipeline *p,
211 struct media_entity *me,
212 bool prepare)
213 {
214 int ret;
215
216 if (WARN_ON(!p || !me))
217 return -EINVAL;
218 if (atomic_inc_return(&p->power_cnt) > 1)
219 return 0;
220
221 /* go through media graphic and get subdevs */
222 if (prepare) {
223 ret = __isp_pipeline_prepare(p, me);
224 if (ret < 0)
225 return ret;
226 }
227
228 ret = __isp_pipeline_s_isp_clk(p);
229 if (ret < 0)
230 return ret;
231
232 return 0;
233 }
234
rkisp1_pipeline_close(struct rkisp1_pipeline * p)235 static int rkisp1_pipeline_close(struct rkisp1_pipeline *p)
236 {
237 atomic_dec(&p->power_cnt);
238
239 return 0;
240 }
241
242 /*
243 * stream-on order: isp_subdev, mipi dphy, sensor
244 * stream-off order: mipi dphy, sensor, isp_subdev
245 */
rkisp1_pipeline_set_stream(struct rkisp1_pipeline * p,bool on)246 static int rkisp1_pipeline_set_stream(struct rkisp1_pipeline *p, bool on)
247 {
248 struct rkisp1_device *dev = container_of(p, struct rkisp1_device, pipe);
249 int i, ret;
250
251 if ((on && atomic_inc_return(&p->stream_cnt) > 1) ||
252 (!on && atomic_dec_return(&p->stream_cnt) > 0))
253 return 0;
254
255 if (on) {
256 if (dev->vs_irq >= 0)
257 enable_irq(dev->vs_irq);
258 rockchip_set_system_status(SYS_STATUS_ISP);
259 v4l2_subdev_call(&dev->isp_sdev.sd, video, s_stream, true);
260 }
261
262 /* phy -> sensor */
263 for (i = 0; i < p->num_subdevs; ++i) {
264 ret = v4l2_subdev_call(p->subdevs[i], video, s_stream, on);
265 if (on && ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV)
266 goto err_stream_off;
267 }
268
269 if (!on) {
270 if (dev->vs_irq >= 0)
271 disable_irq(dev->vs_irq);
272 v4l2_subdev_call(&dev->isp_sdev.sd, video, s_stream, false);
273 rockchip_clear_system_status(SYS_STATUS_ISP);
274 }
275
276 return 0;
277
278 err_stream_off:
279 for (--i; i >= 0; --i)
280 v4l2_subdev_call(p->subdevs[i], video, s_stream, false);
281 v4l2_subdev_call(&dev->isp_sdev.sd, video, s_stream, false);
282 rockchip_clear_system_status(SYS_STATUS_ISP);
283 return ret;
284 }
285
286 /***************************** media controller *******************************/
287 /* See http://opensource.rock-chips.com/wiki_Rockchip-isp1 for Topology */
288
rkisp1_create_links(struct rkisp1_device * dev)289 static int rkisp1_create_links(struct rkisp1_device *dev)
290 {
291 struct media_entity *source, *sink;
292 unsigned int flags, s, pad;
293 int ret;
294
295 /* sensor links(or mipi-phy) */
296 for (s = 0; s < dev->num_sensors; ++s) {
297 struct rkisp1_sensor_info *sensor = &dev->sensors[s];
298
299 for (pad = 0; pad < sensor->sd->entity.num_pads; pad++)
300 if (sensor->sd->entity.pads[pad].flags &
301 MEDIA_PAD_FL_SOURCE)
302 break;
303
304 if (pad == sensor->sd->entity.num_pads) {
305 dev_err(dev->dev,
306 "failed to find src pad for %s\n",
307 sensor->sd->name);
308
309 return -ENXIO;
310 }
311
312 ret = media_create_pad_link(
313 &sensor->sd->entity, pad,
314 &dev->isp_sdev.sd.entity,
315 RKISP1_ISP_PAD_SINK,
316 s ? 0 : MEDIA_LNK_FL_ENABLED);
317 if (ret) {
318 dev_err(dev->dev,
319 "failed to create link for %s\n",
320 sensor->sd->name);
321 return ret;
322 }
323 }
324
325 /* params links */
326 source = &dev->params_vdev.vnode.vdev.entity;
327 sink = &dev->isp_sdev.sd.entity;
328 flags = MEDIA_LNK_FL_ENABLED;
329 ret = media_create_pad_link(source, 0, sink,
330 RKISP1_ISP_PAD_SINK_PARAMS, flags);
331 if (ret < 0)
332 return ret;
333
334 /* create isp internal links */
335 if (dev->isp_ver != ISP_V10_1) {
336 /* SP links */
337 source = &dev->isp_sdev.sd.entity;
338 sink = &dev->stream[RKISP1_STREAM_SP].vnode.vdev.entity;
339 ret = media_create_pad_link(source,
340 RKISP1_ISP_PAD_SOURCE_PATH,
341 sink, 0, flags);
342 if (ret < 0)
343 return ret;
344 }
345
346 /* MP links */
347 source = &dev->isp_sdev.sd.entity;
348 sink = &dev->stream[RKISP1_STREAM_MP].vnode.vdev.entity;
349 ret = media_create_pad_link(source, RKISP1_ISP_PAD_SOURCE_PATH,
350 sink, 0, flags);
351 if (ret < 0)
352 return ret;
353
354 #if RKISP1_RK3326_USE_OLDMIPI
355 if (dev->isp_ver == ISP_V13) {
356 #else
357 if (dev->isp_ver == ISP_V12 ||
358 dev->isp_ver == ISP_V13) {
359 #endif
360 /* MIPI RAW links */
361 source = &dev->isp_sdev.sd.entity;
362 sink = &dev->stream[RKISP1_STREAM_RAW].vnode.vdev.entity;
363 ret = media_create_pad_link(source,
364 RKISP1_ISP_PAD_SOURCE_PATH, sink, 0, flags);
365 if (ret < 0)
366 return ret;
367 }
368
369 /* 3A stats links */
370 source = &dev->isp_sdev.sd.entity;
371 sink = &dev->stats_vdev.vnode.vdev.entity;
372 return media_create_pad_link(source, RKISP1_ISP_PAD_SOURCE_STATS,
373 sink, 0, flags);
374 }
375
376 static int _set_pipeline_default_fmt(struct rkisp1_device *dev)
377 {
378 struct v4l2_subdev *isp;
379 struct v4l2_subdev_format fmt;
380 struct v4l2_subdev_selection sel;
381 struct v4l2_subdev_pad_config cfg;
382 u32 width, height;
383 u32 ori_width, ori_height, ori_code;
384
385 isp = &dev->isp_sdev.sd;
386
387 fmt = dev->active_sensor->fmt;
388 ori_width = fmt.format.width;
389 ori_height = fmt.format.height;
390 ori_code = fmt.format.code;
391
392 if (dev->isp_ver == ISP_V12) {
393 fmt.format.width = clamp_t(u32, fmt.format.width,
394 CIF_ISP_INPUT_W_MIN,
395 CIF_ISP_INPUT_W_MAX_V12);
396 fmt.format.height = clamp_t(u32, fmt.format.height,
397 CIF_ISP_INPUT_H_MIN,
398 CIF_ISP_INPUT_H_MAX_V12);
399 } else if (dev->isp_ver == ISP_V13) {
400 fmt.format.width = clamp_t(u32, fmt.format.width,
401 CIF_ISP_INPUT_W_MIN,
402 CIF_ISP_INPUT_W_MAX_V13);
403 fmt.format.height = clamp_t(u32, fmt.format.height,
404 CIF_ISP_INPUT_H_MIN,
405 CIF_ISP_INPUT_H_MAX_V13);
406 } else {
407 fmt.format.width = clamp_t(u32, fmt.format.width,
408 CIF_ISP_INPUT_W_MIN,
409 CIF_ISP_INPUT_W_MAX);
410 fmt.format.height = clamp_t(u32, fmt.format.height,
411 CIF_ISP_INPUT_H_MIN,
412 CIF_ISP_INPUT_H_MAX);
413 }
414
415 sel.r.left = 0;
416 sel.r.top = 0;
417 width = fmt.format.width;
418 height = fmt.format.height;
419 sel.r.width = fmt.format.width;
420 sel.r.height = fmt.format.height;
421 sel.target = V4L2_SEL_TGT_CROP;
422 sel.which = V4L2_SUBDEV_FORMAT_ACTIVE;
423 fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
424 memset(&cfg, 0, sizeof(cfg));
425
426 /* change fmt&size for RKISP1_ISP_PAD_SINK */
427 fmt.pad = RKISP1_ISP_PAD_SINK;
428 sel.pad = RKISP1_ISP_PAD_SINK;
429 v4l2_subdev_call(isp, pad, set_fmt, &cfg, &fmt);
430 v4l2_subdev_call(isp, pad, set_selection, &cfg, &sel);
431
432 /* change fmt&size for RKISP1_ISP_PAD_SOURCE_PATH */
433 if ((fmt.format.code & RKISP1_MEDIA_BUS_FMT_MASK) ==
434 RKISP1_MEDIA_BUS_FMT_BAYER)
435 fmt.format.code = MEDIA_BUS_FMT_YUYV8_2X8;
436
437 fmt.pad = RKISP1_ISP_PAD_SOURCE_PATH;
438 sel.pad = RKISP1_ISP_PAD_SOURCE_PATH;
439 v4l2_subdev_call(isp, pad, set_fmt, &cfg, &fmt);
440 v4l2_subdev_call(isp, pad, set_selection, &cfg, &sel);
441
442 /* change fmt&size of MP/SP */
443 rkisp1_set_stream_def_fmt(dev, RKISP1_STREAM_MP,
444 width, height, V4L2_PIX_FMT_YUYV);
445 if (dev->isp_ver != ISP_V10_1)
446 rkisp1_set_stream_def_fmt(dev, RKISP1_STREAM_SP,
447 width, height, V4L2_PIX_FMT_YUYV);
448 if (dev->isp_ver == ISP_V12 || dev->isp_ver == ISP_V13)
449 rkisp1_set_stream_def_fmt(dev, RKISP1_STREAM_RAW, ori_width,
450 ori_height, rkisp1_mbus_pixelcode_to_v4l2(ori_code));
451
452 return 0;
453 }
454
455 static int subdev_notifier_complete(struct v4l2_async_notifier *notifier)
456 {
457 struct rkisp1_device *dev;
458 int ret;
459
460 dev = container_of(notifier, struct rkisp1_device, notifier);
461
462 mutex_lock(&dev->media_dev.graph_mutex);
463 ret = rkisp1_create_links(dev);
464 if (ret < 0)
465 goto unlock;
466 ret = v4l2_device_register_subdev_nodes(&dev->v4l2_dev);
467 if (ret < 0)
468 goto unlock;
469
470 ret = rkisp1_update_sensor_info(dev);
471 if (ret < 0) {
472 v4l2_err(&dev->v4l2_dev, "update sensor failed\n");
473 goto unlock;
474 }
475
476 ret = _set_pipeline_default_fmt(dev);
477 if (ret < 0)
478 goto unlock;
479
480 v4l2_info(&dev->v4l2_dev, "Async subdev notifier completed\n");
481
482 unlock:
483 mutex_unlock(&dev->media_dev.graph_mutex);
484 return ret;
485 }
486
487 struct rkisp1_async_subdev {
488 struct v4l2_async_subdev asd;
489 struct v4l2_mbus_config mbus;
490 };
491
492 static int subdev_notifier_bound(struct v4l2_async_notifier *notifier,
493 struct v4l2_subdev *subdev,
494 struct v4l2_async_subdev *asd)
495 {
496 struct rkisp1_device *isp_dev = container_of(notifier,
497 struct rkisp1_device, notifier);
498 struct rkisp1_async_subdev *s_asd = container_of(asd,
499 struct rkisp1_async_subdev, asd);
500
501 if (isp_dev->num_sensors == ARRAY_SIZE(isp_dev->sensors))
502 return -EBUSY;
503
504 isp_dev->sensors[isp_dev->num_sensors].mbus = s_asd->mbus;
505 isp_dev->sensors[isp_dev->num_sensors].sd = subdev;
506 ++isp_dev->num_sensors;
507
508 v4l2_dbg(1, rkisp1_debug, subdev, "Async registered subdev\n");
509
510 return 0;
511 }
512
513 static int rkisp1_fwnode_parse(struct device *dev,
514 struct v4l2_fwnode_endpoint *vep,
515 struct v4l2_async_subdev *asd)
516 {
517 struct rkisp1_async_subdev *rk_asd =
518 container_of(asd, struct rkisp1_async_subdev, asd);
519 struct v4l2_fwnode_bus_parallel *bus = &vep->bus.parallel;
520
521 /*
522 * MIPI sensor is linked with a mipi dphy and its media bus config can
523 * not be get in here
524 */
525 if (vep->bus_type != V4L2_MBUS_BT656 &&
526 vep->bus_type != V4L2_MBUS_PARALLEL)
527 return 0;
528
529 rk_asd->mbus.flags = bus->flags;
530 rk_asd->mbus.type = vep->bus_type;
531
532 return 0;
533 }
534
535 static const struct v4l2_async_notifier_operations subdev_notifier_ops = {
536 .bound = subdev_notifier_bound,
537 .complete = subdev_notifier_complete,
538 };
539
540 static int isp_subdev_notifier(struct rkisp1_device *isp_dev)
541 {
542 struct v4l2_async_notifier *ntf = &isp_dev->notifier;
543 struct device *dev = isp_dev->dev;
544 int ret;
545
546 v4l2_async_notifier_init(ntf);
547
548 ret = v4l2_async_notifier_parse_fwnode_endpoints(
549 dev, ntf, sizeof(struct rkisp1_async_subdev),
550 rkisp1_fwnode_parse);
551 if (ret < 0)
552 return ret;
553
554 ntf->ops = &subdev_notifier_ops;
555
556 return v4l2_async_notifier_register(&isp_dev->v4l2_dev, ntf);
557 }
558
559 /***************************** platform deive *******************************/
560
561 static int rkisp1_register_platform_subdevs(struct rkisp1_device *dev)
562 {
563 int ret;
564
565 ret = rkisp1_register_isp_subdev(dev, &dev->v4l2_dev);
566 if (ret < 0)
567 return ret;
568
569 ret = rkisp1_register_stream_vdevs(dev);
570 if (ret < 0)
571 goto err_unreg_isp_subdev;
572
573 ret = rkisp1_register_dmarx_vdev(dev);
574 if (ret < 0)
575 goto err_unreg_stream_vdev;
576
577 ret = rkisp1_register_stats_vdev(&dev->stats_vdev, &dev->v4l2_dev, dev);
578 if (ret < 0)
579 goto err_unreg_dmarx_vdev;
580
581 ret = rkisp1_register_params_vdev(&dev->params_vdev, &dev->v4l2_dev,
582 dev);
583 if (ret < 0)
584 goto err_unreg_stats_vdev;
585
586 ret = isp_subdev_notifier(dev);
587 if (ret < 0) {
588 v4l2_err(&dev->v4l2_dev,
589 "Failed to register subdev notifier(%d)\n", ret);
590 goto err_unreg_params_vdev;
591 }
592
593 return 0;
594 err_unreg_params_vdev:
595 rkisp1_unregister_params_vdev(&dev->params_vdev);
596 err_unreg_stats_vdev:
597 rkisp1_unregister_stats_vdev(&dev->stats_vdev);
598 err_unreg_dmarx_vdev:
599 rkisp1_unregister_dmarx_vdev(dev);
600 err_unreg_stream_vdev:
601 rkisp1_unregister_stream_vdevs(dev);
602 err_unreg_isp_subdev:
603 rkisp1_unregister_isp_subdev(dev);
604
605 return ret;
606 }
607
608 static irqreturn_t rkisp1_irq_handler(int irq, void *ctx)
609 {
610 struct device *dev = ctx;
611 struct rkisp1_device *rkisp1_dev = dev_get_drvdata(dev);
612 unsigned int mis_val;
613
614 mis_val = readl(rkisp1_dev->base_addr + CIF_ISP_MIS);
615 if (mis_val)
616 rkisp1_isp_isr(mis_val, rkisp1_dev);
617
618 mis_val = readl(rkisp1_dev->base_addr + CIF_MIPI_MIS);
619 if (mis_val)
620 rkisp1_mipi_isr(mis_val, rkisp1_dev);
621
622 mis_val = readl(rkisp1_dev->base_addr + CIF_MI_MIS);
623 if (mis_val)
624 rkisp1_mi_isr(mis_val, rkisp1_dev);
625
626 return IRQ_HANDLED;
627 }
628
629 static irqreturn_t rkisp1_isp_irq_hdl(int irq, void *ctx)
630 {
631 struct device *dev = ctx;
632 struct rkisp1_device *rkisp1_dev = dev_get_drvdata(dev);
633 unsigned int mis_val;
634
635 mis_val = readl(rkisp1_dev->base_addr + CIF_ISP_MIS);
636 if (mis_val)
637 rkisp1_isp_isr(mis_val, rkisp1_dev);
638
639 return IRQ_HANDLED;
640 }
641
642 static irqreturn_t rkisp1_mi_irq_hdl(int irq, void *ctx)
643 {
644 struct device *dev = ctx;
645 struct rkisp1_device *rkisp1_dev = dev_get_drvdata(dev);
646 unsigned int mis_val;
647
648 mis_val = readl(rkisp1_dev->base_addr + CIF_MI_MIS);
649 if (mis_val)
650 rkisp1_mi_isr(mis_val, rkisp1_dev);
651
652 return IRQ_HANDLED;
653 }
654
655 static irqreturn_t rkisp1_mipi_irq_hdl(int irq, void *ctx)
656 {
657 struct device *dev = ctx;
658 struct rkisp1_device *rkisp1_dev = dev_get_drvdata(dev);
659 unsigned int mis_val;
660 unsigned int err1, err2, err3;
661
662 #if RKISP1_RK3326_USE_OLDMIPI
663 if (rkisp1_dev->isp_ver == ISP_V13) {
664 #else
665 if (rkisp1_dev->isp_ver == ISP_V13 ||
666 rkisp1_dev->isp_ver == ISP_V12) {
667 #endif
668 err1 = readl(rkisp1_dev->base_addr + CIF_ISP_CSI0_ERR1);
669 err2 = readl(rkisp1_dev->base_addr + CIF_ISP_CSI0_ERR2);
670 err3 = readl(rkisp1_dev->base_addr + CIF_ISP_CSI0_ERR3);
671
672 if (err3 & 0x1)
673 rkisp1_mipi_dmatx0_end(err3, rkisp1_dev);
674 if (err1 || err2 || err3)
675 rkisp1_mipi_v13_isr(err1, err2, err3, rkisp1_dev);
676 } else {
677 mis_val = readl(rkisp1_dev->base_addr + CIF_MIPI_MIS);
678 if (mis_val)
679 rkisp1_mipi_isr(mis_val, rkisp1_dev);
680
681 /*
682 * As default interrupt mask for csi_rx are on,
683 * when resetting isp, interrupt from csi_rx maybe arise,
684 * we should clear them.
685 */
686 #if RKISP1_RK3326_USE_OLDMIPI
687 if (rkisp1_dev->isp_ver == ISP_V12) {
688 /* read error state register to clear interrupt state */
689 readl(rkisp1_dev->base_addr + CIF_ISP_CSI0_ERR1);
690 readl(rkisp1_dev->base_addr + CIF_ISP_CSI0_ERR2);
691 readl(rkisp1_dev->base_addr + CIF_ISP_CSI0_ERR3);
692 }
693 #endif
694 }
695
696 return IRQ_HANDLED;
697 }
698
699 static const char * const rk1808_isp_clks[] = {
700 "clk_isp",
701 "aclk_isp",
702 "hclk_isp",
703 "pclk_isp",
704 };
705
706 static const char * const rk3288_isp_clks[] = {
707 "clk_isp",
708 "aclk_isp",
709 "hclk_isp",
710 "pclk_isp_in",
711 "sclk_isp_jpe",
712 };
713
714 static const char * const rk3326_isp_clks[] = {
715 "clk_isp",
716 "aclk_isp",
717 "hclk_isp",
718 "pclk_isp",
719 };
720
721 static const char * const rk3368_isp_clks[] = {
722 "clk_isp",
723 "aclk_isp",
724 "hclk_isp",
725 "pclk_isp",
726 };
727
728 static const char * const rk3399_isp_clks[] = {
729 "clk_isp",
730 "aclk_isp",
731 "hclk_isp",
732 "aclk_isp_wrap",
733 "hclk_isp_wrap",
734 "pclk_isp_wrap"
735 };
736
737 /* isp clock adjustment table (MHz) */
738 static const unsigned int rk1808_isp_clk_rate[] = {
739 300, 400, 500, 600
740 };
741
742 /* isp clock adjustment table (MHz) */
743 static const unsigned int rk3288_isp_clk_rate[] = {
744 150, 384, 500, 594
745 };
746
747 /* isp clock adjustment table (MHz) */
748 static const unsigned int rk3326_isp_clk_rate[] = {
749 300, 347, 400, 520, 600
750 };
751
752 /* isp clock adjustment table (MHz) */
753 static const unsigned int rk3368_isp_clk_rate[] = {
754 300, 400, 600
755 };
756
757 /* isp clock adjustment table (MHz) */
758 static const unsigned int rk3399_isp_clk_rate[] = {
759 300, 400, 600
760 };
761
762 static struct isp_irqs_data rk1808_isp_irqs[] = {
763 {"isp_irq", rkisp1_isp_irq_hdl},
764 {"mi_irq", rkisp1_mi_irq_hdl},
765 {"mipi_irq", rkisp1_mipi_irq_hdl}
766 };
767
768 static struct isp_irqs_data rk3288_isp_irqs[] = {
769 {"isp_irq", rkisp1_irq_handler}
770 };
771
772 static struct isp_irqs_data rk3326_isp_irqs[] = {
773 {"isp_irq", rkisp1_isp_irq_hdl},
774 {"mi_irq", rkisp1_mi_irq_hdl},
775 {"mipi_irq", rkisp1_mipi_irq_hdl}
776 };
777
778 static struct isp_irqs_data rk3368_isp_irqs[] = {
779 {"isp_irq", rkisp1_irq_handler}
780 };
781
782 static struct isp_irqs_data rk3399_isp_irqs[] = {
783 {"isp_irq", rkisp1_irq_handler}
784 };
785
786 static const struct isp_match_data rk1808_isp_match_data = {
787 .clks = rk1808_isp_clks,
788 .num_clks = ARRAY_SIZE(rk1808_isp_clks),
789 .isp_ver = ISP_V13,
790 .clk_rate_tbl = rk1808_isp_clk_rate,
791 .num_clk_rate_tbl = ARRAY_SIZE(rk1808_isp_clk_rate),
792 .irqs = rk1808_isp_irqs,
793 .num_irqs = ARRAY_SIZE(rk1808_isp_irqs)
794 };
795
796 static const struct isp_match_data rk3288_isp_match_data = {
797 .clks = rk3288_isp_clks,
798 .num_clks = ARRAY_SIZE(rk3288_isp_clks),
799 .isp_ver = ISP_V10,
800 .clk_rate_tbl = rk3288_isp_clk_rate,
801 .num_clk_rate_tbl = ARRAY_SIZE(rk3288_isp_clk_rate),
802 .irqs = rk3288_isp_irqs,
803 .num_irqs = ARRAY_SIZE(rk3288_isp_irqs)
804 };
805
806 static const struct isp_match_data rk3326_isp_match_data = {
807 .clks = rk3326_isp_clks,
808 .num_clks = ARRAY_SIZE(rk3326_isp_clks),
809 .isp_ver = ISP_V12,
810 .clk_rate_tbl = rk3326_isp_clk_rate,
811 .num_clk_rate_tbl = ARRAY_SIZE(rk3326_isp_clk_rate),
812 .irqs = rk3326_isp_irqs,
813 .num_irqs = ARRAY_SIZE(rk3326_isp_irqs)
814 };
815
816 static const struct isp_match_data rk3368_isp_match_data = {
817 .clks = rk3368_isp_clks,
818 .num_clks = ARRAY_SIZE(rk3368_isp_clks),
819 .isp_ver = ISP_V10_1,
820 .clk_rate_tbl = rk3368_isp_clk_rate,
821 .num_clk_rate_tbl = ARRAY_SIZE(rk3368_isp_clk_rate),
822 .irqs = rk3368_isp_irqs,
823 .num_irqs = ARRAY_SIZE(rk3368_isp_irqs)
824 };
825
826 static const struct isp_match_data rk3399_isp_match_data = {
827 .clks = rk3399_isp_clks,
828 .num_clks = ARRAY_SIZE(rk3399_isp_clks),
829 .isp_ver = ISP_V10,
830 .clk_rate_tbl = rk3399_isp_clk_rate,
831 .num_clk_rate_tbl = ARRAY_SIZE(rk3399_isp_clk_rate),
832 .irqs = rk3399_isp_irqs,
833 .num_irqs = ARRAY_SIZE(rk3399_isp_irqs)
834 };
835
836 static const struct of_device_id rkisp1_plat_of_match[] = {
837 {
838 .compatible = "rockchip,rk1808-rkisp1",
839 .data = &rk1808_isp_match_data,
840 }, {
841 .compatible = "rockchip,rk3288-rkisp1",
842 .data = &rk3288_isp_match_data,
843 }, {
844 .compatible = "rockchip,rk3326-rkisp1",
845 .data = &rk3326_isp_match_data,
846 }, {
847 .compatible = "rockchip,rk3368-rkisp1",
848 .data = &rk3368_isp_match_data,
849 }, {
850 .compatible = "rockchip,rk3399-rkisp1",
851 .data = &rk3399_isp_match_data,
852 },
853 {},
854 };
855
856 static void rkisp1_disable_sys_clk(struct rkisp1_device *rkisp1_dev)
857 {
858 int i;
859
860 for (i = rkisp1_dev->num_clks - 1; i >= 0; i--)
861 if (!IS_ERR(rkisp1_dev->clks[i]))
862 clk_disable_unprepare(rkisp1_dev->clks[i]);
863 }
864
865 static int rkisp1_enable_sys_clk(struct rkisp1_device *rkisp1_dev)
866 {
867 int i, ret = -EINVAL;
868
869 for (i = 0; i < rkisp1_dev->num_clks; i++) {
870 if (!IS_ERR(rkisp1_dev->clks[i])) {
871 ret = clk_prepare_enable(rkisp1_dev->clks[i]);
872 if (ret < 0)
873 goto err;
874 }
875 }
876 return 0;
877 err:
878 for (--i; i >= 0; --i)
879 if (!IS_ERR(rkisp1_dev->clks[i]))
880 clk_disable_unprepare(rkisp1_dev->clks[i]);
881 return ret;
882 }
883
884 static inline bool is_iommu_enable(struct device *dev)
885 {
886 struct device_node *iommu;
887
888 iommu = of_parse_phandle(dev->of_node, "iommus", 0);
889 if (!iommu) {
890 dev_info(dev, "no iommu attached, using non-iommu buffers\n");
891 return false;
892 } else if (!of_device_is_available(iommu)) {
893 dev_info(dev, "iommu is disabled, using non-iommu buffers\n");
894 of_node_put(iommu);
895 return false;
896 }
897 of_node_put(iommu);
898
899 return true;
900 }
901
902 static int rkisp1_vs_irq_parse(struct platform_device *pdev)
903 {
904 int ret;
905 int vs_irq;
906 unsigned long vs_irq_flags;
907 struct gpio_desc *vs_irq_gpio;
908 struct device *dev = &pdev->dev;
909 struct rkisp1_device *isp_dev = dev_get_drvdata(dev);
910
911 /* this irq recevice the message of sensor vs from preisp */
912 isp_dev->vs_irq = -1;
913 vs_irq_gpio = devm_gpiod_get(dev, "vsirq", GPIOD_IN);
914 if (!IS_ERR(vs_irq_gpio)) {
915 vs_irq_flags = IRQF_TRIGGER_RISING |
916 IRQF_ONESHOT | IRQF_SHARED;
917
918 vs_irq = gpiod_to_irq(vs_irq_gpio);
919 if (vs_irq < 0) {
920 dev_err(dev, "GPIO to interrupt failed\n");
921 return vs_irq;
922 }
923
924 dev_info(dev, "register_irq: %d\n", vs_irq);
925 ret = devm_request_irq(dev,
926 vs_irq,
927 rkisp1_vs_isr_handler,
928 vs_irq_flags,
929 "vs_irq_gpio_int",
930 dev);
931 if (ret) {
932 dev_err(dev, "devm_request_irq failed: %d\n", ret);
933 return ret;
934 } else {
935 disable_irq(vs_irq);
936 isp_dev->vs_irq = vs_irq;
937 isp_dev->vs_irq_gpio = vs_irq_gpio;
938 dev_info(dev, "vs_gpio_int interrupt is hooked\n");
939 }
940 }
941
942 return 0;
943 }
944
945 static const struct media_device_ops rkisp1_media_ops = {
946 .link_notify = v4l2_pipeline_link_notify,
947 };
948
949 static int rkisp1_plat_probe(struct platform_device *pdev)
950 {
951 const struct of_device_id *match;
952 struct device_node *node = pdev->dev.of_node;
953 struct device *dev = &pdev->dev;
954 struct v4l2_device *v4l2_dev;
955 struct rkisp1_device *isp_dev;
956 const struct isp_match_data *match_data;
957 struct resource *res;
958 int i, ret, irq;
959
960 sprintf(rkisp1_version, "v%02x.%02x.%02x",
961 RKISP1_DRIVER_VERSION >> 16,
962 (RKISP1_DRIVER_VERSION & 0xff00) >> 8,
963 RKISP1_DRIVER_VERSION & 0x00ff);
964
965 dev_info(dev, "rkisp1 driver version: %s\n", rkisp1_version);
966
967 match = of_match_node(rkisp1_plat_of_match, node);
968 isp_dev = devm_kzalloc(dev, sizeof(*isp_dev), GFP_KERNEL);
969 if (!isp_dev)
970 return -ENOMEM;
971
972 dev_set_drvdata(dev, isp_dev);
973 isp_dev->dev = dev;
974
975 isp_dev->grf = syscon_regmap_lookup_by_phandle(dev->of_node,
976 "rockchip,grf");
977 if (IS_ERR(isp_dev->grf))
978 dev_warn(dev, "Missing rockchip,grf property\n");
979
980 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
981 isp_dev->base_addr = devm_ioremap_resource(dev, res);
982 if (IS_ERR(isp_dev->base_addr))
983 return PTR_ERR(isp_dev->base_addr);
984
985 match_data = match->data;
986 isp_dev->mipi_irq = -1;
987 res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
988 match_data->irqs[0].name);
989 if (res) {
990 /* there are irq names in dts */
991 for (i = 0; i < match_data->num_irqs; i++) {
992 irq = platform_get_irq_byname(pdev,
993 match_data->irqs[i].name);
994 if (irq < 0) {
995 dev_err(dev, "no irq %s in dts\n",
996 match_data->irqs[i].name);
997 return irq;
998 }
999
1000 if (!strcmp(match_data->irqs[i].name, "mipi_irq"))
1001 isp_dev->mipi_irq = irq;
1002
1003 ret = devm_request_irq(dev, irq,
1004 match_data->irqs[i].irq_hdl,
1005 IRQF_SHARED,
1006 dev_driver_string(dev),
1007 dev);
1008 if (ret < 0) {
1009 dev_err(dev, "request %s failed: %d\n",
1010 match_data->irqs[i].name,
1011 ret);
1012 return ret;
1013 }
1014
1015 if (isp_dev->mipi_irq == irq)
1016 disable_irq(isp_dev->mipi_irq);
1017 }
1018 } else {
1019 /* no irq names in dts */
1020 irq = platform_get_irq(pdev, 0);
1021 if (irq < 0) {
1022 dev_err(dev, "no isp irq in dts\n");
1023 return irq;
1024 }
1025
1026 ret = devm_request_irq(dev, irq,
1027 rkisp1_irq_handler,
1028 IRQF_SHARED,
1029 dev_driver_string(dev),
1030 dev);
1031 if (ret < 0) {
1032 dev_err(dev, "request irq failed: %d\n", ret);
1033 return ret;
1034 }
1035 }
1036
1037 for (i = 0; i < match_data->num_clks; i++) {
1038 struct clk *clk = devm_clk_get(dev, match_data->clks[i]);
1039
1040 if (IS_ERR(clk))
1041 dev_dbg(dev, "failed to get %s\n", match_data->clks[i]);
1042 isp_dev->clks[i] = clk;
1043 }
1044 isp_dev->num_clks = match_data->num_clks;
1045 isp_dev->isp_ver = match_data->isp_ver;
1046 isp_dev->clk_rate_tbl = match_data->clk_rate_tbl;
1047 isp_dev->num_clk_rate_tbl = match_data->num_clk_rate_tbl;
1048
1049 mutex_init(&isp_dev->apilock);
1050 mutex_init(&isp_dev->iqlock);
1051 atomic_set(&isp_dev->pipe.power_cnt, 0);
1052 atomic_set(&isp_dev->pipe.stream_cnt, 0);
1053 atomic_set(&isp_dev->open_cnt, 0);
1054 init_waitqueue_head(&isp_dev->sync_onoff);
1055 isp_dev->pipe.open = rkisp1_pipeline_open;
1056 isp_dev->pipe.close = rkisp1_pipeline_close;
1057 isp_dev->pipe.set_stream = rkisp1_pipeline_set_stream;
1058
1059 rkisp1_stream_init(isp_dev, RKISP1_STREAM_SP);
1060 rkisp1_stream_init(isp_dev, RKISP1_STREAM_MP);
1061 rkisp1_stream_init(isp_dev, RKISP1_STREAM_RAW);
1062
1063 strlcpy(isp_dev->media_dev.model, "rkisp1",
1064 sizeof(isp_dev->media_dev.model));
1065 isp_dev->media_dev.dev = &pdev->dev;
1066 isp_dev->media_dev.ops = &rkisp1_media_ops;
1067 v4l2_dev = &isp_dev->v4l2_dev;
1068 v4l2_dev->mdev = &isp_dev->media_dev;
1069 strlcpy(v4l2_dev->name, "rkisp1", sizeof(v4l2_dev->name));
1070 v4l2_ctrl_handler_init(&isp_dev->ctrl_handler, 5);
1071 v4l2_dev->ctrl_handler = &isp_dev->ctrl_handler;
1072
1073 ret = v4l2_device_register(isp_dev->dev, &isp_dev->v4l2_dev);
1074 if (ret < 0) {
1075 v4l2_err(v4l2_dev, "Failed to register v4l2 device: %d\n",
1076 ret);
1077 return ret;
1078 }
1079
1080 media_device_init(&isp_dev->media_dev);
1081 ret = media_device_register(&isp_dev->media_dev);
1082 if (ret < 0) {
1083 v4l2_err(v4l2_dev, "Failed to register media device: %d\n",
1084 ret);
1085 goto err_unreg_v4l2_dev;
1086 }
1087
1088 /* create & register platefom subdev (from of_node) */
1089 ret = rkisp1_register_platform_subdevs(isp_dev);
1090 if (ret < 0)
1091 goto err_unreg_media_dev;
1092
1093 if (!is_iommu_enable(dev)) {
1094 ret = of_reserved_mem_device_init(dev);
1095 if (ret)
1096 v4l2_warn(v4l2_dev,
1097 "No reserved memory region assign to isp\n");
1098 }
1099
1100 pm_runtime_enable(&pdev->dev);
1101
1102 ret = rkisp1_vs_irq_parse(pdev);
1103 if (ret)
1104 goto err_runtime_disable;
1105
1106 mutex_lock(&rkisp1_dev_mutex);
1107 list_add_tail(&isp_dev->list, &rkisp1_device_list);
1108 mutex_unlock(&rkisp1_dev_mutex);
1109 return 0;
1110
1111 err_runtime_disable:
1112 pm_runtime_disable(&pdev->dev);
1113 err_unreg_media_dev:
1114 media_device_unregister(&isp_dev->media_dev);
1115 err_unreg_v4l2_dev:
1116 v4l2_device_unregister(&isp_dev->v4l2_dev);
1117
1118 return ret;
1119 }
1120
1121 static int rkisp1_plat_remove(struct platform_device *pdev)
1122 {
1123 struct rkisp1_device *isp_dev = platform_get_drvdata(pdev);
1124
1125 pm_runtime_disable(&pdev->dev);
1126
1127 media_device_unregister(&isp_dev->media_dev);
1128 v4l2_device_unregister(&isp_dev->v4l2_dev);
1129 rkisp1_unregister_params_vdev(&isp_dev->params_vdev);
1130 rkisp1_unregister_stats_vdev(&isp_dev->stats_vdev);
1131 rkisp1_unregister_stream_vdevs(isp_dev);
1132 rkisp1_unregister_isp_subdev(isp_dev);
1133 media_device_cleanup(&isp_dev->media_dev);
1134
1135 return 0;
1136 }
1137
1138 static int __maybe_unused rkisp1_runtime_suspend(struct device *dev)
1139 {
1140 struct rkisp1_device *isp_dev = dev_get_drvdata(dev);
1141
1142 if (isp_dev->isp_ver == ISP_V12 || isp_dev->isp_ver == ISP_V13) {
1143 if (isp_dev->mipi_irq >= 0)
1144 disable_irq(isp_dev->mipi_irq);
1145 }
1146 rkisp1_disable_sys_clk(isp_dev);
1147 return pinctrl_pm_select_sleep_state(dev);
1148 }
1149
1150 static int __maybe_unused rkisp1_runtime_resume(struct device *dev)
1151 {
1152 struct rkisp1_device *isp_dev = dev_get_drvdata(dev);
1153 int ret;
1154
1155 ret = pinctrl_pm_select_default_state(dev);
1156 if (ret < 0)
1157 return ret;
1158 rkisp1_enable_sys_clk(isp_dev);
1159
1160 if (isp_dev->isp_ver == ISP_V12 || isp_dev->isp_ver == ISP_V13) {
1161 writel(0, isp_dev->base_addr + CIF_ISP_CSI0_MASK1);
1162 writel(0, isp_dev->base_addr + CIF_ISP_CSI0_MASK2);
1163 writel(0, isp_dev->base_addr + CIF_ISP_CSI0_MASK3);
1164 if (isp_dev->mipi_irq >= 0)
1165 enable_irq(isp_dev->mipi_irq);
1166 }
1167
1168 return 0;
1169 }
1170
1171 #ifndef MODULE
1172 static int __init rkisp1_clr_unready_dev(void)
1173 {
1174 __rkisp1_clr_unready_dev();
1175 return 0;
1176 }
1177 late_initcall_sync(rkisp1_clr_unready_dev);
1178 #endif
1179
1180 static const struct dev_pm_ops rkisp1_plat_pm_ops = {
1181 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
1182 pm_runtime_force_resume)
1183 SET_RUNTIME_PM_OPS(rkisp1_runtime_suspend, rkisp1_runtime_resume, NULL)
1184 };
1185
1186 static struct platform_driver rkisp1_plat_drv = {
1187 .driver = {
1188 .name = DRIVER_NAME,
1189 .of_match_table = of_match_ptr(rkisp1_plat_of_match),
1190 .pm = &rkisp1_plat_pm_ops,
1191 },
1192 .probe = rkisp1_plat_probe,
1193 .remove = rkisp1_plat_remove,
1194 };
1195
1196 module_platform_driver(rkisp1_plat_drv);
1197 MODULE_AUTHOR("Rockchip Camera/ISP team");
1198 MODULE_DESCRIPTION("Rockchip ISP1 platform driver");
1199 MODULE_LICENSE("Dual BSD/GPL");
1200