1 /* 2 * Rockchip isp1 driver 3 * 4 * Copyright (C) 2017 Rockchip Electronics Co., Ltd. 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenIB.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 */ 34 35 #ifndef _RKISP1_PATH_VIDEO_H 36 #define _RKISP1_PATH_VIDEO_H 37 38 #include "common.h" 39 40 struct rkisp1_stream; 41 42 /* 43 * @fourcc: pixel format 44 * @mbus_code: pixel format over bus 45 * @fmt_type: helper filed for pixel format 46 * @bpp: bits per pixel 47 * @bayer_pat: bayer patten type 48 * @cplanes: number of colour planes 49 * @mplanes: number of stored memory planes 50 * @uv_swap: if cb cr swaped, for yuv 51 * @write_format: defines how YCbCr self picture data is written to memory 52 * @input_format: defines sp input format 53 * @output_format: defines sp output format 54 */ 55 struct capture_fmt { 56 u32 fourcc; 57 u32 mbus_code; 58 u8 fmt_type; 59 u8 cplanes; 60 u8 mplanes; 61 u8 uv_swap; 62 u32 write_format; 63 u32 output_format; 64 u8 bpp[VIDEO_MAX_PLANES]; 65 }; 66 67 enum rkisp1_sp_inp { 68 RKISP1_SP_INP_ISP, 69 RKISP1_SP_INP_DMA_SP, 70 RKISP1_SP_INP_MAX 71 }; 72 73 enum rkisp1_field { 74 RKISP_FIELD_ODD, 75 RKISP_FIELD_EVEN, 76 RKISP_FIELD_INVAL, 77 }; 78 79 struct rkisp1_stream_sp { 80 int y_stride; 81 int vir_offs; 82 enum rkisp1_sp_inp input_sel; 83 enum rkisp1_field field; 84 enum rkisp1_field field_rec; 85 }; 86 87 struct rkisp1_stream_mp { 88 bool raw_enable; 89 }; 90 91 struct rkisp1_stream_raw { 92 u8 pre_stop; 93 }; 94 95 struct rkisp1_stream_dmarx { 96 int y_stride; 97 }; 98 99 /* Different config between selfpath and mainpath */ 100 struct stream_config { 101 const struct capture_fmt *fmts; 102 int fmt_size; 103 /* constrains */ 104 const int max_rsz_width; 105 const int max_rsz_height; 106 const int min_rsz_width; 107 const int min_rsz_height; 108 /* registers */ 109 struct { 110 u32 ctrl; 111 u32 ctrl_shd; 112 u32 scale_hy; 113 u32 scale_hcr; 114 u32 scale_hcb; 115 u32 scale_vy; 116 u32 scale_vc; 117 u32 scale_lut; 118 u32 scale_lut_addr; 119 u32 scale_hy_shd; 120 u32 scale_hcr_shd; 121 u32 scale_hcb_shd; 122 u32 scale_vy_shd; 123 u32 scale_vc_shd; 124 u32 phase_hy; 125 u32 phase_hc; 126 u32 phase_vy; 127 u32 phase_vc; 128 u32 phase_hy_shd; 129 u32 phase_hc_shd; 130 u32 phase_vy_shd; 131 u32 phase_vc_shd; 132 } rsz; 133 struct { 134 u32 ctrl; 135 u32 yuvmode_mask; 136 u32 rawmode_mask; 137 u32 h_offset; 138 u32 v_offset; 139 u32 h_size; 140 u32 v_size; 141 } dual_crop; 142 struct { 143 u32 y_size_init; 144 u32 cb_size_init; 145 u32 cr_size_init; 146 u32 y_base_ad_init; 147 u32 cb_base_ad_init; 148 u32 cr_base_ad_init; 149 u32 y_offs_cnt_init; 150 u32 cb_offs_cnt_init; 151 u32 cr_offs_cnt_init; 152 } mi; 153 }; 154 155 /* Different reg ops between selfpath and mainpath */ 156 struct streams_ops { 157 int (*config_mi)(struct rkisp1_stream *stream); 158 void (*stop_mi)(struct rkisp1_stream *stream); 159 void (*enable_mi)(struct rkisp1_stream *stream); 160 void (*disable_mi)(struct rkisp1_stream *stream); 161 void (*set_data_path)(void __iomem *base); 162 bool (*is_stream_stopped)(void __iomem *base); 163 void (*update_mi)(struct rkisp1_stream *stream); 164 }; 165 166 /* 167 * struct rkisp1_stream - ISP capture video device 168 * 169 * @out_isp_fmt: output isp format 170 * @out_fmt: output buffer size 171 * @dcrop: coordinates of dual-crop 172 * 173 * @vbq_lock: lock to protect buf_queue 174 * @buf_queue: queued buffer list 175 * @dummy_buf: dummy space to store dropped data 176 * 177 * rkisp1 use shadowsock registers, so it need two buffer at a time 178 * @curr_buf: the buffer used for current frame 179 * @next_buf: the buffer used for next frame 180 */ 181 struct rkisp1_stream { 182 unsigned id:2; 183 unsigned interlaced:1; 184 struct rkisp1_device *ispdev; 185 struct rkisp1_vdev_node vnode; 186 struct capture_fmt out_isp_fmt; 187 struct v4l2_pix_format_mplane out_fmt; 188 struct v4l2_rect dcrop; 189 struct streams_ops *ops; 190 struct stream_config *config; 191 spinlock_t vbq_lock; 192 struct list_head buf_queue; 193 struct rkisp1_dummy_buffer dummy_buf; 194 struct rkisp1_buffer *curr_buf; 195 struct rkisp1_buffer *next_buf; 196 bool streaming; 197 bool stopping; 198 bool frame_end; 199 wait_queue_head_t done; 200 unsigned int burst; 201 union { 202 struct rkisp1_stream_sp sp; 203 struct rkisp1_stream_mp mp; 204 struct rkisp1_stream_raw raw; 205 struct rkisp1_stream_dmarx dmarx; 206 } u; 207 }; 208 209 void rkisp1_unregister_stream_vdevs(struct rkisp1_device *dev); 210 int rkisp1_register_stream_vdevs(struct rkisp1_device *dev); 211 void rkisp1_mi_isr(u32 mis_val, struct rkisp1_device *dev); 212 void rkisp1_stream_init(struct rkisp1_device *dev, u32 id); 213 void rkisp1_set_stream_def_fmt(struct rkisp1_device *dev, u32 id, 214 u32 width, u32 height, u32 pixelformat); 215 void rkisp1_mipi_dmatx0_end(u32 status, struct rkisp1_device *dev); 216 int fcc_xysubs(u32 fcc, u32 *xsubs, u32 *ysubs); 217 int rkisp1_fh_open(struct file *filp); 218 int rkisp1_fop_release(struct file *file); 219 #endif /* _RKISP1_PATH_VIDEO_H */ 220