1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * camss.h 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Qualcomm MSM Camera Subsystem - Core 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Copyright (c) 2015, The Linux Foundation. All rights reserved. 8*4882a593Smuzhiyun * Copyright (C) 2015-2018 Linaro Ltd. 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun #ifndef QC_MSM_CAMSS_H 11*4882a593Smuzhiyun #define QC_MSM_CAMSS_H 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <linux/device.h> 14*4882a593Smuzhiyun #include <linux/types.h> 15*4882a593Smuzhiyun #include <media/v4l2-async.h> 16*4882a593Smuzhiyun #include <media/v4l2-device.h> 17*4882a593Smuzhiyun #include <media/v4l2-subdev.h> 18*4882a593Smuzhiyun #include <media/media-device.h> 19*4882a593Smuzhiyun #include <media/media-entity.h> 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #include "camss-csid.h" 22*4882a593Smuzhiyun #include "camss-csiphy.h" 23*4882a593Smuzhiyun #include "camss-ispif.h" 24*4882a593Smuzhiyun #include "camss-vfe.h" 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #define to_camss(ptr_module) \ 27*4882a593Smuzhiyun container_of(ptr_module, struct camss, ptr_module) 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #define to_device(ptr_module) \ 30*4882a593Smuzhiyun (to_camss(ptr_module)->dev) 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #define module_pointer(ptr_module, index) \ 33*4882a593Smuzhiyun ((const struct ptr_module##_device (*)[]) &(ptr_module[-(index)])) 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #define to_camss_index(ptr_module, index) \ 36*4882a593Smuzhiyun container_of(module_pointer(ptr_module, index), \ 37*4882a593Smuzhiyun struct camss, ptr_module) 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #define to_device_index(ptr_module, index) \ 40*4882a593Smuzhiyun (to_camss_index(ptr_module, index)->dev) 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #define CAMSS_RES_MAX 17 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun struct resources { 45*4882a593Smuzhiyun char *regulator[CAMSS_RES_MAX]; 46*4882a593Smuzhiyun char *clock[CAMSS_RES_MAX]; 47*4882a593Smuzhiyun u32 clock_rate[CAMSS_RES_MAX][CAMSS_RES_MAX]; 48*4882a593Smuzhiyun char *reg[CAMSS_RES_MAX]; 49*4882a593Smuzhiyun char *interrupt[CAMSS_RES_MAX]; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun struct resources_ispif { 53*4882a593Smuzhiyun char *clock[CAMSS_RES_MAX]; 54*4882a593Smuzhiyun char *clock_for_reset[CAMSS_RES_MAX]; 55*4882a593Smuzhiyun char *reg[CAMSS_RES_MAX]; 56*4882a593Smuzhiyun char *interrupt; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun enum pm_domain { 60*4882a593Smuzhiyun PM_DOMAIN_VFE0, 61*4882a593Smuzhiyun PM_DOMAIN_VFE1, 62*4882a593Smuzhiyun PM_DOMAIN_COUNT 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun enum camss_version { 66*4882a593Smuzhiyun CAMSS_8x16, 67*4882a593Smuzhiyun CAMSS_8x96, 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun struct camss { 71*4882a593Smuzhiyun enum camss_version version; 72*4882a593Smuzhiyun struct v4l2_device v4l2_dev; 73*4882a593Smuzhiyun struct v4l2_async_notifier notifier; 74*4882a593Smuzhiyun struct media_device media_dev; 75*4882a593Smuzhiyun struct device *dev; 76*4882a593Smuzhiyun int csiphy_num; 77*4882a593Smuzhiyun struct csiphy_device *csiphy; 78*4882a593Smuzhiyun int csid_num; 79*4882a593Smuzhiyun struct csid_device *csid; 80*4882a593Smuzhiyun struct ispif_device ispif; 81*4882a593Smuzhiyun int vfe_num; 82*4882a593Smuzhiyun struct vfe_device *vfe; 83*4882a593Smuzhiyun atomic_t ref_count; 84*4882a593Smuzhiyun struct device *genpd[PM_DOMAIN_COUNT]; 85*4882a593Smuzhiyun struct device_link *genpd_link[PM_DOMAIN_COUNT]; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun struct camss_camera_interface { 89*4882a593Smuzhiyun u8 csiphy_id; 90*4882a593Smuzhiyun struct csiphy_csi2_cfg csi2; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun struct camss_async_subdev { 94*4882a593Smuzhiyun struct v4l2_async_subdev asd; /* must be first */ 95*4882a593Smuzhiyun struct camss_camera_interface interface; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun struct camss_clock { 99*4882a593Smuzhiyun struct clk *clk; 100*4882a593Smuzhiyun const char *name; 101*4882a593Smuzhiyun u32 *freq; 102*4882a593Smuzhiyun u32 nfreqs; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun void camss_add_clock_margin(u64 *rate); 106*4882a593Smuzhiyun int camss_enable_clocks(int nclocks, struct camss_clock *clock, 107*4882a593Smuzhiyun struct device *dev); 108*4882a593Smuzhiyun void camss_disable_clocks(int nclocks, struct camss_clock *clock); 109*4882a593Smuzhiyun struct media_entity *camss_find_sensor(struct media_entity *entity); 110*4882a593Smuzhiyun int camss_get_pixel_clock(struct media_entity *entity, u32 *pixel_clock); 111*4882a593Smuzhiyun int camss_pm_domain_on(struct camss *camss, int id); 112*4882a593Smuzhiyun void camss_pm_domain_off(struct camss *camss, int id); 113*4882a593Smuzhiyun void camss_delete(struct camss *camss); 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun #endif /* QC_MSM_CAMSS_H */ 116