1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * camss-vfe.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Qualcomm MSM Camera Subsystem - VFE (Video Front End) Module
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
8*4882a593Smuzhiyun * Copyright (C) 2015-2018 Linaro Ltd.
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun #include <linux/clk.h>
11*4882a593Smuzhiyun #include <linux/completion.h>
12*4882a593Smuzhiyun #include <linux/interrupt.h>
13*4882a593Smuzhiyun #include <linux/iommu.h>
14*4882a593Smuzhiyun #include <linux/mutex.h>
15*4882a593Smuzhiyun #include <linux/of.h>
16*4882a593Smuzhiyun #include <linux/platform_device.h>
17*4882a593Smuzhiyun #include <linux/pm_runtime.h>
18*4882a593Smuzhiyun #include <linux/spinlock_types.h>
19*4882a593Smuzhiyun #include <linux/spinlock.h>
20*4882a593Smuzhiyun #include <media/media-entity.h>
21*4882a593Smuzhiyun #include <media/v4l2-device.h>
22*4882a593Smuzhiyun #include <media/v4l2-subdev.h>
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #include "camss-vfe.h"
25*4882a593Smuzhiyun #include "camss.h"
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #define MSM_VFE_NAME "msm_vfe"
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #define vfe_line_array(ptr_line) \
30*4882a593Smuzhiyun ((const struct vfe_line (*)[]) &(ptr_line[-(ptr_line->id)]))
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #define to_vfe(ptr_line) \
33*4882a593Smuzhiyun container_of(vfe_line_array(ptr_line), struct vfe_device, line)
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun /* VFE reset timeout */
36*4882a593Smuzhiyun #define VFE_RESET_TIMEOUT_MS 50
37*4882a593Smuzhiyun /* VFE halt timeout */
38*4882a593Smuzhiyun #define VFE_HALT_TIMEOUT_MS 100
39*4882a593Smuzhiyun /* Max number of frame drop updates per frame */
40*4882a593Smuzhiyun #define VFE_FRAME_DROP_UPDATES 2
41*4882a593Smuzhiyun /* Frame drop value. VAL + UPDATES - 1 should not exceed 31 */
42*4882a593Smuzhiyun #define VFE_FRAME_DROP_VAL 30
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun #define VFE_NEXT_SOF_MS 500
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun #define SCALER_RATIO_MAX 16
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun struct vfe_format {
49*4882a593Smuzhiyun u32 code;
50*4882a593Smuzhiyun u8 bpp;
51*4882a593Smuzhiyun };
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun static const struct vfe_format formats_rdi_8x16[] = {
54*4882a593Smuzhiyun { MEDIA_BUS_FMT_UYVY8_2X8, 8 },
55*4882a593Smuzhiyun { MEDIA_BUS_FMT_VYUY8_2X8, 8 },
56*4882a593Smuzhiyun { MEDIA_BUS_FMT_YUYV8_2X8, 8 },
57*4882a593Smuzhiyun { MEDIA_BUS_FMT_YVYU8_2X8, 8 },
58*4882a593Smuzhiyun { MEDIA_BUS_FMT_SBGGR8_1X8, 8 },
59*4882a593Smuzhiyun { MEDIA_BUS_FMT_SGBRG8_1X8, 8 },
60*4882a593Smuzhiyun { MEDIA_BUS_FMT_SGRBG8_1X8, 8 },
61*4882a593Smuzhiyun { MEDIA_BUS_FMT_SRGGB8_1X8, 8 },
62*4882a593Smuzhiyun { MEDIA_BUS_FMT_SBGGR10_1X10, 10 },
63*4882a593Smuzhiyun { MEDIA_BUS_FMT_SGBRG10_1X10, 10 },
64*4882a593Smuzhiyun { MEDIA_BUS_FMT_SGRBG10_1X10, 10 },
65*4882a593Smuzhiyun { MEDIA_BUS_FMT_SRGGB10_1X10, 10 },
66*4882a593Smuzhiyun { MEDIA_BUS_FMT_SBGGR12_1X12, 12 },
67*4882a593Smuzhiyun { MEDIA_BUS_FMT_SGBRG12_1X12, 12 },
68*4882a593Smuzhiyun { MEDIA_BUS_FMT_SGRBG12_1X12, 12 },
69*4882a593Smuzhiyun { MEDIA_BUS_FMT_SRGGB12_1X12, 12 },
70*4882a593Smuzhiyun { MEDIA_BUS_FMT_Y10_1X10, 10 },
71*4882a593Smuzhiyun };
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun static const struct vfe_format formats_pix_8x16[] = {
74*4882a593Smuzhiyun { MEDIA_BUS_FMT_UYVY8_2X8, 8 },
75*4882a593Smuzhiyun { MEDIA_BUS_FMT_VYUY8_2X8, 8 },
76*4882a593Smuzhiyun { MEDIA_BUS_FMT_YUYV8_2X8, 8 },
77*4882a593Smuzhiyun { MEDIA_BUS_FMT_YVYU8_2X8, 8 },
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun static const struct vfe_format formats_rdi_8x96[] = {
81*4882a593Smuzhiyun { MEDIA_BUS_FMT_UYVY8_2X8, 8 },
82*4882a593Smuzhiyun { MEDIA_BUS_FMT_VYUY8_2X8, 8 },
83*4882a593Smuzhiyun { MEDIA_BUS_FMT_YUYV8_2X8, 8 },
84*4882a593Smuzhiyun { MEDIA_BUS_FMT_YVYU8_2X8, 8 },
85*4882a593Smuzhiyun { MEDIA_BUS_FMT_SBGGR8_1X8, 8 },
86*4882a593Smuzhiyun { MEDIA_BUS_FMT_SGBRG8_1X8, 8 },
87*4882a593Smuzhiyun { MEDIA_BUS_FMT_SGRBG8_1X8, 8 },
88*4882a593Smuzhiyun { MEDIA_BUS_FMT_SRGGB8_1X8, 8 },
89*4882a593Smuzhiyun { MEDIA_BUS_FMT_SBGGR10_1X10, 10 },
90*4882a593Smuzhiyun { MEDIA_BUS_FMT_SGBRG10_1X10, 10 },
91*4882a593Smuzhiyun { MEDIA_BUS_FMT_SGRBG10_1X10, 10 },
92*4882a593Smuzhiyun { MEDIA_BUS_FMT_SRGGB10_1X10, 10 },
93*4882a593Smuzhiyun { MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE, 16 },
94*4882a593Smuzhiyun { MEDIA_BUS_FMT_SBGGR12_1X12, 12 },
95*4882a593Smuzhiyun { MEDIA_BUS_FMT_SGBRG12_1X12, 12 },
96*4882a593Smuzhiyun { MEDIA_BUS_FMT_SGRBG12_1X12, 12 },
97*4882a593Smuzhiyun { MEDIA_BUS_FMT_SRGGB12_1X12, 12 },
98*4882a593Smuzhiyun { MEDIA_BUS_FMT_SBGGR14_1X14, 14 },
99*4882a593Smuzhiyun { MEDIA_BUS_FMT_SGBRG14_1X14, 14 },
100*4882a593Smuzhiyun { MEDIA_BUS_FMT_SGRBG14_1X14, 14 },
101*4882a593Smuzhiyun { MEDIA_BUS_FMT_SRGGB14_1X14, 14 },
102*4882a593Smuzhiyun { MEDIA_BUS_FMT_Y10_1X10, 10 },
103*4882a593Smuzhiyun { MEDIA_BUS_FMT_Y10_2X8_PADHI_LE, 16 },
104*4882a593Smuzhiyun };
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun static const struct vfe_format formats_pix_8x96[] = {
107*4882a593Smuzhiyun { MEDIA_BUS_FMT_UYVY8_2X8, 8 },
108*4882a593Smuzhiyun { MEDIA_BUS_FMT_VYUY8_2X8, 8 },
109*4882a593Smuzhiyun { MEDIA_BUS_FMT_YUYV8_2X8, 8 },
110*4882a593Smuzhiyun { MEDIA_BUS_FMT_YVYU8_2X8, 8 },
111*4882a593Smuzhiyun };
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun /*
114*4882a593Smuzhiyun * vfe_get_bpp - map media bus format to bits per pixel
115*4882a593Smuzhiyun * @formats: supported media bus formats array
116*4882a593Smuzhiyun * @nformats: size of @formats array
117*4882a593Smuzhiyun * @code: media bus format code
118*4882a593Smuzhiyun *
119*4882a593Smuzhiyun * Return number of bits per pixel
120*4882a593Smuzhiyun */
vfe_get_bpp(const struct vfe_format * formats,unsigned int nformats,u32 code)121*4882a593Smuzhiyun static u8 vfe_get_bpp(const struct vfe_format *formats,
122*4882a593Smuzhiyun unsigned int nformats, u32 code)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun unsigned int i;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun for (i = 0; i < nformats; i++)
127*4882a593Smuzhiyun if (code == formats[i].code)
128*4882a593Smuzhiyun return formats[i].bpp;
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun WARN(1, "Unknown format\n");
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun return formats[0].bpp;
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun
vfe_find_code(u32 * code,unsigned int n_code,unsigned int index,u32 req_code)135*4882a593Smuzhiyun static u32 vfe_find_code(u32 *code, unsigned int n_code,
136*4882a593Smuzhiyun unsigned int index, u32 req_code)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun int i;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun if (!req_code && (index >= n_code))
141*4882a593Smuzhiyun return 0;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun for (i = 0; i < n_code; i++)
144*4882a593Smuzhiyun if (req_code) {
145*4882a593Smuzhiyun if (req_code == code[i])
146*4882a593Smuzhiyun return req_code;
147*4882a593Smuzhiyun } else {
148*4882a593Smuzhiyun if (i == index)
149*4882a593Smuzhiyun return code[i];
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun return code[0];
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun
vfe_src_pad_code(struct vfe_line * line,u32 sink_code,unsigned int index,u32 src_req_code)155*4882a593Smuzhiyun static u32 vfe_src_pad_code(struct vfe_line *line, u32 sink_code,
156*4882a593Smuzhiyun unsigned int index, u32 src_req_code)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun struct vfe_device *vfe = to_vfe(line);
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun if (vfe->camss->version == CAMSS_8x16)
161*4882a593Smuzhiyun switch (sink_code) {
162*4882a593Smuzhiyun case MEDIA_BUS_FMT_YUYV8_2X8:
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun u32 src_code[] = {
165*4882a593Smuzhiyun MEDIA_BUS_FMT_YUYV8_2X8,
166*4882a593Smuzhiyun MEDIA_BUS_FMT_YUYV8_1_5X8,
167*4882a593Smuzhiyun };
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun return vfe_find_code(src_code, ARRAY_SIZE(src_code),
170*4882a593Smuzhiyun index, src_req_code);
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun case MEDIA_BUS_FMT_YVYU8_2X8:
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun u32 src_code[] = {
175*4882a593Smuzhiyun MEDIA_BUS_FMT_YVYU8_2X8,
176*4882a593Smuzhiyun MEDIA_BUS_FMT_YVYU8_1_5X8,
177*4882a593Smuzhiyun };
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun return vfe_find_code(src_code, ARRAY_SIZE(src_code),
180*4882a593Smuzhiyun index, src_req_code);
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun case MEDIA_BUS_FMT_UYVY8_2X8:
183*4882a593Smuzhiyun {
184*4882a593Smuzhiyun u32 src_code[] = {
185*4882a593Smuzhiyun MEDIA_BUS_FMT_UYVY8_2X8,
186*4882a593Smuzhiyun MEDIA_BUS_FMT_UYVY8_1_5X8,
187*4882a593Smuzhiyun };
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun return vfe_find_code(src_code, ARRAY_SIZE(src_code),
190*4882a593Smuzhiyun index, src_req_code);
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun case MEDIA_BUS_FMT_VYUY8_2X8:
193*4882a593Smuzhiyun {
194*4882a593Smuzhiyun u32 src_code[] = {
195*4882a593Smuzhiyun MEDIA_BUS_FMT_VYUY8_2X8,
196*4882a593Smuzhiyun MEDIA_BUS_FMT_VYUY8_1_5X8,
197*4882a593Smuzhiyun };
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun return vfe_find_code(src_code, ARRAY_SIZE(src_code),
200*4882a593Smuzhiyun index, src_req_code);
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun default:
203*4882a593Smuzhiyun if (index > 0)
204*4882a593Smuzhiyun return 0;
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun return sink_code;
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun else if (vfe->camss->version == CAMSS_8x96)
209*4882a593Smuzhiyun switch (sink_code) {
210*4882a593Smuzhiyun case MEDIA_BUS_FMT_YUYV8_2X8:
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun u32 src_code[] = {
213*4882a593Smuzhiyun MEDIA_BUS_FMT_YUYV8_2X8,
214*4882a593Smuzhiyun MEDIA_BUS_FMT_YVYU8_2X8,
215*4882a593Smuzhiyun MEDIA_BUS_FMT_UYVY8_2X8,
216*4882a593Smuzhiyun MEDIA_BUS_FMT_VYUY8_2X8,
217*4882a593Smuzhiyun MEDIA_BUS_FMT_YUYV8_1_5X8,
218*4882a593Smuzhiyun };
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun return vfe_find_code(src_code, ARRAY_SIZE(src_code),
221*4882a593Smuzhiyun index, src_req_code);
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun case MEDIA_BUS_FMT_YVYU8_2X8:
224*4882a593Smuzhiyun {
225*4882a593Smuzhiyun u32 src_code[] = {
226*4882a593Smuzhiyun MEDIA_BUS_FMT_YVYU8_2X8,
227*4882a593Smuzhiyun MEDIA_BUS_FMT_YUYV8_2X8,
228*4882a593Smuzhiyun MEDIA_BUS_FMT_UYVY8_2X8,
229*4882a593Smuzhiyun MEDIA_BUS_FMT_VYUY8_2X8,
230*4882a593Smuzhiyun MEDIA_BUS_FMT_YVYU8_1_5X8,
231*4882a593Smuzhiyun };
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun return vfe_find_code(src_code, ARRAY_SIZE(src_code),
234*4882a593Smuzhiyun index, src_req_code);
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun case MEDIA_BUS_FMT_UYVY8_2X8:
237*4882a593Smuzhiyun {
238*4882a593Smuzhiyun u32 src_code[] = {
239*4882a593Smuzhiyun MEDIA_BUS_FMT_UYVY8_2X8,
240*4882a593Smuzhiyun MEDIA_BUS_FMT_YUYV8_2X8,
241*4882a593Smuzhiyun MEDIA_BUS_FMT_YVYU8_2X8,
242*4882a593Smuzhiyun MEDIA_BUS_FMT_VYUY8_2X8,
243*4882a593Smuzhiyun MEDIA_BUS_FMT_UYVY8_1_5X8,
244*4882a593Smuzhiyun };
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun return vfe_find_code(src_code, ARRAY_SIZE(src_code),
247*4882a593Smuzhiyun index, src_req_code);
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun case MEDIA_BUS_FMT_VYUY8_2X8:
250*4882a593Smuzhiyun {
251*4882a593Smuzhiyun u32 src_code[] = {
252*4882a593Smuzhiyun MEDIA_BUS_FMT_VYUY8_2X8,
253*4882a593Smuzhiyun MEDIA_BUS_FMT_YUYV8_2X8,
254*4882a593Smuzhiyun MEDIA_BUS_FMT_YVYU8_2X8,
255*4882a593Smuzhiyun MEDIA_BUS_FMT_UYVY8_2X8,
256*4882a593Smuzhiyun MEDIA_BUS_FMT_VYUY8_1_5X8,
257*4882a593Smuzhiyun };
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun return vfe_find_code(src_code, ARRAY_SIZE(src_code),
260*4882a593Smuzhiyun index, src_req_code);
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun default:
263*4882a593Smuzhiyun if (index > 0)
264*4882a593Smuzhiyun return 0;
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun return sink_code;
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun else
269*4882a593Smuzhiyun return 0;
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun /*
273*4882a593Smuzhiyun * vfe_reset - Trigger reset on VFE module and wait to complete
274*4882a593Smuzhiyun * @vfe: VFE device
275*4882a593Smuzhiyun *
276*4882a593Smuzhiyun * Return 0 on success or a negative error code otherwise
277*4882a593Smuzhiyun */
vfe_reset(struct vfe_device * vfe)278*4882a593Smuzhiyun static int vfe_reset(struct vfe_device *vfe)
279*4882a593Smuzhiyun {
280*4882a593Smuzhiyun unsigned long time;
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun reinit_completion(&vfe->reset_complete);
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun vfe->ops->global_reset(vfe);
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun time = wait_for_completion_timeout(&vfe->reset_complete,
287*4882a593Smuzhiyun msecs_to_jiffies(VFE_RESET_TIMEOUT_MS));
288*4882a593Smuzhiyun if (!time) {
289*4882a593Smuzhiyun dev_err(vfe->camss->dev, "VFE reset timeout\n");
290*4882a593Smuzhiyun return -EIO;
291*4882a593Smuzhiyun }
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun return 0;
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun /*
297*4882a593Smuzhiyun * vfe_halt - Trigger halt on VFE module and wait to complete
298*4882a593Smuzhiyun * @vfe: VFE device
299*4882a593Smuzhiyun *
300*4882a593Smuzhiyun * Return 0 on success or a negative error code otherwise
301*4882a593Smuzhiyun */
vfe_halt(struct vfe_device * vfe)302*4882a593Smuzhiyun static int vfe_halt(struct vfe_device *vfe)
303*4882a593Smuzhiyun {
304*4882a593Smuzhiyun unsigned long time;
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun reinit_completion(&vfe->halt_complete);
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun vfe->ops->halt_request(vfe);
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun time = wait_for_completion_timeout(&vfe->halt_complete,
311*4882a593Smuzhiyun msecs_to_jiffies(VFE_HALT_TIMEOUT_MS));
312*4882a593Smuzhiyun if (!time) {
313*4882a593Smuzhiyun dev_err(vfe->camss->dev, "VFE halt timeout\n");
314*4882a593Smuzhiyun return -EIO;
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun return 0;
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun
vfe_init_outputs(struct vfe_device * vfe)320*4882a593Smuzhiyun static void vfe_init_outputs(struct vfe_device *vfe)
321*4882a593Smuzhiyun {
322*4882a593Smuzhiyun int i;
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(vfe->line); i++) {
325*4882a593Smuzhiyun struct vfe_output *output = &vfe->line[i].output;
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun output->state = VFE_OUTPUT_OFF;
328*4882a593Smuzhiyun output->buf[0] = NULL;
329*4882a593Smuzhiyun output->buf[1] = NULL;
330*4882a593Smuzhiyun INIT_LIST_HEAD(&output->pending_bufs);
331*4882a593Smuzhiyun }
332*4882a593Smuzhiyun }
333*4882a593Smuzhiyun
vfe_reset_output_maps(struct vfe_device * vfe)334*4882a593Smuzhiyun static void vfe_reset_output_maps(struct vfe_device *vfe)
335*4882a593Smuzhiyun {
336*4882a593Smuzhiyun int i;
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(vfe->wm_output_map); i++)
339*4882a593Smuzhiyun vfe->wm_output_map[i] = VFE_LINE_NONE;
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun
vfe_output_init_addrs(struct vfe_device * vfe,struct vfe_output * output,u8 sync)342*4882a593Smuzhiyun static void vfe_output_init_addrs(struct vfe_device *vfe,
343*4882a593Smuzhiyun struct vfe_output *output, u8 sync)
344*4882a593Smuzhiyun {
345*4882a593Smuzhiyun u32 ping_addr;
346*4882a593Smuzhiyun u32 pong_addr;
347*4882a593Smuzhiyun unsigned int i;
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun output->active_buf = 0;
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun for (i = 0; i < output->wm_num; i++) {
352*4882a593Smuzhiyun if (output->buf[0])
353*4882a593Smuzhiyun ping_addr = output->buf[0]->addr[i];
354*4882a593Smuzhiyun else
355*4882a593Smuzhiyun ping_addr = 0;
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun if (output->buf[1])
358*4882a593Smuzhiyun pong_addr = output->buf[1]->addr[i];
359*4882a593Smuzhiyun else
360*4882a593Smuzhiyun pong_addr = ping_addr;
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun vfe->ops->wm_set_ping_addr(vfe, output->wm_idx[i], ping_addr);
363*4882a593Smuzhiyun vfe->ops->wm_set_pong_addr(vfe, output->wm_idx[i], pong_addr);
364*4882a593Smuzhiyun if (sync)
365*4882a593Smuzhiyun vfe->ops->bus_reload_wm(vfe, output->wm_idx[i]);
366*4882a593Smuzhiyun }
367*4882a593Smuzhiyun }
368*4882a593Smuzhiyun
vfe_output_update_ping_addr(struct vfe_device * vfe,struct vfe_output * output,u8 sync)369*4882a593Smuzhiyun static void vfe_output_update_ping_addr(struct vfe_device *vfe,
370*4882a593Smuzhiyun struct vfe_output *output, u8 sync)
371*4882a593Smuzhiyun {
372*4882a593Smuzhiyun u32 addr;
373*4882a593Smuzhiyun unsigned int i;
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun for (i = 0; i < output->wm_num; i++) {
376*4882a593Smuzhiyun if (output->buf[0])
377*4882a593Smuzhiyun addr = output->buf[0]->addr[i];
378*4882a593Smuzhiyun else
379*4882a593Smuzhiyun addr = 0;
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun vfe->ops->wm_set_ping_addr(vfe, output->wm_idx[i], addr);
382*4882a593Smuzhiyun if (sync)
383*4882a593Smuzhiyun vfe->ops->bus_reload_wm(vfe, output->wm_idx[i]);
384*4882a593Smuzhiyun }
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun
vfe_output_update_pong_addr(struct vfe_device * vfe,struct vfe_output * output,u8 sync)387*4882a593Smuzhiyun static void vfe_output_update_pong_addr(struct vfe_device *vfe,
388*4882a593Smuzhiyun struct vfe_output *output, u8 sync)
389*4882a593Smuzhiyun {
390*4882a593Smuzhiyun u32 addr;
391*4882a593Smuzhiyun unsigned int i;
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun for (i = 0; i < output->wm_num; i++) {
394*4882a593Smuzhiyun if (output->buf[1])
395*4882a593Smuzhiyun addr = output->buf[1]->addr[i];
396*4882a593Smuzhiyun else
397*4882a593Smuzhiyun addr = 0;
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun vfe->ops->wm_set_pong_addr(vfe, output->wm_idx[i], addr);
400*4882a593Smuzhiyun if (sync)
401*4882a593Smuzhiyun vfe->ops->bus_reload_wm(vfe, output->wm_idx[i]);
402*4882a593Smuzhiyun }
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun }
405*4882a593Smuzhiyun
vfe_reserve_wm(struct vfe_device * vfe,enum vfe_line_id line_id)406*4882a593Smuzhiyun static int vfe_reserve_wm(struct vfe_device *vfe, enum vfe_line_id line_id)
407*4882a593Smuzhiyun {
408*4882a593Smuzhiyun int ret = -EBUSY;
409*4882a593Smuzhiyun int i;
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(vfe->wm_output_map); i++) {
412*4882a593Smuzhiyun if (vfe->wm_output_map[i] == VFE_LINE_NONE) {
413*4882a593Smuzhiyun vfe->wm_output_map[i] = line_id;
414*4882a593Smuzhiyun ret = i;
415*4882a593Smuzhiyun break;
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun }
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun return ret;
420*4882a593Smuzhiyun }
421*4882a593Smuzhiyun
vfe_release_wm(struct vfe_device * vfe,u8 wm)422*4882a593Smuzhiyun static int vfe_release_wm(struct vfe_device *vfe, u8 wm)
423*4882a593Smuzhiyun {
424*4882a593Smuzhiyun if (wm >= ARRAY_SIZE(vfe->wm_output_map))
425*4882a593Smuzhiyun return -EINVAL;
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun vfe->wm_output_map[wm] = VFE_LINE_NONE;
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun return 0;
430*4882a593Smuzhiyun }
431*4882a593Smuzhiyun
vfe_output_frame_drop(struct vfe_device * vfe,struct vfe_output * output,u32 drop_pattern)432*4882a593Smuzhiyun static void vfe_output_frame_drop(struct vfe_device *vfe,
433*4882a593Smuzhiyun struct vfe_output *output,
434*4882a593Smuzhiyun u32 drop_pattern)
435*4882a593Smuzhiyun {
436*4882a593Smuzhiyun u8 drop_period;
437*4882a593Smuzhiyun unsigned int i;
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun /* We need to toggle update period to be valid on next frame */
440*4882a593Smuzhiyun output->drop_update_idx++;
441*4882a593Smuzhiyun output->drop_update_idx %= VFE_FRAME_DROP_UPDATES;
442*4882a593Smuzhiyun drop_period = VFE_FRAME_DROP_VAL + output->drop_update_idx;
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun for (i = 0; i < output->wm_num; i++) {
445*4882a593Smuzhiyun vfe->ops->wm_set_framedrop_period(vfe, output->wm_idx[i],
446*4882a593Smuzhiyun drop_period);
447*4882a593Smuzhiyun vfe->ops->wm_set_framedrop_pattern(vfe, output->wm_idx[i],
448*4882a593Smuzhiyun drop_pattern);
449*4882a593Smuzhiyun }
450*4882a593Smuzhiyun vfe->ops->reg_update(vfe,
451*4882a593Smuzhiyun container_of(output, struct vfe_line, output)->id);
452*4882a593Smuzhiyun }
453*4882a593Smuzhiyun
vfe_buf_get_pending(struct vfe_output * output)454*4882a593Smuzhiyun static struct camss_buffer *vfe_buf_get_pending(struct vfe_output *output)
455*4882a593Smuzhiyun {
456*4882a593Smuzhiyun struct camss_buffer *buffer = NULL;
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun if (!list_empty(&output->pending_bufs)) {
459*4882a593Smuzhiyun buffer = list_first_entry(&output->pending_bufs,
460*4882a593Smuzhiyun struct camss_buffer,
461*4882a593Smuzhiyun queue);
462*4882a593Smuzhiyun list_del(&buffer->queue);
463*4882a593Smuzhiyun }
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun return buffer;
466*4882a593Smuzhiyun }
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun /*
469*4882a593Smuzhiyun * vfe_buf_add_pending - Add output buffer to list of pending
470*4882a593Smuzhiyun * @output: VFE output
471*4882a593Smuzhiyun * @buffer: Video buffer
472*4882a593Smuzhiyun */
vfe_buf_add_pending(struct vfe_output * output,struct camss_buffer * buffer)473*4882a593Smuzhiyun static void vfe_buf_add_pending(struct vfe_output *output,
474*4882a593Smuzhiyun struct camss_buffer *buffer)
475*4882a593Smuzhiyun {
476*4882a593Smuzhiyun INIT_LIST_HEAD(&buffer->queue);
477*4882a593Smuzhiyun list_add_tail(&buffer->queue, &output->pending_bufs);
478*4882a593Smuzhiyun }
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun /*
481*4882a593Smuzhiyun * vfe_buf_flush_pending - Flush all pending buffers.
482*4882a593Smuzhiyun * @output: VFE output
483*4882a593Smuzhiyun * @state: vb2 buffer state
484*4882a593Smuzhiyun */
vfe_buf_flush_pending(struct vfe_output * output,enum vb2_buffer_state state)485*4882a593Smuzhiyun static void vfe_buf_flush_pending(struct vfe_output *output,
486*4882a593Smuzhiyun enum vb2_buffer_state state)
487*4882a593Smuzhiyun {
488*4882a593Smuzhiyun struct camss_buffer *buf;
489*4882a593Smuzhiyun struct camss_buffer *t;
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun list_for_each_entry_safe(buf, t, &output->pending_bufs, queue) {
492*4882a593Smuzhiyun vb2_buffer_done(&buf->vb.vb2_buf, state);
493*4882a593Smuzhiyun list_del(&buf->queue);
494*4882a593Smuzhiyun }
495*4882a593Smuzhiyun }
496*4882a593Smuzhiyun
vfe_buf_update_wm_on_next(struct vfe_device * vfe,struct vfe_output * output)497*4882a593Smuzhiyun static void vfe_buf_update_wm_on_next(struct vfe_device *vfe,
498*4882a593Smuzhiyun struct vfe_output *output)
499*4882a593Smuzhiyun {
500*4882a593Smuzhiyun switch (output->state) {
501*4882a593Smuzhiyun case VFE_OUTPUT_CONTINUOUS:
502*4882a593Smuzhiyun vfe_output_frame_drop(vfe, output, 3);
503*4882a593Smuzhiyun break;
504*4882a593Smuzhiyun case VFE_OUTPUT_SINGLE:
505*4882a593Smuzhiyun default:
506*4882a593Smuzhiyun dev_err_ratelimited(vfe->camss->dev,
507*4882a593Smuzhiyun "Next buf in wrong state! %d\n",
508*4882a593Smuzhiyun output->state);
509*4882a593Smuzhiyun break;
510*4882a593Smuzhiyun }
511*4882a593Smuzhiyun }
512*4882a593Smuzhiyun
vfe_buf_update_wm_on_last(struct vfe_device * vfe,struct vfe_output * output)513*4882a593Smuzhiyun static void vfe_buf_update_wm_on_last(struct vfe_device *vfe,
514*4882a593Smuzhiyun struct vfe_output *output)
515*4882a593Smuzhiyun {
516*4882a593Smuzhiyun switch (output->state) {
517*4882a593Smuzhiyun case VFE_OUTPUT_CONTINUOUS:
518*4882a593Smuzhiyun output->state = VFE_OUTPUT_SINGLE;
519*4882a593Smuzhiyun vfe_output_frame_drop(vfe, output, 1);
520*4882a593Smuzhiyun break;
521*4882a593Smuzhiyun case VFE_OUTPUT_SINGLE:
522*4882a593Smuzhiyun output->state = VFE_OUTPUT_STOPPING;
523*4882a593Smuzhiyun vfe_output_frame_drop(vfe, output, 0);
524*4882a593Smuzhiyun break;
525*4882a593Smuzhiyun default:
526*4882a593Smuzhiyun dev_err_ratelimited(vfe->camss->dev,
527*4882a593Smuzhiyun "Last buff in wrong state! %d\n",
528*4882a593Smuzhiyun output->state);
529*4882a593Smuzhiyun break;
530*4882a593Smuzhiyun }
531*4882a593Smuzhiyun }
532*4882a593Smuzhiyun
vfe_buf_update_wm_on_new(struct vfe_device * vfe,struct vfe_output * output,struct camss_buffer * new_buf)533*4882a593Smuzhiyun static void vfe_buf_update_wm_on_new(struct vfe_device *vfe,
534*4882a593Smuzhiyun struct vfe_output *output,
535*4882a593Smuzhiyun struct camss_buffer *new_buf)
536*4882a593Smuzhiyun {
537*4882a593Smuzhiyun int inactive_idx;
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun switch (output->state) {
540*4882a593Smuzhiyun case VFE_OUTPUT_SINGLE:
541*4882a593Smuzhiyun inactive_idx = !output->active_buf;
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun if (!output->buf[inactive_idx]) {
544*4882a593Smuzhiyun output->buf[inactive_idx] = new_buf;
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun if (inactive_idx)
547*4882a593Smuzhiyun vfe_output_update_pong_addr(vfe, output, 0);
548*4882a593Smuzhiyun else
549*4882a593Smuzhiyun vfe_output_update_ping_addr(vfe, output, 0);
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun vfe_output_frame_drop(vfe, output, 3);
552*4882a593Smuzhiyun output->state = VFE_OUTPUT_CONTINUOUS;
553*4882a593Smuzhiyun } else {
554*4882a593Smuzhiyun vfe_buf_add_pending(output, new_buf);
555*4882a593Smuzhiyun dev_err_ratelimited(vfe->camss->dev,
556*4882a593Smuzhiyun "Inactive buffer is busy\n");
557*4882a593Smuzhiyun }
558*4882a593Smuzhiyun break;
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun case VFE_OUTPUT_IDLE:
561*4882a593Smuzhiyun if (!output->buf[0]) {
562*4882a593Smuzhiyun output->buf[0] = new_buf;
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun vfe_output_init_addrs(vfe, output, 1);
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun vfe_output_frame_drop(vfe, output, 1);
567*4882a593Smuzhiyun output->state = VFE_OUTPUT_SINGLE;
568*4882a593Smuzhiyun } else {
569*4882a593Smuzhiyun vfe_buf_add_pending(output, new_buf);
570*4882a593Smuzhiyun dev_err_ratelimited(vfe->camss->dev,
571*4882a593Smuzhiyun "Output idle with buffer set!\n");
572*4882a593Smuzhiyun }
573*4882a593Smuzhiyun break;
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun case VFE_OUTPUT_CONTINUOUS:
576*4882a593Smuzhiyun default:
577*4882a593Smuzhiyun vfe_buf_add_pending(output, new_buf);
578*4882a593Smuzhiyun break;
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun }
581*4882a593Smuzhiyun
vfe_get_output(struct vfe_line * line)582*4882a593Smuzhiyun static int vfe_get_output(struct vfe_line *line)
583*4882a593Smuzhiyun {
584*4882a593Smuzhiyun struct vfe_device *vfe = to_vfe(line);
585*4882a593Smuzhiyun struct vfe_output *output;
586*4882a593Smuzhiyun struct v4l2_format *f = &line->video_out.active_fmt;
587*4882a593Smuzhiyun unsigned long flags;
588*4882a593Smuzhiyun int i;
589*4882a593Smuzhiyun int wm_idx;
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun spin_lock_irqsave(&vfe->output_lock, flags);
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun output = &line->output;
594*4882a593Smuzhiyun if (output->state != VFE_OUTPUT_OFF) {
595*4882a593Smuzhiyun dev_err(vfe->camss->dev, "Output is running\n");
596*4882a593Smuzhiyun goto error;
597*4882a593Smuzhiyun }
598*4882a593Smuzhiyun output->state = VFE_OUTPUT_RESERVED;
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun output->active_buf = 0;
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun switch (f->fmt.pix_mp.pixelformat) {
603*4882a593Smuzhiyun case V4L2_PIX_FMT_NV12:
604*4882a593Smuzhiyun case V4L2_PIX_FMT_NV21:
605*4882a593Smuzhiyun case V4L2_PIX_FMT_NV16:
606*4882a593Smuzhiyun case V4L2_PIX_FMT_NV61:
607*4882a593Smuzhiyun output->wm_num = 2;
608*4882a593Smuzhiyun break;
609*4882a593Smuzhiyun default:
610*4882a593Smuzhiyun output->wm_num = 1;
611*4882a593Smuzhiyun break;
612*4882a593Smuzhiyun }
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun for (i = 0; i < output->wm_num; i++) {
615*4882a593Smuzhiyun wm_idx = vfe_reserve_wm(vfe, line->id);
616*4882a593Smuzhiyun if (wm_idx < 0) {
617*4882a593Smuzhiyun dev_err(vfe->camss->dev, "Can not reserve wm\n");
618*4882a593Smuzhiyun goto error_get_wm;
619*4882a593Smuzhiyun }
620*4882a593Smuzhiyun output->wm_idx[i] = wm_idx;
621*4882a593Smuzhiyun }
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun output->drop_update_idx = 0;
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun spin_unlock_irqrestore(&vfe->output_lock, flags);
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun return 0;
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun error_get_wm:
630*4882a593Smuzhiyun for (i--; i >= 0; i--)
631*4882a593Smuzhiyun vfe_release_wm(vfe, output->wm_idx[i]);
632*4882a593Smuzhiyun output->state = VFE_OUTPUT_OFF;
633*4882a593Smuzhiyun error:
634*4882a593Smuzhiyun spin_unlock_irqrestore(&vfe->output_lock, flags);
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun return -EINVAL;
637*4882a593Smuzhiyun }
638*4882a593Smuzhiyun
vfe_put_output(struct vfe_line * line)639*4882a593Smuzhiyun static int vfe_put_output(struct vfe_line *line)
640*4882a593Smuzhiyun {
641*4882a593Smuzhiyun struct vfe_device *vfe = to_vfe(line);
642*4882a593Smuzhiyun struct vfe_output *output = &line->output;
643*4882a593Smuzhiyun unsigned long flags;
644*4882a593Smuzhiyun unsigned int i;
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun spin_lock_irqsave(&vfe->output_lock, flags);
647*4882a593Smuzhiyun
648*4882a593Smuzhiyun for (i = 0; i < output->wm_num; i++)
649*4882a593Smuzhiyun vfe_release_wm(vfe, output->wm_idx[i]);
650*4882a593Smuzhiyun
651*4882a593Smuzhiyun output->state = VFE_OUTPUT_OFF;
652*4882a593Smuzhiyun
653*4882a593Smuzhiyun spin_unlock_irqrestore(&vfe->output_lock, flags);
654*4882a593Smuzhiyun return 0;
655*4882a593Smuzhiyun }
656*4882a593Smuzhiyun
vfe_enable_output(struct vfe_line * line)657*4882a593Smuzhiyun static int vfe_enable_output(struct vfe_line *line)
658*4882a593Smuzhiyun {
659*4882a593Smuzhiyun struct vfe_device *vfe = to_vfe(line);
660*4882a593Smuzhiyun struct vfe_output *output = &line->output;
661*4882a593Smuzhiyun const struct vfe_hw_ops *ops = vfe->ops;
662*4882a593Smuzhiyun struct media_entity *sensor;
663*4882a593Smuzhiyun unsigned long flags;
664*4882a593Smuzhiyun unsigned int frame_skip = 0;
665*4882a593Smuzhiyun unsigned int i;
666*4882a593Smuzhiyun u16 ub_size;
667*4882a593Smuzhiyun
668*4882a593Smuzhiyun ub_size = ops->get_ub_size(vfe->id);
669*4882a593Smuzhiyun if (!ub_size)
670*4882a593Smuzhiyun return -EINVAL;
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun sensor = camss_find_sensor(&line->subdev.entity);
673*4882a593Smuzhiyun if (sensor) {
674*4882a593Smuzhiyun struct v4l2_subdev *subdev =
675*4882a593Smuzhiyun media_entity_to_v4l2_subdev(sensor);
676*4882a593Smuzhiyun
677*4882a593Smuzhiyun v4l2_subdev_call(subdev, sensor, g_skip_frames, &frame_skip);
678*4882a593Smuzhiyun /* Max frame skip is 29 frames */
679*4882a593Smuzhiyun if (frame_skip > VFE_FRAME_DROP_VAL - 1)
680*4882a593Smuzhiyun frame_skip = VFE_FRAME_DROP_VAL - 1;
681*4882a593Smuzhiyun }
682*4882a593Smuzhiyun
683*4882a593Smuzhiyun spin_lock_irqsave(&vfe->output_lock, flags);
684*4882a593Smuzhiyun
685*4882a593Smuzhiyun ops->reg_update_clear(vfe, line->id);
686*4882a593Smuzhiyun
687*4882a593Smuzhiyun if (output->state != VFE_OUTPUT_RESERVED) {
688*4882a593Smuzhiyun dev_err(vfe->camss->dev, "Output is not in reserved state %d\n",
689*4882a593Smuzhiyun output->state);
690*4882a593Smuzhiyun spin_unlock_irqrestore(&vfe->output_lock, flags);
691*4882a593Smuzhiyun return -EINVAL;
692*4882a593Smuzhiyun }
693*4882a593Smuzhiyun output->state = VFE_OUTPUT_IDLE;
694*4882a593Smuzhiyun
695*4882a593Smuzhiyun output->buf[0] = vfe_buf_get_pending(output);
696*4882a593Smuzhiyun output->buf[1] = vfe_buf_get_pending(output);
697*4882a593Smuzhiyun
698*4882a593Smuzhiyun if (!output->buf[0] && output->buf[1]) {
699*4882a593Smuzhiyun output->buf[0] = output->buf[1];
700*4882a593Smuzhiyun output->buf[1] = NULL;
701*4882a593Smuzhiyun }
702*4882a593Smuzhiyun
703*4882a593Smuzhiyun if (output->buf[0])
704*4882a593Smuzhiyun output->state = VFE_OUTPUT_SINGLE;
705*4882a593Smuzhiyun
706*4882a593Smuzhiyun if (output->buf[1])
707*4882a593Smuzhiyun output->state = VFE_OUTPUT_CONTINUOUS;
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun switch (output->state) {
710*4882a593Smuzhiyun case VFE_OUTPUT_SINGLE:
711*4882a593Smuzhiyun vfe_output_frame_drop(vfe, output, 1 << frame_skip);
712*4882a593Smuzhiyun break;
713*4882a593Smuzhiyun case VFE_OUTPUT_CONTINUOUS:
714*4882a593Smuzhiyun vfe_output_frame_drop(vfe, output, 3 << frame_skip);
715*4882a593Smuzhiyun break;
716*4882a593Smuzhiyun default:
717*4882a593Smuzhiyun vfe_output_frame_drop(vfe, output, 0);
718*4882a593Smuzhiyun break;
719*4882a593Smuzhiyun }
720*4882a593Smuzhiyun
721*4882a593Smuzhiyun output->sequence = 0;
722*4882a593Smuzhiyun output->wait_sof = 0;
723*4882a593Smuzhiyun output->wait_reg_update = 0;
724*4882a593Smuzhiyun reinit_completion(&output->sof);
725*4882a593Smuzhiyun reinit_completion(&output->reg_update);
726*4882a593Smuzhiyun
727*4882a593Smuzhiyun vfe_output_init_addrs(vfe, output, 0);
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun if (line->id != VFE_LINE_PIX) {
730*4882a593Smuzhiyun ops->set_cgc_override(vfe, output->wm_idx[0], 1);
731*4882a593Smuzhiyun ops->enable_irq_wm_line(vfe, output->wm_idx[0], line->id, 1);
732*4882a593Smuzhiyun ops->bus_connect_wm_to_rdi(vfe, output->wm_idx[0], line->id);
733*4882a593Smuzhiyun ops->wm_set_subsample(vfe, output->wm_idx[0]);
734*4882a593Smuzhiyun ops->set_rdi_cid(vfe, line->id, 0);
735*4882a593Smuzhiyun ops->wm_set_ub_cfg(vfe, output->wm_idx[0],
736*4882a593Smuzhiyun (ub_size + 1) * output->wm_idx[0], ub_size);
737*4882a593Smuzhiyun ops->wm_frame_based(vfe, output->wm_idx[0], 1);
738*4882a593Smuzhiyun ops->wm_enable(vfe, output->wm_idx[0], 1);
739*4882a593Smuzhiyun ops->bus_reload_wm(vfe, output->wm_idx[0]);
740*4882a593Smuzhiyun } else {
741*4882a593Smuzhiyun ub_size /= output->wm_num;
742*4882a593Smuzhiyun for (i = 0; i < output->wm_num; i++) {
743*4882a593Smuzhiyun ops->set_cgc_override(vfe, output->wm_idx[i], 1);
744*4882a593Smuzhiyun ops->wm_set_subsample(vfe, output->wm_idx[i]);
745*4882a593Smuzhiyun ops->wm_set_ub_cfg(vfe, output->wm_idx[i],
746*4882a593Smuzhiyun (ub_size + 1) * output->wm_idx[i],
747*4882a593Smuzhiyun ub_size);
748*4882a593Smuzhiyun ops->wm_line_based(vfe, output->wm_idx[i],
749*4882a593Smuzhiyun &line->video_out.active_fmt.fmt.pix_mp,
750*4882a593Smuzhiyun i, 1);
751*4882a593Smuzhiyun ops->wm_enable(vfe, output->wm_idx[i], 1);
752*4882a593Smuzhiyun ops->bus_reload_wm(vfe, output->wm_idx[i]);
753*4882a593Smuzhiyun }
754*4882a593Smuzhiyun ops->enable_irq_pix_line(vfe, 0, line->id, 1);
755*4882a593Smuzhiyun ops->set_module_cfg(vfe, 1);
756*4882a593Smuzhiyun ops->set_camif_cfg(vfe, line);
757*4882a593Smuzhiyun ops->set_realign_cfg(vfe, line, 1);
758*4882a593Smuzhiyun ops->set_xbar_cfg(vfe, output, 1);
759*4882a593Smuzhiyun ops->set_demux_cfg(vfe, line);
760*4882a593Smuzhiyun ops->set_scale_cfg(vfe, line);
761*4882a593Smuzhiyun ops->set_crop_cfg(vfe, line);
762*4882a593Smuzhiyun ops->set_clamp_cfg(vfe);
763*4882a593Smuzhiyun ops->set_camif_cmd(vfe, 1);
764*4882a593Smuzhiyun }
765*4882a593Smuzhiyun
766*4882a593Smuzhiyun ops->reg_update(vfe, line->id);
767*4882a593Smuzhiyun
768*4882a593Smuzhiyun spin_unlock_irqrestore(&vfe->output_lock, flags);
769*4882a593Smuzhiyun
770*4882a593Smuzhiyun return 0;
771*4882a593Smuzhiyun }
772*4882a593Smuzhiyun
vfe_disable_output(struct vfe_line * line)773*4882a593Smuzhiyun static int vfe_disable_output(struct vfe_line *line)
774*4882a593Smuzhiyun {
775*4882a593Smuzhiyun struct vfe_device *vfe = to_vfe(line);
776*4882a593Smuzhiyun struct vfe_output *output = &line->output;
777*4882a593Smuzhiyun const struct vfe_hw_ops *ops = vfe->ops;
778*4882a593Smuzhiyun unsigned long flags;
779*4882a593Smuzhiyun unsigned long time;
780*4882a593Smuzhiyun unsigned int i;
781*4882a593Smuzhiyun
782*4882a593Smuzhiyun spin_lock_irqsave(&vfe->output_lock, flags);
783*4882a593Smuzhiyun
784*4882a593Smuzhiyun output->wait_sof = 1;
785*4882a593Smuzhiyun spin_unlock_irqrestore(&vfe->output_lock, flags);
786*4882a593Smuzhiyun
787*4882a593Smuzhiyun time = wait_for_completion_timeout(&output->sof,
788*4882a593Smuzhiyun msecs_to_jiffies(VFE_NEXT_SOF_MS));
789*4882a593Smuzhiyun if (!time)
790*4882a593Smuzhiyun dev_err(vfe->camss->dev, "VFE sof timeout\n");
791*4882a593Smuzhiyun
792*4882a593Smuzhiyun spin_lock_irqsave(&vfe->output_lock, flags);
793*4882a593Smuzhiyun for (i = 0; i < output->wm_num; i++)
794*4882a593Smuzhiyun ops->wm_enable(vfe, output->wm_idx[i], 0);
795*4882a593Smuzhiyun
796*4882a593Smuzhiyun ops->reg_update(vfe, line->id);
797*4882a593Smuzhiyun output->wait_reg_update = 1;
798*4882a593Smuzhiyun spin_unlock_irqrestore(&vfe->output_lock, flags);
799*4882a593Smuzhiyun
800*4882a593Smuzhiyun time = wait_for_completion_timeout(&output->reg_update,
801*4882a593Smuzhiyun msecs_to_jiffies(VFE_NEXT_SOF_MS));
802*4882a593Smuzhiyun if (!time)
803*4882a593Smuzhiyun dev_err(vfe->camss->dev, "VFE reg update timeout\n");
804*4882a593Smuzhiyun
805*4882a593Smuzhiyun spin_lock_irqsave(&vfe->output_lock, flags);
806*4882a593Smuzhiyun
807*4882a593Smuzhiyun if (line->id != VFE_LINE_PIX) {
808*4882a593Smuzhiyun ops->wm_frame_based(vfe, output->wm_idx[0], 0);
809*4882a593Smuzhiyun ops->bus_disconnect_wm_from_rdi(vfe, output->wm_idx[0],
810*4882a593Smuzhiyun line->id);
811*4882a593Smuzhiyun ops->enable_irq_wm_line(vfe, output->wm_idx[0], line->id, 0);
812*4882a593Smuzhiyun ops->set_cgc_override(vfe, output->wm_idx[0], 0);
813*4882a593Smuzhiyun spin_unlock_irqrestore(&vfe->output_lock, flags);
814*4882a593Smuzhiyun } else {
815*4882a593Smuzhiyun for (i = 0; i < output->wm_num; i++) {
816*4882a593Smuzhiyun ops->wm_line_based(vfe, output->wm_idx[i], NULL, i, 0);
817*4882a593Smuzhiyun ops->set_cgc_override(vfe, output->wm_idx[i], 0);
818*4882a593Smuzhiyun }
819*4882a593Smuzhiyun
820*4882a593Smuzhiyun ops->enable_irq_pix_line(vfe, 0, line->id, 0);
821*4882a593Smuzhiyun ops->set_module_cfg(vfe, 0);
822*4882a593Smuzhiyun ops->set_realign_cfg(vfe, line, 0);
823*4882a593Smuzhiyun ops->set_xbar_cfg(vfe, output, 0);
824*4882a593Smuzhiyun
825*4882a593Smuzhiyun ops->set_camif_cmd(vfe, 0);
826*4882a593Smuzhiyun spin_unlock_irqrestore(&vfe->output_lock, flags);
827*4882a593Smuzhiyun
828*4882a593Smuzhiyun ops->camif_wait_for_stop(vfe, vfe->camss->dev);
829*4882a593Smuzhiyun }
830*4882a593Smuzhiyun
831*4882a593Smuzhiyun return 0;
832*4882a593Smuzhiyun }
833*4882a593Smuzhiyun
834*4882a593Smuzhiyun /*
835*4882a593Smuzhiyun * vfe_enable - Enable streaming on VFE line
836*4882a593Smuzhiyun * @line: VFE line
837*4882a593Smuzhiyun *
838*4882a593Smuzhiyun * Return 0 on success or a negative error code otherwise
839*4882a593Smuzhiyun */
vfe_enable(struct vfe_line * line)840*4882a593Smuzhiyun static int vfe_enable(struct vfe_line *line)
841*4882a593Smuzhiyun {
842*4882a593Smuzhiyun struct vfe_device *vfe = to_vfe(line);
843*4882a593Smuzhiyun int ret;
844*4882a593Smuzhiyun
845*4882a593Smuzhiyun mutex_lock(&vfe->stream_lock);
846*4882a593Smuzhiyun
847*4882a593Smuzhiyun if (!vfe->stream_count) {
848*4882a593Smuzhiyun vfe->ops->enable_irq_common(vfe);
849*4882a593Smuzhiyun
850*4882a593Smuzhiyun vfe->ops->bus_enable_wr_if(vfe, 1);
851*4882a593Smuzhiyun
852*4882a593Smuzhiyun vfe->ops->set_qos(vfe);
853*4882a593Smuzhiyun
854*4882a593Smuzhiyun vfe->ops->set_ds(vfe);
855*4882a593Smuzhiyun }
856*4882a593Smuzhiyun
857*4882a593Smuzhiyun vfe->stream_count++;
858*4882a593Smuzhiyun
859*4882a593Smuzhiyun mutex_unlock(&vfe->stream_lock);
860*4882a593Smuzhiyun
861*4882a593Smuzhiyun ret = vfe_get_output(line);
862*4882a593Smuzhiyun if (ret < 0)
863*4882a593Smuzhiyun goto error_get_output;
864*4882a593Smuzhiyun
865*4882a593Smuzhiyun ret = vfe_enable_output(line);
866*4882a593Smuzhiyun if (ret < 0)
867*4882a593Smuzhiyun goto error_enable_output;
868*4882a593Smuzhiyun
869*4882a593Smuzhiyun vfe->was_streaming = 1;
870*4882a593Smuzhiyun
871*4882a593Smuzhiyun return 0;
872*4882a593Smuzhiyun
873*4882a593Smuzhiyun
874*4882a593Smuzhiyun error_enable_output:
875*4882a593Smuzhiyun vfe_put_output(line);
876*4882a593Smuzhiyun
877*4882a593Smuzhiyun error_get_output:
878*4882a593Smuzhiyun mutex_lock(&vfe->stream_lock);
879*4882a593Smuzhiyun
880*4882a593Smuzhiyun if (vfe->stream_count == 1)
881*4882a593Smuzhiyun vfe->ops->bus_enable_wr_if(vfe, 0);
882*4882a593Smuzhiyun
883*4882a593Smuzhiyun vfe->stream_count--;
884*4882a593Smuzhiyun
885*4882a593Smuzhiyun mutex_unlock(&vfe->stream_lock);
886*4882a593Smuzhiyun
887*4882a593Smuzhiyun return ret;
888*4882a593Smuzhiyun }
889*4882a593Smuzhiyun
890*4882a593Smuzhiyun /*
891*4882a593Smuzhiyun * vfe_disable - Disable streaming on VFE line
892*4882a593Smuzhiyun * @line: VFE line
893*4882a593Smuzhiyun *
894*4882a593Smuzhiyun * Return 0 on success or a negative error code otherwise
895*4882a593Smuzhiyun */
vfe_disable(struct vfe_line * line)896*4882a593Smuzhiyun static int vfe_disable(struct vfe_line *line)
897*4882a593Smuzhiyun {
898*4882a593Smuzhiyun struct vfe_device *vfe = to_vfe(line);
899*4882a593Smuzhiyun
900*4882a593Smuzhiyun vfe_disable_output(line);
901*4882a593Smuzhiyun
902*4882a593Smuzhiyun vfe_put_output(line);
903*4882a593Smuzhiyun
904*4882a593Smuzhiyun mutex_lock(&vfe->stream_lock);
905*4882a593Smuzhiyun
906*4882a593Smuzhiyun if (vfe->stream_count == 1)
907*4882a593Smuzhiyun vfe->ops->bus_enable_wr_if(vfe, 0);
908*4882a593Smuzhiyun
909*4882a593Smuzhiyun vfe->stream_count--;
910*4882a593Smuzhiyun
911*4882a593Smuzhiyun mutex_unlock(&vfe->stream_lock);
912*4882a593Smuzhiyun
913*4882a593Smuzhiyun return 0;
914*4882a593Smuzhiyun }
915*4882a593Smuzhiyun
916*4882a593Smuzhiyun /*
917*4882a593Smuzhiyun * vfe_isr_sof - Process start of frame interrupt
918*4882a593Smuzhiyun * @vfe: VFE Device
919*4882a593Smuzhiyun * @line_id: VFE line
920*4882a593Smuzhiyun */
vfe_isr_sof(struct vfe_device * vfe,enum vfe_line_id line_id)921*4882a593Smuzhiyun static void vfe_isr_sof(struct vfe_device *vfe, enum vfe_line_id line_id)
922*4882a593Smuzhiyun {
923*4882a593Smuzhiyun struct vfe_output *output;
924*4882a593Smuzhiyun unsigned long flags;
925*4882a593Smuzhiyun
926*4882a593Smuzhiyun spin_lock_irqsave(&vfe->output_lock, flags);
927*4882a593Smuzhiyun output = &vfe->line[line_id].output;
928*4882a593Smuzhiyun if (output->wait_sof) {
929*4882a593Smuzhiyun output->wait_sof = 0;
930*4882a593Smuzhiyun complete(&output->sof);
931*4882a593Smuzhiyun }
932*4882a593Smuzhiyun spin_unlock_irqrestore(&vfe->output_lock, flags);
933*4882a593Smuzhiyun }
934*4882a593Smuzhiyun
935*4882a593Smuzhiyun /*
936*4882a593Smuzhiyun * vfe_isr_reg_update - Process reg update interrupt
937*4882a593Smuzhiyun * @vfe: VFE Device
938*4882a593Smuzhiyun * @line_id: VFE line
939*4882a593Smuzhiyun */
vfe_isr_reg_update(struct vfe_device * vfe,enum vfe_line_id line_id)940*4882a593Smuzhiyun static void vfe_isr_reg_update(struct vfe_device *vfe, enum vfe_line_id line_id)
941*4882a593Smuzhiyun {
942*4882a593Smuzhiyun struct vfe_output *output;
943*4882a593Smuzhiyun unsigned long flags;
944*4882a593Smuzhiyun
945*4882a593Smuzhiyun spin_lock_irqsave(&vfe->output_lock, flags);
946*4882a593Smuzhiyun vfe->ops->reg_update_clear(vfe, line_id);
947*4882a593Smuzhiyun
948*4882a593Smuzhiyun output = &vfe->line[line_id].output;
949*4882a593Smuzhiyun
950*4882a593Smuzhiyun if (output->wait_reg_update) {
951*4882a593Smuzhiyun output->wait_reg_update = 0;
952*4882a593Smuzhiyun complete(&output->reg_update);
953*4882a593Smuzhiyun spin_unlock_irqrestore(&vfe->output_lock, flags);
954*4882a593Smuzhiyun return;
955*4882a593Smuzhiyun }
956*4882a593Smuzhiyun
957*4882a593Smuzhiyun if (output->state == VFE_OUTPUT_STOPPING) {
958*4882a593Smuzhiyun /* Release last buffer when hw is idle */
959*4882a593Smuzhiyun if (output->last_buffer) {
960*4882a593Smuzhiyun vb2_buffer_done(&output->last_buffer->vb.vb2_buf,
961*4882a593Smuzhiyun VB2_BUF_STATE_DONE);
962*4882a593Smuzhiyun output->last_buffer = NULL;
963*4882a593Smuzhiyun }
964*4882a593Smuzhiyun output->state = VFE_OUTPUT_IDLE;
965*4882a593Smuzhiyun
966*4882a593Smuzhiyun /* Buffers received in stopping state are queued in */
967*4882a593Smuzhiyun /* dma pending queue, start next capture here */
968*4882a593Smuzhiyun
969*4882a593Smuzhiyun output->buf[0] = vfe_buf_get_pending(output);
970*4882a593Smuzhiyun output->buf[1] = vfe_buf_get_pending(output);
971*4882a593Smuzhiyun
972*4882a593Smuzhiyun if (!output->buf[0] && output->buf[1]) {
973*4882a593Smuzhiyun output->buf[0] = output->buf[1];
974*4882a593Smuzhiyun output->buf[1] = NULL;
975*4882a593Smuzhiyun }
976*4882a593Smuzhiyun
977*4882a593Smuzhiyun if (output->buf[0])
978*4882a593Smuzhiyun output->state = VFE_OUTPUT_SINGLE;
979*4882a593Smuzhiyun
980*4882a593Smuzhiyun if (output->buf[1])
981*4882a593Smuzhiyun output->state = VFE_OUTPUT_CONTINUOUS;
982*4882a593Smuzhiyun
983*4882a593Smuzhiyun switch (output->state) {
984*4882a593Smuzhiyun case VFE_OUTPUT_SINGLE:
985*4882a593Smuzhiyun vfe_output_frame_drop(vfe, output, 2);
986*4882a593Smuzhiyun break;
987*4882a593Smuzhiyun case VFE_OUTPUT_CONTINUOUS:
988*4882a593Smuzhiyun vfe_output_frame_drop(vfe, output, 3);
989*4882a593Smuzhiyun break;
990*4882a593Smuzhiyun default:
991*4882a593Smuzhiyun vfe_output_frame_drop(vfe, output, 0);
992*4882a593Smuzhiyun break;
993*4882a593Smuzhiyun }
994*4882a593Smuzhiyun
995*4882a593Smuzhiyun vfe_output_init_addrs(vfe, output, 1);
996*4882a593Smuzhiyun }
997*4882a593Smuzhiyun
998*4882a593Smuzhiyun spin_unlock_irqrestore(&vfe->output_lock, flags);
999*4882a593Smuzhiyun }
1000*4882a593Smuzhiyun
1001*4882a593Smuzhiyun /*
1002*4882a593Smuzhiyun * vfe_isr_wm_done - Process write master done interrupt
1003*4882a593Smuzhiyun * @vfe: VFE Device
1004*4882a593Smuzhiyun * @wm: Write master id
1005*4882a593Smuzhiyun */
vfe_isr_wm_done(struct vfe_device * vfe,u8 wm)1006*4882a593Smuzhiyun static void vfe_isr_wm_done(struct vfe_device *vfe, u8 wm)
1007*4882a593Smuzhiyun {
1008*4882a593Smuzhiyun struct camss_buffer *ready_buf;
1009*4882a593Smuzhiyun struct vfe_output *output;
1010*4882a593Smuzhiyun dma_addr_t *new_addr;
1011*4882a593Smuzhiyun unsigned long flags;
1012*4882a593Smuzhiyun u32 active_index;
1013*4882a593Smuzhiyun u64 ts = ktime_get_ns();
1014*4882a593Smuzhiyun unsigned int i;
1015*4882a593Smuzhiyun
1016*4882a593Smuzhiyun active_index = vfe->ops->wm_get_ping_pong_status(vfe, wm);
1017*4882a593Smuzhiyun
1018*4882a593Smuzhiyun spin_lock_irqsave(&vfe->output_lock, flags);
1019*4882a593Smuzhiyun
1020*4882a593Smuzhiyun if (vfe->wm_output_map[wm] == VFE_LINE_NONE) {
1021*4882a593Smuzhiyun dev_err_ratelimited(vfe->camss->dev,
1022*4882a593Smuzhiyun "Received wm done for unmapped index\n");
1023*4882a593Smuzhiyun goto out_unlock;
1024*4882a593Smuzhiyun }
1025*4882a593Smuzhiyun output = &vfe->line[vfe->wm_output_map[wm]].output;
1026*4882a593Smuzhiyun
1027*4882a593Smuzhiyun if (output->active_buf == active_index) {
1028*4882a593Smuzhiyun dev_err_ratelimited(vfe->camss->dev,
1029*4882a593Smuzhiyun "Active buffer mismatch!\n");
1030*4882a593Smuzhiyun goto out_unlock;
1031*4882a593Smuzhiyun }
1032*4882a593Smuzhiyun output->active_buf = active_index;
1033*4882a593Smuzhiyun
1034*4882a593Smuzhiyun ready_buf = output->buf[!active_index];
1035*4882a593Smuzhiyun if (!ready_buf) {
1036*4882a593Smuzhiyun dev_err_ratelimited(vfe->camss->dev,
1037*4882a593Smuzhiyun "Missing ready buf %d %d!\n",
1038*4882a593Smuzhiyun !active_index, output->state);
1039*4882a593Smuzhiyun goto out_unlock;
1040*4882a593Smuzhiyun }
1041*4882a593Smuzhiyun
1042*4882a593Smuzhiyun ready_buf->vb.vb2_buf.timestamp = ts;
1043*4882a593Smuzhiyun ready_buf->vb.sequence = output->sequence++;
1044*4882a593Smuzhiyun
1045*4882a593Smuzhiyun /* Get next buffer */
1046*4882a593Smuzhiyun output->buf[!active_index] = vfe_buf_get_pending(output);
1047*4882a593Smuzhiyun if (!output->buf[!active_index]) {
1048*4882a593Smuzhiyun /* No next buffer - set same address */
1049*4882a593Smuzhiyun new_addr = ready_buf->addr;
1050*4882a593Smuzhiyun vfe_buf_update_wm_on_last(vfe, output);
1051*4882a593Smuzhiyun } else {
1052*4882a593Smuzhiyun new_addr = output->buf[!active_index]->addr;
1053*4882a593Smuzhiyun vfe_buf_update_wm_on_next(vfe, output);
1054*4882a593Smuzhiyun }
1055*4882a593Smuzhiyun
1056*4882a593Smuzhiyun if (active_index)
1057*4882a593Smuzhiyun for (i = 0; i < output->wm_num; i++)
1058*4882a593Smuzhiyun vfe->ops->wm_set_ping_addr(vfe, output->wm_idx[i],
1059*4882a593Smuzhiyun new_addr[i]);
1060*4882a593Smuzhiyun else
1061*4882a593Smuzhiyun for (i = 0; i < output->wm_num; i++)
1062*4882a593Smuzhiyun vfe->ops->wm_set_pong_addr(vfe, output->wm_idx[i],
1063*4882a593Smuzhiyun new_addr[i]);
1064*4882a593Smuzhiyun
1065*4882a593Smuzhiyun spin_unlock_irqrestore(&vfe->output_lock, flags);
1066*4882a593Smuzhiyun
1067*4882a593Smuzhiyun if (output->state == VFE_OUTPUT_STOPPING)
1068*4882a593Smuzhiyun output->last_buffer = ready_buf;
1069*4882a593Smuzhiyun else
1070*4882a593Smuzhiyun vb2_buffer_done(&ready_buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
1071*4882a593Smuzhiyun
1072*4882a593Smuzhiyun return;
1073*4882a593Smuzhiyun
1074*4882a593Smuzhiyun out_unlock:
1075*4882a593Smuzhiyun spin_unlock_irqrestore(&vfe->output_lock, flags);
1076*4882a593Smuzhiyun }
1077*4882a593Smuzhiyun
1078*4882a593Smuzhiyun /*
1079*4882a593Smuzhiyun * vfe_isr_wm_done - Process composite image done interrupt
1080*4882a593Smuzhiyun * @vfe: VFE Device
1081*4882a593Smuzhiyun * @comp: Composite image id
1082*4882a593Smuzhiyun */
vfe_isr_comp_done(struct vfe_device * vfe,u8 comp)1083*4882a593Smuzhiyun static void vfe_isr_comp_done(struct vfe_device *vfe, u8 comp)
1084*4882a593Smuzhiyun {
1085*4882a593Smuzhiyun unsigned int i;
1086*4882a593Smuzhiyun
1087*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(vfe->wm_output_map); i++)
1088*4882a593Smuzhiyun if (vfe->wm_output_map[i] == VFE_LINE_PIX) {
1089*4882a593Smuzhiyun vfe_isr_wm_done(vfe, i);
1090*4882a593Smuzhiyun break;
1091*4882a593Smuzhiyun }
1092*4882a593Smuzhiyun }
1093*4882a593Smuzhiyun
vfe_isr_reset_ack(struct vfe_device * vfe)1094*4882a593Smuzhiyun static inline void vfe_isr_reset_ack(struct vfe_device *vfe)
1095*4882a593Smuzhiyun {
1096*4882a593Smuzhiyun complete(&vfe->reset_complete);
1097*4882a593Smuzhiyun }
1098*4882a593Smuzhiyun
vfe_isr_halt_ack(struct vfe_device * vfe)1099*4882a593Smuzhiyun static inline void vfe_isr_halt_ack(struct vfe_device *vfe)
1100*4882a593Smuzhiyun {
1101*4882a593Smuzhiyun complete(&vfe->halt_complete);
1102*4882a593Smuzhiyun vfe->ops->halt_clear(vfe);
1103*4882a593Smuzhiyun }
1104*4882a593Smuzhiyun
1105*4882a593Smuzhiyun /*
1106*4882a593Smuzhiyun * vfe_set_clock_rates - Calculate and set clock rates on VFE module
1107*4882a593Smuzhiyun * @vfe: VFE device
1108*4882a593Smuzhiyun *
1109*4882a593Smuzhiyun * Return 0 on success or a negative error code otherwise
1110*4882a593Smuzhiyun */
vfe_set_clock_rates(struct vfe_device * vfe)1111*4882a593Smuzhiyun static int vfe_set_clock_rates(struct vfe_device *vfe)
1112*4882a593Smuzhiyun {
1113*4882a593Smuzhiyun struct device *dev = vfe->camss->dev;
1114*4882a593Smuzhiyun u32 pixel_clock[MSM_VFE_LINE_NUM];
1115*4882a593Smuzhiyun int i, j;
1116*4882a593Smuzhiyun int ret;
1117*4882a593Smuzhiyun
1118*4882a593Smuzhiyun for (i = VFE_LINE_RDI0; i <= VFE_LINE_PIX; i++) {
1119*4882a593Smuzhiyun ret = camss_get_pixel_clock(&vfe->line[i].subdev.entity,
1120*4882a593Smuzhiyun &pixel_clock[i]);
1121*4882a593Smuzhiyun if (ret)
1122*4882a593Smuzhiyun pixel_clock[i] = 0;
1123*4882a593Smuzhiyun }
1124*4882a593Smuzhiyun
1125*4882a593Smuzhiyun for (i = 0; i < vfe->nclocks; i++) {
1126*4882a593Smuzhiyun struct camss_clock *clock = &vfe->clock[i];
1127*4882a593Smuzhiyun
1128*4882a593Smuzhiyun if (!strcmp(clock->name, "vfe0") ||
1129*4882a593Smuzhiyun !strcmp(clock->name, "vfe1")) {
1130*4882a593Smuzhiyun u64 min_rate = 0;
1131*4882a593Smuzhiyun long rate;
1132*4882a593Smuzhiyun
1133*4882a593Smuzhiyun for (j = VFE_LINE_RDI0; j <= VFE_LINE_PIX; j++) {
1134*4882a593Smuzhiyun u32 tmp;
1135*4882a593Smuzhiyun u8 bpp;
1136*4882a593Smuzhiyun
1137*4882a593Smuzhiyun if (j == VFE_LINE_PIX) {
1138*4882a593Smuzhiyun tmp = pixel_clock[j];
1139*4882a593Smuzhiyun } else {
1140*4882a593Smuzhiyun struct vfe_line *l = &vfe->line[j];
1141*4882a593Smuzhiyun
1142*4882a593Smuzhiyun bpp = vfe_get_bpp(l->formats,
1143*4882a593Smuzhiyun l->nformats,
1144*4882a593Smuzhiyun l->fmt[MSM_VFE_PAD_SINK].code);
1145*4882a593Smuzhiyun tmp = pixel_clock[j] * bpp / 64;
1146*4882a593Smuzhiyun }
1147*4882a593Smuzhiyun
1148*4882a593Smuzhiyun if (min_rate < tmp)
1149*4882a593Smuzhiyun min_rate = tmp;
1150*4882a593Smuzhiyun }
1151*4882a593Smuzhiyun
1152*4882a593Smuzhiyun camss_add_clock_margin(&min_rate);
1153*4882a593Smuzhiyun
1154*4882a593Smuzhiyun for (j = 0; j < clock->nfreqs; j++)
1155*4882a593Smuzhiyun if (min_rate < clock->freq[j])
1156*4882a593Smuzhiyun break;
1157*4882a593Smuzhiyun
1158*4882a593Smuzhiyun if (j == clock->nfreqs) {
1159*4882a593Smuzhiyun dev_err(dev,
1160*4882a593Smuzhiyun "Pixel clock is too high for VFE");
1161*4882a593Smuzhiyun return -EINVAL;
1162*4882a593Smuzhiyun }
1163*4882a593Smuzhiyun
1164*4882a593Smuzhiyun /* if sensor pixel clock is not available */
1165*4882a593Smuzhiyun /* set highest possible VFE clock rate */
1166*4882a593Smuzhiyun if (min_rate == 0)
1167*4882a593Smuzhiyun j = clock->nfreqs - 1;
1168*4882a593Smuzhiyun
1169*4882a593Smuzhiyun rate = clk_round_rate(clock->clk, clock->freq[j]);
1170*4882a593Smuzhiyun if (rate < 0) {
1171*4882a593Smuzhiyun dev_err(dev, "clk round rate failed: %ld\n",
1172*4882a593Smuzhiyun rate);
1173*4882a593Smuzhiyun return -EINVAL;
1174*4882a593Smuzhiyun }
1175*4882a593Smuzhiyun
1176*4882a593Smuzhiyun ret = clk_set_rate(clock->clk, rate);
1177*4882a593Smuzhiyun if (ret < 0) {
1178*4882a593Smuzhiyun dev_err(dev, "clk set rate failed: %d\n", ret);
1179*4882a593Smuzhiyun return ret;
1180*4882a593Smuzhiyun }
1181*4882a593Smuzhiyun }
1182*4882a593Smuzhiyun }
1183*4882a593Smuzhiyun
1184*4882a593Smuzhiyun return 0;
1185*4882a593Smuzhiyun }
1186*4882a593Smuzhiyun
1187*4882a593Smuzhiyun /*
1188*4882a593Smuzhiyun * vfe_check_clock_rates - Check current clock rates on VFE module
1189*4882a593Smuzhiyun * @vfe: VFE device
1190*4882a593Smuzhiyun *
1191*4882a593Smuzhiyun * Return 0 if current clock rates are suitable for a new pipeline
1192*4882a593Smuzhiyun * or a negative error code otherwise
1193*4882a593Smuzhiyun */
vfe_check_clock_rates(struct vfe_device * vfe)1194*4882a593Smuzhiyun static int vfe_check_clock_rates(struct vfe_device *vfe)
1195*4882a593Smuzhiyun {
1196*4882a593Smuzhiyun u32 pixel_clock[MSM_VFE_LINE_NUM];
1197*4882a593Smuzhiyun int i, j;
1198*4882a593Smuzhiyun int ret;
1199*4882a593Smuzhiyun
1200*4882a593Smuzhiyun for (i = VFE_LINE_RDI0; i <= VFE_LINE_PIX; i++) {
1201*4882a593Smuzhiyun ret = camss_get_pixel_clock(&vfe->line[i].subdev.entity,
1202*4882a593Smuzhiyun &pixel_clock[i]);
1203*4882a593Smuzhiyun if (ret)
1204*4882a593Smuzhiyun pixel_clock[i] = 0;
1205*4882a593Smuzhiyun }
1206*4882a593Smuzhiyun
1207*4882a593Smuzhiyun for (i = 0; i < vfe->nclocks; i++) {
1208*4882a593Smuzhiyun struct camss_clock *clock = &vfe->clock[i];
1209*4882a593Smuzhiyun
1210*4882a593Smuzhiyun if (!strcmp(clock->name, "vfe0") ||
1211*4882a593Smuzhiyun !strcmp(clock->name, "vfe1")) {
1212*4882a593Smuzhiyun u64 min_rate = 0;
1213*4882a593Smuzhiyun unsigned long rate;
1214*4882a593Smuzhiyun
1215*4882a593Smuzhiyun for (j = VFE_LINE_RDI0; j <= VFE_LINE_PIX; j++) {
1216*4882a593Smuzhiyun u32 tmp;
1217*4882a593Smuzhiyun u8 bpp;
1218*4882a593Smuzhiyun
1219*4882a593Smuzhiyun if (j == VFE_LINE_PIX) {
1220*4882a593Smuzhiyun tmp = pixel_clock[j];
1221*4882a593Smuzhiyun } else {
1222*4882a593Smuzhiyun struct vfe_line *l = &vfe->line[j];
1223*4882a593Smuzhiyun
1224*4882a593Smuzhiyun bpp = vfe_get_bpp(l->formats,
1225*4882a593Smuzhiyun l->nformats,
1226*4882a593Smuzhiyun l->fmt[MSM_VFE_PAD_SINK].code);
1227*4882a593Smuzhiyun tmp = pixel_clock[j] * bpp / 64;
1228*4882a593Smuzhiyun }
1229*4882a593Smuzhiyun
1230*4882a593Smuzhiyun if (min_rate < tmp)
1231*4882a593Smuzhiyun min_rate = tmp;
1232*4882a593Smuzhiyun }
1233*4882a593Smuzhiyun
1234*4882a593Smuzhiyun camss_add_clock_margin(&min_rate);
1235*4882a593Smuzhiyun
1236*4882a593Smuzhiyun rate = clk_get_rate(clock->clk);
1237*4882a593Smuzhiyun if (rate < min_rate)
1238*4882a593Smuzhiyun return -EBUSY;
1239*4882a593Smuzhiyun }
1240*4882a593Smuzhiyun }
1241*4882a593Smuzhiyun
1242*4882a593Smuzhiyun return 0;
1243*4882a593Smuzhiyun }
1244*4882a593Smuzhiyun
1245*4882a593Smuzhiyun /*
1246*4882a593Smuzhiyun * vfe_get - Power up and reset VFE module
1247*4882a593Smuzhiyun * @vfe: VFE Device
1248*4882a593Smuzhiyun *
1249*4882a593Smuzhiyun * Return 0 on success or a negative error code otherwise
1250*4882a593Smuzhiyun */
vfe_get(struct vfe_device * vfe)1251*4882a593Smuzhiyun static int vfe_get(struct vfe_device *vfe)
1252*4882a593Smuzhiyun {
1253*4882a593Smuzhiyun int ret;
1254*4882a593Smuzhiyun
1255*4882a593Smuzhiyun mutex_lock(&vfe->power_lock);
1256*4882a593Smuzhiyun
1257*4882a593Smuzhiyun if (vfe->power_count == 0) {
1258*4882a593Smuzhiyun ret = camss_pm_domain_on(vfe->camss, vfe->id);
1259*4882a593Smuzhiyun if (ret < 0)
1260*4882a593Smuzhiyun goto error_pm_domain;
1261*4882a593Smuzhiyun
1262*4882a593Smuzhiyun ret = pm_runtime_get_sync(vfe->camss->dev);
1263*4882a593Smuzhiyun if (ret < 0)
1264*4882a593Smuzhiyun goto error_pm_runtime_get;
1265*4882a593Smuzhiyun
1266*4882a593Smuzhiyun ret = vfe_set_clock_rates(vfe);
1267*4882a593Smuzhiyun if (ret < 0)
1268*4882a593Smuzhiyun goto error_pm_runtime_get;
1269*4882a593Smuzhiyun
1270*4882a593Smuzhiyun ret = camss_enable_clocks(vfe->nclocks, vfe->clock,
1271*4882a593Smuzhiyun vfe->camss->dev);
1272*4882a593Smuzhiyun if (ret < 0)
1273*4882a593Smuzhiyun goto error_pm_runtime_get;
1274*4882a593Smuzhiyun
1275*4882a593Smuzhiyun ret = vfe_reset(vfe);
1276*4882a593Smuzhiyun if (ret < 0)
1277*4882a593Smuzhiyun goto error_reset;
1278*4882a593Smuzhiyun
1279*4882a593Smuzhiyun vfe_reset_output_maps(vfe);
1280*4882a593Smuzhiyun
1281*4882a593Smuzhiyun vfe_init_outputs(vfe);
1282*4882a593Smuzhiyun } else {
1283*4882a593Smuzhiyun ret = vfe_check_clock_rates(vfe);
1284*4882a593Smuzhiyun if (ret < 0)
1285*4882a593Smuzhiyun goto error_pm_runtime_get;
1286*4882a593Smuzhiyun }
1287*4882a593Smuzhiyun vfe->power_count++;
1288*4882a593Smuzhiyun
1289*4882a593Smuzhiyun mutex_unlock(&vfe->power_lock);
1290*4882a593Smuzhiyun
1291*4882a593Smuzhiyun return 0;
1292*4882a593Smuzhiyun
1293*4882a593Smuzhiyun error_reset:
1294*4882a593Smuzhiyun camss_disable_clocks(vfe->nclocks, vfe->clock);
1295*4882a593Smuzhiyun
1296*4882a593Smuzhiyun error_pm_runtime_get:
1297*4882a593Smuzhiyun pm_runtime_put_sync(vfe->camss->dev);
1298*4882a593Smuzhiyun camss_pm_domain_off(vfe->camss, vfe->id);
1299*4882a593Smuzhiyun
1300*4882a593Smuzhiyun error_pm_domain:
1301*4882a593Smuzhiyun mutex_unlock(&vfe->power_lock);
1302*4882a593Smuzhiyun
1303*4882a593Smuzhiyun return ret;
1304*4882a593Smuzhiyun }
1305*4882a593Smuzhiyun
1306*4882a593Smuzhiyun /*
1307*4882a593Smuzhiyun * vfe_put - Power down VFE module
1308*4882a593Smuzhiyun * @vfe: VFE Device
1309*4882a593Smuzhiyun */
vfe_put(struct vfe_device * vfe)1310*4882a593Smuzhiyun static void vfe_put(struct vfe_device *vfe)
1311*4882a593Smuzhiyun {
1312*4882a593Smuzhiyun mutex_lock(&vfe->power_lock);
1313*4882a593Smuzhiyun
1314*4882a593Smuzhiyun if (vfe->power_count == 0) {
1315*4882a593Smuzhiyun dev_err(vfe->camss->dev, "vfe power off on power_count == 0\n");
1316*4882a593Smuzhiyun goto exit;
1317*4882a593Smuzhiyun } else if (vfe->power_count == 1) {
1318*4882a593Smuzhiyun if (vfe->was_streaming) {
1319*4882a593Smuzhiyun vfe->was_streaming = 0;
1320*4882a593Smuzhiyun vfe_halt(vfe);
1321*4882a593Smuzhiyun }
1322*4882a593Smuzhiyun camss_disable_clocks(vfe->nclocks, vfe->clock);
1323*4882a593Smuzhiyun pm_runtime_put_sync(vfe->camss->dev);
1324*4882a593Smuzhiyun camss_pm_domain_off(vfe->camss, vfe->id);
1325*4882a593Smuzhiyun }
1326*4882a593Smuzhiyun
1327*4882a593Smuzhiyun vfe->power_count--;
1328*4882a593Smuzhiyun
1329*4882a593Smuzhiyun exit:
1330*4882a593Smuzhiyun mutex_unlock(&vfe->power_lock);
1331*4882a593Smuzhiyun }
1332*4882a593Smuzhiyun
1333*4882a593Smuzhiyun /*
1334*4882a593Smuzhiyun * vfe_queue_buffer - Add empty buffer
1335*4882a593Smuzhiyun * @vid: Video device structure
1336*4882a593Smuzhiyun * @buf: Buffer to be enqueued
1337*4882a593Smuzhiyun *
1338*4882a593Smuzhiyun * Add an empty buffer - depending on the current number of buffers it will be
1339*4882a593Smuzhiyun * put in pending buffer queue or directly given to the hardware to be filled.
1340*4882a593Smuzhiyun *
1341*4882a593Smuzhiyun * Return 0 on success or a negative error code otherwise
1342*4882a593Smuzhiyun */
vfe_queue_buffer(struct camss_video * vid,struct camss_buffer * buf)1343*4882a593Smuzhiyun static int vfe_queue_buffer(struct camss_video *vid,
1344*4882a593Smuzhiyun struct camss_buffer *buf)
1345*4882a593Smuzhiyun {
1346*4882a593Smuzhiyun struct vfe_line *line = container_of(vid, struct vfe_line, video_out);
1347*4882a593Smuzhiyun struct vfe_device *vfe = to_vfe(line);
1348*4882a593Smuzhiyun struct vfe_output *output;
1349*4882a593Smuzhiyun unsigned long flags;
1350*4882a593Smuzhiyun
1351*4882a593Smuzhiyun output = &line->output;
1352*4882a593Smuzhiyun
1353*4882a593Smuzhiyun spin_lock_irqsave(&vfe->output_lock, flags);
1354*4882a593Smuzhiyun
1355*4882a593Smuzhiyun vfe_buf_update_wm_on_new(vfe, output, buf);
1356*4882a593Smuzhiyun
1357*4882a593Smuzhiyun spin_unlock_irqrestore(&vfe->output_lock, flags);
1358*4882a593Smuzhiyun
1359*4882a593Smuzhiyun return 0;
1360*4882a593Smuzhiyun }
1361*4882a593Smuzhiyun
1362*4882a593Smuzhiyun /*
1363*4882a593Smuzhiyun * vfe_flush_buffers - Return all vb2 buffers
1364*4882a593Smuzhiyun * @vid: Video device structure
1365*4882a593Smuzhiyun * @state: vb2 buffer state of the returned buffers
1366*4882a593Smuzhiyun *
1367*4882a593Smuzhiyun * Return all buffers to vb2. This includes queued pending buffers (still
1368*4882a593Smuzhiyun * unused) and any buffers given to the hardware but again still not used.
1369*4882a593Smuzhiyun *
1370*4882a593Smuzhiyun * Return 0 on success or a negative error code otherwise
1371*4882a593Smuzhiyun */
vfe_flush_buffers(struct camss_video * vid,enum vb2_buffer_state state)1372*4882a593Smuzhiyun static int vfe_flush_buffers(struct camss_video *vid,
1373*4882a593Smuzhiyun enum vb2_buffer_state state)
1374*4882a593Smuzhiyun {
1375*4882a593Smuzhiyun struct vfe_line *line = container_of(vid, struct vfe_line, video_out);
1376*4882a593Smuzhiyun struct vfe_device *vfe = to_vfe(line);
1377*4882a593Smuzhiyun struct vfe_output *output;
1378*4882a593Smuzhiyun unsigned long flags;
1379*4882a593Smuzhiyun
1380*4882a593Smuzhiyun output = &line->output;
1381*4882a593Smuzhiyun
1382*4882a593Smuzhiyun spin_lock_irqsave(&vfe->output_lock, flags);
1383*4882a593Smuzhiyun
1384*4882a593Smuzhiyun vfe_buf_flush_pending(output, state);
1385*4882a593Smuzhiyun
1386*4882a593Smuzhiyun if (output->buf[0])
1387*4882a593Smuzhiyun vb2_buffer_done(&output->buf[0]->vb.vb2_buf, state);
1388*4882a593Smuzhiyun
1389*4882a593Smuzhiyun if (output->buf[1])
1390*4882a593Smuzhiyun vb2_buffer_done(&output->buf[1]->vb.vb2_buf, state);
1391*4882a593Smuzhiyun
1392*4882a593Smuzhiyun if (output->last_buffer) {
1393*4882a593Smuzhiyun vb2_buffer_done(&output->last_buffer->vb.vb2_buf, state);
1394*4882a593Smuzhiyun output->last_buffer = NULL;
1395*4882a593Smuzhiyun }
1396*4882a593Smuzhiyun
1397*4882a593Smuzhiyun spin_unlock_irqrestore(&vfe->output_lock, flags);
1398*4882a593Smuzhiyun
1399*4882a593Smuzhiyun return 0;
1400*4882a593Smuzhiyun }
1401*4882a593Smuzhiyun
1402*4882a593Smuzhiyun /*
1403*4882a593Smuzhiyun * vfe_set_power - Power on/off VFE module
1404*4882a593Smuzhiyun * @sd: VFE V4L2 subdevice
1405*4882a593Smuzhiyun * @on: Requested power state
1406*4882a593Smuzhiyun *
1407*4882a593Smuzhiyun * Return 0 on success or a negative error code otherwise
1408*4882a593Smuzhiyun */
vfe_set_power(struct v4l2_subdev * sd,int on)1409*4882a593Smuzhiyun static int vfe_set_power(struct v4l2_subdev *sd, int on)
1410*4882a593Smuzhiyun {
1411*4882a593Smuzhiyun struct vfe_line *line = v4l2_get_subdevdata(sd);
1412*4882a593Smuzhiyun struct vfe_device *vfe = to_vfe(line);
1413*4882a593Smuzhiyun int ret;
1414*4882a593Smuzhiyun
1415*4882a593Smuzhiyun if (on) {
1416*4882a593Smuzhiyun ret = vfe_get(vfe);
1417*4882a593Smuzhiyun if (ret < 0)
1418*4882a593Smuzhiyun return ret;
1419*4882a593Smuzhiyun
1420*4882a593Smuzhiyun vfe->ops->hw_version_read(vfe, vfe->camss->dev);
1421*4882a593Smuzhiyun } else {
1422*4882a593Smuzhiyun vfe_put(vfe);
1423*4882a593Smuzhiyun }
1424*4882a593Smuzhiyun
1425*4882a593Smuzhiyun return 0;
1426*4882a593Smuzhiyun }
1427*4882a593Smuzhiyun
1428*4882a593Smuzhiyun /*
1429*4882a593Smuzhiyun * vfe_set_stream - Enable/disable streaming on VFE module
1430*4882a593Smuzhiyun * @sd: VFE V4L2 subdevice
1431*4882a593Smuzhiyun * @enable: Requested streaming state
1432*4882a593Smuzhiyun *
1433*4882a593Smuzhiyun * Main configuration of VFE module is triggered here.
1434*4882a593Smuzhiyun *
1435*4882a593Smuzhiyun * Return 0 on success or a negative error code otherwise
1436*4882a593Smuzhiyun */
vfe_set_stream(struct v4l2_subdev * sd,int enable)1437*4882a593Smuzhiyun static int vfe_set_stream(struct v4l2_subdev *sd, int enable)
1438*4882a593Smuzhiyun {
1439*4882a593Smuzhiyun struct vfe_line *line = v4l2_get_subdevdata(sd);
1440*4882a593Smuzhiyun struct vfe_device *vfe = to_vfe(line);
1441*4882a593Smuzhiyun int ret;
1442*4882a593Smuzhiyun
1443*4882a593Smuzhiyun if (enable) {
1444*4882a593Smuzhiyun ret = vfe_enable(line);
1445*4882a593Smuzhiyun if (ret < 0)
1446*4882a593Smuzhiyun dev_err(vfe->camss->dev,
1447*4882a593Smuzhiyun "Failed to enable vfe outputs\n");
1448*4882a593Smuzhiyun } else {
1449*4882a593Smuzhiyun ret = vfe_disable(line);
1450*4882a593Smuzhiyun if (ret < 0)
1451*4882a593Smuzhiyun dev_err(vfe->camss->dev,
1452*4882a593Smuzhiyun "Failed to disable vfe outputs\n");
1453*4882a593Smuzhiyun }
1454*4882a593Smuzhiyun
1455*4882a593Smuzhiyun return ret;
1456*4882a593Smuzhiyun }
1457*4882a593Smuzhiyun
1458*4882a593Smuzhiyun /*
1459*4882a593Smuzhiyun * __vfe_get_format - Get pointer to format structure
1460*4882a593Smuzhiyun * @line: VFE line
1461*4882a593Smuzhiyun * @cfg: V4L2 subdev pad configuration
1462*4882a593Smuzhiyun * @pad: pad from which format is requested
1463*4882a593Smuzhiyun * @which: TRY or ACTIVE format
1464*4882a593Smuzhiyun *
1465*4882a593Smuzhiyun * Return pointer to TRY or ACTIVE format structure
1466*4882a593Smuzhiyun */
1467*4882a593Smuzhiyun static struct v4l2_mbus_framefmt *
__vfe_get_format(struct vfe_line * line,struct v4l2_subdev_pad_config * cfg,unsigned int pad,enum v4l2_subdev_format_whence which)1468*4882a593Smuzhiyun __vfe_get_format(struct vfe_line *line,
1469*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
1470*4882a593Smuzhiyun unsigned int pad,
1471*4882a593Smuzhiyun enum v4l2_subdev_format_whence which)
1472*4882a593Smuzhiyun {
1473*4882a593Smuzhiyun if (which == V4L2_SUBDEV_FORMAT_TRY)
1474*4882a593Smuzhiyun return v4l2_subdev_get_try_format(&line->subdev, cfg, pad);
1475*4882a593Smuzhiyun
1476*4882a593Smuzhiyun return &line->fmt[pad];
1477*4882a593Smuzhiyun }
1478*4882a593Smuzhiyun
1479*4882a593Smuzhiyun /*
1480*4882a593Smuzhiyun * __vfe_get_compose - Get pointer to compose selection structure
1481*4882a593Smuzhiyun * @line: VFE line
1482*4882a593Smuzhiyun * @cfg: V4L2 subdev pad configuration
1483*4882a593Smuzhiyun * @which: TRY or ACTIVE format
1484*4882a593Smuzhiyun *
1485*4882a593Smuzhiyun * Return pointer to TRY or ACTIVE compose rectangle structure
1486*4882a593Smuzhiyun */
1487*4882a593Smuzhiyun static struct v4l2_rect *
__vfe_get_compose(struct vfe_line * line,struct v4l2_subdev_pad_config * cfg,enum v4l2_subdev_format_whence which)1488*4882a593Smuzhiyun __vfe_get_compose(struct vfe_line *line,
1489*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
1490*4882a593Smuzhiyun enum v4l2_subdev_format_whence which)
1491*4882a593Smuzhiyun {
1492*4882a593Smuzhiyun if (which == V4L2_SUBDEV_FORMAT_TRY)
1493*4882a593Smuzhiyun return v4l2_subdev_get_try_compose(&line->subdev, cfg,
1494*4882a593Smuzhiyun MSM_VFE_PAD_SINK);
1495*4882a593Smuzhiyun
1496*4882a593Smuzhiyun return &line->compose;
1497*4882a593Smuzhiyun }
1498*4882a593Smuzhiyun
1499*4882a593Smuzhiyun /*
1500*4882a593Smuzhiyun * __vfe_get_crop - Get pointer to crop selection structure
1501*4882a593Smuzhiyun * @line: VFE line
1502*4882a593Smuzhiyun * @cfg: V4L2 subdev pad configuration
1503*4882a593Smuzhiyun * @which: TRY or ACTIVE format
1504*4882a593Smuzhiyun *
1505*4882a593Smuzhiyun * Return pointer to TRY or ACTIVE crop rectangle structure
1506*4882a593Smuzhiyun */
1507*4882a593Smuzhiyun static struct v4l2_rect *
__vfe_get_crop(struct vfe_line * line,struct v4l2_subdev_pad_config * cfg,enum v4l2_subdev_format_whence which)1508*4882a593Smuzhiyun __vfe_get_crop(struct vfe_line *line,
1509*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
1510*4882a593Smuzhiyun enum v4l2_subdev_format_whence which)
1511*4882a593Smuzhiyun {
1512*4882a593Smuzhiyun if (which == V4L2_SUBDEV_FORMAT_TRY)
1513*4882a593Smuzhiyun return v4l2_subdev_get_try_crop(&line->subdev, cfg,
1514*4882a593Smuzhiyun MSM_VFE_PAD_SRC);
1515*4882a593Smuzhiyun
1516*4882a593Smuzhiyun return &line->crop;
1517*4882a593Smuzhiyun }
1518*4882a593Smuzhiyun
1519*4882a593Smuzhiyun /*
1520*4882a593Smuzhiyun * vfe_try_format - Handle try format by pad subdev method
1521*4882a593Smuzhiyun * @line: VFE line
1522*4882a593Smuzhiyun * @cfg: V4L2 subdev pad configuration
1523*4882a593Smuzhiyun * @pad: pad on which format is requested
1524*4882a593Smuzhiyun * @fmt: pointer to v4l2 format structure
1525*4882a593Smuzhiyun * @which: wanted subdev format
1526*4882a593Smuzhiyun */
vfe_try_format(struct vfe_line * line,struct v4l2_subdev_pad_config * cfg,unsigned int pad,struct v4l2_mbus_framefmt * fmt,enum v4l2_subdev_format_whence which)1527*4882a593Smuzhiyun static void vfe_try_format(struct vfe_line *line,
1528*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
1529*4882a593Smuzhiyun unsigned int pad,
1530*4882a593Smuzhiyun struct v4l2_mbus_framefmt *fmt,
1531*4882a593Smuzhiyun enum v4l2_subdev_format_whence which)
1532*4882a593Smuzhiyun {
1533*4882a593Smuzhiyun unsigned int i;
1534*4882a593Smuzhiyun u32 code;
1535*4882a593Smuzhiyun
1536*4882a593Smuzhiyun switch (pad) {
1537*4882a593Smuzhiyun case MSM_VFE_PAD_SINK:
1538*4882a593Smuzhiyun /* Set format on sink pad */
1539*4882a593Smuzhiyun
1540*4882a593Smuzhiyun for (i = 0; i < line->nformats; i++)
1541*4882a593Smuzhiyun if (fmt->code == line->formats[i].code)
1542*4882a593Smuzhiyun break;
1543*4882a593Smuzhiyun
1544*4882a593Smuzhiyun /* If not found, use UYVY as default */
1545*4882a593Smuzhiyun if (i >= line->nformats)
1546*4882a593Smuzhiyun fmt->code = MEDIA_BUS_FMT_UYVY8_2X8;
1547*4882a593Smuzhiyun
1548*4882a593Smuzhiyun fmt->width = clamp_t(u32, fmt->width, 1, 8191);
1549*4882a593Smuzhiyun fmt->height = clamp_t(u32, fmt->height, 1, 8191);
1550*4882a593Smuzhiyun
1551*4882a593Smuzhiyun fmt->field = V4L2_FIELD_NONE;
1552*4882a593Smuzhiyun fmt->colorspace = V4L2_COLORSPACE_SRGB;
1553*4882a593Smuzhiyun
1554*4882a593Smuzhiyun break;
1555*4882a593Smuzhiyun
1556*4882a593Smuzhiyun case MSM_VFE_PAD_SRC:
1557*4882a593Smuzhiyun /* Set and return a format same as sink pad */
1558*4882a593Smuzhiyun code = fmt->code;
1559*4882a593Smuzhiyun
1560*4882a593Smuzhiyun *fmt = *__vfe_get_format(line, cfg, MSM_VFE_PAD_SINK, which);
1561*4882a593Smuzhiyun
1562*4882a593Smuzhiyun fmt->code = vfe_src_pad_code(line, fmt->code, 0, code);
1563*4882a593Smuzhiyun
1564*4882a593Smuzhiyun if (line->id == VFE_LINE_PIX) {
1565*4882a593Smuzhiyun struct v4l2_rect *rect;
1566*4882a593Smuzhiyun
1567*4882a593Smuzhiyun rect = __vfe_get_crop(line, cfg, which);
1568*4882a593Smuzhiyun
1569*4882a593Smuzhiyun fmt->width = rect->width;
1570*4882a593Smuzhiyun fmt->height = rect->height;
1571*4882a593Smuzhiyun }
1572*4882a593Smuzhiyun
1573*4882a593Smuzhiyun break;
1574*4882a593Smuzhiyun }
1575*4882a593Smuzhiyun
1576*4882a593Smuzhiyun fmt->colorspace = V4L2_COLORSPACE_SRGB;
1577*4882a593Smuzhiyun }
1578*4882a593Smuzhiyun
1579*4882a593Smuzhiyun /*
1580*4882a593Smuzhiyun * vfe_try_compose - Handle try compose selection by pad subdev method
1581*4882a593Smuzhiyun * @line: VFE line
1582*4882a593Smuzhiyun * @cfg: V4L2 subdev pad configuration
1583*4882a593Smuzhiyun * @rect: pointer to v4l2 rect structure
1584*4882a593Smuzhiyun * @which: wanted subdev format
1585*4882a593Smuzhiyun */
vfe_try_compose(struct vfe_line * line,struct v4l2_subdev_pad_config * cfg,struct v4l2_rect * rect,enum v4l2_subdev_format_whence which)1586*4882a593Smuzhiyun static void vfe_try_compose(struct vfe_line *line,
1587*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
1588*4882a593Smuzhiyun struct v4l2_rect *rect,
1589*4882a593Smuzhiyun enum v4l2_subdev_format_whence which)
1590*4882a593Smuzhiyun {
1591*4882a593Smuzhiyun struct v4l2_mbus_framefmt *fmt;
1592*4882a593Smuzhiyun
1593*4882a593Smuzhiyun fmt = __vfe_get_format(line, cfg, MSM_VFE_PAD_SINK, which);
1594*4882a593Smuzhiyun
1595*4882a593Smuzhiyun if (rect->width > fmt->width)
1596*4882a593Smuzhiyun rect->width = fmt->width;
1597*4882a593Smuzhiyun
1598*4882a593Smuzhiyun if (rect->height > fmt->height)
1599*4882a593Smuzhiyun rect->height = fmt->height;
1600*4882a593Smuzhiyun
1601*4882a593Smuzhiyun if (fmt->width > rect->width * SCALER_RATIO_MAX)
1602*4882a593Smuzhiyun rect->width = (fmt->width + SCALER_RATIO_MAX - 1) /
1603*4882a593Smuzhiyun SCALER_RATIO_MAX;
1604*4882a593Smuzhiyun
1605*4882a593Smuzhiyun rect->width &= ~0x1;
1606*4882a593Smuzhiyun
1607*4882a593Smuzhiyun if (fmt->height > rect->height * SCALER_RATIO_MAX)
1608*4882a593Smuzhiyun rect->height = (fmt->height + SCALER_RATIO_MAX - 1) /
1609*4882a593Smuzhiyun SCALER_RATIO_MAX;
1610*4882a593Smuzhiyun
1611*4882a593Smuzhiyun if (rect->width < 16)
1612*4882a593Smuzhiyun rect->width = 16;
1613*4882a593Smuzhiyun
1614*4882a593Smuzhiyun if (rect->height < 4)
1615*4882a593Smuzhiyun rect->height = 4;
1616*4882a593Smuzhiyun }
1617*4882a593Smuzhiyun
1618*4882a593Smuzhiyun /*
1619*4882a593Smuzhiyun * vfe_try_crop - Handle try crop selection by pad subdev method
1620*4882a593Smuzhiyun * @line: VFE line
1621*4882a593Smuzhiyun * @cfg: V4L2 subdev pad configuration
1622*4882a593Smuzhiyun * @rect: pointer to v4l2 rect structure
1623*4882a593Smuzhiyun * @which: wanted subdev format
1624*4882a593Smuzhiyun */
vfe_try_crop(struct vfe_line * line,struct v4l2_subdev_pad_config * cfg,struct v4l2_rect * rect,enum v4l2_subdev_format_whence which)1625*4882a593Smuzhiyun static void vfe_try_crop(struct vfe_line *line,
1626*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
1627*4882a593Smuzhiyun struct v4l2_rect *rect,
1628*4882a593Smuzhiyun enum v4l2_subdev_format_whence which)
1629*4882a593Smuzhiyun {
1630*4882a593Smuzhiyun struct v4l2_rect *compose;
1631*4882a593Smuzhiyun
1632*4882a593Smuzhiyun compose = __vfe_get_compose(line, cfg, which);
1633*4882a593Smuzhiyun
1634*4882a593Smuzhiyun if (rect->width > compose->width)
1635*4882a593Smuzhiyun rect->width = compose->width;
1636*4882a593Smuzhiyun
1637*4882a593Smuzhiyun if (rect->width + rect->left > compose->width)
1638*4882a593Smuzhiyun rect->left = compose->width - rect->width;
1639*4882a593Smuzhiyun
1640*4882a593Smuzhiyun if (rect->height > compose->height)
1641*4882a593Smuzhiyun rect->height = compose->height;
1642*4882a593Smuzhiyun
1643*4882a593Smuzhiyun if (rect->height + rect->top > compose->height)
1644*4882a593Smuzhiyun rect->top = compose->height - rect->height;
1645*4882a593Smuzhiyun
1646*4882a593Smuzhiyun /* wm in line based mode writes multiple of 16 horizontally */
1647*4882a593Smuzhiyun rect->left += (rect->width & 0xf) >> 1;
1648*4882a593Smuzhiyun rect->width &= ~0xf;
1649*4882a593Smuzhiyun
1650*4882a593Smuzhiyun if (rect->width < 16) {
1651*4882a593Smuzhiyun rect->left = 0;
1652*4882a593Smuzhiyun rect->width = 16;
1653*4882a593Smuzhiyun }
1654*4882a593Smuzhiyun
1655*4882a593Smuzhiyun if (rect->height < 4) {
1656*4882a593Smuzhiyun rect->top = 0;
1657*4882a593Smuzhiyun rect->height = 4;
1658*4882a593Smuzhiyun }
1659*4882a593Smuzhiyun }
1660*4882a593Smuzhiyun
1661*4882a593Smuzhiyun /*
1662*4882a593Smuzhiyun * vfe_enum_mbus_code - Handle pixel format enumeration
1663*4882a593Smuzhiyun * @sd: VFE V4L2 subdevice
1664*4882a593Smuzhiyun * @cfg: V4L2 subdev pad configuration
1665*4882a593Smuzhiyun * @code: pointer to v4l2_subdev_mbus_code_enum structure
1666*4882a593Smuzhiyun *
1667*4882a593Smuzhiyun * return -EINVAL or zero on success
1668*4882a593Smuzhiyun */
vfe_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)1669*4882a593Smuzhiyun static int vfe_enum_mbus_code(struct v4l2_subdev *sd,
1670*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
1671*4882a593Smuzhiyun struct v4l2_subdev_mbus_code_enum *code)
1672*4882a593Smuzhiyun {
1673*4882a593Smuzhiyun struct vfe_line *line = v4l2_get_subdevdata(sd);
1674*4882a593Smuzhiyun
1675*4882a593Smuzhiyun if (code->pad == MSM_VFE_PAD_SINK) {
1676*4882a593Smuzhiyun if (code->index >= line->nformats)
1677*4882a593Smuzhiyun return -EINVAL;
1678*4882a593Smuzhiyun
1679*4882a593Smuzhiyun code->code = line->formats[code->index].code;
1680*4882a593Smuzhiyun } else {
1681*4882a593Smuzhiyun struct v4l2_mbus_framefmt *sink_fmt;
1682*4882a593Smuzhiyun
1683*4882a593Smuzhiyun sink_fmt = __vfe_get_format(line, cfg, MSM_VFE_PAD_SINK,
1684*4882a593Smuzhiyun code->which);
1685*4882a593Smuzhiyun
1686*4882a593Smuzhiyun code->code = vfe_src_pad_code(line, sink_fmt->code,
1687*4882a593Smuzhiyun code->index, 0);
1688*4882a593Smuzhiyun if (!code->code)
1689*4882a593Smuzhiyun return -EINVAL;
1690*4882a593Smuzhiyun }
1691*4882a593Smuzhiyun
1692*4882a593Smuzhiyun return 0;
1693*4882a593Smuzhiyun }
1694*4882a593Smuzhiyun
1695*4882a593Smuzhiyun /*
1696*4882a593Smuzhiyun * vfe_enum_frame_size - Handle frame size enumeration
1697*4882a593Smuzhiyun * @sd: VFE V4L2 subdevice
1698*4882a593Smuzhiyun * @cfg: V4L2 subdev pad configuration
1699*4882a593Smuzhiyun * @fse: pointer to v4l2_subdev_frame_size_enum structure
1700*4882a593Smuzhiyun *
1701*4882a593Smuzhiyun * Return -EINVAL or zero on success
1702*4882a593Smuzhiyun */
vfe_enum_frame_size(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)1703*4882a593Smuzhiyun static int vfe_enum_frame_size(struct v4l2_subdev *sd,
1704*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
1705*4882a593Smuzhiyun struct v4l2_subdev_frame_size_enum *fse)
1706*4882a593Smuzhiyun {
1707*4882a593Smuzhiyun struct vfe_line *line = v4l2_get_subdevdata(sd);
1708*4882a593Smuzhiyun struct v4l2_mbus_framefmt format;
1709*4882a593Smuzhiyun
1710*4882a593Smuzhiyun if (fse->index != 0)
1711*4882a593Smuzhiyun return -EINVAL;
1712*4882a593Smuzhiyun
1713*4882a593Smuzhiyun format.code = fse->code;
1714*4882a593Smuzhiyun format.width = 1;
1715*4882a593Smuzhiyun format.height = 1;
1716*4882a593Smuzhiyun vfe_try_format(line, cfg, fse->pad, &format, fse->which);
1717*4882a593Smuzhiyun fse->min_width = format.width;
1718*4882a593Smuzhiyun fse->min_height = format.height;
1719*4882a593Smuzhiyun
1720*4882a593Smuzhiyun if (format.code != fse->code)
1721*4882a593Smuzhiyun return -EINVAL;
1722*4882a593Smuzhiyun
1723*4882a593Smuzhiyun format.code = fse->code;
1724*4882a593Smuzhiyun format.width = -1;
1725*4882a593Smuzhiyun format.height = -1;
1726*4882a593Smuzhiyun vfe_try_format(line, cfg, fse->pad, &format, fse->which);
1727*4882a593Smuzhiyun fse->max_width = format.width;
1728*4882a593Smuzhiyun fse->max_height = format.height;
1729*4882a593Smuzhiyun
1730*4882a593Smuzhiyun return 0;
1731*4882a593Smuzhiyun }
1732*4882a593Smuzhiyun
1733*4882a593Smuzhiyun /*
1734*4882a593Smuzhiyun * vfe_get_format - Handle get format by pads subdev method
1735*4882a593Smuzhiyun * @sd: VFE V4L2 subdevice
1736*4882a593Smuzhiyun * @cfg: V4L2 subdev pad configuration
1737*4882a593Smuzhiyun * @fmt: pointer to v4l2 subdev format structure
1738*4882a593Smuzhiyun *
1739*4882a593Smuzhiyun * Return -EINVAL or zero on success
1740*4882a593Smuzhiyun */
vfe_get_format(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)1741*4882a593Smuzhiyun static int vfe_get_format(struct v4l2_subdev *sd,
1742*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
1743*4882a593Smuzhiyun struct v4l2_subdev_format *fmt)
1744*4882a593Smuzhiyun {
1745*4882a593Smuzhiyun struct vfe_line *line = v4l2_get_subdevdata(sd);
1746*4882a593Smuzhiyun struct v4l2_mbus_framefmt *format;
1747*4882a593Smuzhiyun
1748*4882a593Smuzhiyun format = __vfe_get_format(line, cfg, fmt->pad, fmt->which);
1749*4882a593Smuzhiyun if (format == NULL)
1750*4882a593Smuzhiyun return -EINVAL;
1751*4882a593Smuzhiyun
1752*4882a593Smuzhiyun fmt->format = *format;
1753*4882a593Smuzhiyun
1754*4882a593Smuzhiyun return 0;
1755*4882a593Smuzhiyun }
1756*4882a593Smuzhiyun
1757*4882a593Smuzhiyun static int vfe_set_selection(struct v4l2_subdev *sd,
1758*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
1759*4882a593Smuzhiyun struct v4l2_subdev_selection *sel);
1760*4882a593Smuzhiyun
1761*4882a593Smuzhiyun /*
1762*4882a593Smuzhiyun * vfe_set_format - Handle set format by pads subdev method
1763*4882a593Smuzhiyun * @sd: VFE V4L2 subdevice
1764*4882a593Smuzhiyun * @cfg: V4L2 subdev pad configuration
1765*4882a593Smuzhiyun * @fmt: pointer to v4l2 subdev format structure
1766*4882a593Smuzhiyun *
1767*4882a593Smuzhiyun * Return -EINVAL or zero on success
1768*4882a593Smuzhiyun */
vfe_set_format(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)1769*4882a593Smuzhiyun static int vfe_set_format(struct v4l2_subdev *sd,
1770*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
1771*4882a593Smuzhiyun struct v4l2_subdev_format *fmt)
1772*4882a593Smuzhiyun {
1773*4882a593Smuzhiyun struct vfe_line *line = v4l2_get_subdevdata(sd);
1774*4882a593Smuzhiyun struct v4l2_mbus_framefmt *format;
1775*4882a593Smuzhiyun
1776*4882a593Smuzhiyun format = __vfe_get_format(line, cfg, fmt->pad, fmt->which);
1777*4882a593Smuzhiyun if (format == NULL)
1778*4882a593Smuzhiyun return -EINVAL;
1779*4882a593Smuzhiyun
1780*4882a593Smuzhiyun vfe_try_format(line, cfg, fmt->pad, &fmt->format, fmt->which);
1781*4882a593Smuzhiyun *format = fmt->format;
1782*4882a593Smuzhiyun
1783*4882a593Smuzhiyun if (fmt->pad == MSM_VFE_PAD_SINK) {
1784*4882a593Smuzhiyun struct v4l2_subdev_selection sel = { 0 };
1785*4882a593Smuzhiyun int ret;
1786*4882a593Smuzhiyun
1787*4882a593Smuzhiyun /* Propagate the format from sink to source */
1788*4882a593Smuzhiyun format = __vfe_get_format(line, cfg, MSM_VFE_PAD_SRC,
1789*4882a593Smuzhiyun fmt->which);
1790*4882a593Smuzhiyun
1791*4882a593Smuzhiyun *format = fmt->format;
1792*4882a593Smuzhiyun vfe_try_format(line, cfg, MSM_VFE_PAD_SRC, format,
1793*4882a593Smuzhiyun fmt->which);
1794*4882a593Smuzhiyun
1795*4882a593Smuzhiyun if (line->id != VFE_LINE_PIX)
1796*4882a593Smuzhiyun return 0;
1797*4882a593Smuzhiyun
1798*4882a593Smuzhiyun /* Reset sink pad compose selection */
1799*4882a593Smuzhiyun sel.which = fmt->which;
1800*4882a593Smuzhiyun sel.pad = MSM_VFE_PAD_SINK;
1801*4882a593Smuzhiyun sel.target = V4L2_SEL_TGT_COMPOSE;
1802*4882a593Smuzhiyun sel.r.width = fmt->format.width;
1803*4882a593Smuzhiyun sel.r.height = fmt->format.height;
1804*4882a593Smuzhiyun ret = vfe_set_selection(sd, cfg, &sel);
1805*4882a593Smuzhiyun if (ret < 0)
1806*4882a593Smuzhiyun return ret;
1807*4882a593Smuzhiyun }
1808*4882a593Smuzhiyun
1809*4882a593Smuzhiyun return 0;
1810*4882a593Smuzhiyun }
1811*4882a593Smuzhiyun
1812*4882a593Smuzhiyun /*
1813*4882a593Smuzhiyun * vfe_get_selection - Handle get selection by pads subdev method
1814*4882a593Smuzhiyun * @sd: VFE V4L2 subdevice
1815*4882a593Smuzhiyun * @cfg: V4L2 subdev pad configuration
1816*4882a593Smuzhiyun * @sel: pointer to v4l2 subdev selection structure
1817*4882a593Smuzhiyun *
1818*4882a593Smuzhiyun * Return -EINVAL or zero on success
1819*4882a593Smuzhiyun */
vfe_get_selection(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_selection * sel)1820*4882a593Smuzhiyun static int vfe_get_selection(struct v4l2_subdev *sd,
1821*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
1822*4882a593Smuzhiyun struct v4l2_subdev_selection *sel)
1823*4882a593Smuzhiyun {
1824*4882a593Smuzhiyun struct vfe_line *line = v4l2_get_subdevdata(sd);
1825*4882a593Smuzhiyun struct v4l2_subdev_format fmt = { 0 };
1826*4882a593Smuzhiyun struct v4l2_rect *rect;
1827*4882a593Smuzhiyun int ret;
1828*4882a593Smuzhiyun
1829*4882a593Smuzhiyun if (line->id != VFE_LINE_PIX)
1830*4882a593Smuzhiyun return -EINVAL;
1831*4882a593Smuzhiyun
1832*4882a593Smuzhiyun if (sel->pad == MSM_VFE_PAD_SINK)
1833*4882a593Smuzhiyun switch (sel->target) {
1834*4882a593Smuzhiyun case V4L2_SEL_TGT_COMPOSE_BOUNDS:
1835*4882a593Smuzhiyun fmt.pad = sel->pad;
1836*4882a593Smuzhiyun fmt.which = sel->which;
1837*4882a593Smuzhiyun ret = vfe_get_format(sd, cfg, &fmt);
1838*4882a593Smuzhiyun if (ret < 0)
1839*4882a593Smuzhiyun return ret;
1840*4882a593Smuzhiyun
1841*4882a593Smuzhiyun sel->r.left = 0;
1842*4882a593Smuzhiyun sel->r.top = 0;
1843*4882a593Smuzhiyun sel->r.width = fmt.format.width;
1844*4882a593Smuzhiyun sel->r.height = fmt.format.height;
1845*4882a593Smuzhiyun break;
1846*4882a593Smuzhiyun case V4L2_SEL_TGT_COMPOSE:
1847*4882a593Smuzhiyun rect = __vfe_get_compose(line, cfg, sel->which);
1848*4882a593Smuzhiyun if (rect == NULL)
1849*4882a593Smuzhiyun return -EINVAL;
1850*4882a593Smuzhiyun
1851*4882a593Smuzhiyun sel->r = *rect;
1852*4882a593Smuzhiyun break;
1853*4882a593Smuzhiyun default:
1854*4882a593Smuzhiyun return -EINVAL;
1855*4882a593Smuzhiyun }
1856*4882a593Smuzhiyun else if (sel->pad == MSM_VFE_PAD_SRC)
1857*4882a593Smuzhiyun switch (sel->target) {
1858*4882a593Smuzhiyun case V4L2_SEL_TGT_CROP_BOUNDS:
1859*4882a593Smuzhiyun rect = __vfe_get_compose(line, cfg, sel->which);
1860*4882a593Smuzhiyun if (rect == NULL)
1861*4882a593Smuzhiyun return -EINVAL;
1862*4882a593Smuzhiyun
1863*4882a593Smuzhiyun sel->r.left = rect->left;
1864*4882a593Smuzhiyun sel->r.top = rect->top;
1865*4882a593Smuzhiyun sel->r.width = rect->width;
1866*4882a593Smuzhiyun sel->r.height = rect->height;
1867*4882a593Smuzhiyun break;
1868*4882a593Smuzhiyun case V4L2_SEL_TGT_CROP:
1869*4882a593Smuzhiyun rect = __vfe_get_crop(line, cfg, sel->which);
1870*4882a593Smuzhiyun if (rect == NULL)
1871*4882a593Smuzhiyun return -EINVAL;
1872*4882a593Smuzhiyun
1873*4882a593Smuzhiyun sel->r = *rect;
1874*4882a593Smuzhiyun break;
1875*4882a593Smuzhiyun default:
1876*4882a593Smuzhiyun return -EINVAL;
1877*4882a593Smuzhiyun }
1878*4882a593Smuzhiyun
1879*4882a593Smuzhiyun return 0;
1880*4882a593Smuzhiyun }
1881*4882a593Smuzhiyun
1882*4882a593Smuzhiyun /*
1883*4882a593Smuzhiyun * vfe_set_selection - Handle set selection by pads subdev method
1884*4882a593Smuzhiyun * @sd: VFE V4L2 subdevice
1885*4882a593Smuzhiyun * @cfg: V4L2 subdev pad configuration
1886*4882a593Smuzhiyun * @sel: pointer to v4l2 subdev selection structure
1887*4882a593Smuzhiyun *
1888*4882a593Smuzhiyun * Return -EINVAL or zero on success
1889*4882a593Smuzhiyun */
vfe_set_selection(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_selection * sel)1890*4882a593Smuzhiyun static int vfe_set_selection(struct v4l2_subdev *sd,
1891*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
1892*4882a593Smuzhiyun struct v4l2_subdev_selection *sel)
1893*4882a593Smuzhiyun {
1894*4882a593Smuzhiyun struct vfe_line *line = v4l2_get_subdevdata(sd);
1895*4882a593Smuzhiyun struct v4l2_rect *rect;
1896*4882a593Smuzhiyun int ret;
1897*4882a593Smuzhiyun
1898*4882a593Smuzhiyun if (line->id != VFE_LINE_PIX)
1899*4882a593Smuzhiyun return -EINVAL;
1900*4882a593Smuzhiyun
1901*4882a593Smuzhiyun if (sel->target == V4L2_SEL_TGT_COMPOSE &&
1902*4882a593Smuzhiyun sel->pad == MSM_VFE_PAD_SINK) {
1903*4882a593Smuzhiyun struct v4l2_subdev_selection crop = { 0 };
1904*4882a593Smuzhiyun
1905*4882a593Smuzhiyun rect = __vfe_get_compose(line, cfg, sel->which);
1906*4882a593Smuzhiyun if (rect == NULL)
1907*4882a593Smuzhiyun return -EINVAL;
1908*4882a593Smuzhiyun
1909*4882a593Smuzhiyun vfe_try_compose(line, cfg, &sel->r, sel->which);
1910*4882a593Smuzhiyun *rect = sel->r;
1911*4882a593Smuzhiyun
1912*4882a593Smuzhiyun /* Reset source crop selection */
1913*4882a593Smuzhiyun crop.which = sel->which;
1914*4882a593Smuzhiyun crop.pad = MSM_VFE_PAD_SRC;
1915*4882a593Smuzhiyun crop.target = V4L2_SEL_TGT_CROP;
1916*4882a593Smuzhiyun crop.r = *rect;
1917*4882a593Smuzhiyun ret = vfe_set_selection(sd, cfg, &crop);
1918*4882a593Smuzhiyun } else if (sel->target == V4L2_SEL_TGT_CROP &&
1919*4882a593Smuzhiyun sel->pad == MSM_VFE_PAD_SRC) {
1920*4882a593Smuzhiyun struct v4l2_subdev_format fmt = { 0 };
1921*4882a593Smuzhiyun
1922*4882a593Smuzhiyun rect = __vfe_get_crop(line, cfg, sel->which);
1923*4882a593Smuzhiyun if (rect == NULL)
1924*4882a593Smuzhiyun return -EINVAL;
1925*4882a593Smuzhiyun
1926*4882a593Smuzhiyun vfe_try_crop(line, cfg, &sel->r, sel->which);
1927*4882a593Smuzhiyun *rect = sel->r;
1928*4882a593Smuzhiyun
1929*4882a593Smuzhiyun /* Reset source pad format width and height */
1930*4882a593Smuzhiyun fmt.which = sel->which;
1931*4882a593Smuzhiyun fmt.pad = MSM_VFE_PAD_SRC;
1932*4882a593Smuzhiyun ret = vfe_get_format(sd, cfg, &fmt);
1933*4882a593Smuzhiyun if (ret < 0)
1934*4882a593Smuzhiyun return ret;
1935*4882a593Smuzhiyun
1936*4882a593Smuzhiyun fmt.format.width = rect->width;
1937*4882a593Smuzhiyun fmt.format.height = rect->height;
1938*4882a593Smuzhiyun ret = vfe_set_format(sd, cfg, &fmt);
1939*4882a593Smuzhiyun } else {
1940*4882a593Smuzhiyun ret = -EINVAL;
1941*4882a593Smuzhiyun }
1942*4882a593Smuzhiyun
1943*4882a593Smuzhiyun return ret;
1944*4882a593Smuzhiyun }
1945*4882a593Smuzhiyun
1946*4882a593Smuzhiyun /*
1947*4882a593Smuzhiyun * vfe_init_formats - Initialize formats on all pads
1948*4882a593Smuzhiyun * @sd: VFE V4L2 subdevice
1949*4882a593Smuzhiyun * @fh: V4L2 subdev file handle
1950*4882a593Smuzhiyun *
1951*4882a593Smuzhiyun * Initialize all pad formats with default values.
1952*4882a593Smuzhiyun *
1953*4882a593Smuzhiyun * Return 0 on success or a negative error code otherwise
1954*4882a593Smuzhiyun */
vfe_init_formats(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)1955*4882a593Smuzhiyun static int vfe_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1956*4882a593Smuzhiyun {
1957*4882a593Smuzhiyun struct v4l2_subdev_format format = {
1958*4882a593Smuzhiyun .pad = MSM_VFE_PAD_SINK,
1959*4882a593Smuzhiyun .which = fh ? V4L2_SUBDEV_FORMAT_TRY :
1960*4882a593Smuzhiyun V4L2_SUBDEV_FORMAT_ACTIVE,
1961*4882a593Smuzhiyun .format = {
1962*4882a593Smuzhiyun .code = MEDIA_BUS_FMT_UYVY8_2X8,
1963*4882a593Smuzhiyun .width = 1920,
1964*4882a593Smuzhiyun .height = 1080
1965*4882a593Smuzhiyun }
1966*4882a593Smuzhiyun };
1967*4882a593Smuzhiyun
1968*4882a593Smuzhiyun return vfe_set_format(sd, fh ? fh->pad : NULL, &format);
1969*4882a593Smuzhiyun }
1970*4882a593Smuzhiyun
1971*4882a593Smuzhiyun /*
1972*4882a593Smuzhiyun * msm_vfe_subdev_init - Initialize VFE device structure and resources
1973*4882a593Smuzhiyun * @vfe: VFE device
1974*4882a593Smuzhiyun * @res: VFE module resources table
1975*4882a593Smuzhiyun *
1976*4882a593Smuzhiyun * Return 0 on success or a negative error code otherwise
1977*4882a593Smuzhiyun */
msm_vfe_subdev_init(struct camss * camss,struct vfe_device * vfe,const struct resources * res,u8 id)1978*4882a593Smuzhiyun int msm_vfe_subdev_init(struct camss *camss, struct vfe_device *vfe,
1979*4882a593Smuzhiyun const struct resources *res, u8 id)
1980*4882a593Smuzhiyun {
1981*4882a593Smuzhiyun struct device *dev = camss->dev;
1982*4882a593Smuzhiyun struct platform_device *pdev = to_platform_device(dev);
1983*4882a593Smuzhiyun struct resource *r;
1984*4882a593Smuzhiyun int i, j;
1985*4882a593Smuzhiyun int ret;
1986*4882a593Smuzhiyun
1987*4882a593Smuzhiyun vfe->isr_ops.reset_ack = vfe_isr_reset_ack;
1988*4882a593Smuzhiyun vfe->isr_ops.halt_ack = vfe_isr_halt_ack;
1989*4882a593Smuzhiyun vfe->isr_ops.reg_update = vfe_isr_reg_update;
1990*4882a593Smuzhiyun vfe->isr_ops.sof = vfe_isr_sof;
1991*4882a593Smuzhiyun vfe->isr_ops.comp_done = vfe_isr_comp_done;
1992*4882a593Smuzhiyun vfe->isr_ops.wm_done = vfe_isr_wm_done;
1993*4882a593Smuzhiyun
1994*4882a593Smuzhiyun if (camss->version == CAMSS_8x16)
1995*4882a593Smuzhiyun vfe->ops = &vfe_ops_4_1;
1996*4882a593Smuzhiyun else if (camss->version == CAMSS_8x96)
1997*4882a593Smuzhiyun vfe->ops = &vfe_ops_4_7;
1998*4882a593Smuzhiyun else
1999*4882a593Smuzhiyun return -EINVAL;
2000*4882a593Smuzhiyun
2001*4882a593Smuzhiyun /* Memory */
2002*4882a593Smuzhiyun
2003*4882a593Smuzhiyun r = platform_get_resource_byname(pdev, IORESOURCE_MEM, res->reg[0]);
2004*4882a593Smuzhiyun vfe->base = devm_ioremap_resource(dev, r);
2005*4882a593Smuzhiyun if (IS_ERR(vfe->base)) {
2006*4882a593Smuzhiyun dev_err(dev, "could not map memory\n");
2007*4882a593Smuzhiyun return PTR_ERR(vfe->base);
2008*4882a593Smuzhiyun }
2009*4882a593Smuzhiyun
2010*4882a593Smuzhiyun /* Interrupt */
2011*4882a593Smuzhiyun
2012*4882a593Smuzhiyun r = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
2013*4882a593Smuzhiyun res->interrupt[0]);
2014*4882a593Smuzhiyun if (!r) {
2015*4882a593Smuzhiyun dev_err(dev, "missing IRQ\n");
2016*4882a593Smuzhiyun return -EINVAL;
2017*4882a593Smuzhiyun }
2018*4882a593Smuzhiyun
2019*4882a593Smuzhiyun vfe->irq = r->start;
2020*4882a593Smuzhiyun snprintf(vfe->irq_name, sizeof(vfe->irq_name), "%s_%s%d",
2021*4882a593Smuzhiyun dev_name(dev), MSM_VFE_NAME, vfe->id);
2022*4882a593Smuzhiyun ret = devm_request_irq(dev, vfe->irq, vfe->ops->isr,
2023*4882a593Smuzhiyun IRQF_TRIGGER_RISING, vfe->irq_name, vfe);
2024*4882a593Smuzhiyun if (ret < 0) {
2025*4882a593Smuzhiyun dev_err(dev, "request_irq failed: %d\n", ret);
2026*4882a593Smuzhiyun return ret;
2027*4882a593Smuzhiyun }
2028*4882a593Smuzhiyun
2029*4882a593Smuzhiyun /* Clocks */
2030*4882a593Smuzhiyun
2031*4882a593Smuzhiyun vfe->nclocks = 0;
2032*4882a593Smuzhiyun while (res->clock[vfe->nclocks])
2033*4882a593Smuzhiyun vfe->nclocks++;
2034*4882a593Smuzhiyun
2035*4882a593Smuzhiyun vfe->clock = devm_kcalloc(dev, vfe->nclocks, sizeof(*vfe->clock),
2036*4882a593Smuzhiyun GFP_KERNEL);
2037*4882a593Smuzhiyun if (!vfe->clock)
2038*4882a593Smuzhiyun return -ENOMEM;
2039*4882a593Smuzhiyun
2040*4882a593Smuzhiyun for (i = 0; i < vfe->nclocks; i++) {
2041*4882a593Smuzhiyun struct camss_clock *clock = &vfe->clock[i];
2042*4882a593Smuzhiyun
2043*4882a593Smuzhiyun clock->clk = devm_clk_get(dev, res->clock[i]);
2044*4882a593Smuzhiyun if (IS_ERR(clock->clk))
2045*4882a593Smuzhiyun return PTR_ERR(clock->clk);
2046*4882a593Smuzhiyun
2047*4882a593Smuzhiyun clock->name = res->clock[i];
2048*4882a593Smuzhiyun
2049*4882a593Smuzhiyun clock->nfreqs = 0;
2050*4882a593Smuzhiyun while (res->clock_rate[i][clock->nfreqs])
2051*4882a593Smuzhiyun clock->nfreqs++;
2052*4882a593Smuzhiyun
2053*4882a593Smuzhiyun if (!clock->nfreqs) {
2054*4882a593Smuzhiyun clock->freq = NULL;
2055*4882a593Smuzhiyun continue;
2056*4882a593Smuzhiyun }
2057*4882a593Smuzhiyun
2058*4882a593Smuzhiyun clock->freq = devm_kcalloc(dev,
2059*4882a593Smuzhiyun clock->nfreqs,
2060*4882a593Smuzhiyun sizeof(*clock->freq),
2061*4882a593Smuzhiyun GFP_KERNEL);
2062*4882a593Smuzhiyun if (!clock->freq)
2063*4882a593Smuzhiyun return -ENOMEM;
2064*4882a593Smuzhiyun
2065*4882a593Smuzhiyun for (j = 0; j < clock->nfreqs; j++)
2066*4882a593Smuzhiyun clock->freq[j] = res->clock_rate[i][j];
2067*4882a593Smuzhiyun }
2068*4882a593Smuzhiyun
2069*4882a593Smuzhiyun mutex_init(&vfe->power_lock);
2070*4882a593Smuzhiyun vfe->power_count = 0;
2071*4882a593Smuzhiyun
2072*4882a593Smuzhiyun mutex_init(&vfe->stream_lock);
2073*4882a593Smuzhiyun vfe->stream_count = 0;
2074*4882a593Smuzhiyun
2075*4882a593Smuzhiyun spin_lock_init(&vfe->output_lock);
2076*4882a593Smuzhiyun
2077*4882a593Smuzhiyun vfe->camss = camss;
2078*4882a593Smuzhiyun vfe->id = id;
2079*4882a593Smuzhiyun vfe->reg_update = 0;
2080*4882a593Smuzhiyun
2081*4882a593Smuzhiyun for (i = VFE_LINE_RDI0; i <= VFE_LINE_PIX; i++) {
2082*4882a593Smuzhiyun struct vfe_line *l = &vfe->line[i];
2083*4882a593Smuzhiyun
2084*4882a593Smuzhiyun l->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
2085*4882a593Smuzhiyun l->video_out.camss = camss;
2086*4882a593Smuzhiyun l->id = i;
2087*4882a593Smuzhiyun init_completion(&l->output.sof);
2088*4882a593Smuzhiyun init_completion(&l->output.reg_update);
2089*4882a593Smuzhiyun
2090*4882a593Smuzhiyun if (camss->version == CAMSS_8x16) {
2091*4882a593Smuzhiyun if (i == VFE_LINE_PIX) {
2092*4882a593Smuzhiyun l->formats = formats_pix_8x16;
2093*4882a593Smuzhiyun l->nformats = ARRAY_SIZE(formats_pix_8x16);
2094*4882a593Smuzhiyun } else {
2095*4882a593Smuzhiyun l->formats = formats_rdi_8x16;
2096*4882a593Smuzhiyun l->nformats = ARRAY_SIZE(formats_rdi_8x16);
2097*4882a593Smuzhiyun }
2098*4882a593Smuzhiyun } else if (camss->version == CAMSS_8x96) {
2099*4882a593Smuzhiyun if (i == VFE_LINE_PIX) {
2100*4882a593Smuzhiyun l->formats = formats_pix_8x96;
2101*4882a593Smuzhiyun l->nformats = ARRAY_SIZE(formats_pix_8x96);
2102*4882a593Smuzhiyun } else {
2103*4882a593Smuzhiyun l->formats = formats_rdi_8x96;
2104*4882a593Smuzhiyun l->nformats = ARRAY_SIZE(formats_rdi_8x96);
2105*4882a593Smuzhiyun }
2106*4882a593Smuzhiyun } else {
2107*4882a593Smuzhiyun return -EINVAL;
2108*4882a593Smuzhiyun }
2109*4882a593Smuzhiyun }
2110*4882a593Smuzhiyun
2111*4882a593Smuzhiyun init_completion(&vfe->reset_complete);
2112*4882a593Smuzhiyun init_completion(&vfe->halt_complete);
2113*4882a593Smuzhiyun
2114*4882a593Smuzhiyun return 0;
2115*4882a593Smuzhiyun }
2116*4882a593Smuzhiyun
2117*4882a593Smuzhiyun /*
2118*4882a593Smuzhiyun * msm_vfe_get_vfe_id - Get VFE HW module id
2119*4882a593Smuzhiyun * @entity: Pointer to VFE media entity structure
2120*4882a593Smuzhiyun * @id: Return CSID HW module id here
2121*4882a593Smuzhiyun */
msm_vfe_get_vfe_id(struct media_entity * entity,u8 * id)2122*4882a593Smuzhiyun void msm_vfe_get_vfe_id(struct media_entity *entity, u8 *id)
2123*4882a593Smuzhiyun {
2124*4882a593Smuzhiyun struct v4l2_subdev *sd;
2125*4882a593Smuzhiyun struct vfe_line *line;
2126*4882a593Smuzhiyun struct vfe_device *vfe;
2127*4882a593Smuzhiyun
2128*4882a593Smuzhiyun sd = media_entity_to_v4l2_subdev(entity);
2129*4882a593Smuzhiyun line = v4l2_get_subdevdata(sd);
2130*4882a593Smuzhiyun vfe = to_vfe(line);
2131*4882a593Smuzhiyun
2132*4882a593Smuzhiyun *id = vfe->id;
2133*4882a593Smuzhiyun }
2134*4882a593Smuzhiyun
2135*4882a593Smuzhiyun /*
2136*4882a593Smuzhiyun * msm_vfe_get_vfe_line_id - Get VFE line id by media entity
2137*4882a593Smuzhiyun * @entity: Pointer to VFE media entity structure
2138*4882a593Smuzhiyun * @id: Return VFE line id here
2139*4882a593Smuzhiyun */
msm_vfe_get_vfe_line_id(struct media_entity * entity,enum vfe_line_id * id)2140*4882a593Smuzhiyun void msm_vfe_get_vfe_line_id(struct media_entity *entity, enum vfe_line_id *id)
2141*4882a593Smuzhiyun {
2142*4882a593Smuzhiyun struct v4l2_subdev *sd;
2143*4882a593Smuzhiyun struct vfe_line *line;
2144*4882a593Smuzhiyun
2145*4882a593Smuzhiyun sd = media_entity_to_v4l2_subdev(entity);
2146*4882a593Smuzhiyun line = v4l2_get_subdevdata(sd);
2147*4882a593Smuzhiyun
2148*4882a593Smuzhiyun *id = line->id;
2149*4882a593Smuzhiyun }
2150*4882a593Smuzhiyun
2151*4882a593Smuzhiyun /*
2152*4882a593Smuzhiyun * vfe_link_setup - Setup VFE connections
2153*4882a593Smuzhiyun * @entity: Pointer to media entity structure
2154*4882a593Smuzhiyun * @local: Pointer to local pad
2155*4882a593Smuzhiyun * @remote: Pointer to remote pad
2156*4882a593Smuzhiyun * @flags: Link flags
2157*4882a593Smuzhiyun *
2158*4882a593Smuzhiyun * Return 0 on success
2159*4882a593Smuzhiyun */
vfe_link_setup(struct media_entity * entity,const struct media_pad * local,const struct media_pad * remote,u32 flags)2160*4882a593Smuzhiyun static int vfe_link_setup(struct media_entity *entity,
2161*4882a593Smuzhiyun const struct media_pad *local,
2162*4882a593Smuzhiyun const struct media_pad *remote, u32 flags)
2163*4882a593Smuzhiyun {
2164*4882a593Smuzhiyun if (flags & MEDIA_LNK_FL_ENABLED)
2165*4882a593Smuzhiyun if (media_entity_remote_pad(local))
2166*4882a593Smuzhiyun return -EBUSY;
2167*4882a593Smuzhiyun
2168*4882a593Smuzhiyun return 0;
2169*4882a593Smuzhiyun }
2170*4882a593Smuzhiyun
2171*4882a593Smuzhiyun static const struct v4l2_subdev_core_ops vfe_core_ops = {
2172*4882a593Smuzhiyun .s_power = vfe_set_power,
2173*4882a593Smuzhiyun };
2174*4882a593Smuzhiyun
2175*4882a593Smuzhiyun static const struct v4l2_subdev_video_ops vfe_video_ops = {
2176*4882a593Smuzhiyun .s_stream = vfe_set_stream,
2177*4882a593Smuzhiyun };
2178*4882a593Smuzhiyun
2179*4882a593Smuzhiyun static const struct v4l2_subdev_pad_ops vfe_pad_ops = {
2180*4882a593Smuzhiyun .enum_mbus_code = vfe_enum_mbus_code,
2181*4882a593Smuzhiyun .enum_frame_size = vfe_enum_frame_size,
2182*4882a593Smuzhiyun .get_fmt = vfe_get_format,
2183*4882a593Smuzhiyun .set_fmt = vfe_set_format,
2184*4882a593Smuzhiyun .get_selection = vfe_get_selection,
2185*4882a593Smuzhiyun .set_selection = vfe_set_selection,
2186*4882a593Smuzhiyun };
2187*4882a593Smuzhiyun
2188*4882a593Smuzhiyun static const struct v4l2_subdev_ops vfe_v4l2_ops = {
2189*4882a593Smuzhiyun .core = &vfe_core_ops,
2190*4882a593Smuzhiyun .video = &vfe_video_ops,
2191*4882a593Smuzhiyun .pad = &vfe_pad_ops,
2192*4882a593Smuzhiyun };
2193*4882a593Smuzhiyun
2194*4882a593Smuzhiyun static const struct v4l2_subdev_internal_ops vfe_v4l2_internal_ops = {
2195*4882a593Smuzhiyun .open = vfe_init_formats,
2196*4882a593Smuzhiyun };
2197*4882a593Smuzhiyun
2198*4882a593Smuzhiyun static const struct media_entity_operations vfe_media_ops = {
2199*4882a593Smuzhiyun .link_setup = vfe_link_setup,
2200*4882a593Smuzhiyun .link_validate = v4l2_subdev_link_validate,
2201*4882a593Smuzhiyun };
2202*4882a593Smuzhiyun
2203*4882a593Smuzhiyun static const struct camss_video_ops camss_vfe_video_ops = {
2204*4882a593Smuzhiyun .queue_buffer = vfe_queue_buffer,
2205*4882a593Smuzhiyun .flush_buffers = vfe_flush_buffers,
2206*4882a593Smuzhiyun };
2207*4882a593Smuzhiyun
2208*4882a593Smuzhiyun /*
2209*4882a593Smuzhiyun * msm_vfe_register_entities - Register subdev node for VFE module
2210*4882a593Smuzhiyun * @vfe: VFE device
2211*4882a593Smuzhiyun * @v4l2_dev: V4L2 device
2212*4882a593Smuzhiyun *
2213*4882a593Smuzhiyun * Initialize and register a subdev node for the VFE module. Then
2214*4882a593Smuzhiyun * call msm_video_register() to register the video device node which
2215*4882a593Smuzhiyun * will be connected to this subdev node. Then actually create the
2216*4882a593Smuzhiyun * media link between them.
2217*4882a593Smuzhiyun *
2218*4882a593Smuzhiyun * Return 0 on success or a negative error code otherwise
2219*4882a593Smuzhiyun */
msm_vfe_register_entities(struct vfe_device * vfe,struct v4l2_device * v4l2_dev)2220*4882a593Smuzhiyun int msm_vfe_register_entities(struct vfe_device *vfe,
2221*4882a593Smuzhiyun struct v4l2_device *v4l2_dev)
2222*4882a593Smuzhiyun {
2223*4882a593Smuzhiyun struct device *dev = vfe->camss->dev;
2224*4882a593Smuzhiyun struct v4l2_subdev *sd;
2225*4882a593Smuzhiyun struct media_pad *pads;
2226*4882a593Smuzhiyun struct camss_video *video_out;
2227*4882a593Smuzhiyun int ret;
2228*4882a593Smuzhiyun int i;
2229*4882a593Smuzhiyun
2230*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(vfe->line); i++) {
2231*4882a593Smuzhiyun char name[32];
2232*4882a593Smuzhiyun
2233*4882a593Smuzhiyun sd = &vfe->line[i].subdev;
2234*4882a593Smuzhiyun pads = vfe->line[i].pads;
2235*4882a593Smuzhiyun video_out = &vfe->line[i].video_out;
2236*4882a593Smuzhiyun
2237*4882a593Smuzhiyun v4l2_subdev_init(sd, &vfe_v4l2_ops);
2238*4882a593Smuzhiyun sd->internal_ops = &vfe_v4l2_internal_ops;
2239*4882a593Smuzhiyun sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
2240*4882a593Smuzhiyun if (i == VFE_LINE_PIX)
2241*4882a593Smuzhiyun snprintf(sd->name, ARRAY_SIZE(sd->name), "%s%d_%s",
2242*4882a593Smuzhiyun MSM_VFE_NAME, vfe->id, "pix");
2243*4882a593Smuzhiyun else
2244*4882a593Smuzhiyun snprintf(sd->name, ARRAY_SIZE(sd->name), "%s%d_%s%d",
2245*4882a593Smuzhiyun MSM_VFE_NAME, vfe->id, "rdi", i);
2246*4882a593Smuzhiyun
2247*4882a593Smuzhiyun v4l2_set_subdevdata(sd, &vfe->line[i]);
2248*4882a593Smuzhiyun
2249*4882a593Smuzhiyun ret = vfe_init_formats(sd, NULL);
2250*4882a593Smuzhiyun if (ret < 0) {
2251*4882a593Smuzhiyun dev_err(dev, "Failed to init format: %d\n", ret);
2252*4882a593Smuzhiyun goto error_init;
2253*4882a593Smuzhiyun }
2254*4882a593Smuzhiyun
2255*4882a593Smuzhiyun pads[MSM_VFE_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
2256*4882a593Smuzhiyun pads[MSM_VFE_PAD_SRC].flags = MEDIA_PAD_FL_SOURCE;
2257*4882a593Smuzhiyun
2258*4882a593Smuzhiyun sd->entity.function = MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER;
2259*4882a593Smuzhiyun sd->entity.ops = &vfe_media_ops;
2260*4882a593Smuzhiyun ret = media_entity_pads_init(&sd->entity, MSM_VFE_PADS_NUM,
2261*4882a593Smuzhiyun pads);
2262*4882a593Smuzhiyun if (ret < 0) {
2263*4882a593Smuzhiyun dev_err(dev, "Failed to init media entity: %d\n", ret);
2264*4882a593Smuzhiyun goto error_init;
2265*4882a593Smuzhiyun }
2266*4882a593Smuzhiyun
2267*4882a593Smuzhiyun ret = v4l2_device_register_subdev(v4l2_dev, sd);
2268*4882a593Smuzhiyun if (ret < 0) {
2269*4882a593Smuzhiyun dev_err(dev, "Failed to register subdev: %d\n", ret);
2270*4882a593Smuzhiyun goto error_reg_subdev;
2271*4882a593Smuzhiyun }
2272*4882a593Smuzhiyun
2273*4882a593Smuzhiyun video_out->ops = &camss_vfe_video_ops;
2274*4882a593Smuzhiyun video_out->bpl_alignment = 8;
2275*4882a593Smuzhiyun video_out->line_based = 0;
2276*4882a593Smuzhiyun if (i == VFE_LINE_PIX) {
2277*4882a593Smuzhiyun video_out->bpl_alignment = 16;
2278*4882a593Smuzhiyun video_out->line_based = 1;
2279*4882a593Smuzhiyun }
2280*4882a593Smuzhiyun snprintf(name, ARRAY_SIZE(name), "%s%d_%s%d",
2281*4882a593Smuzhiyun MSM_VFE_NAME, vfe->id, "video", i);
2282*4882a593Smuzhiyun ret = msm_video_register(video_out, v4l2_dev, name,
2283*4882a593Smuzhiyun i == VFE_LINE_PIX ? 1 : 0);
2284*4882a593Smuzhiyun if (ret < 0) {
2285*4882a593Smuzhiyun dev_err(dev, "Failed to register video node: %d\n",
2286*4882a593Smuzhiyun ret);
2287*4882a593Smuzhiyun goto error_reg_video;
2288*4882a593Smuzhiyun }
2289*4882a593Smuzhiyun
2290*4882a593Smuzhiyun ret = media_create_pad_link(
2291*4882a593Smuzhiyun &sd->entity, MSM_VFE_PAD_SRC,
2292*4882a593Smuzhiyun &video_out->vdev.entity, 0,
2293*4882a593Smuzhiyun MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED);
2294*4882a593Smuzhiyun if (ret < 0) {
2295*4882a593Smuzhiyun dev_err(dev, "Failed to link %s->%s entities: %d\n",
2296*4882a593Smuzhiyun sd->entity.name, video_out->vdev.entity.name,
2297*4882a593Smuzhiyun ret);
2298*4882a593Smuzhiyun goto error_link;
2299*4882a593Smuzhiyun }
2300*4882a593Smuzhiyun }
2301*4882a593Smuzhiyun
2302*4882a593Smuzhiyun return 0;
2303*4882a593Smuzhiyun
2304*4882a593Smuzhiyun error_link:
2305*4882a593Smuzhiyun msm_video_unregister(video_out);
2306*4882a593Smuzhiyun
2307*4882a593Smuzhiyun error_reg_video:
2308*4882a593Smuzhiyun v4l2_device_unregister_subdev(sd);
2309*4882a593Smuzhiyun
2310*4882a593Smuzhiyun error_reg_subdev:
2311*4882a593Smuzhiyun media_entity_cleanup(&sd->entity);
2312*4882a593Smuzhiyun
2313*4882a593Smuzhiyun error_init:
2314*4882a593Smuzhiyun for (i--; i >= 0; i--) {
2315*4882a593Smuzhiyun sd = &vfe->line[i].subdev;
2316*4882a593Smuzhiyun video_out = &vfe->line[i].video_out;
2317*4882a593Smuzhiyun
2318*4882a593Smuzhiyun msm_video_unregister(video_out);
2319*4882a593Smuzhiyun v4l2_device_unregister_subdev(sd);
2320*4882a593Smuzhiyun media_entity_cleanup(&sd->entity);
2321*4882a593Smuzhiyun }
2322*4882a593Smuzhiyun
2323*4882a593Smuzhiyun return ret;
2324*4882a593Smuzhiyun }
2325*4882a593Smuzhiyun
2326*4882a593Smuzhiyun /*
2327*4882a593Smuzhiyun * msm_vfe_unregister_entities - Unregister VFE module subdev node
2328*4882a593Smuzhiyun * @vfe: VFE device
2329*4882a593Smuzhiyun */
msm_vfe_unregister_entities(struct vfe_device * vfe)2330*4882a593Smuzhiyun void msm_vfe_unregister_entities(struct vfe_device *vfe)
2331*4882a593Smuzhiyun {
2332*4882a593Smuzhiyun int i;
2333*4882a593Smuzhiyun
2334*4882a593Smuzhiyun mutex_destroy(&vfe->power_lock);
2335*4882a593Smuzhiyun mutex_destroy(&vfe->stream_lock);
2336*4882a593Smuzhiyun
2337*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(vfe->line); i++) {
2338*4882a593Smuzhiyun struct v4l2_subdev *sd = &vfe->line[i].subdev;
2339*4882a593Smuzhiyun struct camss_video *video_out = &vfe->line[i].video_out;
2340*4882a593Smuzhiyun
2341*4882a593Smuzhiyun msm_video_unregister(video_out);
2342*4882a593Smuzhiyun v4l2_device_unregister_subdev(sd);
2343*4882a593Smuzhiyun media_entity_cleanup(&sd->entity);
2344*4882a593Smuzhiyun }
2345*4882a593Smuzhiyun }
2346