1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * camss-csid.h 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Qualcomm MSM Camera Subsystem - CSID (CSI Decoder) Module 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Copyright (c) 2011-2014, The Linux Foundation. All rights reserved. 8*4882a593Smuzhiyun * Copyright (C) 2015-2018 Linaro Ltd. 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun #ifndef QC_MSM_CAMSS_CSID_H 11*4882a593Smuzhiyun #define QC_MSM_CAMSS_CSID_H 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <linux/clk.h> 14*4882a593Smuzhiyun #include <media/media-entity.h> 15*4882a593Smuzhiyun #include <media/v4l2-ctrls.h> 16*4882a593Smuzhiyun #include <media/v4l2-device.h> 17*4882a593Smuzhiyun #include <media/v4l2-mediabus.h> 18*4882a593Smuzhiyun #include <media/v4l2-subdev.h> 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #define MSM_CSID_PAD_SINK 0 21*4882a593Smuzhiyun #define MSM_CSID_PAD_SRC 1 22*4882a593Smuzhiyun #define MSM_CSID_PADS_NUM 2 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun enum csid_payload_mode { 25*4882a593Smuzhiyun CSID_PAYLOAD_MODE_INCREMENTING = 0, 26*4882a593Smuzhiyun CSID_PAYLOAD_MODE_ALTERNATING_55_AA = 1, 27*4882a593Smuzhiyun CSID_PAYLOAD_MODE_ALL_ZEROES = 2, 28*4882a593Smuzhiyun CSID_PAYLOAD_MODE_ALL_ONES = 3, 29*4882a593Smuzhiyun CSID_PAYLOAD_MODE_RANDOM = 4, 30*4882a593Smuzhiyun CSID_PAYLOAD_MODE_USER_SPECIFIED = 5, 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun struct csid_testgen_config { 34*4882a593Smuzhiyun u8 enabled; 35*4882a593Smuzhiyun enum csid_payload_mode payload_mode; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun struct csid_phy_config { 39*4882a593Smuzhiyun u8 csiphy_id; 40*4882a593Smuzhiyun u8 lane_cnt; 41*4882a593Smuzhiyun u32 lane_assign; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun struct csid_device { 45*4882a593Smuzhiyun struct camss *camss; 46*4882a593Smuzhiyun u8 id; 47*4882a593Smuzhiyun struct v4l2_subdev subdev; 48*4882a593Smuzhiyun struct media_pad pads[MSM_CSID_PADS_NUM]; 49*4882a593Smuzhiyun void __iomem *base; 50*4882a593Smuzhiyun u32 irq; 51*4882a593Smuzhiyun char irq_name[30]; 52*4882a593Smuzhiyun struct camss_clock *clock; 53*4882a593Smuzhiyun int nclocks; 54*4882a593Smuzhiyun struct regulator *vdda; 55*4882a593Smuzhiyun struct completion reset_complete; 56*4882a593Smuzhiyun struct csid_testgen_config testgen; 57*4882a593Smuzhiyun struct csid_phy_config phy; 58*4882a593Smuzhiyun struct v4l2_mbus_framefmt fmt[MSM_CSID_PADS_NUM]; 59*4882a593Smuzhiyun struct v4l2_ctrl_handler ctrls; 60*4882a593Smuzhiyun struct v4l2_ctrl *testgen_mode; 61*4882a593Smuzhiyun const struct csid_format *formats; 62*4882a593Smuzhiyun unsigned int nformats; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun struct resources; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun int msm_csid_subdev_init(struct camss *camss, struct csid_device *csid, 68*4882a593Smuzhiyun const struct resources *res, u8 id); 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun int msm_csid_register_entity(struct csid_device *csid, 71*4882a593Smuzhiyun struct v4l2_device *v4l2_dev); 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun void msm_csid_unregister_entity(struct csid_device *csid); 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun void msm_csid_get_csid_id(struct media_entity *entity, u8 *id); 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun #endif /* QC_MSM_CAMSS_CSID_H */ 78