1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * ispstat.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * TI OMAP3 ISP - Statistics core
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (C) 2010 Nokia Corporation
8*4882a593Smuzhiyun * Copyright (C) 2009 Texas Instruments, Inc
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * Contacts: David Cohen <dacohen@gmail.com>
11*4882a593Smuzhiyun * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
12*4882a593Smuzhiyun * Sakari Ailus <sakari.ailus@iki.fi>
13*4882a593Smuzhiyun */
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include <linux/dma-mapping.h>
16*4882a593Smuzhiyun #include <linux/slab.h>
17*4882a593Smuzhiyun #include <linux/timekeeping.h>
18*4882a593Smuzhiyun #include <linux/uaccess.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include "isp.h"
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define ISP_STAT_USES_DMAENGINE(stat) ((stat)->dma_ch != NULL)
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun /*
25*4882a593Smuzhiyun * MAGIC_SIZE must always be the greatest common divisor of
26*4882a593Smuzhiyun * AEWB_PACKET_SIZE and AF_PAXEL_SIZE.
27*4882a593Smuzhiyun */
28*4882a593Smuzhiyun #define MAGIC_SIZE 16
29*4882a593Smuzhiyun #define MAGIC_NUM 0x55
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun /* HACK: AF module seems to be writing one more paxel data than it should. */
32*4882a593Smuzhiyun #define AF_EXTRA_DATA OMAP3ISP_AF_PAXEL_SIZE
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun /*
35*4882a593Smuzhiyun * HACK: H3A modules go to an invalid state after have a SBL overflow. It makes
36*4882a593Smuzhiyun * the next buffer to start to be written in the same point where the overflow
37*4882a593Smuzhiyun * occurred instead of the configured address. The only known way to make it to
38*4882a593Smuzhiyun * go back to a valid state is having a valid buffer processing. Of course it
39*4882a593Smuzhiyun * requires at least a doubled buffer size to avoid an access to invalid memory
40*4882a593Smuzhiyun * region. But it does not fix everything. It may happen more than one
41*4882a593Smuzhiyun * consecutive SBL overflows. In that case, it might be unpredictable how many
42*4882a593Smuzhiyun * buffers the allocated memory should fit. For that case, a recover
43*4882a593Smuzhiyun * configuration was created. It produces the minimum buffer size for each H3A
44*4882a593Smuzhiyun * module and decrease the change for more SBL overflows. This recover state
45*4882a593Smuzhiyun * will be enabled every time a SBL overflow occur. As the output buffer size
46*4882a593Smuzhiyun * isn't big, it's possible to have an extra size able to fit many recover
47*4882a593Smuzhiyun * buffers making it extreamily unlikely to have an access to invalid memory
48*4882a593Smuzhiyun * region.
49*4882a593Smuzhiyun */
50*4882a593Smuzhiyun #define NUM_H3A_RECOVER_BUFS 10
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun /*
53*4882a593Smuzhiyun * HACK: Because of HW issues the generic layer sometimes need to have
54*4882a593Smuzhiyun * different behaviour for different statistic modules.
55*4882a593Smuzhiyun */
56*4882a593Smuzhiyun #define IS_H3A_AF(stat) ((stat) == &(stat)->isp->isp_af)
57*4882a593Smuzhiyun #define IS_H3A_AEWB(stat) ((stat) == &(stat)->isp->isp_aewb)
58*4882a593Smuzhiyun #define IS_H3A(stat) (IS_H3A_AF(stat) || IS_H3A_AEWB(stat))
59*4882a593Smuzhiyun
__isp_stat_buf_sync_magic(struct ispstat * stat,struct ispstat_buffer * buf,u32 buf_size,enum dma_data_direction dir,void (* dma_sync)(struct device *,dma_addr_t,unsigned long,size_t,enum dma_data_direction))60*4882a593Smuzhiyun static void __isp_stat_buf_sync_magic(struct ispstat *stat,
61*4882a593Smuzhiyun struct ispstat_buffer *buf,
62*4882a593Smuzhiyun u32 buf_size, enum dma_data_direction dir,
63*4882a593Smuzhiyun void (*dma_sync)(struct device *,
64*4882a593Smuzhiyun dma_addr_t, unsigned long, size_t,
65*4882a593Smuzhiyun enum dma_data_direction))
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun /* Sync the initial and final magic words. */
68*4882a593Smuzhiyun dma_sync(stat->isp->dev, buf->dma_addr, 0, MAGIC_SIZE, dir);
69*4882a593Smuzhiyun dma_sync(stat->isp->dev, buf->dma_addr + (buf_size & PAGE_MASK),
70*4882a593Smuzhiyun buf_size & ~PAGE_MASK, MAGIC_SIZE, dir);
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun
isp_stat_buf_sync_magic_for_device(struct ispstat * stat,struct ispstat_buffer * buf,u32 buf_size,enum dma_data_direction dir)73*4882a593Smuzhiyun static void isp_stat_buf_sync_magic_for_device(struct ispstat *stat,
74*4882a593Smuzhiyun struct ispstat_buffer *buf,
75*4882a593Smuzhiyun u32 buf_size,
76*4882a593Smuzhiyun enum dma_data_direction dir)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun if (ISP_STAT_USES_DMAENGINE(stat))
79*4882a593Smuzhiyun return;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun __isp_stat_buf_sync_magic(stat, buf, buf_size, dir,
82*4882a593Smuzhiyun dma_sync_single_range_for_device);
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun
isp_stat_buf_sync_magic_for_cpu(struct ispstat * stat,struct ispstat_buffer * buf,u32 buf_size,enum dma_data_direction dir)85*4882a593Smuzhiyun static void isp_stat_buf_sync_magic_for_cpu(struct ispstat *stat,
86*4882a593Smuzhiyun struct ispstat_buffer *buf,
87*4882a593Smuzhiyun u32 buf_size,
88*4882a593Smuzhiyun enum dma_data_direction dir)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun if (ISP_STAT_USES_DMAENGINE(stat))
91*4882a593Smuzhiyun return;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun __isp_stat_buf_sync_magic(stat, buf, buf_size, dir,
94*4882a593Smuzhiyun dma_sync_single_range_for_cpu);
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
isp_stat_buf_check_magic(struct ispstat * stat,struct ispstat_buffer * buf)97*4882a593Smuzhiyun static int isp_stat_buf_check_magic(struct ispstat *stat,
98*4882a593Smuzhiyun struct ispstat_buffer *buf)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun const u32 buf_size = IS_H3A_AF(stat) ?
101*4882a593Smuzhiyun buf->buf_size + AF_EXTRA_DATA : buf->buf_size;
102*4882a593Smuzhiyun u8 *w;
103*4882a593Smuzhiyun u8 *end;
104*4882a593Smuzhiyun int ret = -EINVAL;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun isp_stat_buf_sync_magic_for_cpu(stat, buf, buf_size, DMA_FROM_DEVICE);
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun /* Checking initial magic numbers. They shouldn't be here anymore. */
109*4882a593Smuzhiyun for (w = buf->virt_addr, end = w + MAGIC_SIZE; w < end; w++)
110*4882a593Smuzhiyun if (likely(*w != MAGIC_NUM))
111*4882a593Smuzhiyun ret = 0;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun if (ret) {
114*4882a593Smuzhiyun dev_dbg(stat->isp->dev,
115*4882a593Smuzhiyun "%s: beginning magic check does not match.\n",
116*4882a593Smuzhiyun stat->subdev.name);
117*4882a593Smuzhiyun return ret;
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun /* Checking magic numbers at the end. They must be still here. */
121*4882a593Smuzhiyun for (w = buf->virt_addr + buf_size, end = w + MAGIC_SIZE;
122*4882a593Smuzhiyun w < end; w++) {
123*4882a593Smuzhiyun if (unlikely(*w != MAGIC_NUM)) {
124*4882a593Smuzhiyun dev_dbg(stat->isp->dev,
125*4882a593Smuzhiyun "%s: ending magic check does not match.\n",
126*4882a593Smuzhiyun stat->subdev.name);
127*4882a593Smuzhiyun return -EINVAL;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun isp_stat_buf_sync_magic_for_device(stat, buf, buf_size,
132*4882a593Smuzhiyun DMA_FROM_DEVICE);
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun return 0;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun
isp_stat_buf_insert_magic(struct ispstat * stat,struct ispstat_buffer * buf)137*4882a593Smuzhiyun static void isp_stat_buf_insert_magic(struct ispstat *stat,
138*4882a593Smuzhiyun struct ispstat_buffer *buf)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun const u32 buf_size = IS_H3A_AF(stat) ?
141*4882a593Smuzhiyun stat->buf_size + AF_EXTRA_DATA : stat->buf_size;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun isp_stat_buf_sync_magic_for_cpu(stat, buf, buf_size, DMA_FROM_DEVICE);
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun /*
146*4882a593Smuzhiyun * Inserting MAGIC_NUM at the beginning and end of the buffer.
147*4882a593Smuzhiyun * buf->buf_size is set only after the buffer is queued. For now the
148*4882a593Smuzhiyun * right buf_size for the current configuration is pointed by
149*4882a593Smuzhiyun * stat->buf_size.
150*4882a593Smuzhiyun */
151*4882a593Smuzhiyun memset(buf->virt_addr, MAGIC_NUM, MAGIC_SIZE);
152*4882a593Smuzhiyun memset(buf->virt_addr + buf_size, MAGIC_NUM, MAGIC_SIZE);
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun isp_stat_buf_sync_magic_for_device(stat, buf, buf_size,
155*4882a593Smuzhiyun DMA_BIDIRECTIONAL);
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun
isp_stat_buf_sync_for_device(struct ispstat * stat,struct ispstat_buffer * buf)158*4882a593Smuzhiyun static void isp_stat_buf_sync_for_device(struct ispstat *stat,
159*4882a593Smuzhiyun struct ispstat_buffer *buf)
160*4882a593Smuzhiyun {
161*4882a593Smuzhiyun if (ISP_STAT_USES_DMAENGINE(stat))
162*4882a593Smuzhiyun return;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun dma_sync_sg_for_device(stat->isp->dev, buf->sgt.sgl,
165*4882a593Smuzhiyun buf->sgt.nents, DMA_FROM_DEVICE);
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
isp_stat_buf_sync_for_cpu(struct ispstat * stat,struct ispstat_buffer * buf)168*4882a593Smuzhiyun static void isp_stat_buf_sync_for_cpu(struct ispstat *stat,
169*4882a593Smuzhiyun struct ispstat_buffer *buf)
170*4882a593Smuzhiyun {
171*4882a593Smuzhiyun if (ISP_STAT_USES_DMAENGINE(stat))
172*4882a593Smuzhiyun return;
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun dma_sync_sg_for_cpu(stat->isp->dev, buf->sgt.sgl,
175*4882a593Smuzhiyun buf->sgt.nents, DMA_FROM_DEVICE);
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun
isp_stat_buf_clear(struct ispstat * stat)178*4882a593Smuzhiyun static void isp_stat_buf_clear(struct ispstat *stat)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun int i;
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun for (i = 0; i < STAT_MAX_BUFS; i++)
183*4882a593Smuzhiyun stat->buf[i].empty = 1;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun static struct ispstat_buffer *
__isp_stat_buf_find(struct ispstat * stat,int look_empty)187*4882a593Smuzhiyun __isp_stat_buf_find(struct ispstat *stat, int look_empty)
188*4882a593Smuzhiyun {
189*4882a593Smuzhiyun struct ispstat_buffer *found = NULL;
190*4882a593Smuzhiyun int i;
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun for (i = 0; i < STAT_MAX_BUFS; i++) {
193*4882a593Smuzhiyun struct ispstat_buffer *curr = &stat->buf[i];
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun /*
196*4882a593Smuzhiyun * Don't select the buffer which is being copied to
197*4882a593Smuzhiyun * userspace or used by the module.
198*4882a593Smuzhiyun */
199*4882a593Smuzhiyun if (curr == stat->locked_buf || curr == stat->active_buf)
200*4882a593Smuzhiyun continue;
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun /* Don't select uninitialised buffers if it's not required */
203*4882a593Smuzhiyun if (!look_empty && curr->empty)
204*4882a593Smuzhiyun continue;
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun /* Pick uninitialised buffer over anything else if look_empty */
207*4882a593Smuzhiyun if (curr->empty) {
208*4882a593Smuzhiyun found = curr;
209*4882a593Smuzhiyun break;
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun /* Choose the oldest buffer */
213*4882a593Smuzhiyun if (!found ||
214*4882a593Smuzhiyun (s32)curr->frame_number - (s32)found->frame_number < 0)
215*4882a593Smuzhiyun found = curr;
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun return found;
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun static inline struct ispstat_buffer *
isp_stat_buf_find_oldest(struct ispstat * stat)222*4882a593Smuzhiyun isp_stat_buf_find_oldest(struct ispstat *stat)
223*4882a593Smuzhiyun {
224*4882a593Smuzhiyun return __isp_stat_buf_find(stat, 0);
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun static inline struct ispstat_buffer *
isp_stat_buf_find_oldest_or_empty(struct ispstat * stat)228*4882a593Smuzhiyun isp_stat_buf_find_oldest_or_empty(struct ispstat *stat)
229*4882a593Smuzhiyun {
230*4882a593Smuzhiyun return __isp_stat_buf_find(stat, 1);
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun
isp_stat_buf_queue(struct ispstat * stat)233*4882a593Smuzhiyun static int isp_stat_buf_queue(struct ispstat *stat)
234*4882a593Smuzhiyun {
235*4882a593Smuzhiyun if (!stat->active_buf)
236*4882a593Smuzhiyun return STAT_NO_BUF;
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun ktime_get_ts64(&stat->active_buf->ts);
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun stat->active_buf->buf_size = stat->buf_size;
241*4882a593Smuzhiyun if (isp_stat_buf_check_magic(stat, stat->active_buf)) {
242*4882a593Smuzhiyun dev_dbg(stat->isp->dev, "%s: data wasn't properly written.\n",
243*4882a593Smuzhiyun stat->subdev.name);
244*4882a593Smuzhiyun return STAT_NO_BUF;
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun stat->active_buf->config_counter = stat->config_counter;
247*4882a593Smuzhiyun stat->active_buf->frame_number = stat->frame_number;
248*4882a593Smuzhiyun stat->active_buf->empty = 0;
249*4882a593Smuzhiyun stat->active_buf = NULL;
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun return STAT_BUF_DONE;
252*4882a593Smuzhiyun }
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun /* Get next free buffer to write the statistics to and mark it active. */
isp_stat_buf_next(struct ispstat * stat)255*4882a593Smuzhiyun static void isp_stat_buf_next(struct ispstat *stat)
256*4882a593Smuzhiyun {
257*4882a593Smuzhiyun if (unlikely(stat->active_buf))
258*4882a593Smuzhiyun /* Overwriting unused active buffer */
259*4882a593Smuzhiyun dev_dbg(stat->isp->dev,
260*4882a593Smuzhiyun "%s: new buffer requested without queuing active one.\n",
261*4882a593Smuzhiyun stat->subdev.name);
262*4882a593Smuzhiyun else
263*4882a593Smuzhiyun stat->active_buf = isp_stat_buf_find_oldest_or_empty(stat);
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun
isp_stat_buf_release(struct ispstat * stat)266*4882a593Smuzhiyun static void isp_stat_buf_release(struct ispstat *stat)
267*4882a593Smuzhiyun {
268*4882a593Smuzhiyun unsigned long flags;
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun isp_stat_buf_sync_for_device(stat, stat->locked_buf);
271*4882a593Smuzhiyun spin_lock_irqsave(&stat->isp->stat_lock, flags);
272*4882a593Smuzhiyun stat->locked_buf = NULL;
273*4882a593Smuzhiyun spin_unlock_irqrestore(&stat->isp->stat_lock, flags);
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun /* Get buffer to userspace. */
isp_stat_buf_get(struct ispstat * stat,struct omap3isp_stat_data * data)277*4882a593Smuzhiyun static struct ispstat_buffer *isp_stat_buf_get(struct ispstat *stat,
278*4882a593Smuzhiyun struct omap3isp_stat_data *data)
279*4882a593Smuzhiyun {
280*4882a593Smuzhiyun int rval = 0;
281*4882a593Smuzhiyun unsigned long flags;
282*4882a593Smuzhiyun struct ispstat_buffer *buf;
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun spin_lock_irqsave(&stat->isp->stat_lock, flags);
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun while (1) {
287*4882a593Smuzhiyun buf = isp_stat_buf_find_oldest(stat);
288*4882a593Smuzhiyun if (!buf) {
289*4882a593Smuzhiyun spin_unlock_irqrestore(&stat->isp->stat_lock, flags);
290*4882a593Smuzhiyun dev_dbg(stat->isp->dev, "%s: cannot find a buffer.\n",
291*4882a593Smuzhiyun stat->subdev.name);
292*4882a593Smuzhiyun return ERR_PTR(-EBUSY);
293*4882a593Smuzhiyun }
294*4882a593Smuzhiyun if (isp_stat_buf_check_magic(stat, buf)) {
295*4882a593Smuzhiyun dev_dbg(stat->isp->dev,
296*4882a593Smuzhiyun "%s: current buffer has corrupted data\n.",
297*4882a593Smuzhiyun stat->subdev.name);
298*4882a593Smuzhiyun /* Mark empty because it doesn't have valid data. */
299*4882a593Smuzhiyun buf->empty = 1;
300*4882a593Smuzhiyun } else {
301*4882a593Smuzhiyun /* Buffer isn't corrupted. */
302*4882a593Smuzhiyun break;
303*4882a593Smuzhiyun }
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun stat->locked_buf = buf;
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun spin_unlock_irqrestore(&stat->isp->stat_lock, flags);
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun if (buf->buf_size > data->buf_size) {
311*4882a593Smuzhiyun dev_warn(stat->isp->dev,
312*4882a593Smuzhiyun "%s: userspace's buffer size is not enough.\n",
313*4882a593Smuzhiyun stat->subdev.name);
314*4882a593Smuzhiyun isp_stat_buf_release(stat);
315*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun isp_stat_buf_sync_for_cpu(stat, buf);
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun rval = copy_to_user(data->buf,
321*4882a593Smuzhiyun buf->virt_addr,
322*4882a593Smuzhiyun buf->buf_size);
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun if (rval) {
325*4882a593Smuzhiyun dev_info(stat->isp->dev,
326*4882a593Smuzhiyun "%s: failed copying %d bytes of stat data\n",
327*4882a593Smuzhiyun stat->subdev.name, rval);
328*4882a593Smuzhiyun buf = ERR_PTR(-EFAULT);
329*4882a593Smuzhiyun isp_stat_buf_release(stat);
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun return buf;
333*4882a593Smuzhiyun }
334*4882a593Smuzhiyun
isp_stat_bufs_free(struct ispstat * stat)335*4882a593Smuzhiyun static void isp_stat_bufs_free(struct ispstat *stat)
336*4882a593Smuzhiyun {
337*4882a593Smuzhiyun struct device *dev = ISP_STAT_USES_DMAENGINE(stat)
338*4882a593Smuzhiyun ? NULL : stat->isp->dev;
339*4882a593Smuzhiyun unsigned int i;
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun for (i = 0; i < STAT_MAX_BUFS; i++) {
342*4882a593Smuzhiyun struct ispstat_buffer *buf = &stat->buf[i];
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun if (!buf->virt_addr)
345*4882a593Smuzhiyun continue;
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun sg_free_table(&buf->sgt);
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun dma_free_coherent(dev, stat->buf_alloc_size, buf->virt_addr,
350*4882a593Smuzhiyun buf->dma_addr);
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun buf->dma_addr = 0;
353*4882a593Smuzhiyun buf->virt_addr = NULL;
354*4882a593Smuzhiyun buf->empty = 1;
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun dev_dbg(stat->isp->dev, "%s: all buffers were freed.\n",
358*4882a593Smuzhiyun stat->subdev.name);
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun stat->buf_alloc_size = 0;
361*4882a593Smuzhiyun stat->active_buf = NULL;
362*4882a593Smuzhiyun }
363*4882a593Smuzhiyun
isp_stat_bufs_alloc_one(struct device * dev,struct ispstat_buffer * buf,unsigned int size)364*4882a593Smuzhiyun static int isp_stat_bufs_alloc_one(struct device *dev,
365*4882a593Smuzhiyun struct ispstat_buffer *buf,
366*4882a593Smuzhiyun unsigned int size)
367*4882a593Smuzhiyun {
368*4882a593Smuzhiyun int ret;
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun buf->virt_addr = dma_alloc_coherent(dev, size, &buf->dma_addr,
371*4882a593Smuzhiyun GFP_KERNEL);
372*4882a593Smuzhiyun if (!buf->virt_addr)
373*4882a593Smuzhiyun return -ENOMEM;
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun ret = dma_get_sgtable(dev, &buf->sgt, buf->virt_addr, buf->dma_addr,
376*4882a593Smuzhiyun size);
377*4882a593Smuzhiyun if (ret < 0) {
378*4882a593Smuzhiyun dma_free_coherent(dev, size, buf->virt_addr, buf->dma_addr);
379*4882a593Smuzhiyun buf->virt_addr = NULL;
380*4882a593Smuzhiyun buf->dma_addr = 0;
381*4882a593Smuzhiyun return ret;
382*4882a593Smuzhiyun }
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun return 0;
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun /*
388*4882a593Smuzhiyun * The device passed to the DMA API depends on whether the statistics block uses
389*4882a593Smuzhiyun * ISP DMA, external DMA or PIO to transfer data.
390*4882a593Smuzhiyun *
391*4882a593Smuzhiyun * The first case (for the AEWB and AF engines) passes the ISP device, resulting
392*4882a593Smuzhiyun * in the DMA buffers being mapped through the ISP IOMMU.
393*4882a593Smuzhiyun *
394*4882a593Smuzhiyun * The second case (for the histogram engine) should pass the DMA engine device.
395*4882a593Smuzhiyun * As that device isn't accessible through the OMAP DMA engine API the driver
396*4882a593Smuzhiyun * passes NULL instead, resulting in the buffers being mapped directly as
397*4882a593Smuzhiyun * physical pages.
398*4882a593Smuzhiyun *
399*4882a593Smuzhiyun * The third case (for the histogram engine) doesn't require any mapping. The
400*4882a593Smuzhiyun * buffers could be allocated with kmalloc/vmalloc, but we still use
401*4882a593Smuzhiyun * dma_alloc_coherent() for consistency purpose.
402*4882a593Smuzhiyun */
isp_stat_bufs_alloc(struct ispstat * stat,u32 size)403*4882a593Smuzhiyun static int isp_stat_bufs_alloc(struct ispstat *stat, u32 size)
404*4882a593Smuzhiyun {
405*4882a593Smuzhiyun struct device *dev = ISP_STAT_USES_DMAENGINE(stat)
406*4882a593Smuzhiyun ? NULL : stat->isp->dev;
407*4882a593Smuzhiyun unsigned long flags;
408*4882a593Smuzhiyun unsigned int i;
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun spin_lock_irqsave(&stat->isp->stat_lock, flags);
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun BUG_ON(stat->locked_buf != NULL);
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun /* Are the old buffers big enough? */
415*4882a593Smuzhiyun if (stat->buf_alloc_size >= size) {
416*4882a593Smuzhiyun spin_unlock_irqrestore(&stat->isp->stat_lock, flags);
417*4882a593Smuzhiyun return 0;
418*4882a593Smuzhiyun }
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun if (stat->state != ISPSTAT_DISABLED || stat->buf_processing) {
421*4882a593Smuzhiyun dev_info(stat->isp->dev,
422*4882a593Smuzhiyun "%s: trying to allocate memory when busy\n",
423*4882a593Smuzhiyun stat->subdev.name);
424*4882a593Smuzhiyun spin_unlock_irqrestore(&stat->isp->stat_lock, flags);
425*4882a593Smuzhiyun return -EBUSY;
426*4882a593Smuzhiyun }
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun spin_unlock_irqrestore(&stat->isp->stat_lock, flags);
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun isp_stat_bufs_free(stat);
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun stat->buf_alloc_size = size;
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun for (i = 0; i < STAT_MAX_BUFS; i++) {
435*4882a593Smuzhiyun struct ispstat_buffer *buf = &stat->buf[i];
436*4882a593Smuzhiyun int ret;
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun ret = isp_stat_bufs_alloc_one(dev, buf, size);
439*4882a593Smuzhiyun if (ret < 0) {
440*4882a593Smuzhiyun dev_err(stat->isp->dev,
441*4882a593Smuzhiyun "%s: Failed to allocate DMA buffer %u\n",
442*4882a593Smuzhiyun stat->subdev.name, i);
443*4882a593Smuzhiyun isp_stat_bufs_free(stat);
444*4882a593Smuzhiyun return ret;
445*4882a593Smuzhiyun }
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun buf->empty = 1;
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun dev_dbg(stat->isp->dev,
450*4882a593Smuzhiyun "%s: buffer[%u] allocated. dma=%pad virt=%p",
451*4882a593Smuzhiyun stat->subdev.name, i, &buf->dma_addr, buf->virt_addr);
452*4882a593Smuzhiyun }
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun return 0;
455*4882a593Smuzhiyun }
456*4882a593Smuzhiyun
isp_stat_queue_event(struct ispstat * stat,int err)457*4882a593Smuzhiyun static void isp_stat_queue_event(struct ispstat *stat, int err)
458*4882a593Smuzhiyun {
459*4882a593Smuzhiyun struct video_device *vdev = stat->subdev.devnode;
460*4882a593Smuzhiyun struct v4l2_event event;
461*4882a593Smuzhiyun struct omap3isp_stat_event_status *status = (void *)event.u.data;
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun memset(&event, 0, sizeof(event));
464*4882a593Smuzhiyun if (!err) {
465*4882a593Smuzhiyun status->frame_number = stat->frame_number;
466*4882a593Smuzhiyun status->config_counter = stat->config_counter;
467*4882a593Smuzhiyun } else {
468*4882a593Smuzhiyun status->buf_err = 1;
469*4882a593Smuzhiyun }
470*4882a593Smuzhiyun event.type = stat->event_type;
471*4882a593Smuzhiyun v4l2_event_queue(vdev, &event);
472*4882a593Smuzhiyun }
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun /*
476*4882a593Smuzhiyun * omap3isp_stat_request_statistics - Request statistics.
477*4882a593Smuzhiyun * @data: Pointer to return statistics data.
478*4882a593Smuzhiyun *
479*4882a593Smuzhiyun * Returns 0 if successful.
480*4882a593Smuzhiyun */
omap3isp_stat_request_statistics(struct ispstat * stat,struct omap3isp_stat_data * data)481*4882a593Smuzhiyun int omap3isp_stat_request_statistics(struct ispstat *stat,
482*4882a593Smuzhiyun struct omap3isp_stat_data *data)
483*4882a593Smuzhiyun {
484*4882a593Smuzhiyun struct ispstat_buffer *buf;
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun if (stat->state != ISPSTAT_ENABLED) {
487*4882a593Smuzhiyun dev_dbg(stat->isp->dev, "%s: engine not enabled.\n",
488*4882a593Smuzhiyun stat->subdev.name);
489*4882a593Smuzhiyun return -EINVAL;
490*4882a593Smuzhiyun }
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun mutex_lock(&stat->ioctl_lock);
493*4882a593Smuzhiyun buf = isp_stat_buf_get(stat, data);
494*4882a593Smuzhiyun if (IS_ERR(buf)) {
495*4882a593Smuzhiyun mutex_unlock(&stat->ioctl_lock);
496*4882a593Smuzhiyun return PTR_ERR(buf);
497*4882a593Smuzhiyun }
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun data->ts.tv_sec = buf->ts.tv_sec;
500*4882a593Smuzhiyun data->ts.tv_usec = buf->ts.tv_nsec / NSEC_PER_USEC;
501*4882a593Smuzhiyun data->config_counter = buf->config_counter;
502*4882a593Smuzhiyun data->frame_number = buf->frame_number;
503*4882a593Smuzhiyun data->buf_size = buf->buf_size;
504*4882a593Smuzhiyun
505*4882a593Smuzhiyun buf->empty = 1;
506*4882a593Smuzhiyun isp_stat_buf_release(stat);
507*4882a593Smuzhiyun mutex_unlock(&stat->ioctl_lock);
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun return 0;
510*4882a593Smuzhiyun }
511*4882a593Smuzhiyun
omap3isp_stat_request_statistics_time32(struct ispstat * stat,struct omap3isp_stat_data_time32 * data)512*4882a593Smuzhiyun int omap3isp_stat_request_statistics_time32(struct ispstat *stat,
513*4882a593Smuzhiyun struct omap3isp_stat_data_time32 *data)
514*4882a593Smuzhiyun {
515*4882a593Smuzhiyun struct omap3isp_stat_data data64;
516*4882a593Smuzhiyun int ret;
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun ret = omap3isp_stat_request_statistics(stat, &data64);
519*4882a593Smuzhiyun if (ret)
520*4882a593Smuzhiyun return ret;
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun data->ts.tv_sec = data64.ts.tv_sec;
523*4882a593Smuzhiyun data->ts.tv_usec = data64.ts.tv_usec;
524*4882a593Smuzhiyun memcpy(&data->buf, &data64.buf, sizeof(*data) - sizeof(data->ts));
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun return 0;
527*4882a593Smuzhiyun }
528*4882a593Smuzhiyun
529*4882a593Smuzhiyun /*
530*4882a593Smuzhiyun * omap3isp_stat_config - Receives new statistic engine configuration.
531*4882a593Smuzhiyun * @new_conf: Pointer to config structure.
532*4882a593Smuzhiyun *
533*4882a593Smuzhiyun * Returns 0 if successful, -EINVAL if new_conf pointer is NULL, -ENOMEM if
534*4882a593Smuzhiyun * was unable to allocate memory for the buffer, or other errors if parameters
535*4882a593Smuzhiyun * are invalid.
536*4882a593Smuzhiyun */
omap3isp_stat_config(struct ispstat * stat,void * new_conf)537*4882a593Smuzhiyun int omap3isp_stat_config(struct ispstat *stat, void *new_conf)
538*4882a593Smuzhiyun {
539*4882a593Smuzhiyun int ret;
540*4882a593Smuzhiyun unsigned long irqflags;
541*4882a593Smuzhiyun struct ispstat_generic_config *user_cfg = new_conf;
542*4882a593Smuzhiyun u32 buf_size = user_cfg->buf_size;
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun mutex_lock(&stat->ioctl_lock);
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun dev_dbg(stat->isp->dev,
547*4882a593Smuzhiyun "%s: configuring module with buffer size=0x%08lx\n",
548*4882a593Smuzhiyun stat->subdev.name, (unsigned long)buf_size);
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun ret = stat->ops->validate_params(stat, new_conf);
551*4882a593Smuzhiyun if (ret) {
552*4882a593Smuzhiyun mutex_unlock(&stat->ioctl_lock);
553*4882a593Smuzhiyun dev_dbg(stat->isp->dev, "%s: configuration values are invalid.\n",
554*4882a593Smuzhiyun stat->subdev.name);
555*4882a593Smuzhiyun return ret;
556*4882a593Smuzhiyun }
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun if (buf_size != user_cfg->buf_size)
559*4882a593Smuzhiyun dev_dbg(stat->isp->dev,
560*4882a593Smuzhiyun "%s: driver has corrected buffer size request to 0x%08lx\n",
561*4882a593Smuzhiyun stat->subdev.name,
562*4882a593Smuzhiyun (unsigned long)user_cfg->buf_size);
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun /*
565*4882a593Smuzhiyun * Hack: H3A modules may need a doubled buffer size to avoid access
566*4882a593Smuzhiyun * to a invalid memory address after a SBL overflow.
567*4882a593Smuzhiyun * The buffer size is always PAGE_ALIGNED.
568*4882a593Smuzhiyun * Hack 2: MAGIC_SIZE is added to buf_size so a magic word can be
569*4882a593Smuzhiyun * inserted at the end to data integrity check purpose.
570*4882a593Smuzhiyun * Hack 3: AF module writes one paxel data more than it should, so
571*4882a593Smuzhiyun * the buffer allocation must consider it to avoid invalid memory
572*4882a593Smuzhiyun * access.
573*4882a593Smuzhiyun * Hack 4: H3A need to allocate extra space for the recover state.
574*4882a593Smuzhiyun */
575*4882a593Smuzhiyun if (IS_H3A(stat)) {
576*4882a593Smuzhiyun buf_size = user_cfg->buf_size * 2 + MAGIC_SIZE;
577*4882a593Smuzhiyun if (IS_H3A_AF(stat))
578*4882a593Smuzhiyun /*
579*4882a593Smuzhiyun * Adding one extra paxel data size for each recover
580*4882a593Smuzhiyun * buffer + 2 regular ones.
581*4882a593Smuzhiyun */
582*4882a593Smuzhiyun buf_size += AF_EXTRA_DATA * (NUM_H3A_RECOVER_BUFS + 2);
583*4882a593Smuzhiyun if (stat->recover_priv) {
584*4882a593Smuzhiyun struct ispstat_generic_config *recover_cfg =
585*4882a593Smuzhiyun stat->recover_priv;
586*4882a593Smuzhiyun buf_size += recover_cfg->buf_size *
587*4882a593Smuzhiyun NUM_H3A_RECOVER_BUFS;
588*4882a593Smuzhiyun }
589*4882a593Smuzhiyun buf_size = PAGE_ALIGN(buf_size);
590*4882a593Smuzhiyun } else { /* Histogram */
591*4882a593Smuzhiyun buf_size = PAGE_ALIGN(user_cfg->buf_size + MAGIC_SIZE);
592*4882a593Smuzhiyun }
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun ret = isp_stat_bufs_alloc(stat, buf_size);
595*4882a593Smuzhiyun if (ret) {
596*4882a593Smuzhiyun mutex_unlock(&stat->ioctl_lock);
597*4882a593Smuzhiyun return ret;
598*4882a593Smuzhiyun }
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun spin_lock_irqsave(&stat->isp->stat_lock, irqflags);
601*4882a593Smuzhiyun stat->ops->set_params(stat, new_conf);
602*4882a593Smuzhiyun spin_unlock_irqrestore(&stat->isp->stat_lock, irqflags);
603*4882a593Smuzhiyun
604*4882a593Smuzhiyun /*
605*4882a593Smuzhiyun * Returning the right future config_counter for this setup, so
606*4882a593Smuzhiyun * userspace can *know* when it has been applied.
607*4882a593Smuzhiyun */
608*4882a593Smuzhiyun user_cfg->config_counter = stat->config_counter + stat->inc_config;
609*4882a593Smuzhiyun
610*4882a593Smuzhiyun /* Module has a valid configuration. */
611*4882a593Smuzhiyun stat->configured = 1;
612*4882a593Smuzhiyun dev_dbg(stat->isp->dev,
613*4882a593Smuzhiyun "%s: module has been successfully configured.\n",
614*4882a593Smuzhiyun stat->subdev.name);
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun mutex_unlock(&stat->ioctl_lock);
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun return 0;
619*4882a593Smuzhiyun }
620*4882a593Smuzhiyun
621*4882a593Smuzhiyun /*
622*4882a593Smuzhiyun * isp_stat_buf_process - Process statistic buffers.
623*4882a593Smuzhiyun * @buf_state: points out if buffer is ready to be processed. It's necessary
624*4882a593Smuzhiyun * because histogram needs to copy the data from internal memory
625*4882a593Smuzhiyun * before be able to process the buffer.
626*4882a593Smuzhiyun */
isp_stat_buf_process(struct ispstat * stat,int buf_state)627*4882a593Smuzhiyun static int isp_stat_buf_process(struct ispstat *stat, int buf_state)
628*4882a593Smuzhiyun {
629*4882a593Smuzhiyun int ret = STAT_NO_BUF;
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun if (!atomic_add_unless(&stat->buf_err, -1, 0) &&
632*4882a593Smuzhiyun buf_state == STAT_BUF_DONE && stat->state == ISPSTAT_ENABLED) {
633*4882a593Smuzhiyun ret = isp_stat_buf_queue(stat);
634*4882a593Smuzhiyun isp_stat_buf_next(stat);
635*4882a593Smuzhiyun }
636*4882a593Smuzhiyun
637*4882a593Smuzhiyun return ret;
638*4882a593Smuzhiyun }
639*4882a593Smuzhiyun
omap3isp_stat_pcr_busy(struct ispstat * stat)640*4882a593Smuzhiyun int omap3isp_stat_pcr_busy(struct ispstat *stat)
641*4882a593Smuzhiyun {
642*4882a593Smuzhiyun return stat->ops->busy(stat);
643*4882a593Smuzhiyun }
644*4882a593Smuzhiyun
omap3isp_stat_busy(struct ispstat * stat)645*4882a593Smuzhiyun int omap3isp_stat_busy(struct ispstat *stat)
646*4882a593Smuzhiyun {
647*4882a593Smuzhiyun return omap3isp_stat_pcr_busy(stat) | stat->buf_processing |
648*4882a593Smuzhiyun (stat->state != ISPSTAT_DISABLED);
649*4882a593Smuzhiyun }
650*4882a593Smuzhiyun
651*4882a593Smuzhiyun /*
652*4882a593Smuzhiyun * isp_stat_pcr_enable - Disables/Enables statistic engines.
653*4882a593Smuzhiyun * @pcr_enable: 0/1 - Disables/Enables the engine.
654*4882a593Smuzhiyun *
655*4882a593Smuzhiyun * Must be called from ISP driver when the module is idle and synchronized
656*4882a593Smuzhiyun * with CCDC.
657*4882a593Smuzhiyun */
isp_stat_pcr_enable(struct ispstat * stat,u8 pcr_enable)658*4882a593Smuzhiyun static void isp_stat_pcr_enable(struct ispstat *stat, u8 pcr_enable)
659*4882a593Smuzhiyun {
660*4882a593Smuzhiyun if ((stat->state != ISPSTAT_ENABLING &&
661*4882a593Smuzhiyun stat->state != ISPSTAT_ENABLED) && pcr_enable)
662*4882a593Smuzhiyun /* Userspace has disabled the module. Aborting. */
663*4882a593Smuzhiyun return;
664*4882a593Smuzhiyun
665*4882a593Smuzhiyun stat->ops->enable(stat, pcr_enable);
666*4882a593Smuzhiyun if (stat->state == ISPSTAT_DISABLING && !pcr_enable)
667*4882a593Smuzhiyun stat->state = ISPSTAT_DISABLED;
668*4882a593Smuzhiyun else if (stat->state == ISPSTAT_ENABLING && pcr_enable)
669*4882a593Smuzhiyun stat->state = ISPSTAT_ENABLED;
670*4882a593Smuzhiyun }
671*4882a593Smuzhiyun
omap3isp_stat_suspend(struct ispstat * stat)672*4882a593Smuzhiyun void omap3isp_stat_suspend(struct ispstat *stat)
673*4882a593Smuzhiyun {
674*4882a593Smuzhiyun unsigned long flags;
675*4882a593Smuzhiyun
676*4882a593Smuzhiyun spin_lock_irqsave(&stat->isp->stat_lock, flags);
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun if (stat->state != ISPSTAT_DISABLED)
679*4882a593Smuzhiyun stat->ops->enable(stat, 0);
680*4882a593Smuzhiyun if (stat->state == ISPSTAT_ENABLED)
681*4882a593Smuzhiyun stat->state = ISPSTAT_SUSPENDED;
682*4882a593Smuzhiyun
683*4882a593Smuzhiyun spin_unlock_irqrestore(&stat->isp->stat_lock, flags);
684*4882a593Smuzhiyun }
685*4882a593Smuzhiyun
omap3isp_stat_resume(struct ispstat * stat)686*4882a593Smuzhiyun void omap3isp_stat_resume(struct ispstat *stat)
687*4882a593Smuzhiyun {
688*4882a593Smuzhiyun /* Module will be re-enabled with its pipeline */
689*4882a593Smuzhiyun if (stat->state == ISPSTAT_SUSPENDED)
690*4882a593Smuzhiyun stat->state = ISPSTAT_ENABLING;
691*4882a593Smuzhiyun }
692*4882a593Smuzhiyun
isp_stat_try_enable(struct ispstat * stat)693*4882a593Smuzhiyun static void isp_stat_try_enable(struct ispstat *stat)
694*4882a593Smuzhiyun {
695*4882a593Smuzhiyun unsigned long irqflags;
696*4882a593Smuzhiyun
697*4882a593Smuzhiyun if (stat->priv == NULL)
698*4882a593Smuzhiyun /* driver wasn't initialised */
699*4882a593Smuzhiyun return;
700*4882a593Smuzhiyun
701*4882a593Smuzhiyun spin_lock_irqsave(&stat->isp->stat_lock, irqflags);
702*4882a593Smuzhiyun if (stat->state == ISPSTAT_ENABLING && !stat->buf_processing &&
703*4882a593Smuzhiyun stat->buf_alloc_size) {
704*4882a593Smuzhiyun /*
705*4882a593Smuzhiyun * Userspace's requested to enable the engine but it wasn't yet.
706*4882a593Smuzhiyun * Let's do that now.
707*4882a593Smuzhiyun */
708*4882a593Smuzhiyun stat->update = 1;
709*4882a593Smuzhiyun isp_stat_buf_next(stat);
710*4882a593Smuzhiyun stat->ops->setup_regs(stat, stat->priv);
711*4882a593Smuzhiyun isp_stat_buf_insert_magic(stat, stat->active_buf);
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun /*
714*4882a593Smuzhiyun * H3A module has some hw issues which forces the driver to
715*4882a593Smuzhiyun * ignore next buffers even if it was disabled in the meantime.
716*4882a593Smuzhiyun * On the other hand, Histogram shouldn't ignore buffers anymore
717*4882a593Smuzhiyun * if it's being enabled.
718*4882a593Smuzhiyun */
719*4882a593Smuzhiyun if (!IS_H3A(stat))
720*4882a593Smuzhiyun atomic_set(&stat->buf_err, 0);
721*4882a593Smuzhiyun
722*4882a593Smuzhiyun isp_stat_pcr_enable(stat, 1);
723*4882a593Smuzhiyun spin_unlock_irqrestore(&stat->isp->stat_lock, irqflags);
724*4882a593Smuzhiyun dev_dbg(stat->isp->dev, "%s: module is enabled.\n",
725*4882a593Smuzhiyun stat->subdev.name);
726*4882a593Smuzhiyun } else {
727*4882a593Smuzhiyun spin_unlock_irqrestore(&stat->isp->stat_lock, irqflags);
728*4882a593Smuzhiyun }
729*4882a593Smuzhiyun }
730*4882a593Smuzhiyun
omap3isp_stat_isr_frame_sync(struct ispstat * stat)731*4882a593Smuzhiyun void omap3isp_stat_isr_frame_sync(struct ispstat *stat)
732*4882a593Smuzhiyun {
733*4882a593Smuzhiyun isp_stat_try_enable(stat);
734*4882a593Smuzhiyun }
735*4882a593Smuzhiyun
omap3isp_stat_sbl_overflow(struct ispstat * stat)736*4882a593Smuzhiyun void omap3isp_stat_sbl_overflow(struct ispstat *stat)
737*4882a593Smuzhiyun {
738*4882a593Smuzhiyun unsigned long irqflags;
739*4882a593Smuzhiyun
740*4882a593Smuzhiyun spin_lock_irqsave(&stat->isp->stat_lock, irqflags);
741*4882a593Smuzhiyun /*
742*4882a593Smuzhiyun * Due to a H3A hw issue which prevents the next buffer to start from
743*4882a593Smuzhiyun * the correct memory address, 2 buffers must be ignored.
744*4882a593Smuzhiyun */
745*4882a593Smuzhiyun atomic_set(&stat->buf_err, 2);
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun /*
748*4882a593Smuzhiyun * If more than one SBL overflow happen in a row, H3A module may access
749*4882a593Smuzhiyun * invalid memory region.
750*4882a593Smuzhiyun * stat->sbl_ovl_recover is set to tell to the driver to temporarily use
751*4882a593Smuzhiyun * a soft configuration which helps to avoid consecutive overflows.
752*4882a593Smuzhiyun */
753*4882a593Smuzhiyun if (stat->recover_priv)
754*4882a593Smuzhiyun stat->sbl_ovl_recover = 1;
755*4882a593Smuzhiyun spin_unlock_irqrestore(&stat->isp->stat_lock, irqflags);
756*4882a593Smuzhiyun }
757*4882a593Smuzhiyun
758*4882a593Smuzhiyun /*
759*4882a593Smuzhiyun * omap3isp_stat_enable - Disable/Enable statistic engine as soon as possible
760*4882a593Smuzhiyun * @enable: 0/1 - Disables/Enables the engine.
761*4882a593Smuzhiyun *
762*4882a593Smuzhiyun * Client should configure all the module registers before this.
763*4882a593Smuzhiyun * This function can be called from a userspace request.
764*4882a593Smuzhiyun */
omap3isp_stat_enable(struct ispstat * stat,u8 enable)765*4882a593Smuzhiyun int omap3isp_stat_enable(struct ispstat *stat, u8 enable)
766*4882a593Smuzhiyun {
767*4882a593Smuzhiyun unsigned long irqflags;
768*4882a593Smuzhiyun
769*4882a593Smuzhiyun dev_dbg(stat->isp->dev, "%s: user wants to %s module.\n",
770*4882a593Smuzhiyun stat->subdev.name, enable ? "enable" : "disable");
771*4882a593Smuzhiyun
772*4882a593Smuzhiyun /* Prevent enabling while configuring */
773*4882a593Smuzhiyun mutex_lock(&stat->ioctl_lock);
774*4882a593Smuzhiyun
775*4882a593Smuzhiyun spin_lock_irqsave(&stat->isp->stat_lock, irqflags);
776*4882a593Smuzhiyun
777*4882a593Smuzhiyun if (!stat->configured && enable) {
778*4882a593Smuzhiyun spin_unlock_irqrestore(&stat->isp->stat_lock, irqflags);
779*4882a593Smuzhiyun mutex_unlock(&stat->ioctl_lock);
780*4882a593Smuzhiyun dev_dbg(stat->isp->dev,
781*4882a593Smuzhiyun "%s: cannot enable module as it's never been successfully configured so far.\n",
782*4882a593Smuzhiyun stat->subdev.name);
783*4882a593Smuzhiyun return -EINVAL;
784*4882a593Smuzhiyun }
785*4882a593Smuzhiyun
786*4882a593Smuzhiyun if (enable) {
787*4882a593Smuzhiyun if (stat->state == ISPSTAT_DISABLING)
788*4882a593Smuzhiyun /* Previous disabling request wasn't done yet */
789*4882a593Smuzhiyun stat->state = ISPSTAT_ENABLED;
790*4882a593Smuzhiyun else if (stat->state == ISPSTAT_DISABLED)
791*4882a593Smuzhiyun /* Module is now being enabled */
792*4882a593Smuzhiyun stat->state = ISPSTAT_ENABLING;
793*4882a593Smuzhiyun } else {
794*4882a593Smuzhiyun if (stat->state == ISPSTAT_ENABLING) {
795*4882a593Smuzhiyun /* Previous enabling request wasn't done yet */
796*4882a593Smuzhiyun stat->state = ISPSTAT_DISABLED;
797*4882a593Smuzhiyun } else if (stat->state == ISPSTAT_ENABLED) {
798*4882a593Smuzhiyun /* Module is now being disabled */
799*4882a593Smuzhiyun stat->state = ISPSTAT_DISABLING;
800*4882a593Smuzhiyun isp_stat_buf_clear(stat);
801*4882a593Smuzhiyun }
802*4882a593Smuzhiyun }
803*4882a593Smuzhiyun
804*4882a593Smuzhiyun spin_unlock_irqrestore(&stat->isp->stat_lock, irqflags);
805*4882a593Smuzhiyun mutex_unlock(&stat->ioctl_lock);
806*4882a593Smuzhiyun
807*4882a593Smuzhiyun return 0;
808*4882a593Smuzhiyun }
809*4882a593Smuzhiyun
omap3isp_stat_s_stream(struct v4l2_subdev * subdev,int enable)810*4882a593Smuzhiyun int omap3isp_stat_s_stream(struct v4l2_subdev *subdev, int enable)
811*4882a593Smuzhiyun {
812*4882a593Smuzhiyun struct ispstat *stat = v4l2_get_subdevdata(subdev);
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun if (enable) {
815*4882a593Smuzhiyun /*
816*4882a593Smuzhiyun * Only set enable PCR bit if the module was previously
817*4882a593Smuzhiyun * enabled through ioctl.
818*4882a593Smuzhiyun */
819*4882a593Smuzhiyun isp_stat_try_enable(stat);
820*4882a593Smuzhiyun } else {
821*4882a593Smuzhiyun unsigned long flags;
822*4882a593Smuzhiyun /* Disable PCR bit and config enable field */
823*4882a593Smuzhiyun omap3isp_stat_enable(stat, 0);
824*4882a593Smuzhiyun spin_lock_irqsave(&stat->isp->stat_lock, flags);
825*4882a593Smuzhiyun stat->ops->enable(stat, 0);
826*4882a593Smuzhiyun spin_unlock_irqrestore(&stat->isp->stat_lock, flags);
827*4882a593Smuzhiyun
828*4882a593Smuzhiyun /*
829*4882a593Smuzhiyun * If module isn't busy, a new interrupt may come or not to
830*4882a593Smuzhiyun * set the state to DISABLED. As Histogram needs to read its
831*4882a593Smuzhiyun * internal memory to clear it, let interrupt handler
832*4882a593Smuzhiyun * responsible of changing state to DISABLED. If the last
833*4882a593Smuzhiyun * interrupt is coming, it's still safe as the handler will
834*4882a593Smuzhiyun * ignore the second time when state is already set to DISABLED.
835*4882a593Smuzhiyun * It's necessary to synchronize Histogram with streamoff, once
836*4882a593Smuzhiyun * the module may be considered idle before last SDMA transfer
837*4882a593Smuzhiyun * starts if we return here.
838*4882a593Smuzhiyun */
839*4882a593Smuzhiyun if (!omap3isp_stat_pcr_busy(stat))
840*4882a593Smuzhiyun omap3isp_stat_isr(stat);
841*4882a593Smuzhiyun
842*4882a593Smuzhiyun dev_dbg(stat->isp->dev, "%s: module is being disabled\n",
843*4882a593Smuzhiyun stat->subdev.name);
844*4882a593Smuzhiyun }
845*4882a593Smuzhiyun
846*4882a593Smuzhiyun return 0;
847*4882a593Smuzhiyun }
848*4882a593Smuzhiyun
849*4882a593Smuzhiyun /*
850*4882a593Smuzhiyun * __stat_isr - Interrupt handler for statistic drivers
851*4882a593Smuzhiyun */
__stat_isr(struct ispstat * stat,int from_dma)852*4882a593Smuzhiyun static void __stat_isr(struct ispstat *stat, int from_dma)
853*4882a593Smuzhiyun {
854*4882a593Smuzhiyun int ret = STAT_BUF_DONE;
855*4882a593Smuzhiyun int buf_processing;
856*4882a593Smuzhiyun unsigned long irqflags;
857*4882a593Smuzhiyun struct isp_pipeline *pipe;
858*4882a593Smuzhiyun
859*4882a593Smuzhiyun /*
860*4882a593Smuzhiyun * stat->buf_processing must be set before disable module. It's
861*4882a593Smuzhiyun * necessary to not inform too early the buffers aren't busy in case
862*4882a593Smuzhiyun * of SDMA is going to be used.
863*4882a593Smuzhiyun */
864*4882a593Smuzhiyun spin_lock_irqsave(&stat->isp->stat_lock, irqflags);
865*4882a593Smuzhiyun if (stat->state == ISPSTAT_DISABLED) {
866*4882a593Smuzhiyun spin_unlock_irqrestore(&stat->isp->stat_lock, irqflags);
867*4882a593Smuzhiyun return;
868*4882a593Smuzhiyun }
869*4882a593Smuzhiyun buf_processing = stat->buf_processing;
870*4882a593Smuzhiyun stat->buf_processing = 1;
871*4882a593Smuzhiyun stat->ops->enable(stat, 0);
872*4882a593Smuzhiyun
873*4882a593Smuzhiyun if (buf_processing && !from_dma) {
874*4882a593Smuzhiyun if (stat->state == ISPSTAT_ENABLED) {
875*4882a593Smuzhiyun spin_unlock_irqrestore(&stat->isp->stat_lock, irqflags);
876*4882a593Smuzhiyun dev_err(stat->isp->dev,
877*4882a593Smuzhiyun "%s: interrupt occurred when module was still processing a buffer.\n",
878*4882a593Smuzhiyun stat->subdev.name);
879*4882a593Smuzhiyun ret = STAT_NO_BUF;
880*4882a593Smuzhiyun goto out;
881*4882a593Smuzhiyun } else {
882*4882a593Smuzhiyun /*
883*4882a593Smuzhiyun * Interrupt handler was called from streamoff when
884*4882a593Smuzhiyun * the module wasn't busy anymore to ensure it is being
885*4882a593Smuzhiyun * disabled after process last buffer. If such buffer
886*4882a593Smuzhiyun * processing has already started, no need to do
887*4882a593Smuzhiyun * anything else.
888*4882a593Smuzhiyun */
889*4882a593Smuzhiyun spin_unlock_irqrestore(&stat->isp->stat_lock, irqflags);
890*4882a593Smuzhiyun return;
891*4882a593Smuzhiyun }
892*4882a593Smuzhiyun }
893*4882a593Smuzhiyun spin_unlock_irqrestore(&stat->isp->stat_lock, irqflags);
894*4882a593Smuzhiyun
895*4882a593Smuzhiyun /* If it's busy we can't process this buffer anymore */
896*4882a593Smuzhiyun if (!omap3isp_stat_pcr_busy(stat)) {
897*4882a593Smuzhiyun if (!from_dma && stat->ops->buf_process)
898*4882a593Smuzhiyun /* Module still need to copy data to buffer. */
899*4882a593Smuzhiyun ret = stat->ops->buf_process(stat);
900*4882a593Smuzhiyun if (ret == STAT_BUF_WAITING_DMA)
901*4882a593Smuzhiyun /* Buffer is not ready yet */
902*4882a593Smuzhiyun return;
903*4882a593Smuzhiyun
904*4882a593Smuzhiyun spin_lock_irqsave(&stat->isp->stat_lock, irqflags);
905*4882a593Smuzhiyun
906*4882a593Smuzhiyun /*
907*4882a593Smuzhiyun * Histogram needs to read its internal memory to clear it
908*4882a593Smuzhiyun * before be disabled. For that reason, common statistic layer
909*4882a593Smuzhiyun * can return only after call stat's buf_process() operator.
910*4882a593Smuzhiyun */
911*4882a593Smuzhiyun if (stat->state == ISPSTAT_DISABLING) {
912*4882a593Smuzhiyun stat->state = ISPSTAT_DISABLED;
913*4882a593Smuzhiyun spin_unlock_irqrestore(&stat->isp->stat_lock, irqflags);
914*4882a593Smuzhiyun stat->buf_processing = 0;
915*4882a593Smuzhiyun return;
916*4882a593Smuzhiyun }
917*4882a593Smuzhiyun pipe = to_isp_pipeline(&stat->subdev.entity);
918*4882a593Smuzhiyun stat->frame_number = atomic_read(&pipe->frame_number);
919*4882a593Smuzhiyun
920*4882a593Smuzhiyun /*
921*4882a593Smuzhiyun * Before this point, 'ret' stores the buffer's status if it's
922*4882a593Smuzhiyun * ready to be processed. Afterwards, it holds the status if
923*4882a593Smuzhiyun * it was processed successfully.
924*4882a593Smuzhiyun */
925*4882a593Smuzhiyun ret = isp_stat_buf_process(stat, ret);
926*4882a593Smuzhiyun
927*4882a593Smuzhiyun if (likely(!stat->sbl_ovl_recover)) {
928*4882a593Smuzhiyun stat->ops->setup_regs(stat, stat->priv);
929*4882a593Smuzhiyun } else {
930*4882a593Smuzhiyun /*
931*4882a593Smuzhiyun * Using recover config to increase the chance to have
932*4882a593Smuzhiyun * a good buffer processing and make the H3A module to
933*4882a593Smuzhiyun * go back to a valid state.
934*4882a593Smuzhiyun */
935*4882a593Smuzhiyun stat->update = 1;
936*4882a593Smuzhiyun stat->ops->setup_regs(stat, stat->recover_priv);
937*4882a593Smuzhiyun stat->sbl_ovl_recover = 0;
938*4882a593Smuzhiyun
939*4882a593Smuzhiyun /*
940*4882a593Smuzhiyun * Set 'update' in case of the module needs to use
941*4882a593Smuzhiyun * regular configuration after next buffer.
942*4882a593Smuzhiyun */
943*4882a593Smuzhiyun stat->update = 1;
944*4882a593Smuzhiyun }
945*4882a593Smuzhiyun
946*4882a593Smuzhiyun isp_stat_buf_insert_magic(stat, stat->active_buf);
947*4882a593Smuzhiyun
948*4882a593Smuzhiyun /*
949*4882a593Smuzhiyun * Hack: H3A modules may access invalid memory address or send
950*4882a593Smuzhiyun * corrupted data to userspace if more than 1 SBL overflow
951*4882a593Smuzhiyun * happens in a row without re-writing its buffer's start memory
952*4882a593Smuzhiyun * address in the meantime. Such situation is avoided if the
953*4882a593Smuzhiyun * module is not immediately re-enabled when the ISR misses the
954*4882a593Smuzhiyun * timing to process the buffer and to setup the registers.
955*4882a593Smuzhiyun * Because of that, pcr_enable(1) was moved to inside this 'if'
956*4882a593Smuzhiyun * block. But the next interruption will still happen as during
957*4882a593Smuzhiyun * pcr_enable(0) the module was busy.
958*4882a593Smuzhiyun */
959*4882a593Smuzhiyun isp_stat_pcr_enable(stat, 1);
960*4882a593Smuzhiyun spin_unlock_irqrestore(&stat->isp->stat_lock, irqflags);
961*4882a593Smuzhiyun } else {
962*4882a593Smuzhiyun /*
963*4882a593Smuzhiyun * If a SBL overflow occurs and the H3A driver misses the timing
964*4882a593Smuzhiyun * to process the buffer, stat->buf_err is set and won't be
965*4882a593Smuzhiyun * cleared now. So the next buffer will be correctly ignored.
966*4882a593Smuzhiyun * It's necessary due to a hw issue which makes the next H3A
967*4882a593Smuzhiyun * buffer to start from the memory address where the previous
968*4882a593Smuzhiyun * one stopped, instead of start where it was configured to.
969*4882a593Smuzhiyun * Do not "stat->buf_err = 0" here.
970*4882a593Smuzhiyun */
971*4882a593Smuzhiyun
972*4882a593Smuzhiyun if (stat->ops->buf_process)
973*4882a593Smuzhiyun /*
974*4882a593Smuzhiyun * Driver may need to erase current data prior to
975*4882a593Smuzhiyun * process a new buffer. If it misses the timing, the
976*4882a593Smuzhiyun * next buffer might be wrong. So should be ignored.
977*4882a593Smuzhiyun * It happens only for Histogram.
978*4882a593Smuzhiyun */
979*4882a593Smuzhiyun atomic_set(&stat->buf_err, 1);
980*4882a593Smuzhiyun
981*4882a593Smuzhiyun ret = STAT_NO_BUF;
982*4882a593Smuzhiyun dev_dbg(stat->isp->dev,
983*4882a593Smuzhiyun "%s: cannot process buffer, device is busy.\n",
984*4882a593Smuzhiyun stat->subdev.name);
985*4882a593Smuzhiyun }
986*4882a593Smuzhiyun
987*4882a593Smuzhiyun out:
988*4882a593Smuzhiyun stat->buf_processing = 0;
989*4882a593Smuzhiyun isp_stat_queue_event(stat, ret != STAT_BUF_DONE);
990*4882a593Smuzhiyun }
991*4882a593Smuzhiyun
omap3isp_stat_isr(struct ispstat * stat)992*4882a593Smuzhiyun void omap3isp_stat_isr(struct ispstat *stat)
993*4882a593Smuzhiyun {
994*4882a593Smuzhiyun __stat_isr(stat, 0);
995*4882a593Smuzhiyun }
996*4882a593Smuzhiyun
omap3isp_stat_dma_isr(struct ispstat * stat)997*4882a593Smuzhiyun void omap3isp_stat_dma_isr(struct ispstat *stat)
998*4882a593Smuzhiyun {
999*4882a593Smuzhiyun __stat_isr(stat, 1);
1000*4882a593Smuzhiyun }
1001*4882a593Smuzhiyun
omap3isp_stat_subscribe_event(struct v4l2_subdev * subdev,struct v4l2_fh * fh,struct v4l2_event_subscription * sub)1002*4882a593Smuzhiyun int omap3isp_stat_subscribe_event(struct v4l2_subdev *subdev,
1003*4882a593Smuzhiyun struct v4l2_fh *fh,
1004*4882a593Smuzhiyun struct v4l2_event_subscription *sub)
1005*4882a593Smuzhiyun {
1006*4882a593Smuzhiyun struct ispstat *stat = v4l2_get_subdevdata(subdev);
1007*4882a593Smuzhiyun
1008*4882a593Smuzhiyun if (sub->type != stat->event_type)
1009*4882a593Smuzhiyun return -EINVAL;
1010*4882a593Smuzhiyun
1011*4882a593Smuzhiyun return v4l2_event_subscribe(fh, sub, STAT_NEVENTS, NULL);
1012*4882a593Smuzhiyun }
1013*4882a593Smuzhiyun
omap3isp_stat_unsubscribe_event(struct v4l2_subdev * subdev,struct v4l2_fh * fh,struct v4l2_event_subscription * sub)1014*4882a593Smuzhiyun int omap3isp_stat_unsubscribe_event(struct v4l2_subdev *subdev,
1015*4882a593Smuzhiyun struct v4l2_fh *fh,
1016*4882a593Smuzhiyun struct v4l2_event_subscription *sub)
1017*4882a593Smuzhiyun {
1018*4882a593Smuzhiyun return v4l2_event_unsubscribe(fh, sub);
1019*4882a593Smuzhiyun }
1020*4882a593Smuzhiyun
omap3isp_stat_unregister_entities(struct ispstat * stat)1021*4882a593Smuzhiyun void omap3isp_stat_unregister_entities(struct ispstat *stat)
1022*4882a593Smuzhiyun {
1023*4882a593Smuzhiyun v4l2_device_unregister_subdev(&stat->subdev);
1024*4882a593Smuzhiyun }
1025*4882a593Smuzhiyun
omap3isp_stat_register_entities(struct ispstat * stat,struct v4l2_device * vdev)1026*4882a593Smuzhiyun int omap3isp_stat_register_entities(struct ispstat *stat,
1027*4882a593Smuzhiyun struct v4l2_device *vdev)
1028*4882a593Smuzhiyun {
1029*4882a593Smuzhiyun stat->subdev.dev = vdev->mdev->dev;
1030*4882a593Smuzhiyun
1031*4882a593Smuzhiyun return v4l2_device_register_subdev(vdev, &stat->subdev);
1032*4882a593Smuzhiyun }
1033*4882a593Smuzhiyun
isp_stat_init_entities(struct ispstat * stat,const char * name,const struct v4l2_subdev_ops * sd_ops)1034*4882a593Smuzhiyun static int isp_stat_init_entities(struct ispstat *stat, const char *name,
1035*4882a593Smuzhiyun const struct v4l2_subdev_ops *sd_ops)
1036*4882a593Smuzhiyun {
1037*4882a593Smuzhiyun struct v4l2_subdev *subdev = &stat->subdev;
1038*4882a593Smuzhiyun struct media_entity *me = &subdev->entity;
1039*4882a593Smuzhiyun
1040*4882a593Smuzhiyun v4l2_subdev_init(subdev, sd_ops);
1041*4882a593Smuzhiyun snprintf(subdev->name, V4L2_SUBDEV_NAME_SIZE, "OMAP3 ISP %s", name);
1042*4882a593Smuzhiyun subdev->grp_id = BIT(16); /* group ID for isp subdevs */
1043*4882a593Smuzhiyun subdev->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
1044*4882a593Smuzhiyun v4l2_set_subdevdata(subdev, stat);
1045*4882a593Smuzhiyun
1046*4882a593Smuzhiyun stat->pad.flags = MEDIA_PAD_FL_SINK | MEDIA_PAD_FL_MUST_CONNECT;
1047*4882a593Smuzhiyun me->ops = NULL;
1048*4882a593Smuzhiyun
1049*4882a593Smuzhiyun return media_entity_pads_init(me, 1, &stat->pad);
1050*4882a593Smuzhiyun }
1051*4882a593Smuzhiyun
omap3isp_stat_init(struct ispstat * stat,const char * name,const struct v4l2_subdev_ops * sd_ops)1052*4882a593Smuzhiyun int omap3isp_stat_init(struct ispstat *stat, const char *name,
1053*4882a593Smuzhiyun const struct v4l2_subdev_ops *sd_ops)
1054*4882a593Smuzhiyun {
1055*4882a593Smuzhiyun int ret;
1056*4882a593Smuzhiyun
1057*4882a593Smuzhiyun stat->buf = kcalloc(STAT_MAX_BUFS, sizeof(*stat->buf), GFP_KERNEL);
1058*4882a593Smuzhiyun if (!stat->buf)
1059*4882a593Smuzhiyun return -ENOMEM;
1060*4882a593Smuzhiyun
1061*4882a593Smuzhiyun isp_stat_buf_clear(stat);
1062*4882a593Smuzhiyun mutex_init(&stat->ioctl_lock);
1063*4882a593Smuzhiyun atomic_set(&stat->buf_err, 0);
1064*4882a593Smuzhiyun
1065*4882a593Smuzhiyun ret = isp_stat_init_entities(stat, name, sd_ops);
1066*4882a593Smuzhiyun if (ret < 0) {
1067*4882a593Smuzhiyun mutex_destroy(&stat->ioctl_lock);
1068*4882a593Smuzhiyun kfree(stat->buf);
1069*4882a593Smuzhiyun }
1070*4882a593Smuzhiyun
1071*4882a593Smuzhiyun return ret;
1072*4882a593Smuzhiyun }
1073*4882a593Smuzhiyun
omap3isp_stat_cleanup(struct ispstat * stat)1074*4882a593Smuzhiyun void omap3isp_stat_cleanup(struct ispstat *stat)
1075*4882a593Smuzhiyun {
1076*4882a593Smuzhiyun media_entity_cleanup(&stat->subdev.entity);
1077*4882a593Smuzhiyun mutex_destroy(&stat->ioctl_lock);
1078*4882a593Smuzhiyun isp_stat_bufs_free(stat);
1079*4882a593Smuzhiyun kfree(stat->buf);
1080*4882a593Smuzhiyun kfree(stat->priv);
1081*4882a593Smuzhiyun kfree(stat->recover_priv);
1082*4882a593Smuzhiyun }
1083