1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * isppreview.h 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * TI OMAP3 ISP - Preview module 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Copyright (C) 2010 Nokia Corporation 8*4882a593Smuzhiyun * Copyright (C) 2009 Texas Instruments, Inc. 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com> 11*4882a593Smuzhiyun * Sakari Ailus <sakari.ailus@iki.fi> 12*4882a593Smuzhiyun */ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #ifndef OMAP3_ISP_PREVIEW_H 15*4882a593Smuzhiyun #define OMAP3_ISP_PREVIEW_H 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #include <linux/omap3isp.h> 18*4882a593Smuzhiyun #include <linux/types.h> 19*4882a593Smuzhiyun #include <media/v4l2-ctrls.h> 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #include "ispvideo.h" 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #define ISPPRV_BRIGHT_STEP 0x1 24*4882a593Smuzhiyun #define ISPPRV_BRIGHT_DEF 0x0 25*4882a593Smuzhiyun #define ISPPRV_BRIGHT_LOW 0x0 26*4882a593Smuzhiyun #define ISPPRV_BRIGHT_HIGH 0xFF 27*4882a593Smuzhiyun #define ISPPRV_BRIGHT_UNITS 0x1 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #define ISPPRV_CONTRAST_STEP 0x1 30*4882a593Smuzhiyun #define ISPPRV_CONTRAST_DEF 0x10 31*4882a593Smuzhiyun #define ISPPRV_CONTRAST_LOW 0x0 32*4882a593Smuzhiyun #define ISPPRV_CONTRAST_HIGH 0xFF 33*4882a593Smuzhiyun #define ISPPRV_CONTRAST_UNITS 0x1 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun /* Additional features not listed in linux/omap3isp.h */ 36*4882a593Smuzhiyun #define OMAP3ISP_PREV_CONTRAST (1 << 17) 37*4882a593Smuzhiyun #define OMAP3ISP_PREV_BRIGHTNESS (1 << 18) 38*4882a593Smuzhiyun #define OMAP3ISP_PREV_FEATURES_END (1 << 19) 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun enum preview_input_entity { 41*4882a593Smuzhiyun PREVIEW_INPUT_NONE, 42*4882a593Smuzhiyun PREVIEW_INPUT_CCDC, 43*4882a593Smuzhiyun PREVIEW_INPUT_MEMORY, 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun #define PREVIEW_OUTPUT_RESIZER (1 << 1) 47*4882a593Smuzhiyun #define PREVIEW_OUTPUT_MEMORY (1 << 2) 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun /* Configure byte layout of YUV image */ 50*4882a593Smuzhiyun enum preview_ycpos_mode { 51*4882a593Smuzhiyun YCPOS_YCrYCb = 0, 52*4882a593Smuzhiyun YCPOS_YCbYCr = 1, 53*4882a593Smuzhiyun YCPOS_CbYCrY = 2, 54*4882a593Smuzhiyun YCPOS_CrYCbY = 3 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun /* 58*4882a593Smuzhiyun * struct prev_params - Structure for all configuration 59*4882a593Smuzhiyun * @busy: Bitmask of busy parameters (being updated or used) 60*4882a593Smuzhiyun * @update: Bitmask of the parameters to be updated 61*4882a593Smuzhiyun * @features: Set of features enabled. 62*4882a593Smuzhiyun * @cfa: CFA coefficients. 63*4882a593Smuzhiyun * @csup: Chroma suppression coefficients. 64*4882a593Smuzhiyun * @luma: Luma enhancement coefficients. 65*4882a593Smuzhiyun * @nf: Noise filter coefficients. 66*4882a593Smuzhiyun * @dcor: Noise filter coefficients. 67*4882a593Smuzhiyun * @gamma: Gamma coefficients. 68*4882a593Smuzhiyun * @wbal: White Balance parameters. 69*4882a593Smuzhiyun * @blkadj: Black adjustment parameters. 70*4882a593Smuzhiyun * @rgb2rgb: RGB blending parameters. 71*4882a593Smuzhiyun * @csc: Color space conversion (RGB to YCbCr) parameters. 72*4882a593Smuzhiyun * @hmed: Horizontal median filter. 73*4882a593Smuzhiyun * @yclimit: YC limits parameters. 74*4882a593Smuzhiyun * @contrast: Contrast. 75*4882a593Smuzhiyun * @brightness: Brightness. 76*4882a593Smuzhiyun */ 77*4882a593Smuzhiyun struct prev_params { 78*4882a593Smuzhiyun u32 busy; 79*4882a593Smuzhiyun u32 update; 80*4882a593Smuzhiyun u32 features; 81*4882a593Smuzhiyun struct omap3isp_prev_cfa cfa; 82*4882a593Smuzhiyun struct omap3isp_prev_csup csup; 83*4882a593Smuzhiyun struct omap3isp_prev_luma luma; 84*4882a593Smuzhiyun struct omap3isp_prev_nf nf; 85*4882a593Smuzhiyun struct omap3isp_prev_dcor dcor; 86*4882a593Smuzhiyun struct omap3isp_prev_gtables gamma; 87*4882a593Smuzhiyun struct omap3isp_prev_wbal wbal; 88*4882a593Smuzhiyun struct omap3isp_prev_blkadj blkadj; 89*4882a593Smuzhiyun struct omap3isp_prev_rgbtorgb rgb2rgb; 90*4882a593Smuzhiyun struct omap3isp_prev_csc csc; 91*4882a593Smuzhiyun struct omap3isp_prev_hmed hmed; 92*4882a593Smuzhiyun struct omap3isp_prev_yclimit yclimit; 93*4882a593Smuzhiyun u8 contrast; 94*4882a593Smuzhiyun u8 brightness; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun /* Sink and source previewer pads */ 98*4882a593Smuzhiyun #define PREV_PAD_SINK 0 99*4882a593Smuzhiyun #define PREV_PAD_SOURCE 1 100*4882a593Smuzhiyun #define PREV_PADS_NUM 2 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun /* 103*4882a593Smuzhiyun * struct isp_prev_device - Structure for storing ISP Preview module information 104*4882a593Smuzhiyun * @subdev: V4L2 subdevice 105*4882a593Smuzhiyun * @pads: Media entity pads 106*4882a593Smuzhiyun * @formats: Active formats at the subdev pad 107*4882a593Smuzhiyun * @crop: Active crop rectangle 108*4882a593Smuzhiyun * @input: Module currently connected to the input pad 109*4882a593Smuzhiyun * @output: Bitmask of the active output 110*4882a593Smuzhiyun * @video_in: Input video entity 111*4882a593Smuzhiyun * @video_out: Output video entity 112*4882a593Smuzhiyun * @params.params : Active and shadow parameters sets 113*4882a593Smuzhiyun * @params.active: Bitmask of parameters active in set 0 114*4882a593Smuzhiyun * @params.lock: Parameters lock, protects params.active and params.shadow 115*4882a593Smuzhiyun * @underrun: Whether the preview entity has queued buffers on the output 116*4882a593Smuzhiyun * @state: Current preview pipeline state 117*4882a593Smuzhiyun * 118*4882a593Smuzhiyun * This structure is used to store the OMAP ISP Preview module Information. 119*4882a593Smuzhiyun */ 120*4882a593Smuzhiyun struct isp_prev_device { 121*4882a593Smuzhiyun struct v4l2_subdev subdev; 122*4882a593Smuzhiyun struct media_pad pads[PREV_PADS_NUM]; 123*4882a593Smuzhiyun struct v4l2_mbus_framefmt formats[PREV_PADS_NUM]; 124*4882a593Smuzhiyun struct v4l2_rect crop; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun struct v4l2_ctrl_handler ctrls; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun enum preview_input_entity input; 129*4882a593Smuzhiyun unsigned int output; 130*4882a593Smuzhiyun struct isp_video video_in; 131*4882a593Smuzhiyun struct isp_video video_out; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun struct { 134*4882a593Smuzhiyun unsigned int cfa_order; 135*4882a593Smuzhiyun struct prev_params params[2]; 136*4882a593Smuzhiyun u32 active; 137*4882a593Smuzhiyun spinlock_t lock; 138*4882a593Smuzhiyun } params; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun enum isp_pipeline_stream_state state; 141*4882a593Smuzhiyun wait_queue_head_t wait; 142*4882a593Smuzhiyun atomic_t stopping; 143*4882a593Smuzhiyun }; 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun struct isp_device; 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun int omap3isp_preview_init(struct isp_device *isp); 148*4882a593Smuzhiyun void omap3isp_preview_cleanup(struct isp_device *isp); 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun int omap3isp_preview_register_entities(struct isp_prev_device *prv, 151*4882a593Smuzhiyun struct v4l2_device *vdev); 152*4882a593Smuzhiyun void omap3isp_preview_unregister_entities(struct isp_prev_device *prv); 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun void omap3isp_preview_isr_frame_sync(struct isp_prev_device *prev); 155*4882a593Smuzhiyun void omap3isp_preview_isr(struct isp_prev_device *prev); 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun int omap3isp_preview_busy(struct isp_prev_device *isp_prev); 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun void omap3isp_preview_restore_context(struct isp_device *isp); 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun #endif /* OMAP3_ISP_PREVIEW_H */ 162