xref: /OK3568_Linux_fs/kernel/drivers/media/platform/omap3isp/isph3a.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * isph3a.h
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * TI OMAP3 ISP - H3A AF module
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Copyright (C) 2010 Nokia Corporation
8*4882a593Smuzhiyun  * Copyright (C) 2009 Texas Instruments, Inc.
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * Contacts: David Cohen <dacohen@gmail.com>
11*4882a593Smuzhiyun  *	     Laurent Pinchart <laurent.pinchart@ideasonboard.com>
12*4882a593Smuzhiyun  *	     Sakari Ailus <sakari.ailus@iki.fi>
13*4882a593Smuzhiyun  */
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #ifndef OMAP3_ISP_H3A_H
16*4882a593Smuzhiyun #define OMAP3_ISP_H3A_H
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #include <linux/omap3isp.h>
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun /*
21*4882a593Smuzhiyun  * ----------
22*4882a593Smuzhiyun  * -H3A AEWB-
23*4882a593Smuzhiyun  * ----------
24*4882a593Smuzhiyun  */
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define AEWB_PACKET_SIZE	16
27*4882a593Smuzhiyun #define AEWB_SATURATION_LIMIT	0x3ff
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun /* Flags for changed registers */
30*4882a593Smuzhiyun #define PCR_CHNG		(1 << 0)
31*4882a593Smuzhiyun #define AEWWIN1_CHNG		(1 << 1)
32*4882a593Smuzhiyun #define AEWINSTART_CHNG		(1 << 2)
33*4882a593Smuzhiyun #define AEWINBLK_CHNG		(1 << 3)
34*4882a593Smuzhiyun #define AEWSUBWIN_CHNG		(1 << 4)
35*4882a593Smuzhiyun #define PRV_WBDGAIN_CHNG	(1 << 5)
36*4882a593Smuzhiyun #define PRV_WBGAIN_CHNG		(1 << 6)
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun /* ISPH3A REGISTERS bits */
39*4882a593Smuzhiyun #define ISPH3A_PCR_AF_EN	(1 << 0)
40*4882a593Smuzhiyun #define ISPH3A_PCR_AF_ALAW_EN	(1 << 1)
41*4882a593Smuzhiyun #define ISPH3A_PCR_AF_MED_EN	(1 << 2)
42*4882a593Smuzhiyun #define ISPH3A_PCR_AF_BUSY	(1 << 15)
43*4882a593Smuzhiyun #define ISPH3A_PCR_AEW_EN	(1 << 16)
44*4882a593Smuzhiyun #define ISPH3A_PCR_AEW_ALAW_EN	(1 << 17)
45*4882a593Smuzhiyun #define ISPH3A_PCR_AEW_BUSY	(1 << 18)
46*4882a593Smuzhiyun #define ISPH3A_PCR_AEW_MASK	(ISPH3A_PCR_AEW_ALAW_EN | \
47*4882a593Smuzhiyun 				 ISPH3A_PCR_AEW_AVE2LMT_MASK)
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun /*
50*4882a593Smuzhiyun  * --------
51*4882a593Smuzhiyun  * -H3A AF-
52*4882a593Smuzhiyun  * --------
53*4882a593Smuzhiyun  */
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun /* Peripheral Revision */
56*4882a593Smuzhiyun #define AFPID				0x0
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun #define AFCOEF_OFFSET			0x00000004	/* COEF base address */
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun /* PCR fields */
61*4882a593Smuzhiyun #define AF_BUSYAF			(1 << 15)
62*4882a593Smuzhiyun #define AF_FVMODE			(1 << 14)
63*4882a593Smuzhiyun #define AF_RGBPOS			(0x7 << 11)
64*4882a593Smuzhiyun #define AF_MED_TH			(0xFF << 3)
65*4882a593Smuzhiyun #define AF_MED_EN			(1 << 2)
66*4882a593Smuzhiyun #define AF_ALAW_EN			(1 << 1)
67*4882a593Smuzhiyun #define AF_EN				(1 << 0)
68*4882a593Smuzhiyun #define AF_PCR_MASK			(AF_FVMODE | AF_RGBPOS | AF_MED_TH | \
69*4882a593Smuzhiyun 					 AF_MED_EN | AF_ALAW_EN)
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun /* AFPAX1 fields */
72*4882a593Smuzhiyun #define AF_PAXW				(0x7F << 16)
73*4882a593Smuzhiyun #define AF_PAXH				0x7F
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun /* AFPAX2 fields */
76*4882a593Smuzhiyun #define AF_AFINCV			(0xF << 13)
77*4882a593Smuzhiyun #define AF_PAXVC			(0x7F << 6)
78*4882a593Smuzhiyun #define AF_PAXHC			0x3F
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun /* AFPAXSTART fields */
81*4882a593Smuzhiyun #define AF_PAXSH			(0xFFF<<16)
82*4882a593Smuzhiyun #define AF_PAXSV			0xFFF
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun /* COEFFICIENT MASK */
85*4882a593Smuzhiyun #define AF_COEF_MASK0			0xFFF
86*4882a593Smuzhiyun #define AF_COEF_MASK1			(0xFFF<<16)
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun /* BIT SHIFTS */
89*4882a593Smuzhiyun #define AF_RGBPOS_SHIFT			11
90*4882a593Smuzhiyun #define AF_MED_TH_SHIFT			3
91*4882a593Smuzhiyun #define AF_PAXW_SHIFT			16
92*4882a593Smuzhiyun #define AF_LINE_INCR_SHIFT		13
93*4882a593Smuzhiyun #define AF_VT_COUNT_SHIFT		6
94*4882a593Smuzhiyun #define AF_HZ_START_SHIFT		16
95*4882a593Smuzhiyun #define AF_COEF_SHIFT			16
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun /* Init and cleanup functions */
98*4882a593Smuzhiyun int omap3isp_h3a_aewb_init(struct isp_device *isp);
99*4882a593Smuzhiyun int omap3isp_h3a_af_init(struct isp_device *isp);
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun void omap3isp_h3a_aewb_cleanup(struct isp_device *isp);
102*4882a593Smuzhiyun void omap3isp_h3a_af_cleanup(struct isp_device *isp);
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun #endif /* OMAP3_ISP_H3A_H */
105