1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * ispccdc.h 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * TI OMAP3 ISP - CCDC module 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Copyright (C) 2009-2010 Nokia Corporation 8*4882a593Smuzhiyun * Copyright (C) 2009 Texas Instruments, Inc. 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com> 11*4882a593Smuzhiyun * Sakari Ailus <sakari.ailus@iki.fi> 12*4882a593Smuzhiyun */ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #ifndef OMAP3_ISP_CCDC_H 15*4882a593Smuzhiyun #define OMAP3_ISP_CCDC_H 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #include <linux/omap3isp.h> 18*4882a593Smuzhiyun #include <linux/workqueue.h> 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #include "ispvideo.h" 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun enum ccdc_input_entity { 23*4882a593Smuzhiyun CCDC_INPUT_NONE, 24*4882a593Smuzhiyun CCDC_INPUT_PARALLEL, 25*4882a593Smuzhiyun CCDC_INPUT_CSI2A, 26*4882a593Smuzhiyun CCDC_INPUT_CCP2B, 27*4882a593Smuzhiyun CCDC_INPUT_CSI2C 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #define CCDC_OUTPUT_MEMORY (1 << 0) 31*4882a593Smuzhiyun #define CCDC_OUTPUT_PREVIEW (1 << 1) 32*4882a593Smuzhiyun #define CCDC_OUTPUT_RESIZER (1 << 2) 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #define OMAP3ISP_CCDC_NEVENTS 16 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun struct ispccdc_fpc { 37*4882a593Smuzhiyun void *addr; 38*4882a593Smuzhiyun dma_addr_t dma; 39*4882a593Smuzhiyun unsigned int fpnum; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun enum ispccdc_lsc_state { 43*4882a593Smuzhiyun LSC_STATE_STOPPED = 0, 44*4882a593Smuzhiyun LSC_STATE_STOPPING = 1, 45*4882a593Smuzhiyun LSC_STATE_RUNNING = 2, 46*4882a593Smuzhiyun LSC_STATE_RECONFIG = 3, 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun struct ispccdc_lsc_config_req { 50*4882a593Smuzhiyun struct list_head list; 51*4882a593Smuzhiyun struct omap3isp_ccdc_lsc_config config; 52*4882a593Smuzhiyun unsigned char enable; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun struct { 55*4882a593Smuzhiyun void *addr; 56*4882a593Smuzhiyun dma_addr_t dma; 57*4882a593Smuzhiyun struct sg_table sgt; 58*4882a593Smuzhiyun } table; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun /* 62*4882a593Smuzhiyun * ispccdc_lsc - CCDC LSC parameters 63*4882a593Smuzhiyun */ 64*4882a593Smuzhiyun struct ispccdc_lsc { 65*4882a593Smuzhiyun enum ispccdc_lsc_state state; 66*4882a593Smuzhiyun struct work_struct table_work; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /* LSC queue of configurations */ 69*4882a593Smuzhiyun spinlock_t req_lock; 70*4882a593Smuzhiyun struct ispccdc_lsc_config_req *request; /* requested configuration */ 71*4882a593Smuzhiyun struct ispccdc_lsc_config_req *active; /* active configuration */ 72*4882a593Smuzhiyun struct list_head free_queue; /* configurations for freeing */ 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun #define CCDC_STOP_NOT_REQUESTED 0x00 76*4882a593Smuzhiyun #define CCDC_STOP_REQUEST 0x01 77*4882a593Smuzhiyun #define CCDC_STOP_EXECUTED (0x02 | CCDC_STOP_REQUEST) 78*4882a593Smuzhiyun #define CCDC_STOP_CCDC_FINISHED 0x04 79*4882a593Smuzhiyun #define CCDC_STOP_LSC_FINISHED 0x08 80*4882a593Smuzhiyun #define CCDC_STOP_FINISHED \ 81*4882a593Smuzhiyun (CCDC_STOP_EXECUTED | CCDC_STOP_CCDC_FINISHED | CCDC_STOP_LSC_FINISHED) 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun #define CCDC_EVENT_VD1 0x10 84*4882a593Smuzhiyun #define CCDC_EVENT_VD0 0x20 85*4882a593Smuzhiyun #define CCDC_EVENT_LSC_DONE 0x40 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun /* Sink and source CCDC pads */ 88*4882a593Smuzhiyun #define CCDC_PAD_SINK 0 89*4882a593Smuzhiyun #define CCDC_PAD_SOURCE_OF 1 90*4882a593Smuzhiyun #define CCDC_PAD_SOURCE_VP 2 91*4882a593Smuzhiyun #define CCDC_PADS_NUM 3 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun #define CCDC_FIELD_TOP 1 94*4882a593Smuzhiyun #define CCDC_FIELD_BOTTOM 2 95*4882a593Smuzhiyun #define CCDC_FIELD_BOTH 3 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun /* 98*4882a593Smuzhiyun * struct isp_ccdc_device - Structure for the CCDC module to store its own 99*4882a593Smuzhiyun * information 100*4882a593Smuzhiyun * @subdev: V4L2 subdevice 101*4882a593Smuzhiyun * @pads: Sink and source media entity pads 102*4882a593Smuzhiyun * @formats: Active video formats 103*4882a593Smuzhiyun * @crop: Active crop rectangle on the OF source pad 104*4882a593Smuzhiyun * @input: Active input 105*4882a593Smuzhiyun * @output: Active outputs 106*4882a593Smuzhiyun * @video_out: Output video node 107*4882a593Smuzhiyun * @alaw: A-law compression enabled (1) or disabled (0) 108*4882a593Smuzhiyun * @lpf: Low pass filter enabled (1) or disabled (0) 109*4882a593Smuzhiyun * @obclamp: Optical-black clamp enabled (1) or disabled (0) 110*4882a593Smuzhiyun * @fpc_en: Faulty pixels correction enabled (1) or disabled (0) 111*4882a593Smuzhiyun * @blcomp: Black level compensation configuration 112*4882a593Smuzhiyun * @clamp: Optical-black or digital clamp configuration 113*4882a593Smuzhiyun * @fpc: Faulty pixels correction configuration 114*4882a593Smuzhiyun * @lsc: Lens shading compensation configuration 115*4882a593Smuzhiyun * @update: Bitmask of controls to update during the next interrupt 116*4882a593Smuzhiyun * @shadow_update: Controls update in progress by userspace 117*4882a593Smuzhiyun * @bt656: Whether the input interface uses BT.656 synchronization 118*4882a593Smuzhiyun * @fields: The fields (CCDC_FIELD_*) stored in the current buffer 119*4882a593Smuzhiyun * @underrun: A buffer underrun occurred and a new buffer has been queued 120*4882a593Smuzhiyun * @state: Streaming state 121*4882a593Smuzhiyun * @lock: Serializes shadow_update with interrupt handler 122*4882a593Smuzhiyun * @wait: Wait queue used to stop the module 123*4882a593Smuzhiyun * @stopping: Stopping state 124*4882a593Smuzhiyun * @running: Is the CCDC hardware running 125*4882a593Smuzhiyun * @ioctl_lock: Serializes ioctl calls and LSC requests freeing 126*4882a593Smuzhiyun */ 127*4882a593Smuzhiyun struct isp_ccdc_device { 128*4882a593Smuzhiyun struct v4l2_subdev subdev; 129*4882a593Smuzhiyun struct media_pad pads[CCDC_PADS_NUM]; 130*4882a593Smuzhiyun struct v4l2_mbus_framefmt formats[CCDC_PADS_NUM]; 131*4882a593Smuzhiyun struct v4l2_rect crop; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun enum ccdc_input_entity input; 134*4882a593Smuzhiyun unsigned int output; 135*4882a593Smuzhiyun struct isp_video video_out; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun unsigned int alaw:1, 138*4882a593Smuzhiyun lpf:1, 139*4882a593Smuzhiyun obclamp:1, 140*4882a593Smuzhiyun fpc_en:1; 141*4882a593Smuzhiyun struct omap3isp_ccdc_blcomp blcomp; 142*4882a593Smuzhiyun struct omap3isp_ccdc_bclamp clamp; 143*4882a593Smuzhiyun struct ispccdc_fpc fpc; 144*4882a593Smuzhiyun struct ispccdc_lsc lsc; 145*4882a593Smuzhiyun unsigned int update; 146*4882a593Smuzhiyun unsigned int shadow_update; 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun bool bt656; 149*4882a593Smuzhiyun unsigned int fields; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun unsigned int underrun:1; 152*4882a593Smuzhiyun enum isp_pipeline_stream_state state; 153*4882a593Smuzhiyun spinlock_t lock; 154*4882a593Smuzhiyun wait_queue_head_t wait; 155*4882a593Smuzhiyun unsigned int stopping; 156*4882a593Smuzhiyun bool running; 157*4882a593Smuzhiyun struct mutex ioctl_lock; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun struct isp_device; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun int omap3isp_ccdc_init(struct isp_device *isp); 163*4882a593Smuzhiyun void omap3isp_ccdc_cleanup(struct isp_device *isp); 164*4882a593Smuzhiyun int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc, 165*4882a593Smuzhiyun struct v4l2_device *vdev); 166*4882a593Smuzhiyun void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc); 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun int omap3isp_ccdc_busy(struct isp_ccdc_device *isp_ccdc); 169*4882a593Smuzhiyun int omap3isp_ccdc_isr(struct isp_ccdc_device *isp_ccdc, u32 events); 170*4882a593Smuzhiyun void omap3isp_ccdc_restore_context(struct isp_device *isp); 171*4882a593Smuzhiyun void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc, 172*4882a593Smuzhiyun unsigned int *max_rate); 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun #endif /* OMAP3_ISP_CCDC_H */ 175