1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Freescale VIU video driver
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Authors: Hongjun Chen <hong-jun.chen@freescale.com>
8*4882a593Smuzhiyun * Porting to 2.6.35 by DENX Software Engineering,
9*4882a593Smuzhiyun * Anatolij Gustschin <agust@denx.de>
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/clk.h>
14*4882a593Smuzhiyun #include <linux/kernel.h>
15*4882a593Smuzhiyun #include <linux/i2c.h>
16*4882a593Smuzhiyun #include <linux/init.h>
17*4882a593Smuzhiyun #include <linux/interrupt.h>
18*4882a593Smuzhiyun #include <linux/io.h>
19*4882a593Smuzhiyun #include <linux/of_address.h>
20*4882a593Smuzhiyun #include <linux/of_irq.h>
21*4882a593Smuzhiyun #include <linux/of_platform.h>
22*4882a593Smuzhiyun #include <linux/slab.h>
23*4882a593Smuzhiyun #include <media/v4l2-common.h>
24*4882a593Smuzhiyun #include <media/v4l2-device.h>
25*4882a593Smuzhiyun #include <media/v4l2-ioctl.h>
26*4882a593Smuzhiyun #include <media/v4l2-ctrls.h>
27*4882a593Smuzhiyun #include <media/v4l2-fh.h>
28*4882a593Smuzhiyun #include <media/v4l2-event.h>
29*4882a593Smuzhiyun #include <media/videobuf-dma-contig.h>
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #define DRV_NAME "fsl_viu"
32*4882a593Smuzhiyun #define VIU_VERSION "0.5.1"
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun /* Allow building this driver with COMPILE_TEST */
35*4882a593Smuzhiyun #if !defined(CONFIG_PPC) && !defined(CONFIG_MICROBLAZE) && !defined(CONFIG_M68K)
36*4882a593Smuzhiyun #define out_be32(v, a) iowrite32be(a, (void __iomem *)v)
37*4882a593Smuzhiyun #define in_be32(a) ioread32be((void __iomem *)a)
38*4882a593Smuzhiyun #endif
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #define BUFFER_TIMEOUT msecs_to_jiffies(500) /* 0.5 seconds */
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun #define VIU_VID_MEM_LIMIT 4 /* Video memory limit, in Mb */
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun /* I2C address of video decoder chip is 0x4A */
45*4882a593Smuzhiyun #define VIU_VIDEO_DECODER_ADDR 0x25
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun static int info_level;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun #define dprintk(level, fmt, arg...) \
50*4882a593Smuzhiyun do { \
51*4882a593Smuzhiyun if (level <= info_level) \
52*4882a593Smuzhiyun printk(KERN_DEBUG "viu: " fmt , ## arg); \
53*4882a593Smuzhiyun } while (0)
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun /*
56*4882a593Smuzhiyun * Basic structures
57*4882a593Smuzhiyun */
58*4882a593Smuzhiyun struct viu_fmt {
59*4882a593Smuzhiyun u32 fourcc; /* v4l2 format id */
60*4882a593Smuzhiyun u32 pixelformat;
61*4882a593Smuzhiyun int depth;
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun static struct viu_fmt formats[] = {
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun .fourcc = V4L2_PIX_FMT_RGB565,
67*4882a593Smuzhiyun .pixelformat = V4L2_PIX_FMT_RGB565,
68*4882a593Smuzhiyun .depth = 16,
69*4882a593Smuzhiyun }, {
70*4882a593Smuzhiyun .fourcc = V4L2_PIX_FMT_RGB32,
71*4882a593Smuzhiyun .pixelformat = V4L2_PIX_FMT_RGB32,
72*4882a593Smuzhiyun .depth = 32,
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun };
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun struct viu_dev;
77*4882a593Smuzhiyun struct viu_buf;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun /* buffer for one video frame */
80*4882a593Smuzhiyun struct viu_buf {
81*4882a593Smuzhiyun /* common v4l buffer stuff -- must be first */
82*4882a593Smuzhiyun struct videobuf_buffer vb;
83*4882a593Smuzhiyun struct viu_fmt *fmt;
84*4882a593Smuzhiyun };
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun struct viu_dmaqueue {
87*4882a593Smuzhiyun struct viu_dev *dev;
88*4882a593Smuzhiyun struct list_head active;
89*4882a593Smuzhiyun struct list_head queued;
90*4882a593Smuzhiyun struct timer_list timeout;
91*4882a593Smuzhiyun };
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun struct viu_status {
94*4882a593Smuzhiyun u32 field_irq;
95*4882a593Smuzhiyun u32 vsync_irq;
96*4882a593Smuzhiyun u32 hsync_irq;
97*4882a593Smuzhiyun u32 vstart_irq;
98*4882a593Smuzhiyun u32 dma_end_irq;
99*4882a593Smuzhiyun u32 error_irq;
100*4882a593Smuzhiyun };
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun struct viu_reg {
103*4882a593Smuzhiyun u32 status_cfg;
104*4882a593Smuzhiyun u32 luminance;
105*4882a593Smuzhiyun u32 chroma_r;
106*4882a593Smuzhiyun u32 chroma_g;
107*4882a593Smuzhiyun u32 chroma_b;
108*4882a593Smuzhiyun u32 field_base_addr;
109*4882a593Smuzhiyun u32 dma_inc;
110*4882a593Smuzhiyun u32 picture_count;
111*4882a593Smuzhiyun u32 req_alarm;
112*4882a593Smuzhiyun u32 alpha;
113*4882a593Smuzhiyun } __attribute__ ((packed));
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun struct viu_dev {
116*4882a593Smuzhiyun struct v4l2_device v4l2_dev;
117*4882a593Smuzhiyun struct v4l2_ctrl_handler hdl;
118*4882a593Smuzhiyun struct mutex lock;
119*4882a593Smuzhiyun spinlock_t slock;
120*4882a593Smuzhiyun int users;
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun struct device *dev;
123*4882a593Smuzhiyun /* various device info */
124*4882a593Smuzhiyun struct video_device *vdev;
125*4882a593Smuzhiyun struct viu_dmaqueue vidq;
126*4882a593Smuzhiyun enum v4l2_field capfield;
127*4882a593Smuzhiyun int field;
128*4882a593Smuzhiyun int first;
129*4882a593Smuzhiyun int dma_done;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun /* Hardware register area */
132*4882a593Smuzhiyun struct viu_reg __iomem *vr;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun /* Interrupt vector */
135*4882a593Smuzhiyun int irq;
136*4882a593Smuzhiyun struct viu_status irqs;
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun /* video overlay */
139*4882a593Smuzhiyun struct v4l2_framebuffer ovbuf;
140*4882a593Smuzhiyun struct viu_fmt *ovfmt;
141*4882a593Smuzhiyun unsigned int ovenable;
142*4882a593Smuzhiyun enum v4l2_field ovfield;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun /* crop */
145*4882a593Smuzhiyun struct v4l2_rect crop_current;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun /* clock pointer */
148*4882a593Smuzhiyun struct clk *clk;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun /* decoder */
151*4882a593Smuzhiyun struct v4l2_subdev *decoder;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun v4l2_std_id std;
154*4882a593Smuzhiyun };
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun struct viu_fh {
157*4882a593Smuzhiyun /* must remain the first field of this struct */
158*4882a593Smuzhiyun struct v4l2_fh fh;
159*4882a593Smuzhiyun struct viu_dev *dev;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun /* video capture */
162*4882a593Smuzhiyun struct videobuf_queue vb_vidq;
163*4882a593Smuzhiyun spinlock_t vbq_lock; /* spinlock for the videobuf queue */
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun /* video overlay */
166*4882a593Smuzhiyun struct v4l2_window win;
167*4882a593Smuzhiyun struct v4l2_clip clips[1];
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun /* video capture */
170*4882a593Smuzhiyun struct viu_fmt *fmt;
171*4882a593Smuzhiyun int width, height, sizeimage;
172*4882a593Smuzhiyun enum v4l2_buf_type type;
173*4882a593Smuzhiyun };
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun static struct viu_reg reg_val;
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun /*
178*4882a593Smuzhiyun * Macro definitions of VIU registers
179*4882a593Smuzhiyun */
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun /* STATUS_CONFIG register */
182*4882a593Smuzhiyun enum status_config {
183*4882a593Smuzhiyun SOFT_RST = 1 << 0,
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun ERR_MASK = 0x0f << 4, /* Error code mask */
186*4882a593Smuzhiyun ERR_NO = 0x00, /* No error */
187*4882a593Smuzhiyun ERR_DMA_V = 0x01 << 4, /* DMA in vertical active */
188*4882a593Smuzhiyun ERR_DMA_VB = 0x02 << 4, /* DMA in vertical blanking */
189*4882a593Smuzhiyun ERR_LINE_TOO_LONG = 0x04 << 4, /* Line too long */
190*4882a593Smuzhiyun ERR_TOO_MANG_LINES = 0x05 << 4, /* Too many lines in field */
191*4882a593Smuzhiyun ERR_LINE_TOO_SHORT = 0x06 << 4, /* Line too short */
192*4882a593Smuzhiyun ERR_NOT_ENOUGH_LINE = 0x07 << 4, /* Not enough lines in field */
193*4882a593Smuzhiyun ERR_FIFO_OVERFLOW = 0x08 << 4, /* FIFO overflow */
194*4882a593Smuzhiyun ERR_FIFO_UNDERFLOW = 0x09 << 4, /* FIFO underflow */
195*4882a593Smuzhiyun ERR_1bit_ECC = 0x0a << 4, /* One bit ECC error */
196*4882a593Smuzhiyun ERR_MORE_ECC = 0x0b << 4, /* Two/more bits ECC error */
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun INT_FIELD_EN = 0x01 << 8, /* Enable field interrupt */
199*4882a593Smuzhiyun INT_VSYNC_EN = 0x01 << 9, /* Enable vsync interrupt */
200*4882a593Smuzhiyun INT_HSYNC_EN = 0x01 << 10, /* Enable hsync interrupt */
201*4882a593Smuzhiyun INT_VSTART_EN = 0x01 << 11, /* Enable vstart interrupt */
202*4882a593Smuzhiyun INT_DMA_END_EN = 0x01 << 12, /* Enable DMA end interrupt */
203*4882a593Smuzhiyun INT_ERROR_EN = 0x01 << 13, /* Enable error interrupt */
204*4882a593Smuzhiyun INT_ECC_EN = 0x01 << 14, /* Enable ECC interrupt */
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun INT_FIELD_STATUS = 0x01 << 16, /* field interrupt status */
207*4882a593Smuzhiyun INT_VSYNC_STATUS = 0x01 << 17, /* vsync interrupt status */
208*4882a593Smuzhiyun INT_HSYNC_STATUS = 0x01 << 18, /* hsync interrupt status */
209*4882a593Smuzhiyun INT_VSTART_STATUS = 0x01 << 19, /* vstart interrupt status */
210*4882a593Smuzhiyun INT_DMA_END_STATUS = 0x01 << 20, /* DMA end interrupt status */
211*4882a593Smuzhiyun INT_ERROR_STATUS = 0x01 << 21, /* error interrupt status */
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun DMA_ACT = 0x01 << 27, /* Enable DMA transfer */
214*4882a593Smuzhiyun FIELD_NO = 0x01 << 28, /* Field number */
215*4882a593Smuzhiyun DITHER_ON = 0x01 << 29, /* Dithering is on */
216*4882a593Smuzhiyun ROUND_ON = 0x01 << 30, /* Round is on */
217*4882a593Smuzhiyun MODE_32BIT = 1UL << 31, /* Data in RGBa888,
218*4882a593Smuzhiyun * 0 in RGB565
219*4882a593Smuzhiyun */
220*4882a593Smuzhiyun };
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun #define norm_maxw() 720
223*4882a593Smuzhiyun #define norm_maxh() 576
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun #define INT_ALL_STATUS (INT_FIELD_STATUS | INT_VSYNC_STATUS | \
226*4882a593Smuzhiyun INT_HSYNC_STATUS | INT_VSTART_STATUS | \
227*4882a593Smuzhiyun INT_DMA_END_STATUS | INT_ERROR_STATUS)
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun #define NUM_FORMATS ARRAY_SIZE(formats)
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun static irqreturn_t viu_intr(int irq, void *dev_id);
232*4882a593Smuzhiyun
format_by_fourcc(int fourcc)233*4882a593Smuzhiyun static struct viu_fmt *format_by_fourcc(int fourcc)
234*4882a593Smuzhiyun {
235*4882a593Smuzhiyun int i;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun for (i = 0; i < NUM_FORMATS; i++) {
238*4882a593Smuzhiyun if (formats[i].pixelformat == fourcc)
239*4882a593Smuzhiyun return formats + i;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun dprintk(0, "unknown pixelformat:'%4.4s'\n", (char *)&fourcc);
243*4882a593Smuzhiyun return NULL;
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun
viu_start_dma(struct viu_dev * dev)246*4882a593Smuzhiyun static void viu_start_dma(struct viu_dev *dev)
247*4882a593Smuzhiyun {
248*4882a593Smuzhiyun struct viu_reg __iomem *vr = dev->vr;
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun dev->field = 0;
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun /* Enable DMA operation */
253*4882a593Smuzhiyun out_be32(&vr->status_cfg, SOFT_RST);
254*4882a593Smuzhiyun out_be32(&vr->status_cfg, INT_FIELD_EN);
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun
viu_stop_dma(struct viu_dev * dev)257*4882a593Smuzhiyun static void viu_stop_dma(struct viu_dev *dev)
258*4882a593Smuzhiyun {
259*4882a593Smuzhiyun struct viu_reg __iomem *vr = dev->vr;
260*4882a593Smuzhiyun int cnt = 100;
261*4882a593Smuzhiyun u32 status_cfg;
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun out_be32(&vr->status_cfg, 0);
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun /* Clear pending interrupts */
266*4882a593Smuzhiyun status_cfg = in_be32(&vr->status_cfg);
267*4882a593Smuzhiyun if (status_cfg & 0x3f0000)
268*4882a593Smuzhiyun out_be32(&vr->status_cfg, status_cfg & 0x3f0000);
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun if (status_cfg & DMA_ACT) {
271*4882a593Smuzhiyun do {
272*4882a593Smuzhiyun status_cfg = in_be32(&vr->status_cfg);
273*4882a593Smuzhiyun if (status_cfg & INT_DMA_END_STATUS)
274*4882a593Smuzhiyun break;
275*4882a593Smuzhiyun } while (cnt--);
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun if (cnt < 0) {
278*4882a593Smuzhiyun /* timed out, issue soft reset */
279*4882a593Smuzhiyun out_be32(&vr->status_cfg, SOFT_RST);
280*4882a593Smuzhiyun out_be32(&vr->status_cfg, 0);
281*4882a593Smuzhiyun } else {
282*4882a593Smuzhiyun /* clear DMA_END and other pending irqs */
283*4882a593Smuzhiyun out_be32(&vr->status_cfg, status_cfg & 0x3f0000);
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun dev->field = 0;
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun
restart_video_queue(struct viu_dmaqueue * vidq)290*4882a593Smuzhiyun static int restart_video_queue(struct viu_dmaqueue *vidq)
291*4882a593Smuzhiyun {
292*4882a593Smuzhiyun struct viu_buf *buf, *prev;
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun dprintk(1, "%s vidq=%p\n", __func__, vidq);
295*4882a593Smuzhiyun if (!list_empty(&vidq->active)) {
296*4882a593Smuzhiyun buf = list_entry(vidq->active.next, struct viu_buf, vb.queue);
297*4882a593Smuzhiyun dprintk(2, "restart_queue [%p/%d]: restart dma\n",
298*4882a593Smuzhiyun buf, buf->vb.i);
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun viu_stop_dma(vidq->dev);
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun /* cancel all outstanding capture requests */
303*4882a593Smuzhiyun list_for_each_entry_safe(buf, prev, &vidq->active, vb.queue) {
304*4882a593Smuzhiyun list_del(&buf->vb.queue);
305*4882a593Smuzhiyun buf->vb.state = VIDEOBUF_ERROR;
306*4882a593Smuzhiyun wake_up(&buf->vb.done);
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun mod_timer(&vidq->timeout, jiffies+BUFFER_TIMEOUT);
309*4882a593Smuzhiyun return 0;
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun prev = NULL;
313*4882a593Smuzhiyun for (;;) {
314*4882a593Smuzhiyun if (list_empty(&vidq->queued))
315*4882a593Smuzhiyun return 0;
316*4882a593Smuzhiyun buf = list_entry(vidq->queued.next, struct viu_buf, vb.queue);
317*4882a593Smuzhiyun if (prev == NULL) {
318*4882a593Smuzhiyun list_move_tail(&buf->vb.queue, &vidq->active);
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun dprintk(1, "Restarting video dma\n");
321*4882a593Smuzhiyun viu_stop_dma(vidq->dev);
322*4882a593Smuzhiyun viu_start_dma(vidq->dev);
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun buf->vb.state = VIDEOBUF_ACTIVE;
325*4882a593Smuzhiyun mod_timer(&vidq->timeout, jiffies+BUFFER_TIMEOUT);
326*4882a593Smuzhiyun dprintk(2, "[%p/%d] restart_queue - first active\n",
327*4882a593Smuzhiyun buf, buf->vb.i);
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun } else if (prev->vb.width == buf->vb.width &&
330*4882a593Smuzhiyun prev->vb.height == buf->vb.height &&
331*4882a593Smuzhiyun prev->fmt == buf->fmt) {
332*4882a593Smuzhiyun list_move_tail(&buf->vb.queue, &vidq->active);
333*4882a593Smuzhiyun buf->vb.state = VIDEOBUF_ACTIVE;
334*4882a593Smuzhiyun dprintk(2, "[%p/%d] restart_queue - move to active\n",
335*4882a593Smuzhiyun buf, buf->vb.i);
336*4882a593Smuzhiyun } else {
337*4882a593Smuzhiyun return 0;
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun prev = buf;
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun
viu_vid_timeout(struct timer_list * t)343*4882a593Smuzhiyun static void viu_vid_timeout(struct timer_list *t)
344*4882a593Smuzhiyun {
345*4882a593Smuzhiyun struct viu_dev *dev = from_timer(dev, t, vidq.timeout);
346*4882a593Smuzhiyun struct viu_buf *buf;
347*4882a593Smuzhiyun struct viu_dmaqueue *vidq = &dev->vidq;
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun while (!list_empty(&vidq->active)) {
350*4882a593Smuzhiyun buf = list_entry(vidq->active.next, struct viu_buf, vb.queue);
351*4882a593Smuzhiyun list_del(&buf->vb.queue);
352*4882a593Smuzhiyun buf->vb.state = VIDEOBUF_ERROR;
353*4882a593Smuzhiyun wake_up(&buf->vb.done);
354*4882a593Smuzhiyun dprintk(1, "viu/0: [%p/%d] timeout\n", buf, buf->vb.i);
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun restart_video_queue(vidq);
358*4882a593Smuzhiyun }
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun /*
361*4882a593Smuzhiyun * Videobuf operations
362*4882a593Smuzhiyun */
buffer_setup(struct videobuf_queue * vq,unsigned int * count,unsigned int * size)363*4882a593Smuzhiyun static int buffer_setup(struct videobuf_queue *vq, unsigned int *count,
364*4882a593Smuzhiyun unsigned int *size)
365*4882a593Smuzhiyun {
366*4882a593Smuzhiyun struct viu_fh *fh = vq->priv_data;
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun *size = fh->width * fh->height * fh->fmt->depth >> 3;
369*4882a593Smuzhiyun if (*count == 0)
370*4882a593Smuzhiyun *count = 32;
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun while (*size * *count > VIU_VID_MEM_LIMIT * 1024 * 1024)
373*4882a593Smuzhiyun (*count)--;
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun dprintk(1, "%s, count=%d, size=%d\n", __func__, *count, *size);
376*4882a593Smuzhiyun return 0;
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun
free_buffer(struct videobuf_queue * vq,struct viu_buf * buf)379*4882a593Smuzhiyun static void free_buffer(struct videobuf_queue *vq, struct viu_buf *buf)
380*4882a593Smuzhiyun {
381*4882a593Smuzhiyun struct videobuf_buffer *vb = &buf->vb;
382*4882a593Smuzhiyun void *vaddr = NULL;
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun BUG_ON(in_interrupt());
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun videobuf_waiton(vq, &buf->vb, 0, 0);
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun if (vq->int_ops && vq->int_ops->vaddr)
389*4882a593Smuzhiyun vaddr = vq->int_ops->vaddr(vb);
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun if (vaddr)
392*4882a593Smuzhiyun videobuf_dma_contig_free(vq, &buf->vb);
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun buf->vb.state = VIDEOBUF_NEEDS_INIT;
395*4882a593Smuzhiyun }
396*4882a593Smuzhiyun
buffer_activate(struct viu_dev * dev,struct viu_buf * buf)397*4882a593Smuzhiyun inline int buffer_activate(struct viu_dev *dev, struct viu_buf *buf)
398*4882a593Smuzhiyun {
399*4882a593Smuzhiyun struct viu_reg __iomem *vr = dev->vr;
400*4882a593Smuzhiyun int bpp;
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun /* setup the DMA base address */
403*4882a593Smuzhiyun reg_val.field_base_addr = videobuf_to_dma_contig(&buf->vb);
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun dprintk(1, "buffer_activate [%p/%d]: dma addr 0x%lx\n",
406*4882a593Smuzhiyun buf, buf->vb.i, (unsigned long)reg_val.field_base_addr);
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun /* interlace is on by default, set horizontal DMA increment */
409*4882a593Smuzhiyun reg_val.status_cfg = 0;
410*4882a593Smuzhiyun bpp = buf->fmt->depth >> 3;
411*4882a593Smuzhiyun switch (bpp) {
412*4882a593Smuzhiyun case 2:
413*4882a593Smuzhiyun reg_val.status_cfg &= ~MODE_32BIT;
414*4882a593Smuzhiyun reg_val.dma_inc = buf->vb.width * 2;
415*4882a593Smuzhiyun break;
416*4882a593Smuzhiyun case 4:
417*4882a593Smuzhiyun reg_val.status_cfg |= MODE_32BIT;
418*4882a593Smuzhiyun reg_val.dma_inc = buf->vb.width * 4;
419*4882a593Smuzhiyun break;
420*4882a593Smuzhiyun default:
421*4882a593Smuzhiyun dprintk(0, "doesn't support color depth(%d)\n",
422*4882a593Smuzhiyun bpp * 8);
423*4882a593Smuzhiyun return -EINVAL;
424*4882a593Smuzhiyun }
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun /* setup picture_count register */
427*4882a593Smuzhiyun reg_val.picture_count = (buf->vb.height / 2) << 16 |
428*4882a593Smuzhiyun buf->vb.width;
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun reg_val.status_cfg |= DMA_ACT | INT_DMA_END_EN | INT_FIELD_EN;
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun buf->vb.state = VIDEOBUF_ACTIVE;
433*4882a593Smuzhiyun dev->capfield = buf->vb.field;
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun /* reset dma increment if needed */
436*4882a593Smuzhiyun if (!V4L2_FIELD_HAS_BOTH(buf->vb.field))
437*4882a593Smuzhiyun reg_val.dma_inc = 0;
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun out_be32(&vr->dma_inc, reg_val.dma_inc);
440*4882a593Smuzhiyun out_be32(&vr->picture_count, reg_val.picture_count);
441*4882a593Smuzhiyun out_be32(&vr->field_base_addr, reg_val.field_base_addr);
442*4882a593Smuzhiyun mod_timer(&dev->vidq.timeout, jiffies + BUFFER_TIMEOUT);
443*4882a593Smuzhiyun return 0;
444*4882a593Smuzhiyun }
445*4882a593Smuzhiyun
buffer_prepare(struct videobuf_queue * vq,struct videobuf_buffer * vb,enum v4l2_field field)446*4882a593Smuzhiyun static int buffer_prepare(struct videobuf_queue *vq,
447*4882a593Smuzhiyun struct videobuf_buffer *vb,
448*4882a593Smuzhiyun enum v4l2_field field)
449*4882a593Smuzhiyun {
450*4882a593Smuzhiyun struct viu_fh *fh = vq->priv_data;
451*4882a593Smuzhiyun struct viu_buf *buf = container_of(vb, struct viu_buf, vb);
452*4882a593Smuzhiyun int rc;
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun BUG_ON(fh->fmt == NULL);
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun if (fh->width < 48 || fh->width > norm_maxw() ||
457*4882a593Smuzhiyun fh->height < 32 || fh->height > norm_maxh())
458*4882a593Smuzhiyun return -EINVAL;
459*4882a593Smuzhiyun buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3;
460*4882a593Smuzhiyun if (buf->vb.baddr != 0 && buf->vb.bsize < buf->vb.size)
461*4882a593Smuzhiyun return -EINVAL;
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun if (buf->fmt != fh->fmt ||
464*4882a593Smuzhiyun buf->vb.width != fh->width ||
465*4882a593Smuzhiyun buf->vb.height != fh->height ||
466*4882a593Smuzhiyun buf->vb.field != field) {
467*4882a593Smuzhiyun buf->fmt = fh->fmt;
468*4882a593Smuzhiyun buf->vb.width = fh->width;
469*4882a593Smuzhiyun buf->vb.height = fh->height;
470*4882a593Smuzhiyun buf->vb.field = field;
471*4882a593Smuzhiyun }
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun if (buf->vb.state == VIDEOBUF_NEEDS_INIT) {
474*4882a593Smuzhiyun rc = videobuf_iolock(vq, &buf->vb, NULL);
475*4882a593Smuzhiyun if (rc != 0)
476*4882a593Smuzhiyun goto fail;
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun buf->vb.width = fh->width;
479*4882a593Smuzhiyun buf->vb.height = fh->height;
480*4882a593Smuzhiyun buf->vb.field = field;
481*4882a593Smuzhiyun buf->fmt = fh->fmt;
482*4882a593Smuzhiyun }
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun buf->vb.state = VIDEOBUF_PREPARED;
485*4882a593Smuzhiyun return 0;
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun fail:
488*4882a593Smuzhiyun free_buffer(vq, buf);
489*4882a593Smuzhiyun return rc;
490*4882a593Smuzhiyun }
491*4882a593Smuzhiyun
buffer_queue(struct videobuf_queue * vq,struct videobuf_buffer * vb)492*4882a593Smuzhiyun static void buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
493*4882a593Smuzhiyun {
494*4882a593Smuzhiyun struct viu_buf *buf = container_of(vb, struct viu_buf, vb);
495*4882a593Smuzhiyun struct viu_fh *fh = vq->priv_data;
496*4882a593Smuzhiyun struct viu_dev *dev = fh->dev;
497*4882a593Smuzhiyun struct viu_dmaqueue *vidq = &dev->vidq;
498*4882a593Smuzhiyun struct viu_buf *prev;
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun if (!list_empty(&vidq->queued)) {
501*4882a593Smuzhiyun dprintk(1, "adding vb queue=%p\n", &buf->vb.queue);
502*4882a593Smuzhiyun dprintk(1, "vidq pointer 0x%p, queued 0x%p\n",
503*4882a593Smuzhiyun vidq, &vidq->queued);
504*4882a593Smuzhiyun dprintk(1, "dev %p, queued: self %p, next %p, head %p\n",
505*4882a593Smuzhiyun dev, &vidq->queued, vidq->queued.next,
506*4882a593Smuzhiyun vidq->queued.prev);
507*4882a593Smuzhiyun list_add_tail(&buf->vb.queue, &vidq->queued);
508*4882a593Smuzhiyun buf->vb.state = VIDEOBUF_QUEUED;
509*4882a593Smuzhiyun dprintk(2, "[%p/%d] buffer_queue - append to queued\n",
510*4882a593Smuzhiyun buf, buf->vb.i);
511*4882a593Smuzhiyun } else if (list_empty(&vidq->active)) {
512*4882a593Smuzhiyun dprintk(1, "adding vb active=%p\n", &buf->vb.queue);
513*4882a593Smuzhiyun list_add_tail(&buf->vb.queue, &vidq->active);
514*4882a593Smuzhiyun buf->vb.state = VIDEOBUF_ACTIVE;
515*4882a593Smuzhiyun mod_timer(&vidq->timeout, jiffies+BUFFER_TIMEOUT);
516*4882a593Smuzhiyun dprintk(2, "[%p/%d] buffer_queue - first active\n",
517*4882a593Smuzhiyun buf, buf->vb.i);
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun buffer_activate(dev, buf);
520*4882a593Smuzhiyun } else {
521*4882a593Smuzhiyun dprintk(1, "adding vb queue2=%p\n", &buf->vb.queue);
522*4882a593Smuzhiyun prev = list_entry(vidq->active.prev, struct viu_buf, vb.queue);
523*4882a593Smuzhiyun if (prev->vb.width == buf->vb.width &&
524*4882a593Smuzhiyun prev->vb.height == buf->vb.height &&
525*4882a593Smuzhiyun prev->fmt == buf->fmt) {
526*4882a593Smuzhiyun list_add_tail(&buf->vb.queue, &vidq->active);
527*4882a593Smuzhiyun buf->vb.state = VIDEOBUF_ACTIVE;
528*4882a593Smuzhiyun dprintk(2, "[%p/%d] buffer_queue - append to active\n",
529*4882a593Smuzhiyun buf, buf->vb.i);
530*4882a593Smuzhiyun } else {
531*4882a593Smuzhiyun list_add_tail(&buf->vb.queue, &vidq->queued);
532*4882a593Smuzhiyun buf->vb.state = VIDEOBUF_QUEUED;
533*4882a593Smuzhiyun dprintk(2, "[%p/%d] buffer_queue - first queued\n",
534*4882a593Smuzhiyun buf, buf->vb.i);
535*4882a593Smuzhiyun }
536*4882a593Smuzhiyun }
537*4882a593Smuzhiyun }
538*4882a593Smuzhiyun
buffer_release(struct videobuf_queue * vq,struct videobuf_buffer * vb)539*4882a593Smuzhiyun static void buffer_release(struct videobuf_queue *vq,
540*4882a593Smuzhiyun struct videobuf_buffer *vb)
541*4882a593Smuzhiyun {
542*4882a593Smuzhiyun struct viu_buf *buf = container_of(vb, struct viu_buf, vb);
543*4882a593Smuzhiyun struct viu_fh *fh = vq->priv_data;
544*4882a593Smuzhiyun struct viu_dev *dev = (struct viu_dev *)fh->dev;
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun viu_stop_dma(dev);
547*4882a593Smuzhiyun free_buffer(vq, buf);
548*4882a593Smuzhiyun }
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun static const struct videobuf_queue_ops viu_video_qops = {
551*4882a593Smuzhiyun .buf_setup = buffer_setup,
552*4882a593Smuzhiyun .buf_prepare = buffer_prepare,
553*4882a593Smuzhiyun .buf_queue = buffer_queue,
554*4882a593Smuzhiyun .buf_release = buffer_release,
555*4882a593Smuzhiyun };
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun /*
558*4882a593Smuzhiyun * IOCTL vidioc handling
559*4882a593Smuzhiyun */
vidioc_querycap(struct file * file,void * priv,struct v4l2_capability * cap)560*4882a593Smuzhiyun static int vidioc_querycap(struct file *file, void *priv,
561*4882a593Smuzhiyun struct v4l2_capability *cap)
562*4882a593Smuzhiyun {
563*4882a593Smuzhiyun strscpy(cap->driver, "viu", sizeof(cap->driver));
564*4882a593Smuzhiyun strscpy(cap->card, "viu", sizeof(cap->card));
565*4882a593Smuzhiyun strscpy(cap->bus_info, "platform:viu", sizeof(cap->bus_info));
566*4882a593Smuzhiyun return 0;
567*4882a593Smuzhiyun }
568*4882a593Smuzhiyun
vidioc_enum_fmt(struct file * file,void * priv,struct v4l2_fmtdesc * f)569*4882a593Smuzhiyun static int vidioc_enum_fmt(struct file *file, void *priv,
570*4882a593Smuzhiyun struct v4l2_fmtdesc *f)
571*4882a593Smuzhiyun {
572*4882a593Smuzhiyun int index = f->index;
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun if (f->index >= NUM_FORMATS)
575*4882a593Smuzhiyun return -EINVAL;
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun f->pixelformat = formats[index].fourcc;
578*4882a593Smuzhiyun return 0;
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun
vidioc_g_fmt_cap(struct file * file,void * priv,struct v4l2_format * f)581*4882a593Smuzhiyun static int vidioc_g_fmt_cap(struct file *file, void *priv,
582*4882a593Smuzhiyun struct v4l2_format *f)
583*4882a593Smuzhiyun {
584*4882a593Smuzhiyun struct viu_fh *fh = priv;
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun f->fmt.pix.width = fh->width;
587*4882a593Smuzhiyun f->fmt.pix.height = fh->height;
588*4882a593Smuzhiyun f->fmt.pix.field = fh->vb_vidq.field;
589*4882a593Smuzhiyun f->fmt.pix.pixelformat = fh->fmt->pixelformat;
590*4882a593Smuzhiyun f->fmt.pix.bytesperline =
591*4882a593Smuzhiyun (f->fmt.pix.width * fh->fmt->depth) >> 3;
592*4882a593Smuzhiyun f->fmt.pix.sizeimage = fh->sizeimage;
593*4882a593Smuzhiyun f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
594*4882a593Smuzhiyun return 0;
595*4882a593Smuzhiyun }
596*4882a593Smuzhiyun
vidioc_try_fmt_cap(struct file * file,void * priv,struct v4l2_format * f)597*4882a593Smuzhiyun static int vidioc_try_fmt_cap(struct file *file, void *priv,
598*4882a593Smuzhiyun struct v4l2_format *f)
599*4882a593Smuzhiyun {
600*4882a593Smuzhiyun struct viu_fmt *fmt;
601*4882a593Smuzhiyun unsigned int maxw, maxh;
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun fmt = format_by_fourcc(f->fmt.pix.pixelformat);
604*4882a593Smuzhiyun if (!fmt) {
605*4882a593Smuzhiyun dprintk(1, "Fourcc format (0x%08x) invalid.",
606*4882a593Smuzhiyun f->fmt.pix.pixelformat);
607*4882a593Smuzhiyun return -EINVAL;
608*4882a593Smuzhiyun }
609*4882a593Smuzhiyun
610*4882a593Smuzhiyun maxw = norm_maxw();
611*4882a593Smuzhiyun maxh = norm_maxh();
612*4882a593Smuzhiyun
613*4882a593Smuzhiyun f->fmt.pix.field = V4L2_FIELD_INTERLACED;
614*4882a593Smuzhiyun if (f->fmt.pix.height < 32)
615*4882a593Smuzhiyun f->fmt.pix.height = 32;
616*4882a593Smuzhiyun if (f->fmt.pix.height > maxh)
617*4882a593Smuzhiyun f->fmt.pix.height = maxh;
618*4882a593Smuzhiyun if (f->fmt.pix.width < 48)
619*4882a593Smuzhiyun f->fmt.pix.width = 48;
620*4882a593Smuzhiyun if (f->fmt.pix.width > maxw)
621*4882a593Smuzhiyun f->fmt.pix.width = maxw;
622*4882a593Smuzhiyun f->fmt.pix.width &= ~0x03;
623*4882a593Smuzhiyun f->fmt.pix.bytesperline =
624*4882a593Smuzhiyun (f->fmt.pix.width * fmt->depth) >> 3;
625*4882a593Smuzhiyun f->fmt.pix.sizeimage = f->fmt.pix.height * f->fmt.pix.bytesperline;
626*4882a593Smuzhiyun f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun return 0;
629*4882a593Smuzhiyun }
630*4882a593Smuzhiyun
vidioc_s_fmt_cap(struct file * file,void * priv,struct v4l2_format * f)631*4882a593Smuzhiyun static int vidioc_s_fmt_cap(struct file *file, void *priv,
632*4882a593Smuzhiyun struct v4l2_format *f)
633*4882a593Smuzhiyun {
634*4882a593Smuzhiyun struct viu_fh *fh = priv;
635*4882a593Smuzhiyun int ret;
636*4882a593Smuzhiyun
637*4882a593Smuzhiyun ret = vidioc_try_fmt_cap(file, fh, f);
638*4882a593Smuzhiyun if (ret < 0)
639*4882a593Smuzhiyun return ret;
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
642*4882a593Smuzhiyun fh->width = f->fmt.pix.width;
643*4882a593Smuzhiyun fh->height = f->fmt.pix.height;
644*4882a593Smuzhiyun fh->sizeimage = f->fmt.pix.sizeimage;
645*4882a593Smuzhiyun fh->vb_vidq.field = f->fmt.pix.field;
646*4882a593Smuzhiyun fh->type = f->type;
647*4882a593Smuzhiyun return 0;
648*4882a593Smuzhiyun }
649*4882a593Smuzhiyun
vidioc_g_fmt_overlay(struct file * file,void * priv,struct v4l2_format * f)650*4882a593Smuzhiyun static int vidioc_g_fmt_overlay(struct file *file, void *priv,
651*4882a593Smuzhiyun struct v4l2_format *f)
652*4882a593Smuzhiyun {
653*4882a593Smuzhiyun struct viu_fh *fh = priv;
654*4882a593Smuzhiyun
655*4882a593Smuzhiyun f->fmt.win = fh->win;
656*4882a593Smuzhiyun return 0;
657*4882a593Smuzhiyun }
658*4882a593Smuzhiyun
verify_preview(struct viu_dev * dev,struct v4l2_window * win)659*4882a593Smuzhiyun static int verify_preview(struct viu_dev *dev, struct v4l2_window *win)
660*4882a593Smuzhiyun {
661*4882a593Smuzhiyun enum v4l2_field field;
662*4882a593Smuzhiyun int maxw, maxh;
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun if (dev->ovbuf.base == NULL)
665*4882a593Smuzhiyun return -EINVAL;
666*4882a593Smuzhiyun if (dev->ovfmt == NULL)
667*4882a593Smuzhiyun return -EINVAL;
668*4882a593Smuzhiyun if (win->w.width < 48 || win->w.height < 32)
669*4882a593Smuzhiyun return -EINVAL;
670*4882a593Smuzhiyun
671*4882a593Smuzhiyun field = win->field;
672*4882a593Smuzhiyun maxw = dev->crop_current.width;
673*4882a593Smuzhiyun maxh = dev->crop_current.height;
674*4882a593Smuzhiyun
675*4882a593Smuzhiyun if (field == V4L2_FIELD_ANY) {
676*4882a593Smuzhiyun field = (win->w.height > maxh/2)
677*4882a593Smuzhiyun ? V4L2_FIELD_INTERLACED
678*4882a593Smuzhiyun : V4L2_FIELD_TOP;
679*4882a593Smuzhiyun }
680*4882a593Smuzhiyun switch (field) {
681*4882a593Smuzhiyun case V4L2_FIELD_TOP:
682*4882a593Smuzhiyun case V4L2_FIELD_BOTTOM:
683*4882a593Smuzhiyun maxh = maxh / 2;
684*4882a593Smuzhiyun break;
685*4882a593Smuzhiyun case V4L2_FIELD_INTERLACED:
686*4882a593Smuzhiyun break;
687*4882a593Smuzhiyun default:
688*4882a593Smuzhiyun return -EINVAL;
689*4882a593Smuzhiyun }
690*4882a593Smuzhiyun
691*4882a593Smuzhiyun win->field = field;
692*4882a593Smuzhiyun if (win->w.width > maxw)
693*4882a593Smuzhiyun win->w.width = maxw;
694*4882a593Smuzhiyun if (win->w.height > maxh)
695*4882a593Smuzhiyun win->w.height = maxh;
696*4882a593Smuzhiyun return 0;
697*4882a593Smuzhiyun }
698*4882a593Smuzhiyun
viu_activate_overlay(struct viu_reg __iomem * vr)699*4882a593Smuzhiyun inline void viu_activate_overlay(struct viu_reg __iomem *vr)
700*4882a593Smuzhiyun {
701*4882a593Smuzhiyun out_be32(&vr->field_base_addr, reg_val.field_base_addr);
702*4882a593Smuzhiyun out_be32(&vr->dma_inc, reg_val.dma_inc);
703*4882a593Smuzhiyun out_be32(&vr->picture_count, reg_val.picture_count);
704*4882a593Smuzhiyun }
705*4882a593Smuzhiyun
viu_setup_preview(struct viu_dev * dev,struct viu_fh * fh)706*4882a593Smuzhiyun static int viu_setup_preview(struct viu_dev *dev, struct viu_fh *fh)
707*4882a593Smuzhiyun {
708*4882a593Smuzhiyun int bpp;
709*4882a593Smuzhiyun
710*4882a593Smuzhiyun dprintk(1, "%s %dx%d\n", __func__,
711*4882a593Smuzhiyun fh->win.w.width, fh->win.w.height);
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun reg_val.status_cfg = 0;
714*4882a593Smuzhiyun
715*4882a593Smuzhiyun /* setup window */
716*4882a593Smuzhiyun reg_val.picture_count = (fh->win.w.height / 2) << 16 |
717*4882a593Smuzhiyun fh->win.w.width;
718*4882a593Smuzhiyun
719*4882a593Smuzhiyun /* setup color depth and dma increment */
720*4882a593Smuzhiyun bpp = dev->ovfmt->depth / 8;
721*4882a593Smuzhiyun switch (bpp) {
722*4882a593Smuzhiyun case 2:
723*4882a593Smuzhiyun reg_val.status_cfg &= ~MODE_32BIT;
724*4882a593Smuzhiyun reg_val.dma_inc = fh->win.w.width * 2;
725*4882a593Smuzhiyun break;
726*4882a593Smuzhiyun case 4:
727*4882a593Smuzhiyun reg_val.status_cfg |= MODE_32BIT;
728*4882a593Smuzhiyun reg_val.dma_inc = fh->win.w.width * 4;
729*4882a593Smuzhiyun break;
730*4882a593Smuzhiyun default:
731*4882a593Smuzhiyun dprintk(0, "device doesn't support color depth(%d)\n",
732*4882a593Smuzhiyun bpp * 8);
733*4882a593Smuzhiyun return -EINVAL;
734*4882a593Smuzhiyun }
735*4882a593Smuzhiyun
736*4882a593Smuzhiyun dev->ovfield = fh->win.field;
737*4882a593Smuzhiyun if (!V4L2_FIELD_HAS_BOTH(dev->ovfield))
738*4882a593Smuzhiyun reg_val.dma_inc = 0;
739*4882a593Smuzhiyun
740*4882a593Smuzhiyun reg_val.status_cfg |= DMA_ACT | INT_DMA_END_EN | INT_FIELD_EN;
741*4882a593Smuzhiyun
742*4882a593Smuzhiyun /* setup the base address of the overlay buffer */
743*4882a593Smuzhiyun reg_val.field_base_addr = (u32)(long)dev->ovbuf.base;
744*4882a593Smuzhiyun
745*4882a593Smuzhiyun return 0;
746*4882a593Smuzhiyun }
747*4882a593Smuzhiyun
vidioc_s_fmt_overlay(struct file * file,void * priv,struct v4l2_format * f)748*4882a593Smuzhiyun static int vidioc_s_fmt_overlay(struct file *file, void *priv,
749*4882a593Smuzhiyun struct v4l2_format *f)
750*4882a593Smuzhiyun {
751*4882a593Smuzhiyun struct viu_fh *fh = priv;
752*4882a593Smuzhiyun struct viu_dev *dev = (struct viu_dev *)fh->dev;
753*4882a593Smuzhiyun unsigned long flags;
754*4882a593Smuzhiyun int err;
755*4882a593Smuzhiyun
756*4882a593Smuzhiyun err = verify_preview(dev, &f->fmt.win);
757*4882a593Smuzhiyun if (err)
758*4882a593Smuzhiyun return err;
759*4882a593Smuzhiyun
760*4882a593Smuzhiyun fh->win = f->fmt.win;
761*4882a593Smuzhiyun
762*4882a593Smuzhiyun spin_lock_irqsave(&dev->slock, flags);
763*4882a593Smuzhiyun viu_setup_preview(dev, fh);
764*4882a593Smuzhiyun spin_unlock_irqrestore(&dev->slock, flags);
765*4882a593Smuzhiyun return 0;
766*4882a593Smuzhiyun }
767*4882a593Smuzhiyun
vidioc_try_fmt_overlay(struct file * file,void * priv,struct v4l2_format * f)768*4882a593Smuzhiyun static int vidioc_try_fmt_overlay(struct file *file, void *priv,
769*4882a593Smuzhiyun struct v4l2_format *f)
770*4882a593Smuzhiyun {
771*4882a593Smuzhiyun return 0;
772*4882a593Smuzhiyun }
773*4882a593Smuzhiyun
vidioc_overlay(struct file * file,void * priv,unsigned int on)774*4882a593Smuzhiyun static int vidioc_overlay(struct file *file, void *priv, unsigned int on)
775*4882a593Smuzhiyun {
776*4882a593Smuzhiyun struct viu_fh *fh = priv;
777*4882a593Smuzhiyun struct viu_dev *dev = (struct viu_dev *)fh->dev;
778*4882a593Smuzhiyun unsigned long flags;
779*4882a593Smuzhiyun
780*4882a593Smuzhiyun if (on) {
781*4882a593Smuzhiyun spin_lock_irqsave(&dev->slock, flags);
782*4882a593Smuzhiyun viu_activate_overlay(dev->vr);
783*4882a593Smuzhiyun dev->ovenable = 1;
784*4882a593Smuzhiyun
785*4882a593Smuzhiyun /* start dma */
786*4882a593Smuzhiyun viu_start_dma(dev);
787*4882a593Smuzhiyun spin_unlock_irqrestore(&dev->slock, flags);
788*4882a593Smuzhiyun } else {
789*4882a593Smuzhiyun viu_stop_dma(dev);
790*4882a593Smuzhiyun dev->ovenable = 0;
791*4882a593Smuzhiyun }
792*4882a593Smuzhiyun
793*4882a593Smuzhiyun return 0;
794*4882a593Smuzhiyun }
795*4882a593Smuzhiyun
vidioc_g_fbuf(struct file * file,void * priv,struct v4l2_framebuffer * arg)796*4882a593Smuzhiyun static int vidioc_g_fbuf(struct file *file, void *priv, struct v4l2_framebuffer *arg)
797*4882a593Smuzhiyun {
798*4882a593Smuzhiyun struct viu_fh *fh = priv;
799*4882a593Smuzhiyun struct viu_dev *dev = fh->dev;
800*4882a593Smuzhiyun struct v4l2_framebuffer *fb = arg;
801*4882a593Smuzhiyun
802*4882a593Smuzhiyun *fb = dev->ovbuf;
803*4882a593Smuzhiyun fb->capability = V4L2_FBUF_CAP_LIST_CLIPPING;
804*4882a593Smuzhiyun return 0;
805*4882a593Smuzhiyun }
806*4882a593Smuzhiyun
vidioc_s_fbuf(struct file * file,void * priv,const struct v4l2_framebuffer * arg)807*4882a593Smuzhiyun static int vidioc_s_fbuf(struct file *file, void *priv, const struct v4l2_framebuffer *arg)
808*4882a593Smuzhiyun {
809*4882a593Smuzhiyun struct viu_fh *fh = priv;
810*4882a593Smuzhiyun struct viu_dev *dev = fh->dev;
811*4882a593Smuzhiyun const struct v4l2_framebuffer *fb = arg;
812*4882a593Smuzhiyun struct viu_fmt *fmt;
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun if (!capable(CAP_SYS_ADMIN) && !capable(CAP_SYS_RAWIO))
815*4882a593Smuzhiyun return -EPERM;
816*4882a593Smuzhiyun
817*4882a593Smuzhiyun /* check args */
818*4882a593Smuzhiyun fmt = format_by_fourcc(fb->fmt.pixelformat);
819*4882a593Smuzhiyun if (fmt == NULL)
820*4882a593Smuzhiyun return -EINVAL;
821*4882a593Smuzhiyun
822*4882a593Smuzhiyun /* ok, accept it */
823*4882a593Smuzhiyun dev->ovbuf = *fb;
824*4882a593Smuzhiyun dev->ovfmt = fmt;
825*4882a593Smuzhiyun if (dev->ovbuf.fmt.bytesperline == 0) {
826*4882a593Smuzhiyun dev->ovbuf.fmt.bytesperline =
827*4882a593Smuzhiyun dev->ovbuf.fmt.width * fmt->depth / 8;
828*4882a593Smuzhiyun }
829*4882a593Smuzhiyun return 0;
830*4882a593Smuzhiyun }
831*4882a593Smuzhiyun
vidioc_reqbufs(struct file * file,void * priv,struct v4l2_requestbuffers * p)832*4882a593Smuzhiyun static int vidioc_reqbufs(struct file *file, void *priv,
833*4882a593Smuzhiyun struct v4l2_requestbuffers *p)
834*4882a593Smuzhiyun {
835*4882a593Smuzhiyun struct viu_fh *fh = priv;
836*4882a593Smuzhiyun
837*4882a593Smuzhiyun return videobuf_reqbufs(&fh->vb_vidq, p);
838*4882a593Smuzhiyun }
839*4882a593Smuzhiyun
vidioc_querybuf(struct file * file,void * priv,struct v4l2_buffer * p)840*4882a593Smuzhiyun static int vidioc_querybuf(struct file *file, void *priv,
841*4882a593Smuzhiyun struct v4l2_buffer *p)
842*4882a593Smuzhiyun {
843*4882a593Smuzhiyun struct viu_fh *fh = priv;
844*4882a593Smuzhiyun
845*4882a593Smuzhiyun return videobuf_querybuf(&fh->vb_vidq, p);
846*4882a593Smuzhiyun }
847*4882a593Smuzhiyun
vidioc_qbuf(struct file * file,void * priv,struct v4l2_buffer * p)848*4882a593Smuzhiyun static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *p)
849*4882a593Smuzhiyun {
850*4882a593Smuzhiyun struct viu_fh *fh = priv;
851*4882a593Smuzhiyun
852*4882a593Smuzhiyun return videobuf_qbuf(&fh->vb_vidq, p);
853*4882a593Smuzhiyun }
854*4882a593Smuzhiyun
vidioc_dqbuf(struct file * file,void * priv,struct v4l2_buffer * p)855*4882a593Smuzhiyun static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *p)
856*4882a593Smuzhiyun {
857*4882a593Smuzhiyun struct viu_fh *fh = priv;
858*4882a593Smuzhiyun
859*4882a593Smuzhiyun return videobuf_dqbuf(&fh->vb_vidq, p,
860*4882a593Smuzhiyun file->f_flags & O_NONBLOCK);
861*4882a593Smuzhiyun }
862*4882a593Smuzhiyun
vidioc_streamon(struct file * file,void * priv,enum v4l2_buf_type i)863*4882a593Smuzhiyun static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i)
864*4882a593Smuzhiyun {
865*4882a593Smuzhiyun struct viu_fh *fh = priv;
866*4882a593Smuzhiyun struct viu_dev *dev = fh->dev;
867*4882a593Smuzhiyun
868*4882a593Smuzhiyun if (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
869*4882a593Smuzhiyun return -EINVAL;
870*4882a593Smuzhiyun if (fh->type != i)
871*4882a593Smuzhiyun return -EINVAL;
872*4882a593Smuzhiyun
873*4882a593Smuzhiyun if (dev->ovenable)
874*4882a593Smuzhiyun dev->ovenable = 0;
875*4882a593Smuzhiyun
876*4882a593Smuzhiyun viu_start_dma(fh->dev);
877*4882a593Smuzhiyun
878*4882a593Smuzhiyun return videobuf_streamon(&fh->vb_vidq);
879*4882a593Smuzhiyun }
880*4882a593Smuzhiyun
vidioc_streamoff(struct file * file,void * priv,enum v4l2_buf_type i)881*4882a593Smuzhiyun static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
882*4882a593Smuzhiyun {
883*4882a593Smuzhiyun struct viu_fh *fh = priv;
884*4882a593Smuzhiyun
885*4882a593Smuzhiyun if (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
886*4882a593Smuzhiyun return -EINVAL;
887*4882a593Smuzhiyun if (fh->type != i)
888*4882a593Smuzhiyun return -EINVAL;
889*4882a593Smuzhiyun
890*4882a593Smuzhiyun viu_stop_dma(fh->dev);
891*4882a593Smuzhiyun
892*4882a593Smuzhiyun return videobuf_streamoff(&fh->vb_vidq);
893*4882a593Smuzhiyun }
894*4882a593Smuzhiyun
895*4882a593Smuzhiyun #define decoder_call(viu, o, f, args...) \
896*4882a593Smuzhiyun v4l2_subdev_call(viu->decoder, o, f, ##args)
897*4882a593Smuzhiyun
vidioc_querystd(struct file * file,void * priv,v4l2_std_id * std_id)898*4882a593Smuzhiyun static int vidioc_querystd(struct file *file, void *priv, v4l2_std_id *std_id)
899*4882a593Smuzhiyun {
900*4882a593Smuzhiyun struct viu_fh *fh = priv;
901*4882a593Smuzhiyun
902*4882a593Smuzhiyun decoder_call(fh->dev, video, querystd, std_id);
903*4882a593Smuzhiyun return 0;
904*4882a593Smuzhiyun }
905*4882a593Smuzhiyun
vidioc_s_std(struct file * file,void * priv,v4l2_std_id id)906*4882a593Smuzhiyun static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id id)
907*4882a593Smuzhiyun {
908*4882a593Smuzhiyun struct viu_fh *fh = priv;
909*4882a593Smuzhiyun
910*4882a593Smuzhiyun fh->dev->std = id;
911*4882a593Smuzhiyun decoder_call(fh->dev, video, s_std, id);
912*4882a593Smuzhiyun return 0;
913*4882a593Smuzhiyun }
914*4882a593Smuzhiyun
vidioc_g_std(struct file * file,void * priv,v4l2_std_id * std_id)915*4882a593Smuzhiyun static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *std_id)
916*4882a593Smuzhiyun {
917*4882a593Smuzhiyun struct viu_fh *fh = priv;
918*4882a593Smuzhiyun
919*4882a593Smuzhiyun *std_id = fh->dev->std;
920*4882a593Smuzhiyun return 0;
921*4882a593Smuzhiyun }
922*4882a593Smuzhiyun
923*4882a593Smuzhiyun /* only one input in this driver */
vidioc_enum_input(struct file * file,void * priv,struct v4l2_input * inp)924*4882a593Smuzhiyun static int vidioc_enum_input(struct file *file, void *priv,
925*4882a593Smuzhiyun struct v4l2_input *inp)
926*4882a593Smuzhiyun {
927*4882a593Smuzhiyun struct viu_fh *fh = priv;
928*4882a593Smuzhiyun
929*4882a593Smuzhiyun if (inp->index != 0)
930*4882a593Smuzhiyun return -EINVAL;
931*4882a593Smuzhiyun
932*4882a593Smuzhiyun inp->type = V4L2_INPUT_TYPE_CAMERA;
933*4882a593Smuzhiyun inp->std = fh->dev->vdev->tvnorms;
934*4882a593Smuzhiyun strscpy(inp->name, "Camera", sizeof(inp->name));
935*4882a593Smuzhiyun return 0;
936*4882a593Smuzhiyun }
937*4882a593Smuzhiyun
vidioc_g_input(struct file * file,void * priv,unsigned int * i)938*4882a593Smuzhiyun static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
939*4882a593Smuzhiyun {
940*4882a593Smuzhiyun *i = 0;
941*4882a593Smuzhiyun return 0;
942*4882a593Smuzhiyun }
943*4882a593Smuzhiyun
vidioc_s_input(struct file * file,void * priv,unsigned int i)944*4882a593Smuzhiyun static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
945*4882a593Smuzhiyun {
946*4882a593Smuzhiyun struct viu_fh *fh = priv;
947*4882a593Smuzhiyun
948*4882a593Smuzhiyun if (i)
949*4882a593Smuzhiyun return -EINVAL;
950*4882a593Smuzhiyun
951*4882a593Smuzhiyun decoder_call(fh->dev, video, s_routing, i, 0, 0);
952*4882a593Smuzhiyun return 0;
953*4882a593Smuzhiyun }
954*4882a593Smuzhiyun
viu_activate_next_buf(struct viu_dev * dev,struct viu_dmaqueue * viuq)955*4882a593Smuzhiyun inline void viu_activate_next_buf(struct viu_dev *dev,
956*4882a593Smuzhiyun struct viu_dmaqueue *viuq)
957*4882a593Smuzhiyun {
958*4882a593Smuzhiyun struct viu_dmaqueue *vidq = viuq;
959*4882a593Smuzhiyun struct viu_buf *buf;
960*4882a593Smuzhiyun
961*4882a593Smuzhiyun /* launch another DMA operation for an active/queued buffer */
962*4882a593Smuzhiyun if (!list_empty(&vidq->active)) {
963*4882a593Smuzhiyun buf = list_entry(vidq->active.next, struct viu_buf,
964*4882a593Smuzhiyun vb.queue);
965*4882a593Smuzhiyun dprintk(1, "start another queued buffer: 0x%p\n", buf);
966*4882a593Smuzhiyun buffer_activate(dev, buf);
967*4882a593Smuzhiyun } else if (!list_empty(&vidq->queued)) {
968*4882a593Smuzhiyun buf = list_entry(vidq->queued.next, struct viu_buf,
969*4882a593Smuzhiyun vb.queue);
970*4882a593Smuzhiyun list_del(&buf->vb.queue);
971*4882a593Smuzhiyun
972*4882a593Smuzhiyun dprintk(1, "start another queued buffer: 0x%p\n", buf);
973*4882a593Smuzhiyun list_add_tail(&buf->vb.queue, &vidq->active);
974*4882a593Smuzhiyun buf->vb.state = VIDEOBUF_ACTIVE;
975*4882a593Smuzhiyun buffer_activate(dev, buf);
976*4882a593Smuzhiyun }
977*4882a593Smuzhiyun }
978*4882a593Smuzhiyun
viu_default_settings(struct viu_reg __iomem * vr)979*4882a593Smuzhiyun inline void viu_default_settings(struct viu_reg __iomem *vr)
980*4882a593Smuzhiyun {
981*4882a593Smuzhiyun out_be32(&vr->luminance, 0x9512A254);
982*4882a593Smuzhiyun out_be32(&vr->chroma_r, 0x03310000);
983*4882a593Smuzhiyun out_be32(&vr->chroma_g, 0x06600F38);
984*4882a593Smuzhiyun out_be32(&vr->chroma_b, 0x00000409);
985*4882a593Smuzhiyun out_be32(&vr->alpha, 0x000000ff);
986*4882a593Smuzhiyun out_be32(&vr->req_alarm, 0x00000090);
987*4882a593Smuzhiyun dprintk(1, "status reg: 0x%08x, field base: 0x%08x\n",
988*4882a593Smuzhiyun in_be32(&vr->status_cfg), in_be32(&vr->field_base_addr));
989*4882a593Smuzhiyun }
990*4882a593Smuzhiyun
viu_overlay_intr(struct viu_dev * dev,u32 status)991*4882a593Smuzhiyun static void viu_overlay_intr(struct viu_dev *dev, u32 status)
992*4882a593Smuzhiyun {
993*4882a593Smuzhiyun struct viu_reg __iomem *vr = dev->vr;
994*4882a593Smuzhiyun
995*4882a593Smuzhiyun if (status & INT_DMA_END_STATUS)
996*4882a593Smuzhiyun dev->dma_done = 1;
997*4882a593Smuzhiyun
998*4882a593Smuzhiyun if (status & INT_FIELD_STATUS) {
999*4882a593Smuzhiyun if (dev->dma_done) {
1000*4882a593Smuzhiyun u32 addr = reg_val.field_base_addr;
1001*4882a593Smuzhiyun
1002*4882a593Smuzhiyun dev->dma_done = 0;
1003*4882a593Smuzhiyun if (status & FIELD_NO)
1004*4882a593Smuzhiyun addr += reg_val.dma_inc;
1005*4882a593Smuzhiyun
1006*4882a593Smuzhiyun out_be32(&vr->field_base_addr, addr);
1007*4882a593Smuzhiyun out_be32(&vr->dma_inc, reg_val.dma_inc);
1008*4882a593Smuzhiyun out_be32(&vr->status_cfg,
1009*4882a593Smuzhiyun (status & 0xffc0ffff) |
1010*4882a593Smuzhiyun (status & INT_ALL_STATUS) |
1011*4882a593Smuzhiyun reg_val.status_cfg);
1012*4882a593Smuzhiyun } else if (status & INT_VSYNC_STATUS) {
1013*4882a593Smuzhiyun out_be32(&vr->status_cfg,
1014*4882a593Smuzhiyun (status & 0xffc0ffff) |
1015*4882a593Smuzhiyun (status & INT_ALL_STATUS) |
1016*4882a593Smuzhiyun reg_val.status_cfg);
1017*4882a593Smuzhiyun }
1018*4882a593Smuzhiyun }
1019*4882a593Smuzhiyun }
1020*4882a593Smuzhiyun
viu_capture_intr(struct viu_dev * dev,u32 status)1021*4882a593Smuzhiyun static void viu_capture_intr(struct viu_dev *dev, u32 status)
1022*4882a593Smuzhiyun {
1023*4882a593Smuzhiyun struct viu_dmaqueue *vidq = &dev->vidq;
1024*4882a593Smuzhiyun struct viu_reg __iomem *vr = dev->vr;
1025*4882a593Smuzhiyun struct viu_buf *buf;
1026*4882a593Smuzhiyun int field_num;
1027*4882a593Smuzhiyun int need_two;
1028*4882a593Smuzhiyun int dma_done = 0;
1029*4882a593Smuzhiyun
1030*4882a593Smuzhiyun field_num = status & FIELD_NO;
1031*4882a593Smuzhiyun need_two = V4L2_FIELD_HAS_BOTH(dev->capfield);
1032*4882a593Smuzhiyun
1033*4882a593Smuzhiyun if (status & INT_DMA_END_STATUS) {
1034*4882a593Smuzhiyun dma_done = 1;
1035*4882a593Smuzhiyun if (((field_num == 0) && (dev->field == 0)) ||
1036*4882a593Smuzhiyun (field_num && (dev->field == 1)))
1037*4882a593Smuzhiyun dev->field++;
1038*4882a593Smuzhiyun }
1039*4882a593Smuzhiyun
1040*4882a593Smuzhiyun if (status & INT_FIELD_STATUS) {
1041*4882a593Smuzhiyun dprintk(1, "irq: field %d, done %d\n",
1042*4882a593Smuzhiyun !!field_num, dma_done);
1043*4882a593Smuzhiyun if (unlikely(dev->first)) {
1044*4882a593Smuzhiyun if (field_num == 0) {
1045*4882a593Smuzhiyun dev->first = 0;
1046*4882a593Smuzhiyun dprintk(1, "activate first buf\n");
1047*4882a593Smuzhiyun viu_activate_next_buf(dev, vidq);
1048*4882a593Smuzhiyun } else
1049*4882a593Smuzhiyun dprintk(1, "wait field 0\n");
1050*4882a593Smuzhiyun return;
1051*4882a593Smuzhiyun }
1052*4882a593Smuzhiyun
1053*4882a593Smuzhiyun /* setup buffer address for next dma operation */
1054*4882a593Smuzhiyun if (!list_empty(&vidq->active)) {
1055*4882a593Smuzhiyun u32 addr = reg_val.field_base_addr;
1056*4882a593Smuzhiyun
1057*4882a593Smuzhiyun if (field_num && need_two) {
1058*4882a593Smuzhiyun addr += reg_val.dma_inc;
1059*4882a593Smuzhiyun dprintk(1, "field 1, 0x%lx, dev field %d\n",
1060*4882a593Smuzhiyun (unsigned long)addr, dev->field);
1061*4882a593Smuzhiyun }
1062*4882a593Smuzhiyun out_be32(&vr->field_base_addr, addr);
1063*4882a593Smuzhiyun out_be32(&vr->dma_inc, reg_val.dma_inc);
1064*4882a593Smuzhiyun out_be32(&vr->status_cfg,
1065*4882a593Smuzhiyun (status & 0xffc0ffff) |
1066*4882a593Smuzhiyun (status & INT_ALL_STATUS) |
1067*4882a593Smuzhiyun reg_val.status_cfg);
1068*4882a593Smuzhiyun return;
1069*4882a593Smuzhiyun }
1070*4882a593Smuzhiyun }
1071*4882a593Smuzhiyun
1072*4882a593Smuzhiyun if (dma_done && field_num && (dev->field == 2)) {
1073*4882a593Smuzhiyun dev->field = 0;
1074*4882a593Smuzhiyun buf = list_entry(vidq->active.next,
1075*4882a593Smuzhiyun struct viu_buf, vb.queue);
1076*4882a593Smuzhiyun dprintk(1, "viu/0: [%p/%d] 0x%lx/0x%lx: dma complete\n",
1077*4882a593Smuzhiyun buf, buf->vb.i,
1078*4882a593Smuzhiyun (unsigned long)videobuf_to_dma_contig(&buf->vb),
1079*4882a593Smuzhiyun (unsigned long)in_be32(&vr->field_base_addr));
1080*4882a593Smuzhiyun
1081*4882a593Smuzhiyun if (waitqueue_active(&buf->vb.done)) {
1082*4882a593Smuzhiyun list_del(&buf->vb.queue);
1083*4882a593Smuzhiyun buf->vb.ts = ktime_get_ns();
1084*4882a593Smuzhiyun buf->vb.state = VIDEOBUF_DONE;
1085*4882a593Smuzhiyun buf->vb.field_count++;
1086*4882a593Smuzhiyun wake_up(&buf->vb.done);
1087*4882a593Smuzhiyun }
1088*4882a593Smuzhiyun /* activate next dma buffer */
1089*4882a593Smuzhiyun viu_activate_next_buf(dev, vidq);
1090*4882a593Smuzhiyun }
1091*4882a593Smuzhiyun }
1092*4882a593Smuzhiyun
viu_intr(int irq,void * dev_id)1093*4882a593Smuzhiyun static irqreturn_t viu_intr(int irq, void *dev_id)
1094*4882a593Smuzhiyun {
1095*4882a593Smuzhiyun struct viu_dev *dev = (struct viu_dev *)dev_id;
1096*4882a593Smuzhiyun struct viu_reg __iomem *vr = dev->vr;
1097*4882a593Smuzhiyun u32 status;
1098*4882a593Smuzhiyun u32 error;
1099*4882a593Smuzhiyun
1100*4882a593Smuzhiyun status = in_be32(&vr->status_cfg);
1101*4882a593Smuzhiyun
1102*4882a593Smuzhiyun if (status & INT_ERROR_STATUS) {
1103*4882a593Smuzhiyun dev->irqs.error_irq++;
1104*4882a593Smuzhiyun error = status & ERR_MASK;
1105*4882a593Smuzhiyun if (error)
1106*4882a593Smuzhiyun dprintk(1, "Err: error(%d), times:%d!\n",
1107*4882a593Smuzhiyun error >> 4, dev->irqs.error_irq);
1108*4882a593Smuzhiyun /* Clear interrupt error bit and error flags */
1109*4882a593Smuzhiyun out_be32(&vr->status_cfg,
1110*4882a593Smuzhiyun (status & 0xffc0ffff) | INT_ERROR_STATUS);
1111*4882a593Smuzhiyun }
1112*4882a593Smuzhiyun
1113*4882a593Smuzhiyun if (status & INT_DMA_END_STATUS) {
1114*4882a593Smuzhiyun dev->irqs.dma_end_irq++;
1115*4882a593Smuzhiyun dev->dma_done = 1;
1116*4882a593Smuzhiyun dprintk(2, "VIU DMA end interrupt times: %d\n",
1117*4882a593Smuzhiyun dev->irqs.dma_end_irq);
1118*4882a593Smuzhiyun }
1119*4882a593Smuzhiyun
1120*4882a593Smuzhiyun if (status & INT_HSYNC_STATUS)
1121*4882a593Smuzhiyun dev->irqs.hsync_irq++;
1122*4882a593Smuzhiyun
1123*4882a593Smuzhiyun if (status & INT_FIELD_STATUS) {
1124*4882a593Smuzhiyun dev->irqs.field_irq++;
1125*4882a593Smuzhiyun dprintk(2, "VIU field interrupt times: %d\n",
1126*4882a593Smuzhiyun dev->irqs.field_irq);
1127*4882a593Smuzhiyun }
1128*4882a593Smuzhiyun
1129*4882a593Smuzhiyun if (status & INT_VSTART_STATUS)
1130*4882a593Smuzhiyun dev->irqs.vstart_irq++;
1131*4882a593Smuzhiyun
1132*4882a593Smuzhiyun if (status & INT_VSYNC_STATUS) {
1133*4882a593Smuzhiyun dev->irqs.vsync_irq++;
1134*4882a593Smuzhiyun dprintk(2, "VIU vsync interrupt times: %d\n",
1135*4882a593Smuzhiyun dev->irqs.vsync_irq);
1136*4882a593Smuzhiyun }
1137*4882a593Smuzhiyun
1138*4882a593Smuzhiyun /* clear all pending irqs */
1139*4882a593Smuzhiyun status = in_be32(&vr->status_cfg);
1140*4882a593Smuzhiyun out_be32(&vr->status_cfg,
1141*4882a593Smuzhiyun (status & 0xffc0ffff) | (status & INT_ALL_STATUS));
1142*4882a593Smuzhiyun
1143*4882a593Smuzhiyun if (dev->ovenable) {
1144*4882a593Smuzhiyun viu_overlay_intr(dev, status);
1145*4882a593Smuzhiyun return IRQ_HANDLED;
1146*4882a593Smuzhiyun }
1147*4882a593Smuzhiyun
1148*4882a593Smuzhiyun /* Capture mode */
1149*4882a593Smuzhiyun viu_capture_intr(dev, status);
1150*4882a593Smuzhiyun return IRQ_HANDLED;
1151*4882a593Smuzhiyun }
1152*4882a593Smuzhiyun
1153*4882a593Smuzhiyun /*
1154*4882a593Smuzhiyun * File operations for the device
1155*4882a593Smuzhiyun */
viu_open(struct file * file)1156*4882a593Smuzhiyun static int viu_open(struct file *file)
1157*4882a593Smuzhiyun {
1158*4882a593Smuzhiyun struct video_device *vdev = video_devdata(file);
1159*4882a593Smuzhiyun struct viu_dev *dev = video_get_drvdata(vdev);
1160*4882a593Smuzhiyun struct viu_fh *fh;
1161*4882a593Smuzhiyun struct viu_reg __iomem *vr;
1162*4882a593Smuzhiyun int minor = vdev->minor;
1163*4882a593Smuzhiyun u32 status_cfg;
1164*4882a593Smuzhiyun
1165*4882a593Smuzhiyun dprintk(1, "viu: open (minor=%d)\n", minor);
1166*4882a593Smuzhiyun
1167*4882a593Smuzhiyun dev->users++;
1168*4882a593Smuzhiyun if (dev->users > 1) {
1169*4882a593Smuzhiyun dev->users--;
1170*4882a593Smuzhiyun return -EBUSY;
1171*4882a593Smuzhiyun }
1172*4882a593Smuzhiyun
1173*4882a593Smuzhiyun vr = dev->vr;
1174*4882a593Smuzhiyun
1175*4882a593Smuzhiyun dprintk(1, "open minor=%d type=%s users=%d\n", minor,
1176*4882a593Smuzhiyun v4l2_type_names[V4L2_BUF_TYPE_VIDEO_CAPTURE], dev->users);
1177*4882a593Smuzhiyun
1178*4882a593Smuzhiyun if (mutex_lock_interruptible(&dev->lock)) {
1179*4882a593Smuzhiyun dev->users--;
1180*4882a593Smuzhiyun return -ERESTARTSYS;
1181*4882a593Smuzhiyun }
1182*4882a593Smuzhiyun
1183*4882a593Smuzhiyun /* allocate and initialize per filehandle data */
1184*4882a593Smuzhiyun fh = kzalloc(sizeof(*fh), GFP_KERNEL);
1185*4882a593Smuzhiyun if (!fh) {
1186*4882a593Smuzhiyun dev->users--;
1187*4882a593Smuzhiyun mutex_unlock(&dev->lock);
1188*4882a593Smuzhiyun return -ENOMEM;
1189*4882a593Smuzhiyun }
1190*4882a593Smuzhiyun
1191*4882a593Smuzhiyun v4l2_fh_init(&fh->fh, vdev);
1192*4882a593Smuzhiyun file->private_data = fh;
1193*4882a593Smuzhiyun fh->dev = dev;
1194*4882a593Smuzhiyun
1195*4882a593Smuzhiyun fh->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1196*4882a593Smuzhiyun fh->fmt = format_by_fourcc(V4L2_PIX_FMT_RGB32);
1197*4882a593Smuzhiyun fh->width = norm_maxw();
1198*4882a593Smuzhiyun fh->height = norm_maxh();
1199*4882a593Smuzhiyun dev->crop_current.width = fh->width;
1200*4882a593Smuzhiyun dev->crop_current.height = fh->height;
1201*4882a593Smuzhiyun
1202*4882a593Smuzhiyun dprintk(1, "Open: fh=%p, dev=%p, dev->vidq=%p\n", fh, dev, &dev->vidq);
1203*4882a593Smuzhiyun dprintk(1, "Open: list_empty queued=%d\n",
1204*4882a593Smuzhiyun list_empty(&dev->vidq.queued));
1205*4882a593Smuzhiyun dprintk(1, "Open: list_empty active=%d\n",
1206*4882a593Smuzhiyun list_empty(&dev->vidq.active));
1207*4882a593Smuzhiyun
1208*4882a593Smuzhiyun viu_default_settings(vr);
1209*4882a593Smuzhiyun
1210*4882a593Smuzhiyun status_cfg = in_be32(&vr->status_cfg);
1211*4882a593Smuzhiyun out_be32(&vr->status_cfg,
1212*4882a593Smuzhiyun status_cfg & ~(INT_VSYNC_EN | INT_HSYNC_EN |
1213*4882a593Smuzhiyun INT_FIELD_EN | INT_VSTART_EN |
1214*4882a593Smuzhiyun INT_DMA_END_EN | INT_ERROR_EN | INT_ECC_EN));
1215*4882a593Smuzhiyun
1216*4882a593Smuzhiyun status_cfg = in_be32(&vr->status_cfg);
1217*4882a593Smuzhiyun out_be32(&vr->status_cfg, status_cfg | INT_ALL_STATUS);
1218*4882a593Smuzhiyun
1219*4882a593Smuzhiyun spin_lock_init(&fh->vbq_lock);
1220*4882a593Smuzhiyun videobuf_queue_dma_contig_init(&fh->vb_vidq, &viu_video_qops,
1221*4882a593Smuzhiyun dev->dev, &fh->vbq_lock,
1222*4882a593Smuzhiyun fh->type, V4L2_FIELD_INTERLACED,
1223*4882a593Smuzhiyun sizeof(struct viu_buf), fh,
1224*4882a593Smuzhiyun &fh->dev->lock);
1225*4882a593Smuzhiyun v4l2_fh_add(&fh->fh);
1226*4882a593Smuzhiyun mutex_unlock(&dev->lock);
1227*4882a593Smuzhiyun return 0;
1228*4882a593Smuzhiyun }
1229*4882a593Smuzhiyun
viu_read(struct file * file,char __user * data,size_t count,loff_t * ppos)1230*4882a593Smuzhiyun static ssize_t viu_read(struct file *file, char __user *data, size_t count,
1231*4882a593Smuzhiyun loff_t *ppos)
1232*4882a593Smuzhiyun {
1233*4882a593Smuzhiyun struct viu_fh *fh = file->private_data;
1234*4882a593Smuzhiyun struct viu_dev *dev = fh->dev;
1235*4882a593Smuzhiyun int ret = 0;
1236*4882a593Smuzhiyun
1237*4882a593Smuzhiyun dprintk(2, "%s\n", __func__);
1238*4882a593Smuzhiyun if (dev->ovenable)
1239*4882a593Smuzhiyun dev->ovenable = 0;
1240*4882a593Smuzhiyun
1241*4882a593Smuzhiyun if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) {
1242*4882a593Smuzhiyun if (mutex_lock_interruptible(&dev->lock))
1243*4882a593Smuzhiyun return -ERESTARTSYS;
1244*4882a593Smuzhiyun viu_start_dma(dev);
1245*4882a593Smuzhiyun ret = videobuf_read_stream(&fh->vb_vidq, data, count,
1246*4882a593Smuzhiyun ppos, 0, file->f_flags & O_NONBLOCK);
1247*4882a593Smuzhiyun mutex_unlock(&dev->lock);
1248*4882a593Smuzhiyun return ret;
1249*4882a593Smuzhiyun }
1250*4882a593Smuzhiyun return 0;
1251*4882a593Smuzhiyun }
1252*4882a593Smuzhiyun
viu_poll(struct file * file,struct poll_table_struct * wait)1253*4882a593Smuzhiyun static __poll_t viu_poll(struct file *file, struct poll_table_struct *wait)
1254*4882a593Smuzhiyun {
1255*4882a593Smuzhiyun struct viu_fh *fh = file->private_data;
1256*4882a593Smuzhiyun struct videobuf_queue *q = &fh->vb_vidq;
1257*4882a593Smuzhiyun struct viu_dev *dev = fh->dev;
1258*4882a593Smuzhiyun __poll_t req_events = poll_requested_events(wait);
1259*4882a593Smuzhiyun __poll_t res = v4l2_ctrl_poll(file, wait);
1260*4882a593Smuzhiyun
1261*4882a593Smuzhiyun if (V4L2_BUF_TYPE_VIDEO_CAPTURE != fh->type)
1262*4882a593Smuzhiyun return EPOLLERR;
1263*4882a593Smuzhiyun
1264*4882a593Smuzhiyun if (!(req_events & (EPOLLIN | EPOLLRDNORM)))
1265*4882a593Smuzhiyun return res;
1266*4882a593Smuzhiyun
1267*4882a593Smuzhiyun mutex_lock(&dev->lock);
1268*4882a593Smuzhiyun res |= videobuf_poll_stream(file, q, wait);
1269*4882a593Smuzhiyun mutex_unlock(&dev->lock);
1270*4882a593Smuzhiyun return res;
1271*4882a593Smuzhiyun }
1272*4882a593Smuzhiyun
viu_release(struct file * file)1273*4882a593Smuzhiyun static int viu_release(struct file *file)
1274*4882a593Smuzhiyun {
1275*4882a593Smuzhiyun struct viu_fh *fh = file->private_data;
1276*4882a593Smuzhiyun struct viu_dev *dev = fh->dev;
1277*4882a593Smuzhiyun int minor = video_devdata(file)->minor;
1278*4882a593Smuzhiyun
1279*4882a593Smuzhiyun mutex_lock(&dev->lock);
1280*4882a593Smuzhiyun viu_stop_dma(dev);
1281*4882a593Smuzhiyun videobuf_stop(&fh->vb_vidq);
1282*4882a593Smuzhiyun videobuf_mmap_free(&fh->vb_vidq);
1283*4882a593Smuzhiyun v4l2_fh_del(&fh->fh);
1284*4882a593Smuzhiyun v4l2_fh_exit(&fh->fh);
1285*4882a593Smuzhiyun mutex_unlock(&dev->lock);
1286*4882a593Smuzhiyun
1287*4882a593Smuzhiyun kfree(fh);
1288*4882a593Smuzhiyun
1289*4882a593Smuzhiyun dev->users--;
1290*4882a593Smuzhiyun dprintk(1, "close (minor=%d, users=%d)\n",
1291*4882a593Smuzhiyun minor, dev->users);
1292*4882a593Smuzhiyun return 0;
1293*4882a593Smuzhiyun }
1294*4882a593Smuzhiyun
viu_reset(struct viu_reg __iomem * reg)1295*4882a593Smuzhiyun static void viu_reset(struct viu_reg __iomem *reg)
1296*4882a593Smuzhiyun {
1297*4882a593Smuzhiyun out_be32(®->status_cfg, 0);
1298*4882a593Smuzhiyun out_be32(®->luminance, 0x9512a254);
1299*4882a593Smuzhiyun out_be32(®->chroma_r, 0x03310000);
1300*4882a593Smuzhiyun out_be32(®->chroma_g, 0x06600f38);
1301*4882a593Smuzhiyun out_be32(®->chroma_b, 0x00000409);
1302*4882a593Smuzhiyun out_be32(®->field_base_addr, 0);
1303*4882a593Smuzhiyun out_be32(®->dma_inc, 0);
1304*4882a593Smuzhiyun out_be32(®->picture_count, 0x01e002d0);
1305*4882a593Smuzhiyun out_be32(®->req_alarm, 0x00000090);
1306*4882a593Smuzhiyun out_be32(®->alpha, 0x000000ff);
1307*4882a593Smuzhiyun }
1308*4882a593Smuzhiyun
viu_mmap(struct file * file,struct vm_area_struct * vma)1309*4882a593Smuzhiyun static int viu_mmap(struct file *file, struct vm_area_struct *vma)
1310*4882a593Smuzhiyun {
1311*4882a593Smuzhiyun struct viu_fh *fh = file->private_data;
1312*4882a593Smuzhiyun struct viu_dev *dev = fh->dev;
1313*4882a593Smuzhiyun int ret;
1314*4882a593Smuzhiyun
1315*4882a593Smuzhiyun dprintk(1, "mmap called, vma=%p\n", vma);
1316*4882a593Smuzhiyun
1317*4882a593Smuzhiyun if (mutex_lock_interruptible(&dev->lock))
1318*4882a593Smuzhiyun return -ERESTARTSYS;
1319*4882a593Smuzhiyun ret = videobuf_mmap_mapper(&fh->vb_vidq, vma);
1320*4882a593Smuzhiyun mutex_unlock(&dev->lock);
1321*4882a593Smuzhiyun
1322*4882a593Smuzhiyun dprintk(1, "vma start=0x%08lx, size=%ld, ret=%d\n",
1323*4882a593Smuzhiyun (unsigned long)vma->vm_start,
1324*4882a593Smuzhiyun (unsigned long)vma->vm_end-(unsigned long)vma->vm_start,
1325*4882a593Smuzhiyun ret);
1326*4882a593Smuzhiyun
1327*4882a593Smuzhiyun return ret;
1328*4882a593Smuzhiyun }
1329*4882a593Smuzhiyun
1330*4882a593Smuzhiyun static const struct v4l2_file_operations viu_fops = {
1331*4882a593Smuzhiyun .owner = THIS_MODULE,
1332*4882a593Smuzhiyun .open = viu_open,
1333*4882a593Smuzhiyun .release = viu_release,
1334*4882a593Smuzhiyun .read = viu_read,
1335*4882a593Smuzhiyun .poll = viu_poll,
1336*4882a593Smuzhiyun .unlocked_ioctl = video_ioctl2, /* V4L2 ioctl handler */
1337*4882a593Smuzhiyun .mmap = viu_mmap,
1338*4882a593Smuzhiyun };
1339*4882a593Smuzhiyun
1340*4882a593Smuzhiyun static const struct v4l2_ioctl_ops viu_ioctl_ops = {
1341*4882a593Smuzhiyun .vidioc_querycap = vidioc_querycap,
1342*4882a593Smuzhiyun .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt,
1343*4882a593Smuzhiyun .vidioc_g_fmt_vid_cap = vidioc_g_fmt_cap,
1344*4882a593Smuzhiyun .vidioc_try_fmt_vid_cap = vidioc_try_fmt_cap,
1345*4882a593Smuzhiyun .vidioc_s_fmt_vid_cap = vidioc_s_fmt_cap,
1346*4882a593Smuzhiyun .vidioc_enum_fmt_vid_overlay = vidioc_enum_fmt,
1347*4882a593Smuzhiyun .vidioc_g_fmt_vid_overlay = vidioc_g_fmt_overlay,
1348*4882a593Smuzhiyun .vidioc_try_fmt_vid_overlay = vidioc_try_fmt_overlay,
1349*4882a593Smuzhiyun .vidioc_s_fmt_vid_overlay = vidioc_s_fmt_overlay,
1350*4882a593Smuzhiyun .vidioc_overlay = vidioc_overlay,
1351*4882a593Smuzhiyun .vidioc_g_fbuf = vidioc_g_fbuf,
1352*4882a593Smuzhiyun .vidioc_s_fbuf = vidioc_s_fbuf,
1353*4882a593Smuzhiyun .vidioc_reqbufs = vidioc_reqbufs,
1354*4882a593Smuzhiyun .vidioc_querybuf = vidioc_querybuf,
1355*4882a593Smuzhiyun .vidioc_qbuf = vidioc_qbuf,
1356*4882a593Smuzhiyun .vidioc_dqbuf = vidioc_dqbuf,
1357*4882a593Smuzhiyun .vidioc_g_std = vidioc_g_std,
1358*4882a593Smuzhiyun .vidioc_s_std = vidioc_s_std,
1359*4882a593Smuzhiyun .vidioc_querystd = vidioc_querystd,
1360*4882a593Smuzhiyun .vidioc_enum_input = vidioc_enum_input,
1361*4882a593Smuzhiyun .vidioc_g_input = vidioc_g_input,
1362*4882a593Smuzhiyun .vidioc_s_input = vidioc_s_input,
1363*4882a593Smuzhiyun .vidioc_streamon = vidioc_streamon,
1364*4882a593Smuzhiyun .vidioc_streamoff = vidioc_streamoff,
1365*4882a593Smuzhiyun .vidioc_log_status = v4l2_ctrl_log_status,
1366*4882a593Smuzhiyun .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
1367*4882a593Smuzhiyun .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
1368*4882a593Smuzhiyun };
1369*4882a593Smuzhiyun
1370*4882a593Smuzhiyun static const struct video_device viu_template = {
1371*4882a593Smuzhiyun .name = "FSL viu",
1372*4882a593Smuzhiyun .fops = &viu_fops,
1373*4882a593Smuzhiyun .minor = -1,
1374*4882a593Smuzhiyun .ioctl_ops = &viu_ioctl_ops,
1375*4882a593Smuzhiyun .release = video_device_release,
1376*4882a593Smuzhiyun
1377*4882a593Smuzhiyun .tvnorms = V4L2_STD_NTSC_M | V4L2_STD_PAL,
1378*4882a593Smuzhiyun .device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING |
1379*4882a593Smuzhiyun V4L2_CAP_VIDEO_OVERLAY | V4L2_CAP_READWRITE,
1380*4882a593Smuzhiyun };
1381*4882a593Smuzhiyun
viu_of_probe(struct platform_device * op)1382*4882a593Smuzhiyun static int viu_of_probe(struct platform_device *op)
1383*4882a593Smuzhiyun {
1384*4882a593Smuzhiyun struct viu_dev *viu_dev;
1385*4882a593Smuzhiyun struct video_device *vdev;
1386*4882a593Smuzhiyun struct resource r;
1387*4882a593Smuzhiyun struct viu_reg __iomem *viu_regs;
1388*4882a593Smuzhiyun struct i2c_adapter *ad;
1389*4882a593Smuzhiyun int ret, viu_irq;
1390*4882a593Smuzhiyun struct clk *clk;
1391*4882a593Smuzhiyun
1392*4882a593Smuzhiyun ret = of_address_to_resource(op->dev.of_node, 0, &r);
1393*4882a593Smuzhiyun if (ret) {
1394*4882a593Smuzhiyun dev_err(&op->dev, "Can't parse device node resource\n");
1395*4882a593Smuzhiyun return -ENODEV;
1396*4882a593Smuzhiyun }
1397*4882a593Smuzhiyun
1398*4882a593Smuzhiyun viu_irq = irq_of_parse_and_map(op->dev.of_node, 0);
1399*4882a593Smuzhiyun if (!viu_irq) {
1400*4882a593Smuzhiyun dev_err(&op->dev, "Error while mapping the irq\n");
1401*4882a593Smuzhiyun return -EINVAL;
1402*4882a593Smuzhiyun }
1403*4882a593Smuzhiyun
1404*4882a593Smuzhiyun /* request mem region */
1405*4882a593Smuzhiyun if (!devm_request_mem_region(&op->dev, r.start,
1406*4882a593Smuzhiyun sizeof(struct viu_reg), DRV_NAME)) {
1407*4882a593Smuzhiyun dev_err(&op->dev, "Error while requesting mem region\n");
1408*4882a593Smuzhiyun ret = -EBUSY;
1409*4882a593Smuzhiyun goto err_irq;
1410*4882a593Smuzhiyun }
1411*4882a593Smuzhiyun
1412*4882a593Smuzhiyun /* remap registers */
1413*4882a593Smuzhiyun viu_regs = devm_ioremap(&op->dev, r.start, sizeof(struct viu_reg));
1414*4882a593Smuzhiyun if (!viu_regs) {
1415*4882a593Smuzhiyun dev_err(&op->dev, "Can't map register set\n");
1416*4882a593Smuzhiyun ret = -ENOMEM;
1417*4882a593Smuzhiyun goto err_irq;
1418*4882a593Smuzhiyun }
1419*4882a593Smuzhiyun
1420*4882a593Smuzhiyun /* Prepare our private structure */
1421*4882a593Smuzhiyun viu_dev = devm_kzalloc(&op->dev, sizeof(struct viu_dev), GFP_ATOMIC);
1422*4882a593Smuzhiyun if (!viu_dev) {
1423*4882a593Smuzhiyun dev_err(&op->dev, "Can't allocate private structure\n");
1424*4882a593Smuzhiyun ret = -ENOMEM;
1425*4882a593Smuzhiyun goto err_irq;
1426*4882a593Smuzhiyun }
1427*4882a593Smuzhiyun
1428*4882a593Smuzhiyun viu_dev->vr = viu_regs;
1429*4882a593Smuzhiyun viu_dev->irq = viu_irq;
1430*4882a593Smuzhiyun viu_dev->dev = &op->dev;
1431*4882a593Smuzhiyun
1432*4882a593Smuzhiyun /* init video dma queues */
1433*4882a593Smuzhiyun INIT_LIST_HEAD(&viu_dev->vidq.active);
1434*4882a593Smuzhiyun INIT_LIST_HEAD(&viu_dev->vidq.queued);
1435*4882a593Smuzhiyun
1436*4882a593Smuzhiyun snprintf(viu_dev->v4l2_dev.name,
1437*4882a593Smuzhiyun sizeof(viu_dev->v4l2_dev.name), "%s", "VIU");
1438*4882a593Smuzhiyun ret = v4l2_device_register(viu_dev->dev, &viu_dev->v4l2_dev);
1439*4882a593Smuzhiyun if (ret < 0) {
1440*4882a593Smuzhiyun dev_err(&op->dev, "v4l2_device_register() failed: %d\n", ret);
1441*4882a593Smuzhiyun goto err_irq;
1442*4882a593Smuzhiyun }
1443*4882a593Smuzhiyun
1444*4882a593Smuzhiyun ad = i2c_get_adapter(0);
1445*4882a593Smuzhiyun if (!ad) {
1446*4882a593Smuzhiyun ret = -EFAULT;
1447*4882a593Smuzhiyun dev_err(&op->dev, "couldn't get i2c adapter\n");
1448*4882a593Smuzhiyun goto err_v4l2;
1449*4882a593Smuzhiyun }
1450*4882a593Smuzhiyun
1451*4882a593Smuzhiyun v4l2_ctrl_handler_init(&viu_dev->hdl, 5);
1452*4882a593Smuzhiyun if (viu_dev->hdl.error) {
1453*4882a593Smuzhiyun ret = viu_dev->hdl.error;
1454*4882a593Smuzhiyun dev_err(&op->dev, "couldn't register control\n");
1455*4882a593Smuzhiyun goto err_i2c;
1456*4882a593Smuzhiyun }
1457*4882a593Smuzhiyun /* This control handler will inherit the control(s) from the
1458*4882a593Smuzhiyun sub-device(s). */
1459*4882a593Smuzhiyun viu_dev->v4l2_dev.ctrl_handler = &viu_dev->hdl;
1460*4882a593Smuzhiyun viu_dev->decoder = v4l2_i2c_new_subdev(&viu_dev->v4l2_dev, ad,
1461*4882a593Smuzhiyun "saa7113", VIU_VIDEO_DECODER_ADDR, NULL);
1462*4882a593Smuzhiyun
1463*4882a593Smuzhiyun timer_setup(&viu_dev->vidq.timeout, viu_vid_timeout, 0);
1464*4882a593Smuzhiyun viu_dev->std = V4L2_STD_NTSC_M;
1465*4882a593Smuzhiyun viu_dev->first = 1;
1466*4882a593Smuzhiyun
1467*4882a593Smuzhiyun /* Allocate memory for video device */
1468*4882a593Smuzhiyun vdev = video_device_alloc();
1469*4882a593Smuzhiyun if (vdev == NULL) {
1470*4882a593Smuzhiyun ret = -ENOMEM;
1471*4882a593Smuzhiyun goto err_hdl;
1472*4882a593Smuzhiyun }
1473*4882a593Smuzhiyun
1474*4882a593Smuzhiyun *vdev = viu_template;
1475*4882a593Smuzhiyun
1476*4882a593Smuzhiyun vdev->v4l2_dev = &viu_dev->v4l2_dev;
1477*4882a593Smuzhiyun
1478*4882a593Smuzhiyun viu_dev->vdev = vdev;
1479*4882a593Smuzhiyun
1480*4882a593Smuzhiyun /* initialize locks */
1481*4882a593Smuzhiyun mutex_init(&viu_dev->lock);
1482*4882a593Smuzhiyun viu_dev->vdev->lock = &viu_dev->lock;
1483*4882a593Smuzhiyun spin_lock_init(&viu_dev->slock);
1484*4882a593Smuzhiyun
1485*4882a593Smuzhiyun video_set_drvdata(viu_dev->vdev, viu_dev);
1486*4882a593Smuzhiyun
1487*4882a593Smuzhiyun mutex_lock(&viu_dev->lock);
1488*4882a593Smuzhiyun
1489*4882a593Smuzhiyun ret = video_register_device(viu_dev->vdev, VFL_TYPE_VIDEO, -1);
1490*4882a593Smuzhiyun if (ret < 0) {
1491*4882a593Smuzhiyun video_device_release(viu_dev->vdev);
1492*4882a593Smuzhiyun goto err_unlock;
1493*4882a593Smuzhiyun }
1494*4882a593Smuzhiyun
1495*4882a593Smuzhiyun /* enable VIU clock */
1496*4882a593Smuzhiyun clk = devm_clk_get(&op->dev, "ipg");
1497*4882a593Smuzhiyun if (IS_ERR(clk)) {
1498*4882a593Smuzhiyun dev_err(&op->dev, "failed to lookup the clock!\n");
1499*4882a593Smuzhiyun ret = PTR_ERR(clk);
1500*4882a593Smuzhiyun goto err_vdev;
1501*4882a593Smuzhiyun }
1502*4882a593Smuzhiyun ret = clk_prepare_enable(clk);
1503*4882a593Smuzhiyun if (ret) {
1504*4882a593Smuzhiyun dev_err(&op->dev, "failed to enable the clock!\n");
1505*4882a593Smuzhiyun goto err_vdev;
1506*4882a593Smuzhiyun }
1507*4882a593Smuzhiyun viu_dev->clk = clk;
1508*4882a593Smuzhiyun
1509*4882a593Smuzhiyun /* reset VIU module */
1510*4882a593Smuzhiyun viu_reset(viu_dev->vr);
1511*4882a593Smuzhiyun
1512*4882a593Smuzhiyun /* install interrupt handler */
1513*4882a593Smuzhiyun if (request_irq(viu_dev->irq, viu_intr, 0, "viu", (void *)viu_dev)) {
1514*4882a593Smuzhiyun dev_err(&op->dev, "Request VIU IRQ failed.\n");
1515*4882a593Smuzhiyun ret = -ENODEV;
1516*4882a593Smuzhiyun goto err_clk;
1517*4882a593Smuzhiyun }
1518*4882a593Smuzhiyun
1519*4882a593Smuzhiyun mutex_unlock(&viu_dev->lock);
1520*4882a593Smuzhiyun
1521*4882a593Smuzhiyun dev_info(&op->dev, "Freescale VIU Video Capture Board\n");
1522*4882a593Smuzhiyun return ret;
1523*4882a593Smuzhiyun
1524*4882a593Smuzhiyun err_clk:
1525*4882a593Smuzhiyun clk_disable_unprepare(viu_dev->clk);
1526*4882a593Smuzhiyun err_vdev:
1527*4882a593Smuzhiyun video_unregister_device(viu_dev->vdev);
1528*4882a593Smuzhiyun err_unlock:
1529*4882a593Smuzhiyun mutex_unlock(&viu_dev->lock);
1530*4882a593Smuzhiyun err_hdl:
1531*4882a593Smuzhiyun v4l2_ctrl_handler_free(&viu_dev->hdl);
1532*4882a593Smuzhiyun err_i2c:
1533*4882a593Smuzhiyun i2c_put_adapter(ad);
1534*4882a593Smuzhiyun err_v4l2:
1535*4882a593Smuzhiyun v4l2_device_unregister(&viu_dev->v4l2_dev);
1536*4882a593Smuzhiyun err_irq:
1537*4882a593Smuzhiyun irq_dispose_mapping(viu_irq);
1538*4882a593Smuzhiyun return ret;
1539*4882a593Smuzhiyun }
1540*4882a593Smuzhiyun
viu_of_remove(struct platform_device * op)1541*4882a593Smuzhiyun static int viu_of_remove(struct platform_device *op)
1542*4882a593Smuzhiyun {
1543*4882a593Smuzhiyun struct v4l2_device *v4l2_dev = dev_get_drvdata(&op->dev);
1544*4882a593Smuzhiyun struct viu_dev *dev = container_of(v4l2_dev, struct viu_dev, v4l2_dev);
1545*4882a593Smuzhiyun struct v4l2_subdev *sdev = list_entry(v4l2_dev->subdevs.next,
1546*4882a593Smuzhiyun struct v4l2_subdev, list);
1547*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(sdev);
1548*4882a593Smuzhiyun
1549*4882a593Smuzhiyun free_irq(dev->irq, (void *)dev);
1550*4882a593Smuzhiyun irq_dispose_mapping(dev->irq);
1551*4882a593Smuzhiyun
1552*4882a593Smuzhiyun clk_disable_unprepare(dev->clk);
1553*4882a593Smuzhiyun
1554*4882a593Smuzhiyun v4l2_ctrl_handler_free(&dev->hdl);
1555*4882a593Smuzhiyun video_unregister_device(dev->vdev);
1556*4882a593Smuzhiyun i2c_put_adapter(client->adapter);
1557*4882a593Smuzhiyun v4l2_device_unregister(&dev->v4l2_dev);
1558*4882a593Smuzhiyun return 0;
1559*4882a593Smuzhiyun }
1560*4882a593Smuzhiyun
1561*4882a593Smuzhiyun #ifdef CONFIG_PM
viu_suspend(struct platform_device * op,pm_message_t state)1562*4882a593Smuzhiyun static int viu_suspend(struct platform_device *op, pm_message_t state)
1563*4882a593Smuzhiyun {
1564*4882a593Smuzhiyun struct v4l2_device *v4l2_dev = dev_get_drvdata(&op->dev);
1565*4882a593Smuzhiyun struct viu_dev *dev = container_of(v4l2_dev, struct viu_dev, v4l2_dev);
1566*4882a593Smuzhiyun
1567*4882a593Smuzhiyun clk_disable(dev->clk);
1568*4882a593Smuzhiyun return 0;
1569*4882a593Smuzhiyun }
1570*4882a593Smuzhiyun
viu_resume(struct platform_device * op)1571*4882a593Smuzhiyun static int viu_resume(struct platform_device *op)
1572*4882a593Smuzhiyun {
1573*4882a593Smuzhiyun struct v4l2_device *v4l2_dev = dev_get_drvdata(&op->dev);
1574*4882a593Smuzhiyun struct viu_dev *dev = container_of(v4l2_dev, struct viu_dev, v4l2_dev);
1575*4882a593Smuzhiyun
1576*4882a593Smuzhiyun clk_enable(dev->clk);
1577*4882a593Smuzhiyun return 0;
1578*4882a593Smuzhiyun }
1579*4882a593Smuzhiyun #endif
1580*4882a593Smuzhiyun
1581*4882a593Smuzhiyun /*
1582*4882a593Smuzhiyun * Initialization and module stuff
1583*4882a593Smuzhiyun */
1584*4882a593Smuzhiyun static const struct of_device_id mpc512x_viu_of_match[] = {
1585*4882a593Smuzhiyun {
1586*4882a593Smuzhiyun .compatible = "fsl,mpc5121-viu",
1587*4882a593Smuzhiyun },
1588*4882a593Smuzhiyun {},
1589*4882a593Smuzhiyun };
1590*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, mpc512x_viu_of_match);
1591*4882a593Smuzhiyun
1592*4882a593Smuzhiyun static struct platform_driver viu_of_platform_driver = {
1593*4882a593Smuzhiyun .probe = viu_of_probe,
1594*4882a593Smuzhiyun .remove = viu_of_remove,
1595*4882a593Smuzhiyun #ifdef CONFIG_PM
1596*4882a593Smuzhiyun .suspend = viu_suspend,
1597*4882a593Smuzhiyun .resume = viu_resume,
1598*4882a593Smuzhiyun #endif
1599*4882a593Smuzhiyun .driver = {
1600*4882a593Smuzhiyun .name = DRV_NAME,
1601*4882a593Smuzhiyun .of_match_table = mpc512x_viu_of_match,
1602*4882a593Smuzhiyun },
1603*4882a593Smuzhiyun };
1604*4882a593Smuzhiyun
1605*4882a593Smuzhiyun module_platform_driver(viu_of_platform_driver);
1606*4882a593Smuzhiyun
1607*4882a593Smuzhiyun MODULE_DESCRIPTION("Freescale Video-In(VIU)");
1608*4882a593Smuzhiyun MODULE_AUTHOR("Hongjun Chen");
1609*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1610*4882a593Smuzhiyun MODULE_VERSION(VIU_VERSION);
1611