1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2011 - 2012 Samsung Electronics Co., Ltd.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #ifndef FIMC_MDEVICE_H_
7*4882a593Smuzhiyun #define FIMC_MDEVICE_H_
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/clk.h>
10*4882a593Smuzhiyun #include <linux/clk-provider.h>
11*4882a593Smuzhiyun #include <linux/platform_device.h>
12*4882a593Smuzhiyun #include <linux/mutex.h>
13*4882a593Smuzhiyun #include <linux/of.h>
14*4882a593Smuzhiyun #include <linux/pinctrl/consumer.h>
15*4882a593Smuzhiyun #include <media/media-device.h>
16*4882a593Smuzhiyun #include <media/media-entity.h>
17*4882a593Smuzhiyun #include <media/v4l2-device.h>
18*4882a593Smuzhiyun #include <media/v4l2-subdev.h>
19*4882a593Smuzhiyun #include <media/drv-intf/exynos-fimc.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #include "fimc-core.h"
22*4882a593Smuzhiyun #include "fimc-lite.h"
23*4882a593Smuzhiyun #include "mipi-csis.h"
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #define FIMC_OF_NODE_NAME "fimc"
26*4882a593Smuzhiyun #define FIMC_LITE_OF_NODE_NAME "fimc-lite"
27*4882a593Smuzhiyun #define FIMC_IS_OF_NODE_NAME "fimc-is"
28*4882a593Smuzhiyun #define CSIS_OF_NODE_NAME "csis"
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #define FIMC_MAX_SENSORS 4
31*4882a593Smuzhiyun #define FIMC_MAX_CAMCLKS 2
32*4882a593Smuzhiyun #define DEFAULT_SENSOR_CLK_FREQ 24000000U
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun /* LCD/ISP Writeback clocks (PIXELASYNCMx) */
35*4882a593Smuzhiyun enum {
36*4882a593Smuzhiyun CLK_IDX_WB_A,
37*4882a593Smuzhiyun CLK_IDX_WB_B,
38*4882a593Smuzhiyun FIMC_MAX_WBCLKS
39*4882a593Smuzhiyun };
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun enum fimc_subdev_index {
42*4882a593Smuzhiyun IDX_SENSOR,
43*4882a593Smuzhiyun IDX_CSIS,
44*4882a593Smuzhiyun IDX_FLITE,
45*4882a593Smuzhiyun IDX_IS_ISP,
46*4882a593Smuzhiyun IDX_FIMC,
47*4882a593Smuzhiyun IDX_MAX,
48*4882a593Smuzhiyun };
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun /*
51*4882a593Smuzhiyun * This structure represents a chain of media entities, including a data
52*4882a593Smuzhiyun * source entity (e.g. an image sensor subdevice), a data capture entity
53*4882a593Smuzhiyun * - a video capture device node and any remaining entities.
54*4882a593Smuzhiyun */
55*4882a593Smuzhiyun struct fimc_pipeline {
56*4882a593Smuzhiyun struct exynos_media_pipeline ep;
57*4882a593Smuzhiyun struct list_head list;
58*4882a593Smuzhiyun struct media_entity *vdev_entity;
59*4882a593Smuzhiyun struct v4l2_subdev *subdevs[IDX_MAX];
60*4882a593Smuzhiyun };
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun #define to_fimc_pipeline(_ep) container_of(_ep, struct fimc_pipeline, ep)
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun struct fimc_csis_info {
65*4882a593Smuzhiyun struct v4l2_subdev *sd;
66*4882a593Smuzhiyun int id;
67*4882a593Smuzhiyun };
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun struct fimc_camclk_info {
70*4882a593Smuzhiyun struct clk *clock;
71*4882a593Smuzhiyun int use_count;
72*4882a593Smuzhiyun unsigned long frequency;
73*4882a593Smuzhiyun };
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun /**
76*4882a593Smuzhiyun * struct fimc_sensor_info - image data source subdev information
77*4882a593Smuzhiyun * @pdata: sensor's attributes passed as media device's platform data
78*4882a593Smuzhiyun * @asd: asynchronous subdev registration data structure
79*4882a593Smuzhiyun * @subdev: image sensor v4l2 subdev
80*4882a593Smuzhiyun * @host: fimc device the sensor is currently linked to
81*4882a593Smuzhiyun *
82*4882a593Smuzhiyun * This data structure applies to image sensor and the writeback subdevs.
83*4882a593Smuzhiyun */
84*4882a593Smuzhiyun struct fimc_sensor_info {
85*4882a593Smuzhiyun struct fimc_source_info pdata;
86*4882a593Smuzhiyun struct v4l2_async_subdev asd;
87*4882a593Smuzhiyun struct v4l2_subdev *subdev;
88*4882a593Smuzhiyun struct fimc_dev *host;
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun struct cam_clk {
92*4882a593Smuzhiyun struct clk_hw hw;
93*4882a593Smuzhiyun struct fimc_md *fmd;
94*4882a593Smuzhiyun };
95*4882a593Smuzhiyun #define to_cam_clk(_hw) container_of(_hw, struct cam_clk, hw)
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun /**
98*4882a593Smuzhiyun * struct fimc_md - fimc media device information
99*4882a593Smuzhiyun * @csis: MIPI CSIS subdevs data
100*4882a593Smuzhiyun * @sensor: array of registered sensor subdevs
101*4882a593Smuzhiyun * @num_sensors: actual number of registered sensors
102*4882a593Smuzhiyun * @camclk: external sensor clock information
103*4882a593Smuzhiyun * @fimc: array of registered fimc devices
104*4882a593Smuzhiyun * @fimc_is: fimc-is data structure
105*4882a593Smuzhiyun * @use_isp: set to true when FIMC-IS subsystem is used
106*4882a593Smuzhiyun * @pmf: handle to the CAMCLK clock control FIMC helper device
107*4882a593Smuzhiyun * @media_dev: top level media device
108*4882a593Smuzhiyun * @v4l2_dev: top level v4l2_device holding up the subdevs
109*4882a593Smuzhiyun * @pdev: platform device this media device is hooked up into
110*4882a593Smuzhiyun * @cam_clk_provider: CAMCLK clock provider structure
111*4882a593Smuzhiyun * @user_subdev_api: true if subdevs are not configured by the host driver
112*4882a593Smuzhiyun * @slock: spinlock protecting @sensor array
113*4882a593Smuzhiyun */
114*4882a593Smuzhiyun struct fimc_md {
115*4882a593Smuzhiyun struct fimc_csis_info csis[CSIS_MAX_ENTITIES];
116*4882a593Smuzhiyun struct fimc_sensor_info sensor[FIMC_MAX_SENSORS];
117*4882a593Smuzhiyun int num_sensors;
118*4882a593Smuzhiyun struct fimc_camclk_info camclk[FIMC_MAX_CAMCLKS];
119*4882a593Smuzhiyun struct clk *wbclk[FIMC_MAX_WBCLKS];
120*4882a593Smuzhiyun struct fimc_lite *fimc_lite[FIMC_LITE_MAX_DEVS];
121*4882a593Smuzhiyun struct fimc_dev *fimc[FIMC_MAX_DEVS];
122*4882a593Smuzhiyun struct fimc_is *fimc_is;
123*4882a593Smuzhiyun bool use_isp;
124*4882a593Smuzhiyun struct device *pmf;
125*4882a593Smuzhiyun struct media_device media_dev;
126*4882a593Smuzhiyun struct v4l2_device v4l2_dev;
127*4882a593Smuzhiyun struct platform_device *pdev;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun struct cam_clk_provider {
130*4882a593Smuzhiyun struct clk *clks[FIMC_MAX_CAMCLKS];
131*4882a593Smuzhiyun struct clk_onecell_data clk_data;
132*4882a593Smuzhiyun struct device_node *of_node;
133*4882a593Smuzhiyun struct cam_clk camclk[FIMC_MAX_CAMCLKS];
134*4882a593Smuzhiyun int num_clocks;
135*4882a593Smuzhiyun } clk_provider;
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun struct v4l2_async_notifier subdev_notifier;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun bool user_subdev_api;
140*4882a593Smuzhiyun spinlock_t slock;
141*4882a593Smuzhiyun struct list_head pipelines;
142*4882a593Smuzhiyun struct media_graph link_setup_graph;
143*4882a593Smuzhiyun };
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun static inline
source_to_sensor_info(struct fimc_source_info * si)146*4882a593Smuzhiyun struct fimc_sensor_info *source_to_sensor_info(struct fimc_source_info *si)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun return container_of(si, struct fimc_sensor_info, pdata);
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun
entity_to_fimc_mdev(struct media_entity * me)151*4882a593Smuzhiyun static inline struct fimc_md *entity_to_fimc_mdev(struct media_entity *me)
152*4882a593Smuzhiyun {
153*4882a593Smuzhiyun return me->graph_obj.mdev == NULL ? NULL :
154*4882a593Smuzhiyun container_of(me->graph_obj.mdev, struct fimc_md, media_dev);
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun
notifier_to_fimc_md(struct v4l2_async_notifier * n)157*4882a593Smuzhiyun static inline struct fimc_md *notifier_to_fimc_md(struct v4l2_async_notifier *n)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun return container_of(n, struct fimc_md, subdev_notifier);
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
fimc_md_graph_lock(struct exynos_video_entity * ve)162*4882a593Smuzhiyun static inline void fimc_md_graph_lock(struct exynos_video_entity *ve)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun mutex_lock(&ve->vdev.entity.graph_obj.mdev->graph_mutex);
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun
fimc_md_graph_unlock(struct exynos_video_entity * ve)167*4882a593Smuzhiyun static inline void fimc_md_graph_unlock(struct exynos_video_entity *ve)
168*4882a593Smuzhiyun {
169*4882a593Smuzhiyun mutex_unlock(&ve->vdev.entity.graph_obj.mdev->graph_mutex);
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun int fimc_md_set_camclk(struct v4l2_subdev *sd, bool on);
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun #ifdef CONFIG_OF
fimc_md_is_isp_available(struct device_node * node)175*4882a593Smuzhiyun static inline bool fimc_md_is_isp_available(struct device_node *node)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun node = of_get_child_by_name(node, FIMC_IS_OF_NODE_NAME);
178*4882a593Smuzhiyun return node ? of_device_is_available(node) : false;
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun #else
181*4882a593Smuzhiyun #define fimc_md_is_isp_available(node) (false)
182*4882a593Smuzhiyun #endif /* CONFIG_OF */
183*4882a593Smuzhiyun
__fimc_md_get_subdev(struct exynos_media_pipeline * ep,unsigned int index)184*4882a593Smuzhiyun static inline struct v4l2_subdev *__fimc_md_get_subdev(
185*4882a593Smuzhiyun struct exynos_media_pipeline *ep,
186*4882a593Smuzhiyun unsigned int index)
187*4882a593Smuzhiyun {
188*4882a593Smuzhiyun struct fimc_pipeline *p = to_fimc_pipeline(ep);
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun if (!p || index >= IDX_MAX)
191*4882a593Smuzhiyun return NULL;
192*4882a593Smuzhiyun else
193*4882a593Smuzhiyun return p->subdevs[index];
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun #endif
197