xref: /OK3568_Linux_fs/kernel/drivers/media/platform/exynos4-is/media-dev.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * S5P/EXYNOS4 SoC series camera host interface media device driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2011 - 2013 Samsung Electronics Co., Ltd.
6*4882a593Smuzhiyun  * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/bug.h>
10*4882a593Smuzhiyun #include <linux/clk.h>
11*4882a593Smuzhiyun #include <linux/clk-provider.h>
12*4882a593Smuzhiyun #include <linux/device.h>
13*4882a593Smuzhiyun #include <linux/errno.h>
14*4882a593Smuzhiyun #include <linux/i2c.h>
15*4882a593Smuzhiyun #include <linux/kernel.h>
16*4882a593Smuzhiyun #include <linux/list.h>
17*4882a593Smuzhiyun #include <linux/module.h>
18*4882a593Smuzhiyun #include <linux/of.h>
19*4882a593Smuzhiyun #include <linux/of_platform.h>
20*4882a593Smuzhiyun #include <linux/of_device.h>
21*4882a593Smuzhiyun #include <linux/of_graph.h>
22*4882a593Smuzhiyun #include <linux/pinctrl/consumer.h>
23*4882a593Smuzhiyun #include <linux/platform_device.h>
24*4882a593Smuzhiyun #include <linux/pm_runtime.h>
25*4882a593Smuzhiyun #include <linux/types.h>
26*4882a593Smuzhiyun #include <linux/slab.h>
27*4882a593Smuzhiyun #include <media/v4l2-async.h>
28*4882a593Smuzhiyun #include <media/v4l2-ctrls.h>
29*4882a593Smuzhiyun #include <media/v4l2-fwnode.h>
30*4882a593Smuzhiyun #include <media/media-device.h>
31*4882a593Smuzhiyun #include <media/drv-intf/exynos-fimc.h>
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #include "media-dev.h"
34*4882a593Smuzhiyun #include "fimc-core.h"
35*4882a593Smuzhiyun #include "fimc-is.h"
36*4882a593Smuzhiyun #include "fimc-lite.h"
37*4882a593Smuzhiyun #include "mipi-csis.h"
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun /* Set up image sensor subdev -> FIMC capture node notifications. */
__setup_sensor_notification(struct fimc_md * fmd,struct v4l2_subdev * sensor,struct v4l2_subdev * fimc_sd)40*4882a593Smuzhiyun static void __setup_sensor_notification(struct fimc_md *fmd,
41*4882a593Smuzhiyun 					struct v4l2_subdev *sensor,
42*4882a593Smuzhiyun 					struct v4l2_subdev *fimc_sd)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun 	struct fimc_source_info *src_inf;
45*4882a593Smuzhiyun 	struct fimc_sensor_info *md_si;
46*4882a593Smuzhiyun 	unsigned long flags;
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	src_inf = v4l2_get_subdev_hostdata(sensor);
49*4882a593Smuzhiyun 	if (!src_inf || WARN_ON(fmd == NULL))
50*4882a593Smuzhiyun 		return;
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	md_si = source_to_sensor_info(src_inf);
53*4882a593Smuzhiyun 	spin_lock_irqsave(&fmd->slock, flags);
54*4882a593Smuzhiyun 	md_si->host = v4l2_get_subdevdata(fimc_sd);
55*4882a593Smuzhiyun 	spin_unlock_irqrestore(&fmd->slock, flags);
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun /**
59*4882a593Smuzhiyun  * fimc_pipeline_prepare - update pipeline information with subdevice pointers
60*4882a593Smuzhiyun  * @p: fimc pipeline
61*4882a593Smuzhiyun  * @me: media entity terminating the pipeline
62*4882a593Smuzhiyun  *
63*4882a593Smuzhiyun  * Caller holds the graph mutex.
64*4882a593Smuzhiyun  */
fimc_pipeline_prepare(struct fimc_pipeline * p,struct media_entity * me)65*4882a593Smuzhiyun static void fimc_pipeline_prepare(struct fimc_pipeline *p,
66*4882a593Smuzhiyun 					struct media_entity *me)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun 	struct fimc_md *fmd = entity_to_fimc_mdev(me);
69*4882a593Smuzhiyun 	struct v4l2_subdev *sd;
70*4882a593Smuzhiyun 	struct v4l2_subdev *sensor = NULL;
71*4882a593Smuzhiyun 	int i;
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	for (i = 0; i < IDX_MAX; i++)
74*4882a593Smuzhiyun 		p->subdevs[i] = NULL;
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	while (1) {
77*4882a593Smuzhiyun 		struct media_pad *pad = NULL;
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 		/* Find remote source pad */
80*4882a593Smuzhiyun 		for (i = 0; i < me->num_pads; i++) {
81*4882a593Smuzhiyun 			struct media_pad *spad = &me->pads[i];
82*4882a593Smuzhiyun 			if (!(spad->flags & MEDIA_PAD_FL_SINK))
83*4882a593Smuzhiyun 				continue;
84*4882a593Smuzhiyun 			pad = media_entity_remote_pad(spad);
85*4882a593Smuzhiyun 			if (pad)
86*4882a593Smuzhiyun 				break;
87*4882a593Smuzhiyun 		}
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 		if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
90*4882a593Smuzhiyun 			break;
91*4882a593Smuzhiyun 		sd = media_entity_to_v4l2_subdev(pad->entity);
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 		switch (sd->grp_id) {
94*4882a593Smuzhiyun 		case GRP_ID_SENSOR:
95*4882a593Smuzhiyun 			sensor = sd;
96*4882a593Smuzhiyun 			fallthrough;
97*4882a593Smuzhiyun 		case GRP_ID_FIMC_IS_SENSOR:
98*4882a593Smuzhiyun 			p->subdevs[IDX_SENSOR] = sd;
99*4882a593Smuzhiyun 			break;
100*4882a593Smuzhiyun 		case GRP_ID_CSIS:
101*4882a593Smuzhiyun 			p->subdevs[IDX_CSIS] = sd;
102*4882a593Smuzhiyun 			break;
103*4882a593Smuzhiyun 		case GRP_ID_FLITE:
104*4882a593Smuzhiyun 			p->subdevs[IDX_FLITE] = sd;
105*4882a593Smuzhiyun 			break;
106*4882a593Smuzhiyun 		case GRP_ID_FIMC:
107*4882a593Smuzhiyun 			p->subdevs[IDX_FIMC] = sd;
108*4882a593Smuzhiyun 			break;
109*4882a593Smuzhiyun 		case GRP_ID_FIMC_IS:
110*4882a593Smuzhiyun 			p->subdevs[IDX_IS_ISP] = sd;
111*4882a593Smuzhiyun 			break;
112*4882a593Smuzhiyun 		default:
113*4882a593Smuzhiyun 			break;
114*4882a593Smuzhiyun 		}
115*4882a593Smuzhiyun 		me = &sd->entity;
116*4882a593Smuzhiyun 		if (me->num_pads == 1)
117*4882a593Smuzhiyun 			break;
118*4882a593Smuzhiyun 	}
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	if (sensor && p->subdevs[IDX_FIMC])
121*4882a593Smuzhiyun 		__setup_sensor_notification(fmd, sensor, p->subdevs[IDX_FIMC]);
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun /**
125*4882a593Smuzhiyun  * __subdev_set_power - change power state of a single subdev
126*4882a593Smuzhiyun  * @sd: subdevice to change power state for
127*4882a593Smuzhiyun  * @on: 1 to enable power or 0 to disable
128*4882a593Smuzhiyun  *
129*4882a593Smuzhiyun  * Return result of s_power subdev operation or -ENXIO if sd argument
130*4882a593Smuzhiyun  * is NULL. Return 0 if the subdevice does not implement s_power.
131*4882a593Smuzhiyun  */
__subdev_set_power(struct v4l2_subdev * sd,int on)132*4882a593Smuzhiyun static int __subdev_set_power(struct v4l2_subdev *sd, int on)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun 	int *use_count;
135*4882a593Smuzhiyun 	int ret;
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	if (sd == NULL)
138*4882a593Smuzhiyun 		return -ENXIO;
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	use_count = &sd->entity.use_count;
141*4882a593Smuzhiyun 	if (on && (*use_count)++ > 0)
142*4882a593Smuzhiyun 		return 0;
143*4882a593Smuzhiyun 	else if (!on && (*use_count == 0 || --(*use_count) > 0))
144*4882a593Smuzhiyun 		return 0;
145*4882a593Smuzhiyun 	ret = v4l2_subdev_call(sd, core, s_power, on);
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	return ret != -ENOIOCTLCMD ? ret : 0;
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun /**
151*4882a593Smuzhiyun  * fimc_pipeline_s_power - change power state of all pipeline subdevs
152*4882a593Smuzhiyun  * @p: fimc device terminating the pipeline
153*4882a593Smuzhiyun  * @on: true to power on, false to power off
154*4882a593Smuzhiyun  *
155*4882a593Smuzhiyun  * Needs to be called with the graph mutex held.
156*4882a593Smuzhiyun  */
fimc_pipeline_s_power(struct fimc_pipeline * p,bool on)157*4882a593Smuzhiyun static int fimc_pipeline_s_power(struct fimc_pipeline *p, bool on)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun 	static const u8 seq[2][IDX_MAX - 1] = {
160*4882a593Smuzhiyun 		{ IDX_IS_ISP, IDX_SENSOR, IDX_CSIS, IDX_FLITE },
161*4882a593Smuzhiyun 		{ IDX_CSIS, IDX_FLITE, IDX_SENSOR, IDX_IS_ISP },
162*4882a593Smuzhiyun 	};
163*4882a593Smuzhiyun 	int i, ret = 0;
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	if (p->subdevs[IDX_SENSOR] == NULL)
166*4882a593Smuzhiyun 		return -ENXIO;
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	for (i = 0; i < IDX_MAX - 1; i++) {
169*4882a593Smuzhiyun 		unsigned int idx = seq[on][i];
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 		ret = __subdev_set_power(p->subdevs[idx], on);
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 		if (ret < 0 && ret != -ENXIO)
175*4882a593Smuzhiyun 			goto error;
176*4882a593Smuzhiyun 	}
177*4882a593Smuzhiyun 	return 0;
178*4882a593Smuzhiyun error:
179*4882a593Smuzhiyun 	for (; i >= 0; i--) {
180*4882a593Smuzhiyun 		unsigned int idx = seq[on][i];
181*4882a593Smuzhiyun 		__subdev_set_power(p->subdevs[idx], !on);
182*4882a593Smuzhiyun 	}
183*4882a593Smuzhiyun 	return ret;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun /**
187*4882a593Smuzhiyun  * __fimc_pipeline_enable - enable power of all pipeline subdevs
188*4882a593Smuzhiyun  *			    and the sensor clock
189*4882a593Smuzhiyun  * @ep: video pipeline structure
190*4882a593Smuzhiyun  * @fmd: fimc media device
191*4882a593Smuzhiyun  *
192*4882a593Smuzhiyun  * Called with the graph mutex held.
193*4882a593Smuzhiyun  */
__fimc_pipeline_enable(struct exynos_media_pipeline * ep,struct fimc_md * fmd)194*4882a593Smuzhiyun static int __fimc_pipeline_enable(struct exynos_media_pipeline *ep,
195*4882a593Smuzhiyun 				  struct fimc_md *fmd)
196*4882a593Smuzhiyun {
197*4882a593Smuzhiyun 	struct fimc_pipeline *p = to_fimc_pipeline(ep);
198*4882a593Smuzhiyun 	int ret;
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	/* Enable PXLASYNC clock if this pipeline includes FIMC-IS */
201*4882a593Smuzhiyun 	if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) {
202*4882a593Smuzhiyun 		ret = clk_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]);
203*4882a593Smuzhiyun 		if (ret < 0)
204*4882a593Smuzhiyun 			return ret;
205*4882a593Smuzhiyun 	}
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	ret = fimc_pipeline_s_power(p, 1);
208*4882a593Smuzhiyun 	if (!ret)
209*4882a593Smuzhiyun 		return 0;
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 	if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
212*4882a593Smuzhiyun 		clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 	return ret;
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun /**
218*4882a593Smuzhiyun  * __fimc_pipeline_open - update the pipeline information, enable power
219*4882a593Smuzhiyun  *                        of all pipeline subdevs and the sensor clock
220*4882a593Smuzhiyun  * @ep: fimc device terminating the pipeline
221*4882a593Smuzhiyun  * @me: media entity to start graph walk with
222*4882a593Smuzhiyun  * @prepare: true to walk the current pipeline and acquire all subdevs
223*4882a593Smuzhiyun  *
224*4882a593Smuzhiyun  * Called with the graph mutex held.
225*4882a593Smuzhiyun  */
__fimc_pipeline_open(struct exynos_media_pipeline * ep,struct media_entity * me,bool prepare)226*4882a593Smuzhiyun static int __fimc_pipeline_open(struct exynos_media_pipeline *ep,
227*4882a593Smuzhiyun 				struct media_entity *me, bool prepare)
228*4882a593Smuzhiyun {
229*4882a593Smuzhiyun 	struct fimc_md *fmd = entity_to_fimc_mdev(me);
230*4882a593Smuzhiyun 	struct fimc_pipeline *p = to_fimc_pipeline(ep);
231*4882a593Smuzhiyun 	struct v4l2_subdev *sd;
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun 	if (WARN_ON(p == NULL || me == NULL))
234*4882a593Smuzhiyun 		return -EINVAL;
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	if (prepare)
237*4882a593Smuzhiyun 		fimc_pipeline_prepare(p, me);
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	sd = p->subdevs[IDX_SENSOR];
240*4882a593Smuzhiyun 	if (sd == NULL) {
241*4882a593Smuzhiyun 		pr_warn("%s(): No sensor subdev\n", __func__);
242*4882a593Smuzhiyun 		/*
243*4882a593Smuzhiyun 		 * Pipeline open cannot fail so as to make it possible
244*4882a593Smuzhiyun 		 * for the user space to configure the pipeline.
245*4882a593Smuzhiyun 		 */
246*4882a593Smuzhiyun 		return 0;
247*4882a593Smuzhiyun 	}
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun 	return __fimc_pipeline_enable(ep, fmd);
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun /**
253*4882a593Smuzhiyun  * __fimc_pipeline_close - disable the sensor clock and pipeline power
254*4882a593Smuzhiyun  * @ep: fimc device terminating the pipeline
255*4882a593Smuzhiyun  *
256*4882a593Smuzhiyun  * Disable power of all subdevs and turn the external sensor clock off.
257*4882a593Smuzhiyun  */
__fimc_pipeline_close(struct exynos_media_pipeline * ep)258*4882a593Smuzhiyun static int __fimc_pipeline_close(struct exynos_media_pipeline *ep)
259*4882a593Smuzhiyun {
260*4882a593Smuzhiyun 	struct fimc_pipeline *p = to_fimc_pipeline(ep);
261*4882a593Smuzhiyun 	struct v4l2_subdev *sd = p ? p->subdevs[IDX_SENSOR] : NULL;
262*4882a593Smuzhiyun 	struct fimc_md *fmd;
263*4882a593Smuzhiyun 	int ret;
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	if (sd == NULL) {
266*4882a593Smuzhiyun 		pr_warn("%s(): No sensor subdev\n", __func__);
267*4882a593Smuzhiyun 		return 0;
268*4882a593Smuzhiyun 	}
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun 	ret = fimc_pipeline_s_power(p, 0);
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun 	fmd = entity_to_fimc_mdev(&sd->entity);
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	/* Disable PXLASYNC clock if this pipeline includes FIMC-IS */
275*4882a593Smuzhiyun 	if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
276*4882a593Smuzhiyun 		clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	return ret == -ENXIO ? 0 : ret;
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun /**
282*4882a593Smuzhiyun  * __fimc_pipeline_s_stream - call s_stream() on pipeline subdevs
283*4882a593Smuzhiyun  * @ep: video pipeline structure
284*4882a593Smuzhiyun  * @on: passed as the s_stream() callback argument
285*4882a593Smuzhiyun  */
__fimc_pipeline_s_stream(struct exynos_media_pipeline * ep,bool on)286*4882a593Smuzhiyun static int __fimc_pipeline_s_stream(struct exynos_media_pipeline *ep, bool on)
287*4882a593Smuzhiyun {
288*4882a593Smuzhiyun 	static const u8 seq[2][IDX_MAX] = {
289*4882a593Smuzhiyun 		{ IDX_FIMC, IDX_SENSOR, IDX_IS_ISP, IDX_CSIS, IDX_FLITE },
290*4882a593Smuzhiyun 		{ IDX_CSIS, IDX_FLITE, IDX_FIMC, IDX_SENSOR, IDX_IS_ISP },
291*4882a593Smuzhiyun 	};
292*4882a593Smuzhiyun 	struct fimc_pipeline *p = to_fimc_pipeline(ep);
293*4882a593Smuzhiyun 	enum fimc_subdev_index sd_id;
294*4882a593Smuzhiyun 	int i, ret = 0;
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	if (p->subdevs[IDX_SENSOR] == NULL) {
297*4882a593Smuzhiyun 		struct fimc_md *fmd;
298*4882a593Smuzhiyun 		struct v4l2_subdev *sd = p->subdevs[IDX_CSIS];
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun 		if (!sd)
301*4882a593Smuzhiyun 			sd = p->subdevs[IDX_FIMC];
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun 		if (!sd) {
304*4882a593Smuzhiyun 			/*
305*4882a593Smuzhiyun 			 * If neither CSIS nor FIMC was set up,
306*4882a593Smuzhiyun 			 * it's impossible to have any sensors
307*4882a593Smuzhiyun 			 */
308*4882a593Smuzhiyun 			return -ENODEV;
309*4882a593Smuzhiyun 		}
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 		fmd = entity_to_fimc_mdev(&sd->entity);
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 		if (!fmd->user_subdev_api) {
314*4882a593Smuzhiyun 			/*
315*4882a593Smuzhiyun 			 * Sensor must be already discovered if we
316*4882a593Smuzhiyun 			 * aren't in the user_subdev_api mode
317*4882a593Smuzhiyun 			 */
318*4882a593Smuzhiyun 			return -ENODEV;
319*4882a593Smuzhiyun 		}
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 		/* Get pipeline sink entity */
322*4882a593Smuzhiyun 		if (p->subdevs[IDX_FIMC])
323*4882a593Smuzhiyun 			sd_id = IDX_FIMC;
324*4882a593Smuzhiyun 		else if (p->subdevs[IDX_IS_ISP])
325*4882a593Smuzhiyun 			sd_id = IDX_IS_ISP;
326*4882a593Smuzhiyun 		else if (p->subdevs[IDX_FLITE])
327*4882a593Smuzhiyun 			sd_id = IDX_FLITE;
328*4882a593Smuzhiyun 		else
329*4882a593Smuzhiyun 			return -ENODEV;
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 		/*
332*4882a593Smuzhiyun 		 * Sensor could have been linked between open and STREAMON -
333*4882a593Smuzhiyun 		 * check if this is the case.
334*4882a593Smuzhiyun 		 */
335*4882a593Smuzhiyun 		fimc_pipeline_prepare(p, &p->subdevs[sd_id]->entity);
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun 		if (p->subdevs[IDX_SENSOR] == NULL)
338*4882a593Smuzhiyun 			return -ENODEV;
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun 		ret = __fimc_pipeline_enable(ep, fmd);
341*4882a593Smuzhiyun 		if (ret < 0)
342*4882a593Smuzhiyun 			return ret;
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 	}
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun 	for (i = 0; i < IDX_MAX; i++) {
347*4882a593Smuzhiyun 		unsigned int idx = seq[on][i];
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun 		ret = v4l2_subdev_call(p->subdevs[idx], video, s_stream, on);
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun 		if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV)
352*4882a593Smuzhiyun 			goto error;
353*4882a593Smuzhiyun 	}
354*4882a593Smuzhiyun 
355*4882a593Smuzhiyun 	return 0;
356*4882a593Smuzhiyun error:
357*4882a593Smuzhiyun 	fimc_pipeline_s_power(p, !on);
358*4882a593Smuzhiyun 	for (; i >= 0; i--) {
359*4882a593Smuzhiyun 		unsigned int idx = seq[on][i];
360*4882a593Smuzhiyun 		v4l2_subdev_call(p->subdevs[idx], video, s_stream, !on);
361*4882a593Smuzhiyun 	}
362*4882a593Smuzhiyun 	return ret;
363*4882a593Smuzhiyun }
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun /* Media pipeline operations for the FIMC/FIMC-LITE video device driver */
366*4882a593Smuzhiyun static const struct exynos_media_pipeline_ops fimc_pipeline_ops = {
367*4882a593Smuzhiyun 	.open		= __fimc_pipeline_open,
368*4882a593Smuzhiyun 	.close		= __fimc_pipeline_close,
369*4882a593Smuzhiyun 	.set_stream	= __fimc_pipeline_s_stream,
370*4882a593Smuzhiyun };
371*4882a593Smuzhiyun 
fimc_md_pipeline_create(struct fimc_md * fmd)372*4882a593Smuzhiyun static struct exynos_media_pipeline *fimc_md_pipeline_create(
373*4882a593Smuzhiyun 						struct fimc_md *fmd)
374*4882a593Smuzhiyun {
375*4882a593Smuzhiyun 	struct fimc_pipeline *p;
376*4882a593Smuzhiyun 
377*4882a593Smuzhiyun 	p = kzalloc(sizeof(*p), GFP_KERNEL);
378*4882a593Smuzhiyun 	if (!p)
379*4882a593Smuzhiyun 		return NULL;
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 	list_add_tail(&p->list, &fmd->pipelines);
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun 	p->ep.ops = &fimc_pipeline_ops;
384*4882a593Smuzhiyun 	return &p->ep;
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun 
fimc_md_pipelines_free(struct fimc_md * fmd)387*4882a593Smuzhiyun static void fimc_md_pipelines_free(struct fimc_md *fmd)
388*4882a593Smuzhiyun {
389*4882a593Smuzhiyun 	while (!list_empty(&fmd->pipelines)) {
390*4882a593Smuzhiyun 		struct fimc_pipeline *p;
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun 		p = list_entry(fmd->pipelines.next, typeof(*p), list);
393*4882a593Smuzhiyun 		list_del(&p->list);
394*4882a593Smuzhiyun 		kfree(p);
395*4882a593Smuzhiyun 	}
396*4882a593Smuzhiyun }
397*4882a593Smuzhiyun 
fimc_md_parse_one_endpoint(struct fimc_md * fmd,struct device_node * ep)398*4882a593Smuzhiyun static int fimc_md_parse_one_endpoint(struct fimc_md *fmd,
399*4882a593Smuzhiyun 				   struct device_node *ep)
400*4882a593Smuzhiyun {
401*4882a593Smuzhiyun 	int index = fmd->num_sensors;
402*4882a593Smuzhiyun 	struct fimc_source_info *pd = &fmd->sensor[index].pdata;
403*4882a593Smuzhiyun 	struct device_node *rem, *np;
404*4882a593Smuzhiyun 	struct v4l2_fwnode_endpoint endpoint = { .bus_type = 0 };
405*4882a593Smuzhiyun 	int ret;
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun 	ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep), &endpoint);
408*4882a593Smuzhiyun 	if (ret) {
409*4882a593Smuzhiyun 		of_node_put(ep);
410*4882a593Smuzhiyun 		return ret;
411*4882a593Smuzhiyun 	}
412*4882a593Smuzhiyun 
413*4882a593Smuzhiyun 	if (WARN_ON(endpoint.base.port == 0) || index >= FIMC_MAX_SENSORS) {
414*4882a593Smuzhiyun 		of_node_put(ep);
415*4882a593Smuzhiyun 		return -EINVAL;
416*4882a593Smuzhiyun 	}
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun 	pd->mux_id = (endpoint.base.port - 1) & 0x1;
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun 	rem = of_graph_get_remote_port_parent(ep);
421*4882a593Smuzhiyun 	of_node_put(ep);
422*4882a593Smuzhiyun 	if (rem == NULL) {
423*4882a593Smuzhiyun 		v4l2_info(&fmd->v4l2_dev, "Remote device at %pOF not found\n",
424*4882a593Smuzhiyun 							ep);
425*4882a593Smuzhiyun 		return 0;
426*4882a593Smuzhiyun 	}
427*4882a593Smuzhiyun 
428*4882a593Smuzhiyun 	if (fimc_input_is_parallel(endpoint.base.port)) {
429*4882a593Smuzhiyun 		if (endpoint.bus_type == V4L2_MBUS_PARALLEL)
430*4882a593Smuzhiyun 			pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_601;
431*4882a593Smuzhiyun 		else
432*4882a593Smuzhiyun 			pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_656;
433*4882a593Smuzhiyun 		pd->flags = endpoint.bus.parallel.flags;
434*4882a593Smuzhiyun 	} else if (fimc_input_is_mipi_csi(endpoint.base.port)) {
435*4882a593Smuzhiyun 		/*
436*4882a593Smuzhiyun 		 * MIPI CSI-2: only input mux selection and
437*4882a593Smuzhiyun 		 * the sensor's clock frequency is needed.
438*4882a593Smuzhiyun 		 */
439*4882a593Smuzhiyun 		pd->sensor_bus_type = FIMC_BUS_TYPE_MIPI_CSI2;
440*4882a593Smuzhiyun 	} else {
441*4882a593Smuzhiyun 		v4l2_err(&fmd->v4l2_dev, "Wrong port id (%u) at node %pOF\n",
442*4882a593Smuzhiyun 			 endpoint.base.port, rem);
443*4882a593Smuzhiyun 	}
444*4882a593Smuzhiyun 	/*
445*4882a593Smuzhiyun 	 * For FIMC-IS handled sensors, that are placed under i2c-isp device
446*4882a593Smuzhiyun 	 * node, FIMC is connected to the FIMC-IS through its ISP Writeback
447*4882a593Smuzhiyun 	 * input. Sensors are attached to the FIMC-LITE hostdata interface
448*4882a593Smuzhiyun 	 * directly or through MIPI-CSIS, depending on the external media bus
449*4882a593Smuzhiyun 	 * used. This needs to be handled in a more reliable way, not by just
450*4882a593Smuzhiyun 	 * checking parent's node name.
451*4882a593Smuzhiyun 	 */
452*4882a593Smuzhiyun 	np = of_get_parent(rem);
453*4882a593Smuzhiyun 
454*4882a593Smuzhiyun 	if (of_node_name_eq(np, "i2c-isp"))
455*4882a593Smuzhiyun 		pd->fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK;
456*4882a593Smuzhiyun 	else
457*4882a593Smuzhiyun 		pd->fimc_bus_type = pd->sensor_bus_type;
458*4882a593Smuzhiyun 	of_node_put(np);
459*4882a593Smuzhiyun 
460*4882a593Smuzhiyun 	if (WARN_ON(index >= ARRAY_SIZE(fmd->sensor))) {
461*4882a593Smuzhiyun 		of_node_put(rem);
462*4882a593Smuzhiyun 		return -EINVAL;
463*4882a593Smuzhiyun 	}
464*4882a593Smuzhiyun 
465*4882a593Smuzhiyun 	fmd->sensor[index].asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
466*4882a593Smuzhiyun 	fmd->sensor[index].asd.match.fwnode = of_fwnode_handle(rem);
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun 	ret = v4l2_async_notifier_add_subdev(&fmd->subdev_notifier,
469*4882a593Smuzhiyun 					     &fmd->sensor[index].asd);
470*4882a593Smuzhiyun 	if (ret) {
471*4882a593Smuzhiyun 		of_node_put(rem);
472*4882a593Smuzhiyun 		return ret;
473*4882a593Smuzhiyun 	}
474*4882a593Smuzhiyun 
475*4882a593Smuzhiyun 	fmd->num_sensors++;
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun 	return 0;
478*4882a593Smuzhiyun }
479*4882a593Smuzhiyun 
480*4882a593Smuzhiyun /* Parse port node and register as a sub-device any sensor specified there. */
fimc_md_parse_port_node(struct fimc_md * fmd,struct device_node * port)481*4882a593Smuzhiyun static int fimc_md_parse_port_node(struct fimc_md *fmd,
482*4882a593Smuzhiyun 				   struct device_node *port)
483*4882a593Smuzhiyun {
484*4882a593Smuzhiyun 	struct device_node *ep;
485*4882a593Smuzhiyun 	int ret;
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun 	for_each_child_of_node(port, ep) {
488*4882a593Smuzhiyun 		ret = fimc_md_parse_one_endpoint(fmd, ep);
489*4882a593Smuzhiyun 		if (ret < 0)
490*4882a593Smuzhiyun 			return ret;
491*4882a593Smuzhiyun 	}
492*4882a593Smuzhiyun 
493*4882a593Smuzhiyun 	return 0;
494*4882a593Smuzhiyun }
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun /* Register all SoC external sub-devices */
fimc_md_register_sensor_entities(struct fimc_md * fmd)497*4882a593Smuzhiyun static int fimc_md_register_sensor_entities(struct fimc_md *fmd)
498*4882a593Smuzhiyun {
499*4882a593Smuzhiyun 	struct device_node *parent = fmd->pdev->dev.of_node;
500*4882a593Smuzhiyun 	struct device_node *ports = NULL;
501*4882a593Smuzhiyun 	struct device_node *node;
502*4882a593Smuzhiyun 	int ret;
503*4882a593Smuzhiyun 
504*4882a593Smuzhiyun 	/*
505*4882a593Smuzhiyun 	 * Runtime resume one of the FIMC entities to make sure
506*4882a593Smuzhiyun 	 * the sclk_cam clocks are not globally disabled.
507*4882a593Smuzhiyun 	 */
508*4882a593Smuzhiyun 	if (!fmd->pmf)
509*4882a593Smuzhiyun 		return -ENXIO;
510*4882a593Smuzhiyun 
511*4882a593Smuzhiyun 	ret = pm_runtime_resume_and_get(fmd->pmf);
512*4882a593Smuzhiyun 	if (ret < 0)
513*4882a593Smuzhiyun 		return ret;
514*4882a593Smuzhiyun 
515*4882a593Smuzhiyun 	fmd->num_sensors = 0;
516*4882a593Smuzhiyun 
517*4882a593Smuzhiyun 	/* Attach sensors linked to MIPI CSI-2 receivers */
518*4882a593Smuzhiyun 	for_each_available_child_of_node(parent, node) {
519*4882a593Smuzhiyun 		struct device_node *port;
520*4882a593Smuzhiyun 
521*4882a593Smuzhiyun 		if (!of_node_name_eq(node, "csis"))
522*4882a593Smuzhiyun 			continue;
523*4882a593Smuzhiyun 		/* The csis node can have only port subnode. */
524*4882a593Smuzhiyun 		port = of_get_next_child(node, NULL);
525*4882a593Smuzhiyun 		if (!port)
526*4882a593Smuzhiyun 			continue;
527*4882a593Smuzhiyun 
528*4882a593Smuzhiyun 		ret = fimc_md_parse_port_node(fmd, port);
529*4882a593Smuzhiyun 		of_node_put(port);
530*4882a593Smuzhiyun 		if (ret < 0) {
531*4882a593Smuzhiyun 			of_node_put(node);
532*4882a593Smuzhiyun 			goto cleanup;
533*4882a593Smuzhiyun 		}
534*4882a593Smuzhiyun 	}
535*4882a593Smuzhiyun 
536*4882a593Smuzhiyun 	/* Attach sensors listed in the parallel-ports node */
537*4882a593Smuzhiyun 	ports = of_get_child_by_name(parent, "parallel-ports");
538*4882a593Smuzhiyun 	if (!ports)
539*4882a593Smuzhiyun 		goto rpm_put;
540*4882a593Smuzhiyun 
541*4882a593Smuzhiyun 	for_each_child_of_node(ports, node) {
542*4882a593Smuzhiyun 		ret = fimc_md_parse_port_node(fmd, node);
543*4882a593Smuzhiyun 		if (ret < 0) {
544*4882a593Smuzhiyun 			of_node_put(node);
545*4882a593Smuzhiyun 			goto cleanup;
546*4882a593Smuzhiyun 		}
547*4882a593Smuzhiyun 	}
548*4882a593Smuzhiyun 	of_node_put(ports);
549*4882a593Smuzhiyun 
550*4882a593Smuzhiyun rpm_put:
551*4882a593Smuzhiyun 	pm_runtime_put(fmd->pmf);
552*4882a593Smuzhiyun 	return 0;
553*4882a593Smuzhiyun 
554*4882a593Smuzhiyun cleanup:
555*4882a593Smuzhiyun 	of_node_put(ports);
556*4882a593Smuzhiyun 	v4l2_async_notifier_cleanup(&fmd->subdev_notifier);
557*4882a593Smuzhiyun 	pm_runtime_put(fmd->pmf);
558*4882a593Smuzhiyun 	return ret;
559*4882a593Smuzhiyun }
560*4882a593Smuzhiyun 
__of_get_csis_id(struct device_node * np)561*4882a593Smuzhiyun static int __of_get_csis_id(struct device_node *np)
562*4882a593Smuzhiyun {
563*4882a593Smuzhiyun 	u32 reg = 0;
564*4882a593Smuzhiyun 
565*4882a593Smuzhiyun 	np = of_get_child_by_name(np, "port");
566*4882a593Smuzhiyun 	if (!np)
567*4882a593Smuzhiyun 		return -EINVAL;
568*4882a593Smuzhiyun 	of_property_read_u32(np, "reg", &reg);
569*4882a593Smuzhiyun 	of_node_put(np);
570*4882a593Smuzhiyun 	return reg - FIMC_INPUT_MIPI_CSI2_0;
571*4882a593Smuzhiyun }
572*4882a593Smuzhiyun 
573*4882a593Smuzhiyun /*
574*4882a593Smuzhiyun  * MIPI-CSIS, FIMC and FIMC-LITE platform devices registration.
575*4882a593Smuzhiyun  */
register_fimc_lite_entity(struct fimc_md * fmd,struct fimc_lite * fimc_lite)576*4882a593Smuzhiyun static int register_fimc_lite_entity(struct fimc_md *fmd,
577*4882a593Smuzhiyun 				     struct fimc_lite *fimc_lite)
578*4882a593Smuzhiyun {
579*4882a593Smuzhiyun 	struct v4l2_subdev *sd;
580*4882a593Smuzhiyun 	struct exynos_media_pipeline *ep;
581*4882a593Smuzhiyun 	int ret;
582*4882a593Smuzhiyun 
583*4882a593Smuzhiyun 	if (WARN_ON(fimc_lite->index >= FIMC_LITE_MAX_DEVS ||
584*4882a593Smuzhiyun 		    fmd->fimc_lite[fimc_lite->index]))
585*4882a593Smuzhiyun 		return -EBUSY;
586*4882a593Smuzhiyun 
587*4882a593Smuzhiyun 	sd = &fimc_lite->subdev;
588*4882a593Smuzhiyun 	sd->grp_id = GRP_ID_FLITE;
589*4882a593Smuzhiyun 
590*4882a593Smuzhiyun 	ep = fimc_md_pipeline_create(fmd);
591*4882a593Smuzhiyun 	if (!ep)
592*4882a593Smuzhiyun 		return -ENOMEM;
593*4882a593Smuzhiyun 
594*4882a593Smuzhiyun 	v4l2_set_subdev_hostdata(sd, ep);
595*4882a593Smuzhiyun 
596*4882a593Smuzhiyun 	ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
597*4882a593Smuzhiyun 	if (!ret)
598*4882a593Smuzhiyun 		fmd->fimc_lite[fimc_lite->index] = fimc_lite;
599*4882a593Smuzhiyun 	else
600*4882a593Smuzhiyun 		v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.LITE%d\n",
601*4882a593Smuzhiyun 			 fimc_lite->index);
602*4882a593Smuzhiyun 	return ret;
603*4882a593Smuzhiyun }
604*4882a593Smuzhiyun 
register_fimc_entity(struct fimc_md * fmd,struct fimc_dev * fimc)605*4882a593Smuzhiyun static int register_fimc_entity(struct fimc_md *fmd, struct fimc_dev *fimc)
606*4882a593Smuzhiyun {
607*4882a593Smuzhiyun 	struct v4l2_subdev *sd;
608*4882a593Smuzhiyun 	struct exynos_media_pipeline *ep;
609*4882a593Smuzhiyun 	int ret;
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun 	if (WARN_ON(fimc->id >= FIMC_MAX_DEVS || fmd->fimc[fimc->id]))
612*4882a593Smuzhiyun 		return -EBUSY;
613*4882a593Smuzhiyun 
614*4882a593Smuzhiyun 	sd = &fimc->vid_cap.subdev;
615*4882a593Smuzhiyun 	sd->grp_id = GRP_ID_FIMC;
616*4882a593Smuzhiyun 
617*4882a593Smuzhiyun 	ep = fimc_md_pipeline_create(fmd);
618*4882a593Smuzhiyun 	if (!ep)
619*4882a593Smuzhiyun 		return -ENOMEM;
620*4882a593Smuzhiyun 
621*4882a593Smuzhiyun 	v4l2_set_subdev_hostdata(sd, ep);
622*4882a593Smuzhiyun 
623*4882a593Smuzhiyun 	ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
624*4882a593Smuzhiyun 	if (!ret) {
625*4882a593Smuzhiyun 		if (!fmd->pmf && fimc->pdev)
626*4882a593Smuzhiyun 			fmd->pmf = &fimc->pdev->dev;
627*4882a593Smuzhiyun 		fmd->fimc[fimc->id] = fimc;
628*4882a593Smuzhiyun 		fimc->vid_cap.user_subdev_api = fmd->user_subdev_api;
629*4882a593Smuzhiyun 	} else {
630*4882a593Smuzhiyun 		v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.%d (%d)\n",
631*4882a593Smuzhiyun 			 fimc->id, ret);
632*4882a593Smuzhiyun 	}
633*4882a593Smuzhiyun 	return ret;
634*4882a593Smuzhiyun }
635*4882a593Smuzhiyun 
register_csis_entity(struct fimc_md * fmd,struct platform_device * pdev,struct v4l2_subdev * sd)636*4882a593Smuzhiyun static int register_csis_entity(struct fimc_md *fmd,
637*4882a593Smuzhiyun 				struct platform_device *pdev,
638*4882a593Smuzhiyun 				struct v4l2_subdev *sd)
639*4882a593Smuzhiyun {
640*4882a593Smuzhiyun 	struct device_node *node = pdev->dev.of_node;
641*4882a593Smuzhiyun 	int id, ret;
642*4882a593Smuzhiyun 
643*4882a593Smuzhiyun 	id = node ? __of_get_csis_id(node) : max(0, pdev->id);
644*4882a593Smuzhiyun 
645*4882a593Smuzhiyun 	if (WARN_ON(id < 0 || id >= CSIS_MAX_ENTITIES))
646*4882a593Smuzhiyun 		return -ENOENT;
647*4882a593Smuzhiyun 
648*4882a593Smuzhiyun 	if (WARN_ON(fmd->csis[id].sd))
649*4882a593Smuzhiyun 		return -EBUSY;
650*4882a593Smuzhiyun 
651*4882a593Smuzhiyun 	sd->grp_id = GRP_ID_CSIS;
652*4882a593Smuzhiyun 	ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
653*4882a593Smuzhiyun 	if (!ret)
654*4882a593Smuzhiyun 		fmd->csis[id].sd = sd;
655*4882a593Smuzhiyun 	else
656*4882a593Smuzhiyun 		v4l2_err(&fmd->v4l2_dev,
657*4882a593Smuzhiyun 			 "Failed to register MIPI-CSIS.%d (%d)\n", id, ret);
658*4882a593Smuzhiyun 	return ret;
659*4882a593Smuzhiyun }
660*4882a593Smuzhiyun 
register_fimc_is_entity(struct fimc_md * fmd,struct fimc_is * is)661*4882a593Smuzhiyun static int register_fimc_is_entity(struct fimc_md *fmd, struct fimc_is *is)
662*4882a593Smuzhiyun {
663*4882a593Smuzhiyun 	struct v4l2_subdev *sd = &is->isp.subdev;
664*4882a593Smuzhiyun 	struct exynos_media_pipeline *ep;
665*4882a593Smuzhiyun 	int ret;
666*4882a593Smuzhiyun 
667*4882a593Smuzhiyun 	/* Allocate pipeline object for the ISP capture video node. */
668*4882a593Smuzhiyun 	ep = fimc_md_pipeline_create(fmd);
669*4882a593Smuzhiyun 	if (!ep)
670*4882a593Smuzhiyun 		return -ENOMEM;
671*4882a593Smuzhiyun 
672*4882a593Smuzhiyun 	v4l2_set_subdev_hostdata(sd, ep);
673*4882a593Smuzhiyun 
674*4882a593Smuzhiyun 	ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
675*4882a593Smuzhiyun 	if (ret) {
676*4882a593Smuzhiyun 		v4l2_err(&fmd->v4l2_dev,
677*4882a593Smuzhiyun 			 "Failed to register FIMC-ISP (%d)\n", ret);
678*4882a593Smuzhiyun 		return ret;
679*4882a593Smuzhiyun 	}
680*4882a593Smuzhiyun 
681*4882a593Smuzhiyun 	fmd->fimc_is = is;
682*4882a593Smuzhiyun 	return 0;
683*4882a593Smuzhiyun }
684*4882a593Smuzhiyun 
fimc_md_register_platform_entity(struct fimc_md * fmd,struct platform_device * pdev,int plat_entity)685*4882a593Smuzhiyun static int fimc_md_register_platform_entity(struct fimc_md *fmd,
686*4882a593Smuzhiyun 					    struct platform_device *pdev,
687*4882a593Smuzhiyun 					    int plat_entity)
688*4882a593Smuzhiyun {
689*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
690*4882a593Smuzhiyun 	int ret = -EPROBE_DEFER;
691*4882a593Smuzhiyun 	void *drvdata;
692*4882a593Smuzhiyun 
693*4882a593Smuzhiyun 	/* Lock to ensure dev->driver won't change. */
694*4882a593Smuzhiyun 	device_lock(dev);
695*4882a593Smuzhiyun 
696*4882a593Smuzhiyun 	if (!dev->driver || !try_module_get(dev->driver->owner))
697*4882a593Smuzhiyun 		goto dev_unlock;
698*4882a593Smuzhiyun 
699*4882a593Smuzhiyun 	drvdata = dev_get_drvdata(dev);
700*4882a593Smuzhiyun 	/* Some subdev didn't probe successfully id drvdata is NULL */
701*4882a593Smuzhiyun 	if (drvdata) {
702*4882a593Smuzhiyun 		switch (plat_entity) {
703*4882a593Smuzhiyun 		case IDX_FIMC:
704*4882a593Smuzhiyun 			ret = register_fimc_entity(fmd, drvdata);
705*4882a593Smuzhiyun 			break;
706*4882a593Smuzhiyun 		case IDX_FLITE:
707*4882a593Smuzhiyun 			ret = register_fimc_lite_entity(fmd, drvdata);
708*4882a593Smuzhiyun 			break;
709*4882a593Smuzhiyun 		case IDX_CSIS:
710*4882a593Smuzhiyun 			ret = register_csis_entity(fmd, pdev, drvdata);
711*4882a593Smuzhiyun 			break;
712*4882a593Smuzhiyun 		case IDX_IS_ISP:
713*4882a593Smuzhiyun 			ret = register_fimc_is_entity(fmd, drvdata);
714*4882a593Smuzhiyun 			break;
715*4882a593Smuzhiyun 		default:
716*4882a593Smuzhiyun 			ret = -ENODEV;
717*4882a593Smuzhiyun 		}
718*4882a593Smuzhiyun 	}
719*4882a593Smuzhiyun 
720*4882a593Smuzhiyun 	module_put(dev->driver->owner);
721*4882a593Smuzhiyun dev_unlock:
722*4882a593Smuzhiyun 	device_unlock(dev);
723*4882a593Smuzhiyun 	if (ret == -EPROBE_DEFER)
724*4882a593Smuzhiyun 		dev_info(&fmd->pdev->dev, "deferring %s device registration\n",
725*4882a593Smuzhiyun 			dev_name(dev));
726*4882a593Smuzhiyun 	else if (ret < 0)
727*4882a593Smuzhiyun 		dev_err(&fmd->pdev->dev, "%s device registration failed (%d)\n",
728*4882a593Smuzhiyun 			dev_name(dev), ret);
729*4882a593Smuzhiyun 	return ret;
730*4882a593Smuzhiyun }
731*4882a593Smuzhiyun 
732*4882a593Smuzhiyun /* Register FIMC, FIMC-LITE and CSIS media entities */
fimc_md_register_platform_entities(struct fimc_md * fmd,struct device_node * parent)733*4882a593Smuzhiyun static int fimc_md_register_platform_entities(struct fimc_md *fmd,
734*4882a593Smuzhiyun 					      struct device_node *parent)
735*4882a593Smuzhiyun {
736*4882a593Smuzhiyun 	struct device_node *node;
737*4882a593Smuzhiyun 	int ret = 0;
738*4882a593Smuzhiyun 
739*4882a593Smuzhiyun 	for_each_available_child_of_node(parent, node) {
740*4882a593Smuzhiyun 		struct platform_device *pdev;
741*4882a593Smuzhiyun 		int plat_entity = -1;
742*4882a593Smuzhiyun 
743*4882a593Smuzhiyun 		pdev = of_find_device_by_node(node);
744*4882a593Smuzhiyun 		if (!pdev)
745*4882a593Smuzhiyun 			continue;
746*4882a593Smuzhiyun 
747*4882a593Smuzhiyun 		/* If driver of any entity isn't ready try all again later. */
748*4882a593Smuzhiyun 		if (of_node_name_eq(node, CSIS_OF_NODE_NAME))
749*4882a593Smuzhiyun 			plat_entity = IDX_CSIS;
750*4882a593Smuzhiyun 		else if (of_node_name_eq(node, FIMC_IS_OF_NODE_NAME))
751*4882a593Smuzhiyun 			plat_entity = IDX_IS_ISP;
752*4882a593Smuzhiyun 		else if (of_node_name_eq(node, FIMC_LITE_OF_NODE_NAME))
753*4882a593Smuzhiyun 			plat_entity = IDX_FLITE;
754*4882a593Smuzhiyun 		else if (of_node_name_eq(node, FIMC_OF_NODE_NAME) &&
755*4882a593Smuzhiyun 			 !of_property_read_bool(node, "samsung,lcd-wb"))
756*4882a593Smuzhiyun 			plat_entity = IDX_FIMC;
757*4882a593Smuzhiyun 
758*4882a593Smuzhiyun 		if (plat_entity >= 0)
759*4882a593Smuzhiyun 			ret = fimc_md_register_platform_entity(fmd, pdev,
760*4882a593Smuzhiyun 							plat_entity);
761*4882a593Smuzhiyun 		put_device(&pdev->dev);
762*4882a593Smuzhiyun 		if (ret < 0) {
763*4882a593Smuzhiyun 			of_node_put(node);
764*4882a593Smuzhiyun 			break;
765*4882a593Smuzhiyun 		}
766*4882a593Smuzhiyun 	}
767*4882a593Smuzhiyun 
768*4882a593Smuzhiyun 	return ret;
769*4882a593Smuzhiyun }
770*4882a593Smuzhiyun 
fimc_md_unregister_entities(struct fimc_md * fmd)771*4882a593Smuzhiyun static void fimc_md_unregister_entities(struct fimc_md *fmd)
772*4882a593Smuzhiyun {
773*4882a593Smuzhiyun 	int i;
774*4882a593Smuzhiyun 
775*4882a593Smuzhiyun 	for (i = 0; i < FIMC_MAX_DEVS; i++) {
776*4882a593Smuzhiyun 		struct fimc_dev *dev = fmd->fimc[i];
777*4882a593Smuzhiyun 		if (dev == NULL)
778*4882a593Smuzhiyun 			continue;
779*4882a593Smuzhiyun 		v4l2_device_unregister_subdev(&dev->vid_cap.subdev);
780*4882a593Smuzhiyun 		dev->vid_cap.ve.pipe = NULL;
781*4882a593Smuzhiyun 		fmd->fimc[i] = NULL;
782*4882a593Smuzhiyun 	}
783*4882a593Smuzhiyun 	for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
784*4882a593Smuzhiyun 		struct fimc_lite *dev = fmd->fimc_lite[i];
785*4882a593Smuzhiyun 		if (dev == NULL)
786*4882a593Smuzhiyun 			continue;
787*4882a593Smuzhiyun 		v4l2_device_unregister_subdev(&dev->subdev);
788*4882a593Smuzhiyun 		dev->ve.pipe = NULL;
789*4882a593Smuzhiyun 		fmd->fimc_lite[i] = NULL;
790*4882a593Smuzhiyun 	}
791*4882a593Smuzhiyun 	for (i = 0; i < CSIS_MAX_ENTITIES; i++) {
792*4882a593Smuzhiyun 		if (fmd->csis[i].sd == NULL)
793*4882a593Smuzhiyun 			continue;
794*4882a593Smuzhiyun 		v4l2_device_unregister_subdev(fmd->csis[i].sd);
795*4882a593Smuzhiyun 		fmd->csis[i].sd = NULL;
796*4882a593Smuzhiyun 	}
797*4882a593Smuzhiyun 
798*4882a593Smuzhiyun 	if (fmd->fimc_is)
799*4882a593Smuzhiyun 		v4l2_device_unregister_subdev(&fmd->fimc_is->isp.subdev);
800*4882a593Smuzhiyun 
801*4882a593Smuzhiyun 	v4l2_info(&fmd->v4l2_dev, "Unregistered all entities\n");
802*4882a593Smuzhiyun }
803*4882a593Smuzhiyun 
804*4882a593Smuzhiyun /**
805*4882a593Smuzhiyun  * __fimc_md_create_fimc_links - create links to all FIMC entities
806*4882a593Smuzhiyun  * @fmd: fimc media device
807*4882a593Smuzhiyun  * @source: the source entity to create links to all fimc entities from
808*4882a593Smuzhiyun  * @sensor: sensor subdev linked to FIMC[fimc_id] entity, may be null
809*4882a593Smuzhiyun  * @pad: the source entity pad index
810*4882a593Smuzhiyun  * @link_mask: bitmask of the fimc devices for which link should be enabled
811*4882a593Smuzhiyun  */
__fimc_md_create_fimc_sink_links(struct fimc_md * fmd,struct media_entity * source,struct v4l2_subdev * sensor,int pad,int link_mask)812*4882a593Smuzhiyun static int __fimc_md_create_fimc_sink_links(struct fimc_md *fmd,
813*4882a593Smuzhiyun 					    struct media_entity *source,
814*4882a593Smuzhiyun 					    struct v4l2_subdev *sensor,
815*4882a593Smuzhiyun 					    int pad, int link_mask)
816*4882a593Smuzhiyun {
817*4882a593Smuzhiyun 	struct fimc_source_info *si = NULL;
818*4882a593Smuzhiyun 	struct media_entity *sink;
819*4882a593Smuzhiyun 	unsigned int flags = 0;
820*4882a593Smuzhiyun 	int i, ret = 0;
821*4882a593Smuzhiyun 
822*4882a593Smuzhiyun 	if (sensor) {
823*4882a593Smuzhiyun 		si = v4l2_get_subdev_hostdata(sensor);
824*4882a593Smuzhiyun 		/* Skip direct FIMC links in the logical FIMC-IS sensor path */
825*4882a593Smuzhiyun 		if (si && si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK)
826*4882a593Smuzhiyun 			ret = 1;
827*4882a593Smuzhiyun 	}
828*4882a593Smuzhiyun 
829*4882a593Smuzhiyun 	for (i = 0; !ret && i < FIMC_MAX_DEVS; i++) {
830*4882a593Smuzhiyun 		if (!fmd->fimc[i])
831*4882a593Smuzhiyun 			continue;
832*4882a593Smuzhiyun 		/*
833*4882a593Smuzhiyun 		 * Some FIMC variants are not fitted with camera capture
834*4882a593Smuzhiyun 		 * interface. Skip creating a link from sensor for those.
835*4882a593Smuzhiyun 		 */
836*4882a593Smuzhiyun 		if (!fmd->fimc[i]->variant->has_cam_if)
837*4882a593Smuzhiyun 			continue;
838*4882a593Smuzhiyun 
839*4882a593Smuzhiyun 		flags = ((1 << i) & link_mask) ? MEDIA_LNK_FL_ENABLED : 0;
840*4882a593Smuzhiyun 
841*4882a593Smuzhiyun 		sink = &fmd->fimc[i]->vid_cap.subdev.entity;
842*4882a593Smuzhiyun 		ret = media_create_pad_link(source, pad, sink,
843*4882a593Smuzhiyun 					      FIMC_SD_PAD_SINK_CAM, flags);
844*4882a593Smuzhiyun 		if (ret)
845*4882a593Smuzhiyun 			return ret;
846*4882a593Smuzhiyun 
847*4882a593Smuzhiyun 		/* Notify FIMC capture subdev entity */
848*4882a593Smuzhiyun 		ret = media_entity_call(sink, link_setup, &sink->pads[0],
849*4882a593Smuzhiyun 					&source->pads[pad], flags);
850*4882a593Smuzhiyun 		if (ret)
851*4882a593Smuzhiyun 			break;
852*4882a593Smuzhiyun 
853*4882a593Smuzhiyun 		v4l2_info(&fmd->v4l2_dev, "created link [%s] %c> [%s]\n",
854*4882a593Smuzhiyun 			  source->name, flags ? '=' : '-', sink->name);
855*4882a593Smuzhiyun 	}
856*4882a593Smuzhiyun 
857*4882a593Smuzhiyun 	for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
858*4882a593Smuzhiyun 		if (!fmd->fimc_lite[i])
859*4882a593Smuzhiyun 			continue;
860*4882a593Smuzhiyun 
861*4882a593Smuzhiyun 		sink = &fmd->fimc_lite[i]->subdev.entity;
862*4882a593Smuzhiyun 		ret = media_create_pad_link(source, pad, sink,
863*4882a593Smuzhiyun 					       FLITE_SD_PAD_SINK, 0);
864*4882a593Smuzhiyun 		if (ret)
865*4882a593Smuzhiyun 			return ret;
866*4882a593Smuzhiyun 
867*4882a593Smuzhiyun 		/* Notify FIMC-LITE subdev entity */
868*4882a593Smuzhiyun 		ret = media_entity_call(sink, link_setup, &sink->pads[0],
869*4882a593Smuzhiyun 					&source->pads[pad], 0);
870*4882a593Smuzhiyun 		if (ret)
871*4882a593Smuzhiyun 			break;
872*4882a593Smuzhiyun 
873*4882a593Smuzhiyun 		v4l2_info(&fmd->v4l2_dev, "created link [%s] -> [%s]\n",
874*4882a593Smuzhiyun 			  source->name, sink->name);
875*4882a593Smuzhiyun 	}
876*4882a593Smuzhiyun 	return 0;
877*4882a593Smuzhiyun }
878*4882a593Smuzhiyun 
879*4882a593Smuzhiyun /* Create links from FIMC-LITE source pads to other entities */
__fimc_md_create_flite_source_links(struct fimc_md * fmd)880*4882a593Smuzhiyun static int __fimc_md_create_flite_source_links(struct fimc_md *fmd)
881*4882a593Smuzhiyun {
882*4882a593Smuzhiyun 	struct media_entity *source, *sink;
883*4882a593Smuzhiyun 	int i, ret = 0;
884*4882a593Smuzhiyun 
885*4882a593Smuzhiyun 	for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
886*4882a593Smuzhiyun 		struct fimc_lite *fimc = fmd->fimc_lite[i];
887*4882a593Smuzhiyun 
888*4882a593Smuzhiyun 		if (fimc == NULL)
889*4882a593Smuzhiyun 			continue;
890*4882a593Smuzhiyun 
891*4882a593Smuzhiyun 		source = &fimc->subdev.entity;
892*4882a593Smuzhiyun 		sink = &fimc->ve.vdev.entity;
893*4882a593Smuzhiyun 		/* FIMC-LITE's subdev and video node */
894*4882a593Smuzhiyun 		ret = media_create_pad_link(source, FLITE_SD_PAD_SOURCE_DMA,
895*4882a593Smuzhiyun 					       sink, 0, 0);
896*4882a593Smuzhiyun 		if (ret)
897*4882a593Smuzhiyun 			break;
898*4882a593Smuzhiyun 		/* Link from FIMC-LITE to IS-ISP subdev */
899*4882a593Smuzhiyun 		sink = &fmd->fimc_is->isp.subdev.entity;
900*4882a593Smuzhiyun 		ret = media_create_pad_link(source, FLITE_SD_PAD_SOURCE_ISP,
901*4882a593Smuzhiyun 					       sink, 0, 0);
902*4882a593Smuzhiyun 		if (ret)
903*4882a593Smuzhiyun 			break;
904*4882a593Smuzhiyun 	}
905*4882a593Smuzhiyun 
906*4882a593Smuzhiyun 	return ret;
907*4882a593Smuzhiyun }
908*4882a593Smuzhiyun 
909*4882a593Smuzhiyun /* Create FIMC-IS links */
__fimc_md_create_fimc_is_links(struct fimc_md * fmd)910*4882a593Smuzhiyun static int __fimc_md_create_fimc_is_links(struct fimc_md *fmd)
911*4882a593Smuzhiyun {
912*4882a593Smuzhiyun 	struct fimc_isp *isp = &fmd->fimc_is->isp;
913*4882a593Smuzhiyun 	struct media_entity *source, *sink;
914*4882a593Smuzhiyun 	int i, ret;
915*4882a593Smuzhiyun 
916*4882a593Smuzhiyun 	source = &isp->subdev.entity;
917*4882a593Smuzhiyun 
918*4882a593Smuzhiyun 	for (i = 0; i < FIMC_MAX_DEVS; i++) {
919*4882a593Smuzhiyun 		if (fmd->fimc[i] == NULL)
920*4882a593Smuzhiyun 			continue;
921*4882a593Smuzhiyun 
922*4882a593Smuzhiyun 		/* Link from FIMC-IS-ISP subdev to FIMC */
923*4882a593Smuzhiyun 		sink = &fmd->fimc[i]->vid_cap.subdev.entity;
924*4882a593Smuzhiyun 		ret = media_create_pad_link(source, FIMC_ISP_SD_PAD_SRC_FIFO,
925*4882a593Smuzhiyun 					       sink, FIMC_SD_PAD_SINK_FIFO, 0);
926*4882a593Smuzhiyun 		if (ret)
927*4882a593Smuzhiyun 			return ret;
928*4882a593Smuzhiyun 	}
929*4882a593Smuzhiyun 
930*4882a593Smuzhiyun 	/* Link from FIMC-IS-ISP subdev to fimc-is-isp.capture video node */
931*4882a593Smuzhiyun 	sink = &isp->video_capture.ve.vdev.entity;
932*4882a593Smuzhiyun 
933*4882a593Smuzhiyun 	/* Skip this link if the fimc-is-isp video node driver isn't built-in */
934*4882a593Smuzhiyun 	if (sink->num_pads == 0)
935*4882a593Smuzhiyun 		return 0;
936*4882a593Smuzhiyun 
937*4882a593Smuzhiyun 	return media_create_pad_link(source, FIMC_ISP_SD_PAD_SRC_DMA,
938*4882a593Smuzhiyun 					sink, 0, 0);
939*4882a593Smuzhiyun }
940*4882a593Smuzhiyun 
941*4882a593Smuzhiyun /**
942*4882a593Smuzhiyun  * fimc_md_create_links - create default links between registered entities
943*4882a593Smuzhiyun  * @fmd: fimc media device
944*4882a593Smuzhiyun  *
945*4882a593Smuzhiyun  * Parallel interface sensor entities are connected directly to FIMC capture
946*4882a593Smuzhiyun  * entities. The sensors using MIPI CSIS bus are connected through immutable
947*4882a593Smuzhiyun  * link with CSI receiver entity specified by mux_id. Any registered CSIS
948*4882a593Smuzhiyun  * entity has a link to each registered FIMC capture entity. Enabled links
949*4882a593Smuzhiyun  * are created by default between each subsequent registered sensor and
950*4882a593Smuzhiyun  * subsequent FIMC capture entity. The number of default active links is
951*4882a593Smuzhiyun  * determined by the number of available sensors or FIMC entities,
952*4882a593Smuzhiyun  * whichever is less.
953*4882a593Smuzhiyun  */
fimc_md_create_links(struct fimc_md * fmd)954*4882a593Smuzhiyun static int fimc_md_create_links(struct fimc_md *fmd)
955*4882a593Smuzhiyun {
956*4882a593Smuzhiyun 	struct v4l2_subdev *csi_sensors[CSIS_MAX_ENTITIES] = { NULL };
957*4882a593Smuzhiyun 	struct v4l2_subdev *sensor, *csis;
958*4882a593Smuzhiyun 	struct fimc_source_info *pdata;
959*4882a593Smuzhiyun 	struct media_entity *source, *sink;
960*4882a593Smuzhiyun 	int i, pad, fimc_id = 0, ret = 0;
961*4882a593Smuzhiyun 	u32 flags, link_mask = 0;
962*4882a593Smuzhiyun 
963*4882a593Smuzhiyun 	for (i = 0; i < fmd->num_sensors; i++) {
964*4882a593Smuzhiyun 		if (fmd->sensor[i].subdev == NULL)
965*4882a593Smuzhiyun 			continue;
966*4882a593Smuzhiyun 
967*4882a593Smuzhiyun 		sensor = fmd->sensor[i].subdev;
968*4882a593Smuzhiyun 		pdata = v4l2_get_subdev_hostdata(sensor);
969*4882a593Smuzhiyun 		if (!pdata)
970*4882a593Smuzhiyun 			continue;
971*4882a593Smuzhiyun 
972*4882a593Smuzhiyun 		source = NULL;
973*4882a593Smuzhiyun 
974*4882a593Smuzhiyun 		switch (pdata->sensor_bus_type) {
975*4882a593Smuzhiyun 		case FIMC_BUS_TYPE_MIPI_CSI2:
976*4882a593Smuzhiyun 			if (WARN(pdata->mux_id >= CSIS_MAX_ENTITIES,
977*4882a593Smuzhiyun 				"Wrong CSI channel id: %d\n", pdata->mux_id))
978*4882a593Smuzhiyun 				return -EINVAL;
979*4882a593Smuzhiyun 
980*4882a593Smuzhiyun 			csis = fmd->csis[pdata->mux_id].sd;
981*4882a593Smuzhiyun 			if (WARN(csis == NULL,
982*4882a593Smuzhiyun 				 "MIPI-CSI interface specified but s5p-csis module is not loaded!\n"))
983*4882a593Smuzhiyun 				return -EINVAL;
984*4882a593Smuzhiyun 
985*4882a593Smuzhiyun 			pad = sensor->entity.num_pads - 1;
986*4882a593Smuzhiyun 			ret = media_create_pad_link(&sensor->entity, pad,
987*4882a593Smuzhiyun 					      &csis->entity, CSIS_PAD_SINK,
988*4882a593Smuzhiyun 					      MEDIA_LNK_FL_IMMUTABLE |
989*4882a593Smuzhiyun 					      MEDIA_LNK_FL_ENABLED);
990*4882a593Smuzhiyun 			if (ret)
991*4882a593Smuzhiyun 				return ret;
992*4882a593Smuzhiyun 
993*4882a593Smuzhiyun 			v4l2_info(&fmd->v4l2_dev, "created link [%s] => [%s]\n",
994*4882a593Smuzhiyun 				  sensor->entity.name, csis->entity.name);
995*4882a593Smuzhiyun 
996*4882a593Smuzhiyun 			source = NULL;
997*4882a593Smuzhiyun 			csi_sensors[pdata->mux_id] = sensor;
998*4882a593Smuzhiyun 			break;
999*4882a593Smuzhiyun 
1000*4882a593Smuzhiyun 		case FIMC_BUS_TYPE_ITU_601...FIMC_BUS_TYPE_ITU_656:
1001*4882a593Smuzhiyun 			source = &sensor->entity;
1002*4882a593Smuzhiyun 			pad = 0;
1003*4882a593Smuzhiyun 			break;
1004*4882a593Smuzhiyun 
1005*4882a593Smuzhiyun 		default:
1006*4882a593Smuzhiyun 			v4l2_err(&fmd->v4l2_dev, "Wrong bus_type: %x\n",
1007*4882a593Smuzhiyun 				 pdata->sensor_bus_type);
1008*4882a593Smuzhiyun 			return -EINVAL;
1009*4882a593Smuzhiyun 		}
1010*4882a593Smuzhiyun 		if (source == NULL)
1011*4882a593Smuzhiyun 			continue;
1012*4882a593Smuzhiyun 
1013*4882a593Smuzhiyun 		link_mask = 1 << fimc_id++;
1014*4882a593Smuzhiyun 		ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor,
1015*4882a593Smuzhiyun 						       pad, link_mask);
1016*4882a593Smuzhiyun 	}
1017*4882a593Smuzhiyun 
1018*4882a593Smuzhiyun 	for (i = 0; i < CSIS_MAX_ENTITIES; i++) {
1019*4882a593Smuzhiyun 		if (fmd->csis[i].sd == NULL)
1020*4882a593Smuzhiyun 			continue;
1021*4882a593Smuzhiyun 
1022*4882a593Smuzhiyun 		source = &fmd->csis[i].sd->entity;
1023*4882a593Smuzhiyun 		pad = CSIS_PAD_SOURCE;
1024*4882a593Smuzhiyun 		sensor = csi_sensors[i];
1025*4882a593Smuzhiyun 
1026*4882a593Smuzhiyun 		link_mask = 1 << fimc_id++;
1027*4882a593Smuzhiyun 		ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor,
1028*4882a593Smuzhiyun 						       pad, link_mask);
1029*4882a593Smuzhiyun 	}
1030*4882a593Smuzhiyun 
1031*4882a593Smuzhiyun 	/* Create immutable links between each FIMC's subdev and video node */
1032*4882a593Smuzhiyun 	flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
1033*4882a593Smuzhiyun 	for (i = 0; i < FIMC_MAX_DEVS; i++) {
1034*4882a593Smuzhiyun 		if (!fmd->fimc[i])
1035*4882a593Smuzhiyun 			continue;
1036*4882a593Smuzhiyun 
1037*4882a593Smuzhiyun 		source = &fmd->fimc[i]->vid_cap.subdev.entity;
1038*4882a593Smuzhiyun 		sink = &fmd->fimc[i]->vid_cap.ve.vdev.entity;
1039*4882a593Smuzhiyun 
1040*4882a593Smuzhiyun 		ret = media_create_pad_link(source, FIMC_SD_PAD_SOURCE,
1041*4882a593Smuzhiyun 					      sink, 0, flags);
1042*4882a593Smuzhiyun 		if (ret)
1043*4882a593Smuzhiyun 			break;
1044*4882a593Smuzhiyun 	}
1045*4882a593Smuzhiyun 
1046*4882a593Smuzhiyun 	ret = __fimc_md_create_flite_source_links(fmd);
1047*4882a593Smuzhiyun 	if (ret < 0)
1048*4882a593Smuzhiyun 		return ret;
1049*4882a593Smuzhiyun 
1050*4882a593Smuzhiyun 	if (fmd->use_isp)
1051*4882a593Smuzhiyun 		ret = __fimc_md_create_fimc_is_links(fmd);
1052*4882a593Smuzhiyun 
1053*4882a593Smuzhiyun 	return ret;
1054*4882a593Smuzhiyun }
1055*4882a593Smuzhiyun 
1056*4882a593Smuzhiyun /*
1057*4882a593Smuzhiyun  * The peripheral sensor and CAM_BLK (PIXELASYNCMx) clocks management.
1058*4882a593Smuzhiyun  */
fimc_md_put_clocks(struct fimc_md * fmd)1059*4882a593Smuzhiyun static void fimc_md_put_clocks(struct fimc_md *fmd)
1060*4882a593Smuzhiyun {
1061*4882a593Smuzhiyun 	int i = FIMC_MAX_CAMCLKS;
1062*4882a593Smuzhiyun 
1063*4882a593Smuzhiyun 	while (--i >= 0) {
1064*4882a593Smuzhiyun 		if (IS_ERR(fmd->camclk[i].clock))
1065*4882a593Smuzhiyun 			continue;
1066*4882a593Smuzhiyun 		clk_put(fmd->camclk[i].clock);
1067*4882a593Smuzhiyun 		fmd->camclk[i].clock = ERR_PTR(-EINVAL);
1068*4882a593Smuzhiyun 	}
1069*4882a593Smuzhiyun 
1070*4882a593Smuzhiyun 	/* Writeback (PIXELASYNCMx) clocks */
1071*4882a593Smuzhiyun 	for (i = 0; i < FIMC_MAX_WBCLKS; i++) {
1072*4882a593Smuzhiyun 		if (IS_ERR(fmd->wbclk[i]))
1073*4882a593Smuzhiyun 			continue;
1074*4882a593Smuzhiyun 		clk_put(fmd->wbclk[i]);
1075*4882a593Smuzhiyun 		fmd->wbclk[i] = ERR_PTR(-EINVAL);
1076*4882a593Smuzhiyun 	}
1077*4882a593Smuzhiyun }
1078*4882a593Smuzhiyun 
fimc_md_get_clocks(struct fimc_md * fmd)1079*4882a593Smuzhiyun static int fimc_md_get_clocks(struct fimc_md *fmd)
1080*4882a593Smuzhiyun {
1081*4882a593Smuzhiyun 	struct device *dev = &fmd->pdev->dev;
1082*4882a593Smuzhiyun 	char clk_name[32];
1083*4882a593Smuzhiyun 	struct clk *clock;
1084*4882a593Smuzhiyun 	int i, ret = 0;
1085*4882a593Smuzhiyun 
1086*4882a593Smuzhiyun 	for (i = 0; i < FIMC_MAX_CAMCLKS; i++)
1087*4882a593Smuzhiyun 		fmd->camclk[i].clock = ERR_PTR(-EINVAL);
1088*4882a593Smuzhiyun 
1089*4882a593Smuzhiyun 	for (i = 0; i < FIMC_MAX_CAMCLKS; i++) {
1090*4882a593Smuzhiyun 		snprintf(clk_name, sizeof(clk_name), "sclk_cam%u", i);
1091*4882a593Smuzhiyun 		clock = clk_get(dev, clk_name);
1092*4882a593Smuzhiyun 
1093*4882a593Smuzhiyun 		if (IS_ERR(clock)) {
1094*4882a593Smuzhiyun 			dev_err(dev, "Failed to get clock: %s\n", clk_name);
1095*4882a593Smuzhiyun 			ret = PTR_ERR(clock);
1096*4882a593Smuzhiyun 			break;
1097*4882a593Smuzhiyun 		}
1098*4882a593Smuzhiyun 		fmd->camclk[i].clock = clock;
1099*4882a593Smuzhiyun 	}
1100*4882a593Smuzhiyun 	if (ret)
1101*4882a593Smuzhiyun 		fimc_md_put_clocks(fmd);
1102*4882a593Smuzhiyun 
1103*4882a593Smuzhiyun 	if (!fmd->use_isp)
1104*4882a593Smuzhiyun 		return 0;
1105*4882a593Smuzhiyun 	/*
1106*4882a593Smuzhiyun 	 * For now get only PIXELASYNCM1 clock (Writeback B/ISP),
1107*4882a593Smuzhiyun 	 * leave PIXELASYNCM0 out for the LCD Writeback driver.
1108*4882a593Smuzhiyun 	 */
1109*4882a593Smuzhiyun 	fmd->wbclk[CLK_IDX_WB_A] = ERR_PTR(-EINVAL);
1110*4882a593Smuzhiyun 
1111*4882a593Smuzhiyun 	for (i = CLK_IDX_WB_B; i < FIMC_MAX_WBCLKS; i++) {
1112*4882a593Smuzhiyun 		snprintf(clk_name, sizeof(clk_name), "pxl_async%u", i);
1113*4882a593Smuzhiyun 		clock = clk_get(dev, clk_name);
1114*4882a593Smuzhiyun 		if (IS_ERR(clock)) {
1115*4882a593Smuzhiyun 			v4l2_err(&fmd->v4l2_dev, "Failed to get clock: %s\n",
1116*4882a593Smuzhiyun 				  clk_name);
1117*4882a593Smuzhiyun 			ret = PTR_ERR(clock);
1118*4882a593Smuzhiyun 			break;
1119*4882a593Smuzhiyun 		}
1120*4882a593Smuzhiyun 		fmd->wbclk[i] = clock;
1121*4882a593Smuzhiyun 	}
1122*4882a593Smuzhiyun 	if (ret)
1123*4882a593Smuzhiyun 		fimc_md_put_clocks(fmd);
1124*4882a593Smuzhiyun 
1125*4882a593Smuzhiyun 	return ret;
1126*4882a593Smuzhiyun }
1127*4882a593Smuzhiyun 
__fimc_md_modify_pipeline(struct media_entity * entity,bool enable)1128*4882a593Smuzhiyun static int __fimc_md_modify_pipeline(struct media_entity *entity, bool enable)
1129*4882a593Smuzhiyun {
1130*4882a593Smuzhiyun 	struct exynos_video_entity *ve;
1131*4882a593Smuzhiyun 	struct fimc_pipeline *p;
1132*4882a593Smuzhiyun 	struct video_device *vdev;
1133*4882a593Smuzhiyun 	int ret;
1134*4882a593Smuzhiyun 
1135*4882a593Smuzhiyun 	vdev = media_entity_to_video_device(entity);
1136*4882a593Smuzhiyun 	if (vdev->entity.use_count == 0)
1137*4882a593Smuzhiyun 		return 0;
1138*4882a593Smuzhiyun 
1139*4882a593Smuzhiyun 	ve = vdev_to_exynos_video_entity(vdev);
1140*4882a593Smuzhiyun 	p = to_fimc_pipeline(ve->pipe);
1141*4882a593Smuzhiyun 	/*
1142*4882a593Smuzhiyun 	 * Nothing to do if we are disabling the pipeline, some link
1143*4882a593Smuzhiyun 	 * has been disconnected and p->subdevs array is cleared now.
1144*4882a593Smuzhiyun 	 */
1145*4882a593Smuzhiyun 	if (!enable && p->subdevs[IDX_SENSOR] == NULL)
1146*4882a593Smuzhiyun 		return 0;
1147*4882a593Smuzhiyun 
1148*4882a593Smuzhiyun 	if (enable)
1149*4882a593Smuzhiyun 		ret = __fimc_pipeline_open(ve->pipe, entity, true);
1150*4882a593Smuzhiyun 	else
1151*4882a593Smuzhiyun 		ret = __fimc_pipeline_close(ve->pipe);
1152*4882a593Smuzhiyun 
1153*4882a593Smuzhiyun 	if (ret == 0 && !enable)
1154*4882a593Smuzhiyun 		memset(p->subdevs, 0, sizeof(p->subdevs));
1155*4882a593Smuzhiyun 
1156*4882a593Smuzhiyun 	return ret;
1157*4882a593Smuzhiyun }
1158*4882a593Smuzhiyun 
1159*4882a593Smuzhiyun /* Locking: called with entity->graph_obj.mdev->graph_mutex mutex held. */
__fimc_md_modify_pipelines(struct media_entity * entity,bool enable,struct media_graph * graph)1160*4882a593Smuzhiyun static int __fimc_md_modify_pipelines(struct media_entity *entity, bool enable,
1161*4882a593Smuzhiyun 				      struct media_graph *graph)
1162*4882a593Smuzhiyun {
1163*4882a593Smuzhiyun 	struct media_entity *entity_err = entity;
1164*4882a593Smuzhiyun 	int ret;
1165*4882a593Smuzhiyun 
1166*4882a593Smuzhiyun 	/*
1167*4882a593Smuzhiyun 	 * Walk current graph and call the pipeline open/close routine for each
1168*4882a593Smuzhiyun 	 * opened video node that belongs to the graph of entities connected
1169*4882a593Smuzhiyun 	 * through active links. This is needed as we cannot power on/off the
1170*4882a593Smuzhiyun 	 * subdevs in random order.
1171*4882a593Smuzhiyun 	 */
1172*4882a593Smuzhiyun 	media_graph_walk_start(graph, entity);
1173*4882a593Smuzhiyun 
1174*4882a593Smuzhiyun 	while ((entity = media_graph_walk_next(graph))) {
1175*4882a593Smuzhiyun 		if (!is_media_entity_v4l2_video_device(entity))
1176*4882a593Smuzhiyun 			continue;
1177*4882a593Smuzhiyun 
1178*4882a593Smuzhiyun 		ret  = __fimc_md_modify_pipeline(entity, enable);
1179*4882a593Smuzhiyun 
1180*4882a593Smuzhiyun 		if (ret < 0)
1181*4882a593Smuzhiyun 			goto err;
1182*4882a593Smuzhiyun 	}
1183*4882a593Smuzhiyun 
1184*4882a593Smuzhiyun 	return 0;
1185*4882a593Smuzhiyun 
1186*4882a593Smuzhiyun err:
1187*4882a593Smuzhiyun 	media_graph_walk_start(graph, entity_err);
1188*4882a593Smuzhiyun 
1189*4882a593Smuzhiyun 	while ((entity_err = media_graph_walk_next(graph))) {
1190*4882a593Smuzhiyun 		if (!is_media_entity_v4l2_video_device(entity_err))
1191*4882a593Smuzhiyun 			continue;
1192*4882a593Smuzhiyun 
1193*4882a593Smuzhiyun 		__fimc_md_modify_pipeline(entity_err, !enable);
1194*4882a593Smuzhiyun 
1195*4882a593Smuzhiyun 		if (entity_err == entity)
1196*4882a593Smuzhiyun 			break;
1197*4882a593Smuzhiyun 	}
1198*4882a593Smuzhiyun 
1199*4882a593Smuzhiyun 	return ret;
1200*4882a593Smuzhiyun }
1201*4882a593Smuzhiyun 
fimc_md_link_notify(struct media_link * link,unsigned int flags,unsigned int notification)1202*4882a593Smuzhiyun static int fimc_md_link_notify(struct media_link *link, unsigned int flags,
1203*4882a593Smuzhiyun 				unsigned int notification)
1204*4882a593Smuzhiyun {
1205*4882a593Smuzhiyun 	struct media_graph *graph =
1206*4882a593Smuzhiyun 		&container_of(link->graph_obj.mdev, struct fimc_md,
1207*4882a593Smuzhiyun 			      media_dev)->link_setup_graph;
1208*4882a593Smuzhiyun 	struct media_entity *sink = link->sink->entity;
1209*4882a593Smuzhiyun 	int ret = 0;
1210*4882a593Smuzhiyun 
1211*4882a593Smuzhiyun 	/* Before link disconnection */
1212*4882a593Smuzhiyun 	if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH) {
1213*4882a593Smuzhiyun 		ret = media_graph_walk_init(graph,
1214*4882a593Smuzhiyun 						   link->graph_obj.mdev);
1215*4882a593Smuzhiyun 		if (ret)
1216*4882a593Smuzhiyun 			return ret;
1217*4882a593Smuzhiyun 		if (!(flags & MEDIA_LNK_FL_ENABLED))
1218*4882a593Smuzhiyun 			ret = __fimc_md_modify_pipelines(sink, false, graph);
1219*4882a593Smuzhiyun #if 0
1220*4882a593Smuzhiyun 		else
1221*4882a593Smuzhiyun 			/* TODO: Link state change validation */
1222*4882a593Smuzhiyun #endif
1223*4882a593Smuzhiyun 	/* After link activation */
1224*4882a593Smuzhiyun 	} else if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH) {
1225*4882a593Smuzhiyun 		if (link->flags & MEDIA_LNK_FL_ENABLED)
1226*4882a593Smuzhiyun 			ret = __fimc_md_modify_pipelines(sink, true, graph);
1227*4882a593Smuzhiyun 		media_graph_walk_cleanup(graph);
1228*4882a593Smuzhiyun 	}
1229*4882a593Smuzhiyun 
1230*4882a593Smuzhiyun 	return ret ? -EPIPE : 0;
1231*4882a593Smuzhiyun }
1232*4882a593Smuzhiyun 
1233*4882a593Smuzhiyun static const struct media_device_ops fimc_md_ops = {
1234*4882a593Smuzhiyun 	.link_notify = fimc_md_link_notify,
1235*4882a593Smuzhiyun };
1236*4882a593Smuzhiyun 
fimc_md_sysfs_show(struct device * dev,struct device_attribute * attr,char * buf)1237*4882a593Smuzhiyun static ssize_t fimc_md_sysfs_show(struct device *dev,
1238*4882a593Smuzhiyun 				  struct device_attribute *attr, char *buf)
1239*4882a593Smuzhiyun {
1240*4882a593Smuzhiyun 	struct fimc_md *fmd = dev_get_drvdata(dev);
1241*4882a593Smuzhiyun 
1242*4882a593Smuzhiyun 	if (fmd->user_subdev_api)
1243*4882a593Smuzhiyun 		return strscpy(buf, "Sub-device API (sub-dev)\n", PAGE_SIZE);
1244*4882a593Smuzhiyun 
1245*4882a593Smuzhiyun 	return strscpy(buf, "V4L2 video node only API (vid-dev)\n", PAGE_SIZE);
1246*4882a593Smuzhiyun }
1247*4882a593Smuzhiyun 
fimc_md_sysfs_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1248*4882a593Smuzhiyun static ssize_t fimc_md_sysfs_store(struct device *dev,
1249*4882a593Smuzhiyun 				   struct device_attribute *attr,
1250*4882a593Smuzhiyun 				   const char *buf, size_t count)
1251*4882a593Smuzhiyun {
1252*4882a593Smuzhiyun 	struct fimc_md *fmd = dev_get_drvdata(dev);
1253*4882a593Smuzhiyun 	bool subdev_api;
1254*4882a593Smuzhiyun 	int i;
1255*4882a593Smuzhiyun 
1256*4882a593Smuzhiyun 	if (!strcmp(buf, "vid-dev\n"))
1257*4882a593Smuzhiyun 		subdev_api = false;
1258*4882a593Smuzhiyun 	else if (!strcmp(buf, "sub-dev\n"))
1259*4882a593Smuzhiyun 		subdev_api = true;
1260*4882a593Smuzhiyun 	else
1261*4882a593Smuzhiyun 		return count;
1262*4882a593Smuzhiyun 
1263*4882a593Smuzhiyun 	fmd->user_subdev_api = subdev_api;
1264*4882a593Smuzhiyun 	for (i = 0; i < FIMC_MAX_DEVS; i++)
1265*4882a593Smuzhiyun 		if (fmd->fimc[i])
1266*4882a593Smuzhiyun 			fmd->fimc[i]->vid_cap.user_subdev_api = subdev_api;
1267*4882a593Smuzhiyun 	return count;
1268*4882a593Smuzhiyun }
1269*4882a593Smuzhiyun /*
1270*4882a593Smuzhiyun  * This device attribute is to select video pipeline configuration method.
1271*4882a593Smuzhiyun  * There are following valid values:
1272*4882a593Smuzhiyun  *  vid-dev - for V4L2 video node API only, subdevice will be configured
1273*4882a593Smuzhiyun  *  by the host driver.
1274*4882a593Smuzhiyun  *  sub-dev - for media controller API, subdevs must be configured in user
1275*4882a593Smuzhiyun  *  space before starting streaming.
1276*4882a593Smuzhiyun  */
1277*4882a593Smuzhiyun static DEVICE_ATTR(subdev_conf_mode, S_IWUSR | S_IRUGO,
1278*4882a593Smuzhiyun 		   fimc_md_sysfs_show, fimc_md_sysfs_store);
1279*4882a593Smuzhiyun 
cam_clk_prepare(struct clk_hw * hw)1280*4882a593Smuzhiyun static int cam_clk_prepare(struct clk_hw *hw)
1281*4882a593Smuzhiyun {
1282*4882a593Smuzhiyun 	struct cam_clk *camclk = to_cam_clk(hw);
1283*4882a593Smuzhiyun 
1284*4882a593Smuzhiyun 	if (camclk->fmd->pmf == NULL)
1285*4882a593Smuzhiyun 		return -ENODEV;
1286*4882a593Smuzhiyun 
1287*4882a593Smuzhiyun 	return pm_runtime_resume_and_get(camclk->fmd->pmf);
1288*4882a593Smuzhiyun }
1289*4882a593Smuzhiyun 
cam_clk_unprepare(struct clk_hw * hw)1290*4882a593Smuzhiyun static void cam_clk_unprepare(struct clk_hw *hw)
1291*4882a593Smuzhiyun {
1292*4882a593Smuzhiyun 	struct cam_clk *camclk = to_cam_clk(hw);
1293*4882a593Smuzhiyun 
1294*4882a593Smuzhiyun 	if (camclk->fmd->pmf == NULL)
1295*4882a593Smuzhiyun 		return;
1296*4882a593Smuzhiyun 
1297*4882a593Smuzhiyun 	pm_runtime_put_sync(camclk->fmd->pmf);
1298*4882a593Smuzhiyun }
1299*4882a593Smuzhiyun 
1300*4882a593Smuzhiyun static const struct clk_ops cam_clk_ops = {
1301*4882a593Smuzhiyun 	.prepare = cam_clk_prepare,
1302*4882a593Smuzhiyun 	.unprepare = cam_clk_unprepare,
1303*4882a593Smuzhiyun };
1304*4882a593Smuzhiyun 
fimc_md_unregister_clk_provider(struct fimc_md * fmd)1305*4882a593Smuzhiyun static void fimc_md_unregister_clk_provider(struct fimc_md *fmd)
1306*4882a593Smuzhiyun {
1307*4882a593Smuzhiyun 	struct cam_clk_provider *cp = &fmd->clk_provider;
1308*4882a593Smuzhiyun 	unsigned int i;
1309*4882a593Smuzhiyun 
1310*4882a593Smuzhiyun 	if (cp->of_node)
1311*4882a593Smuzhiyun 		of_clk_del_provider(cp->of_node);
1312*4882a593Smuzhiyun 
1313*4882a593Smuzhiyun 	for (i = 0; i < cp->num_clocks; i++)
1314*4882a593Smuzhiyun 		clk_unregister(cp->clks[i]);
1315*4882a593Smuzhiyun }
1316*4882a593Smuzhiyun 
fimc_md_register_clk_provider(struct fimc_md * fmd)1317*4882a593Smuzhiyun static int fimc_md_register_clk_provider(struct fimc_md *fmd)
1318*4882a593Smuzhiyun {
1319*4882a593Smuzhiyun 	struct cam_clk_provider *cp = &fmd->clk_provider;
1320*4882a593Smuzhiyun 	struct device *dev = &fmd->pdev->dev;
1321*4882a593Smuzhiyun 	int i, ret;
1322*4882a593Smuzhiyun 
1323*4882a593Smuzhiyun 	for (i = 0; i < FIMC_MAX_CAMCLKS; i++) {
1324*4882a593Smuzhiyun 		struct cam_clk *camclk = &cp->camclk[i];
1325*4882a593Smuzhiyun 		struct clk_init_data init;
1326*4882a593Smuzhiyun 		const char *p_name;
1327*4882a593Smuzhiyun 
1328*4882a593Smuzhiyun 		ret = of_property_read_string_index(dev->of_node,
1329*4882a593Smuzhiyun 					"clock-output-names", i, &init.name);
1330*4882a593Smuzhiyun 		if (ret < 0)
1331*4882a593Smuzhiyun 			break;
1332*4882a593Smuzhiyun 
1333*4882a593Smuzhiyun 		p_name = __clk_get_name(fmd->camclk[i].clock);
1334*4882a593Smuzhiyun 
1335*4882a593Smuzhiyun 		/* It's safe since clk_register() will duplicate the string. */
1336*4882a593Smuzhiyun 		init.parent_names = &p_name;
1337*4882a593Smuzhiyun 		init.num_parents = 1;
1338*4882a593Smuzhiyun 		init.ops = &cam_clk_ops;
1339*4882a593Smuzhiyun 		init.flags = CLK_SET_RATE_PARENT;
1340*4882a593Smuzhiyun 		camclk->hw.init = &init;
1341*4882a593Smuzhiyun 		camclk->fmd = fmd;
1342*4882a593Smuzhiyun 
1343*4882a593Smuzhiyun 		cp->clks[i] = clk_register(NULL, &camclk->hw);
1344*4882a593Smuzhiyun 		if (IS_ERR(cp->clks[i])) {
1345*4882a593Smuzhiyun 			dev_err(dev, "failed to register clock: %s (%ld)\n",
1346*4882a593Smuzhiyun 					init.name, PTR_ERR(cp->clks[i]));
1347*4882a593Smuzhiyun 			ret = PTR_ERR(cp->clks[i]);
1348*4882a593Smuzhiyun 			goto err;
1349*4882a593Smuzhiyun 		}
1350*4882a593Smuzhiyun 		cp->num_clocks++;
1351*4882a593Smuzhiyun 	}
1352*4882a593Smuzhiyun 
1353*4882a593Smuzhiyun 	if (cp->num_clocks == 0) {
1354*4882a593Smuzhiyun 		dev_warn(dev, "clk provider not registered\n");
1355*4882a593Smuzhiyun 		return 0;
1356*4882a593Smuzhiyun 	}
1357*4882a593Smuzhiyun 
1358*4882a593Smuzhiyun 	cp->clk_data.clks = cp->clks;
1359*4882a593Smuzhiyun 	cp->clk_data.clk_num = cp->num_clocks;
1360*4882a593Smuzhiyun 	cp->of_node = dev->of_node;
1361*4882a593Smuzhiyun 	ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
1362*4882a593Smuzhiyun 				  &cp->clk_data);
1363*4882a593Smuzhiyun 	if (ret == 0)
1364*4882a593Smuzhiyun 		return 0;
1365*4882a593Smuzhiyun err:
1366*4882a593Smuzhiyun 	fimc_md_unregister_clk_provider(fmd);
1367*4882a593Smuzhiyun 	return ret;
1368*4882a593Smuzhiyun }
1369*4882a593Smuzhiyun 
subdev_notifier_bound(struct v4l2_async_notifier * notifier,struct v4l2_subdev * subdev,struct v4l2_async_subdev * asd)1370*4882a593Smuzhiyun static int subdev_notifier_bound(struct v4l2_async_notifier *notifier,
1371*4882a593Smuzhiyun 				 struct v4l2_subdev *subdev,
1372*4882a593Smuzhiyun 				 struct v4l2_async_subdev *asd)
1373*4882a593Smuzhiyun {
1374*4882a593Smuzhiyun 	struct fimc_md *fmd = notifier_to_fimc_md(notifier);
1375*4882a593Smuzhiyun 	struct fimc_sensor_info *si = NULL;
1376*4882a593Smuzhiyun 	int i;
1377*4882a593Smuzhiyun 
1378*4882a593Smuzhiyun 	/* Find platform data for this sensor subdev */
1379*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(fmd->sensor); i++)
1380*4882a593Smuzhiyun 		if (fmd->sensor[i].asd.match.fwnode ==
1381*4882a593Smuzhiyun 		    of_fwnode_handle(subdev->dev->of_node))
1382*4882a593Smuzhiyun 			si = &fmd->sensor[i];
1383*4882a593Smuzhiyun 
1384*4882a593Smuzhiyun 	if (si == NULL)
1385*4882a593Smuzhiyun 		return -EINVAL;
1386*4882a593Smuzhiyun 
1387*4882a593Smuzhiyun 	v4l2_set_subdev_hostdata(subdev, &si->pdata);
1388*4882a593Smuzhiyun 
1389*4882a593Smuzhiyun 	if (si->pdata.fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK)
1390*4882a593Smuzhiyun 		subdev->grp_id = GRP_ID_FIMC_IS_SENSOR;
1391*4882a593Smuzhiyun 	else
1392*4882a593Smuzhiyun 		subdev->grp_id = GRP_ID_SENSOR;
1393*4882a593Smuzhiyun 
1394*4882a593Smuzhiyun 	si->subdev = subdev;
1395*4882a593Smuzhiyun 
1396*4882a593Smuzhiyun 	v4l2_info(&fmd->v4l2_dev, "Registered sensor subdevice: %s (%d)\n",
1397*4882a593Smuzhiyun 		  subdev->name, fmd->num_sensors);
1398*4882a593Smuzhiyun 
1399*4882a593Smuzhiyun 	fmd->num_sensors++;
1400*4882a593Smuzhiyun 
1401*4882a593Smuzhiyun 	return 0;
1402*4882a593Smuzhiyun }
1403*4882a593Smuzhiyun 
subdev_notifier_complete(struct v4l2_async_notifier * notifier)1404*4882a593Smuzhiyun static int subdev_notifier_complete(struct v4l2_async_notifier *notifier)
1405*4882a593Smuzhiyun {
1406*4882a593Smuzhiyun 	struct fimc_md *fmd = notifier_to_fimc_md(notifier);
1407*4882a593Smuzhiyun 	int ret;
1408*4882a593Smuzhiyun 
1409*4882a593Smuzhiyun 	mutex_lock(&fmd->media_dev.graph_mutex);
1410*4882a593Smuzhiyun 
1411*4882a593Smuzhiyun 	ret = fimc_md_create_links(fmd);
1412*4882a593Smuzhiyun 	if (ret < 0)
1413*4882a593Smuzhiyun 		goto unlock;
1414*4882a593Smuzhiyun 
1415*4882a593Smuzhiyun 	ret = v4l2_device_register_subdev_nodes(&fmd->v4l2_dev);
1416*4882a593Smuzhiyun unlock:
1417*4882a593Smuzhiyun 	mutex_unlock(&fmd->media_dev.graph_mutex);
1418*4882a593Smuzhiyun 	if (ret < 0)
1419*4882a593Smuzhiyun 		return ret;
1420*4882a593Smuzhiyun 
1421*4882a593Smuzhiyun 	return media_device_register(&fmd->media_dev);
1422*4882a593Smuzhiyun }
1423*4882a593Smuzhiyun 
1424*4882a593Smuzhiyun static const struct v4l2_async_notifier_operations subdev_notifier_ops = {
1425*4882a593Smuzhiyun 	.bound = subdev_notifier_bound,
1426*4882a593Smuzhiyun 	.complete = subdev_notifier_complete,
1427*4882a593Smuzhiyun };
1428*4882a593Smuzhiyun 
fimc_md_probe(struct platform_device * pdev)1429*4882a593Smuzhiyun static int fimc_md_probe(struct platform_device *pdev)
1430*4882a593Smuzhiyun {
1431*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
1432*4882a593Smuzhiyun 	struct v4l2_device *v4l2_dev;
1433*4882a593Smuzhiyun 	struct pinctrl *pinctrl;
1434*4882a593Smuzhiyun 	struct fimc_md *fmd;
1435*4882a593Smuzhiyun 	int ret;
1436*4882a593Smuzhiyun 
1437*4882a593Smuzhiyun 	fmd = devm_kzalloc(dev, sizeof(*fmd), GFP_KERNEL);
1438*4882a593Smuzhiyun 	if (!fmd)
1439*4882a593Smuzhiyun 		return -ENOMEM;
1440*4882a593Smuzhiyun 
1441*4882a593Smuzhiyun 	spin_lock_init(&fmd->slock);
1442*4882a593Smuzhiyun 	INIT_LIST_HEAD(&fmd->pipelines);
1443*4882a593Smuzhiyun 	fmd->pdev = pdev;
1444*4882a593Smuzhiyun 
1445*4882a593Smuzhiyun 	strscpy(fmd->media_dev.model, "Samsung S5P FIMC",
1446*4882a593Smuzhiyun 		sizeof(fmd->media_dev.model));
1447*4882a593Smuzhiyun 	fmd->media_dev.ops = &fimc_md_ops;
1448*4882a593Smuzhiyun 	fmd->media_dev.dev = dev;
1449*4882a593Smuzhiyun 
1450*4882a593Smuzhiyun 	v4l2_dev = &fmd->v4l2_dev;
1451*4882a593Smuzhiyun 	v4l2_dev->mdev = &fmd->media_dev;
1452*4882a593Smuzhiyun 	v4l2_dev->notify = fimc_sensor_notify;
1453*4882a593Smuzhiyun 	strscpy(v4l2_dev->name, "s5p-fimc-md", sizeof(v4l2_dev->name));
1454*4882a593Smuzhiyun 
1455*4882a593Smuzhiyun 	fmd->use_isp = fimc_md_is_isp_available(dev->of_node);
1456*4882a593Smuzhiyun 	fmd->user_subdev_api = true;
1457*4882a593Smuzhiyun 
1458*4882a593Smuzhiyun 	media_device_init(&fmd->media_dev);
1459*4882a593Smuzhiyun 
1460*4882a593Smuzhiyun 	ret = v4l2_device_register(dev, &fmd->v4l2_dev);
1461*4882a593Smuzhiyun 	if (ret < 0) {
1462*4882a593Smuzhiyun 		v4l2_err(v4l2_dev, "Failed to register v4l2_device: %d\n", ret);
1463*4882a593Smuzhiyun 		goto err_md;
1464*4882a593Smuzhiyun 	}
1465*4882a593Smuzhiyun 
1466*4882a593Smuzhiyun 	ret = fimc_md_get_clocks(fmd);
1467*4882a593Smuzhiyun 	if (ret)
1468*4882a593Smuzhiyun 		goto err_v4l2dev;
1469*4882a593Smuzhiyun 
1470*4882a593Smuzhiyun 	pinctrl = devm_pinctrl_get(dev);
1471*4882a593Smuzhiyun 	if (IS_ERR(pinctrl)) {
1472*4882a593Smuzhiyun 		ret = PTR_ERR(pinctrl);
1473*4882a593Smuzhiyun 		if (ret != EPROBE_DEFER)
1474*4882a593Smuzhiyun 			dev_err(dev, "Failed to get pinctrl: %d\n", ret);
1475*4882a593Smuzhiyun 		goto err_clk;
1476*4882a593Smuzhiyun 	}
1477*4882a593Smuzhiyun 
1478*4882a593Smuzhiyun 	platform_set_drvdata(pdev, fmd);
1479*4882a593Smuzhiyun 
1480*4882a593Smuzhiyun 	v4l2_async_notifier_init(&fmd->subdev_notifier);
1481*4882a593Smuzhiyun 
1482*4882a593Smuzhiyun 	ret = fimc_md_register_platform_entities(fmd, dev->of_node);
1483*4882a593Smuzhiyun 	if (ret)
1484*4882a593Smuzhiyun 		goto err_clk;
1485*4882a593Smuzhiyun 
1486*4882a593Smuzhiyun 	ret = fimc_md_register_sensor_entities(fmd);
1487*4882a593Smuzhiyun 	if (ret)
1488*4882a593Smuzhiyun 		goto err_m_ent;
1489*4882a593Smuzhiyun 
1490*4882a593Smuzhiyun 	ret = device_create_file(&pdev->dev, &dev_attr_subdev_conf_mode);
1491*4882a593Smuzhiyun 	if (ret)
1492*4882a593Smuzhiyun 		goto err_cleanup;
1493*4882a593Smuzhiyun 	/*
1494*4882a593Smuzhiyun 	 * FIMC platform devices need to be registered before the sclk_cam
1495*4882a593Smuzhiyun 	 * clocks provider, as one of these devices needs to be activated
1496*4882a593Smuzhiyun 	 * to enable the clock.
1497*4882a593Smuzhiyun 	 */
1498*4882a593Smuzhiyun 	ret = fimc_md_register_clk_provider(fmd);
1499*4882a593Smuzhiyun 	if (ret < 0) {
1500*4882a593Smuzhiyun 		v4l2_err(v4l2_dev, "clock provider registration failed\n");
1501*4882a593Smuzhiyun 		goto err_attr;
1502*4882a593Smuzhiyun 	}
1503*4882a593Smuzhiyun 
1504*4882a593Smuzhiyun 	if (fmd->num_sensors > 0) {
1505*4882a593Smuzhiyun 		fmd->subdev_notifier.ops = &subdev_notifier_ops;
1506*4882a593Smuzhiyun 		fmd->num_sensors = 0;
1507*4882a593Smuzhiyun 
1508*4882a593Smuzhiyun 		ret = v4l2_async_notifier_register(&fmd->v4l2_dev,
1509*4882a593Smuzhiyun 						&fmd->subdev_notifier);
1510*4882a593Smuzhiyun 		if (ret)
1511*4882a593Smuzhiyun 			goto err_clk_p;
1512*4882a593Smuzhiyun 	}
1513*4882a593Smuzhiyun 
1514*4882a593Smuzhiyun 	return 0;
1515*4882a593Smuzhiyun 
1516*4882a593Smuzhiyun err_clk_p:
1517*4882a593Smuzhiyun 	fimc_md_unregister_clk_provider(fmd);
1518*4882a593Smuzhiyun err_attr:
1519*4882a593Smuzhiyun 	device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode);
1520*4882a593Smuzhiyun err_cleanup:
1521*4882a593Smuzhiyun 	v4l2_async_notifier_cleanup(&fmd->subdev_notifier);
1522*4882a593Smuzhiyun err_m_ent:
1523*4882a593Smuzhiyun 	fimc_md_unregister_entities(fmd);
1524*4882a593Smuzhiyun err_clk:
1525*4882a593Smuzhiyun 	fimc_md_put_clocks(fmd);
1526*4882a593Smuzhiyun err_v4l2dev:
1527*4882a593Smuzhiyun 	v4l2_device_unregister(&fmd->v4l2_dev);
1528*4882a593Smuzhiyun err_md:
1529*4882a593Smuzhiyun 	media_device_cleanup(&fmd->media_dev);
1530*4882a593Smuzhiyun 	return ret;
1531*4882a593Smuzhiyun }
1532*4882a593Smuzhiyun 
fimc_md_remove(struct platform_device * pdev)1533*4882a593Smuzhiyun static int fimc_md_remove(struct platform_device *pdev)
1534*4882a593Smuzhiyun {
1535*4882a593Smuzhiyun 	struct fimc_md *fmd = platform_get_drvdata(pdev);
1536*4882a593Smuzhiyun 
1537*4882a593Smuzhiyun 	if (!fmd)
1538*4882a593Smuzhiyun 		return 0;
1539*4882a593Smuzhiyun 
1540*4882a593Smuzhiyun 	fimc_md_unregister_clk_provider(fmd);
1541*4882a593Smuzhiyun 	v4l2_async_notifier_unregister(&fmd->subdev_notifier);
1542*4882a593Smuzhiyun 	v4l2_async_notifier_cleanup(&fmd->subdev_notifier);
1543*4882a593Smuzhiyun 
1544*4882a593Smuzhiyun 	v4l2_device_unregister(&fmd->v4l2_dev);
1545*4882a593Smuzhiyun 	device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode);
1546*4882a593Smuzhiyun 	fimc_md_unregister_entities(fmd);
1547*4882a593Smuzhiyun 	fimc_md_pipelines_free(fmd);
1548*4882a593Smuzhiyun 	media_device_unregister(&fmd->media_dev);
1549*4882a593Smuzhiyun 	media_device_cleanup(&fmd->media_dev);
1550*4882a593Smuzhiyun 	fimc_md_put_clocks(fmd);
1551*4882a593Smuzhiyun 
1552*4882a593Smuzhiyun 	return 0;
1553*4882a593Smuzhiyun }
1554*4882a593Smuzhiyun 
1555*4882a593Smuzhiyun static const struct platform_device_id fimc_driver_ids[] __always_unused = {
1556*4882a593Smuzhiyun 	{ .name = "s5p-fimc-md" },
1557*4882a593Smuzhiyun 	{ },
1558*4882a593Smuzhiyun };
1559*4882a593Smuzhiyun MODULE_DEVICE_TABLE(platform, fimc_driver_ids);
1560*4882a593Smuzhiyun 
1561*4882a593Smuzhiyun static const struct of_device_id fimc_md_of_match[] = {
1562*4882a593Smuzhiyun 	{ .compatible = "samsung,fimc" },
1563*4882a593Smuzhiyun 	{ },
1564*4882a593Smuzhiyun };
1565*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, fimc_md_of_match);
1566*4882a593Smuzhiyun 
1567*4882a593Smuzhiyun static struct platform_driver fimc_md_driver = {
1568*4882a593Smuzhiyun 	.probe		= fimc_md_probe,
1569*4882a593Smuzhiyun 	.remove		= fimc_md_remove,
1570*4882a593Smuzhiyun 	.driver = {
1571*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(fimc_md_of_match),
1572*4882a593Smuzhiyun 		.name		= "s5p-fimc-md",
1573*4882a593Smuzhiyun 	}
1574*4882a593Smuzhiyun };
1575*4882a593Smuzhiyun 
fimc_md_init(void)1576*4882a593Smuzhiyun static int __init fimc_md_init(void)
1577*4882a593Smuzhiyun {
1578*4882a593Smuzhiyun 	int ret;
1579*4882a593Smuzhiyun 
1580*4882a593Smuzhiyun 	request_module("s5p-csis");
1581*4882a593Smuzhiyun 	ret = fimc_register_driver();
1582*4882a593Smuzhiyun 	if (ret)
1583*4882a593Smuzhiyun 		return ret;
1584*4882a593Smuzhiyun 
1585*4882a593Smuzhiyun 	return platform_driver_register(&fimc_md_driver);
1586*4882a593Smuzhiyun }
1587*4882a593Smuzhiyun 
fimc_md_exit(void)1588*4882a593Smuzhiyun static void __exit fimc_md_exit(void)
1589*4882a593Smuzhiyun {
1590*4882a593Smuzhiyun 	platform_driver_unregister(&fimc_md_driver);
1591*4882a593Smuzhiyun 	fimc_unregister_driver();
1592*4882a593Smuzhiyun }
1593*4882a593Smuzhiyun 
1594*4882a593Smuzhiyun module_init(fimc_md_init);
1595*4882a593Smuzhiyun module_exit(fimc_md_exit);
1596*4882a593Smuzhiyun 
1597*4882a593Smuzhiyun MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>");
1598*4882a593Smuzhiyun MODULE_DESCRIPTION("S5P FIMC camera host interface/video postprocessor driver");
1599*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1600*4882a593Smuzhiyun MODULE_VERSION("2.0.1");
1601