1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Samsung EXYNOS4x12 FIMC-IS (Imaging Subsystem) driver 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2013 Samsung Electronics Co., Ltd. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Authors: Sylwester Nawrocki <s.nawrocki@samsung.com> 8*4882a593Smuzhiyun * Younghwan Joo <yhwan.joo@samsung.com> 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun #ifndef FIMC_ISP_H_ 11*4882a593Smuzhiyun #define FIMC_ISP_H_ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <linux/io.h> 14*4882a593Smuzhiyun #include <linux/platform_device.h> 15*4882a593Smuzhiyun #include <linux/sched.h> 16*4882a593Smuzhiyun #include <linux/spinlock.h> 17*4882a593Smuzhiyun #include <linux/types.h> 18*4882a593Smuzhiyun #include <linux/videodev2.h> 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #include <media/media-entity.h> 21*4882a593Smuzhiyun #include <media/videobuf2-v4l2.h> 22*4882a593Smuzhiyun #include <media/v4l2-device.h> 23*4882a593Smuzhiyun #include <media/v4l2-mediabus.h> 24*4882a593Smuzhiyun #include <media/drv-intf/exynos-fimc.h> 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun extern int fimc_isp_debug; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #define isp_dbg(level, dev, fmt, arg...) \ 29*4882a593Smuzhiyun v4l2_dbg(level, fimc_isp_debug, dev, fmt, ## arg) 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun /* FIXME: revisit these constraints */ 32*4882a593Smuzhiyun #define FIMC_ISP_SINK_WIDTH_MIN (16 + 8) 33*4882a593Smuzhiyun #define FIMC_ISP_SINK_HEIGHT_MIN (12 + 8) 34*4882a593Smuzhiyun #define FIMC_ISP_SOURCE_WIDTH_MIN 8 35*4882a593Smuzhiyun #define FIMC_ISP_SOURCE_HEIGHT_MIN 8 36*4882a593Smuzhiyun #define FIMC_ISP_CAC_MARGIN_WIDTH 16 37*4882a593Smuzhiyun #define FIMC_ISP_CAC_MARGIN_HEIGHT 12 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #define FIMC_ISP_SINK_WIDTH_MAX (4000 - 16) 40*4882a593Smuzhiyun #define FIMC_ISP_SINK_HEIGHT_MAX (4000 + 12) 41*4882a593Smuzhiyun #define FIMC_ISP_SOURCE_WIDTH_MAX 4000 42*4882a593Smuzhiyun #define FIMC_ISP_SOURCE_HEIGHT_MAX 4000 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #define FIMC_ISP_NUM_FORMATS 3 45*4882a593Smuzhiyun #define FIMC_ISP_REQ_BUFS_MIN 2 46*4882a593Smuzhiyun #define FIMC_ISP_REQ_BUFS_MAX 32 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun #define FIMC_ISP_SD_PAD_SINK 0 49*4882a593Smuzhiyun #define FIMC_ISP_SD_PAD_SRC_FIFO 1 50*4882a593Smuzhiyun #define FIMC_ISP_SD_PAD_SRC_DMA 2 51*4882a593Smuzhiyun #define FIMC_ISP_SD_PADS_NUM 3 52*4882a593Smuzhiyun #define FIMC_ISP_MAX_PLANES 1 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun /** 55*4882a593Smuzhiyun * struct fimc_isp_frame - source/target frame properties 56*4882a593Smuzhiyun * @width: full image width 57*4882a593Smuzhiyun * @height: full image height 58*4882a593Smuzhiyun * @rect: crop/composition rectangle 59*4882a593Smuzhiyun */ 60*4882a593Smuzhiyun struct fimc_isp_frame { 61*4882a593Smuzhiyun u16 width; 62*4882a593Smuzhiyun u16 height; 63*4882a593Smuzhiyun struct v4l2_rect rect; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun struct fimc_isp_ctrls { 67*4882a593Smuzhiyun struct v4l2_ctrl_handler handler; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun /* Auto white balance */ 70*4882a593Smuzhiyun struct v4l2_ctrl *auto_wb; 71*4882a593Smuzhiyun /* Auto ISO control cluster */ 72*4882a593Smuzhiyun struct { 73*4882a593Smuzhiyun struct v4l2_ctrl *auto_iso; 74*4882a593Smuzhiyun struct v4l2_ctrl *iso; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun /* Adjust - contrast */ 77*4882a593Smuzhiyun struct v4l2_ctrl *contrast; 78*4882a593Smuzhiyun /* Adjust - saturation */ 79*4882a593Smuzhiyun struct v4l2_ctrl *saturation; 80*4882a593Smuzhiyun /* Adjust - sharpness */ 81*4882a593Smuzhiyun struct v4l2_ctrl *sharpness; 82*4882a593Smuzhiyun /* Adjust - brightness */ 83*4882a593Smuzhiyun struct v4l2_ctrl *brightness; 84*4882a593Smuzhiyun /* Adjust - hue */ 85*4882a593Smuzhiyun struct v4l2_ctrl *hue; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun /* Auto/manual exposure */ 88*4882a593Smuzhiyun struct v4l2_ctrl *auto_exp; 89*4882a593Smuzhiyun /* Manual exposure value */ 90*4882a593Smuzhiyun struct v4l2_ctrl *exposure; 91*4882a593Smuzhiyun /* AE/AWB lock/unlock */ 92*4882a593Smuzhiyun struct v4l2_ctrl *aewb_lock; 93*4882a593Smuzhiyun /* Exposure metering mode */ 94*4882a593Smuzhiyun struct v4l2_ctrl *exp_metering; 95*4882a593Smuzhiyun /* AFC */ 96*4882a593Smuzhiyun struct v4l2_ctrl *afc; 97*4882a593Smuzhiyun /* ISP image effect */ 98*4882a593Smuzhiyun struct v4l2_ctrl *colorfx; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun struct isp_video_buf { 102*4882a593Smuzhiyun struct vb2_v4l2_buffer vb; 103*4882a593Smuzhiyun dma_addr_t dma_addr[FIMC_ISP_MAX_PLANES]; 104*4882a593Smuzhiyun unsigned int index; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun #define to_isp_video_buf(_b) container_of(_b, struct isp_video_buf, vb) 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun #define FIMC_ISP_MAX_BUFS 4 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun /** 112*4882a593Smuzhiyun * struct fimc_is_video - fimc-is video device structure 113*4882a593Smuzhiyun * @vdev: video_device structure 114*4882a593Smuzhiyun * @type: video device type (CAPTURE/OUTPUT) 115*4882a593Smuzhiyun * @pad: video device media (sink) pad 116*4882a593Smuzhiyun * @pending_buf_q: pending buffers queue head 117*4882a593Smuzhiyun * @active_buf_q: a queue head of buffers scheduled in hardware 118*4882a593Smuzhiyun * @vb_queue: vb2 buffer queue 119*4882a593Smuzhiyun * @active_buf_count: number of video buffers scheduled in hardware 120*4882a593Smuzhiyun * @frame_count: counter of frames dequeued to user space 121*4882a593Smuzhiyun * @reqbufs_count: number of buffers requested with REQBUFS ioctl 122*4882a593Smuzhiyun * @format: current pixel format 123*4882a593Smuzhiyun */ 124*4882a593Smuzhiyun struct fimc_is_video { 125*4882a593Smuzhiyun struct exynos_video_entity ve; 126*4882a593Smuzhiyun enum v4l2_buf_type type; 127*4882a593Smuzhiyun struct media_pad pad; 128*4882a593Smuzhiyun struct list_head pending_buf_q; 129*4882a593Smuzhiyun struct list_head active_buf_q; 130*4882a593Smuzhiyun struct vb2_queue vb_queue; 131*4882a593Smuzhiyun unsigned int reqbufs_count; 132*4882a593Smuzhiyun unsigned int buf_count; 133*4882a593Smuzhiyun unsigned int buf_mask; 134*4882a593Smuzhiyun unsigned int frame_count; 135*4882a593Smuzhiyun int streaming; 136*4882a593Smuzhiyun struct isp_video_buf *buffers[FIMC_ISP_MAX_BUFS]; 137*4882a593Smuzhiyun const struct fimc_fmt *format; 138*4882a593Smuzhiyun struct v4l2_pix_format_mplane pixfmt; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun /* struct fimc_isp:state bit definitions */ 142*4882a593Smuzhiyun #define ST_ISP_VID_CAP_BUF_PREP 0 143*4882a593Smuzhiyun #define ST_ISP_VID_CAP_STREAMING 1 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun /** 146*4882a593Smuzhiyun * struct fimc_isp - FIMC-IS ISP data structure 147*4882a593Smuzhiyun * @pdev: pointer to FIMC-IS platform device 148*4882a593Smuzhiyun * @subdev: ISP v4l2_subdev 149*4882a593Smuzhiyun * @subdev_pads: the ISP subdev media pads 150*4882a593Smuzhiyun * @test_pattern: test pattern controls 151*4882a593Smuzhiyun * @ctrls: v4l2 controls structure 152*4882a593Smuzhiyun * @video_lock: mutex serializing video device and the subdev operations 153*4882a593Smuzhiyun * @cac_margin_x: horizontal CAC margin in pixels 154*4882a593Smuzhiyun * @cac_margin_y: vertical CAC margin in pixels 155*4882a593Smuzhiyun * @state: driver state flags 156*4882a593Smuzhiyun * @video_capture: the ISP block video capture device 157*4882a593Smuzhiyun */ 158*4882a593Smuzhiyun struct fimc_isp { 159*4882a593Smuzhiyun struct platform_device *pdev; 160*4882a593Smuzhiyun struct v4l2_subdev subdev; 161*4882a593Smuzhiyun struct media_pad subdev_pads[FIMC_ISP_SD_PADS_NUM]; 162*4882a593Smuzhiyun struct v4l2_mbus_framefmt src_fmt; 163*4882a593Smuzhiyun struct v4l2_mbus_framefmt sink_fmt; 164*4882a593Smuzhiyun struct v4l2_ctrl *test_pattern; 165*4882a593Smuzhiyun struct fimc_isp_ctrls ctrls; 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun struct mutex video_lock; 168*4882a593Smuzhiyun struct mutex subdev_lock; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun unsigned int cac_margin_x; 171*4882a593Smuzhiyun unsigned int cac_margin_y; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun unsigned long state; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun struct fimc_is_video video_capture; 176*4882a593Smuzhiyun }; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun #define ctrl_to_fimc_isp(_ctrl) \ 179*4882a593Smuzhiyun container_of(ctrl->handler, struct fimc_isp, ctrls.handler) 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun struct fimc_is; 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun int fimc_isp_subdev_create(struct fimc_isp *isp); 184*4882a593Smuzhiyun void fimc_isp_subdev_destroy(struct fimc_isp *isp); 185*4882a593Smuzhiyun void fimc_isp_irq_handler(struct fimc_is *is); 186*4882a593Smuzhiyun int fimc_is_create_controls(struct fimc_isp *isp); 187*4882a593Smuzhiyun int fimc_is_delete_controls(struct fimc_isp *isp); 188*4882a593Smuzhiyun const struct fimc_fmt *fimc_isp_find_format(const u32 *pixelformat, 189*4882a593Smuzhiyun const u32 *mbus_code, int index); 190*4882a593Smuzhiyun #endif /* FIMC_ISP_H_ */ 191