xref: /OK3568_Linux_fs/kernel/drivers/media/platform/exynos4-is/fimc-capture.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Samsung S5P/EXYNOS4 SoC series camera interface (camera capture) driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.
6*4882a593Smuzhiyun  * Sylwester Nawrocki <s.nawrocki@samsung.com>
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/types.h>
12*4882a593Smuzhiyun #include <linux/errno.h>
13*4882a593Smuzhiyun #include <linux/bug.h>
14*4882a593Smuzhiyun #include <linux/interrupt.h>
15*4882a593Smuzhiyun #include <linux/device.h>
16*4882a593Smuzhiyun #include <linux/pm_runtime.h>
17*4882a593Smuzhiyun #include <linux/list.h>
18*4882a593Smuzhiyun #include <linux/slab.h>
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include <linux/videodev2.h>
21*4882a593Smuzhiyun #include <media/v4l2-device.h>
22*4882a593Smuzhiyun #include <media/v4l2-ioctl.h>
23*4882a593Smuzhiyun #include <media/v4l2-mem2mem.h>
24*4882a593Smuzhiyun #include <media/v4l2-rect.h>
25*4882a593Smuzhiyun #include <media/videobuf2-v4l2.h>
26*4882a593Smuzhiyun #include <media/videobuf2-dma-contig.h>
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #include "common.h"
29*4882a593Smuzhiyun #include "fimc-core.h"
30*4882a593Smuzhiyun #include "fimc-reg.h"
31*4882a593Smuzhiyun #include "media-dev.h"
32*4882a593Smuzhiyun 
fimc_capture_hw_init(struct fimc_dev * fimc)33*4882a593Smuzhiyun static int fimc_capture_hw_init(struct fimc_dev *fimc)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun 	struct fimc_source_info *si = &fimc->vid_cap.source_config;
36*4882a593Smuzhiyun 	struct fimc_ctx *ctx = fimc->vid_cap.ctx;
37*4882a593Smuzhiyun 	int ret;
38*4882a593Smuzhiyun 	unsigned long flags;
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 	if (ctx == NULL || ctx->s_frame.fmt == NULL)
41*4882a593Smuzhiyun 		return -EINVAL;
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun 	if (si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) {
44*4882a593Smuzhiyun 		ret = fimc_hw_camblk_cfg_writeback(fimc);
45*4882a593Smuzhiyun 		if (ret < 0)
46*4882a593Smuzhiyun 			return ret;
47*4882a593Smuzhiyun 	}
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	spin_lock_irqsave(&fimc->slock, flags);
50*4882a593Smuzhiyun 	fimc_prepare_dma_offset(ctx, &ctx->d_frame);
51*4882a593Smuzhiyun 	fimc_set_yuv_order(ctx);
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun 	fimc_hw_set_camera_polarity(fimc, si);
54*4882a593Smuzhiyun 	fimc_hw_set_camera_type(fimc, si);
55*4882a593Smuzhiyun 	fimc_hw_set_camera_source(fimc, si);
56*4882a593Smuzhiyun 	fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 	ret = fimc_set_scaler_info(ctx);
59*4882a593Smuzhiyun 	if (!ret) {
60*4882a593Smuzhiyun 		fimc_hw_set_input_path(ctx);
61*4882a593Smuzhiyun 		fimc_hw_set_prescaler(ctx);
62*4882a593Smuzhiyun 		fimc_hw_set_mainscaler(ctx);
63*4882a593Smuzhiyun 		fimc_hw_set_target_format(ctx);
64*4882a593Smuzhiyun 		fimc_hw_set_rotation(ctx);
65*4882a593Smuzhiyun 		fimc_hw_set_effect(ctx);
66*4882a593Smuzhiyun 		fimc_hw_set_output_path(ctx);
67*4882a593Smuzhiyun 		fimc_hw_set_out_dma(ctx);
68*4882a593Smuzhiyun 		if (fimc->drv_data->alpha_color)
69*4882a593Smuzhiyun 			fimc_hw_set_rgb_alpha(ctx);
70*4882a593Smuzhiyun 		clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
71*4882a593Smuzhiyun 	}
72*4882a593Smuzhiyun 	spin_unlock_irqrestore(&fimc->slock, flags);
73*4882a593Smuzhiyun 	return ret;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun /*
77*4882a593Smuzhiyun  * Reinitialize the driver so it is ready to start the streaming again.
78*4882a593Smuzhiyun  * Set fimc->state to indicate stream off and the hardware shut down state.
79*4882a593Smuzhiyun  * If not suspending (@suspend is false), return any buffers to videobuf2.
80*4882a593Smuzhiyun  * Otherwise put any owned buffers onto the pending buffers queue, so they
81*4882a593Smuzhiyun  * can be re-spun when the device is being resumed. Also perform FIMC
82*4882a593Smuzhiyun  * software reset and disable streaming on the whole pipeline if required.
83*4882a593Smuzhiyun  */
fimc_capture_state_cleanup(struct fimc_dev * fimc,bool suspend)84*4882a593Smuzhiyun static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun 	struct fimc_vid_cap *cap = &fimc->vid_cap;
87*4882a593Smuzhiyun 	struct fimc_vid_buffer *buf;
88*4882a593Smuzhiyun 	unsigned long flags;
89*4882a593Smuzhiyun 	bool streaming;
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun 	spin_lock_irqsave(&fimc->slock, flags);
92*4882a593Smuzhiyun 	streaming = fimc->state & (1 << ST_CAPT_ISP_STREAM);
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	fimc->state &= ~(1 << ST_CAPT_RUN | 1 << ST_CAPT_SHUT |
95*4882a593Smuzhiyun 			 1 << ST_CAPT_STREAM | 1 << ST_CAPT_ISP_STREAM);
96*4882a593Smuzhiyun 	if (suspend)
97*4882a593Smuzhiyun 		fimc->state |= (1 << ST_CAPT_SUSPENDED);
98*4882a593Smuzhiyun 	else
99*4882a593Smuzhiyun 		fimc->state &= ~(1 << ST_CAPT_PEND | 1 << ST_CAPT_SUSPENDED);
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	/* Release unused buffers */
102*4882a593Smuzhiyun 	while (!suspend && !list_empty(&cap->pending_buf_q)) {
103*4882a593Smuzhiyun 		buf = fimc_pending_queue_pop(cap);
104*4882a593Smuzhiyun 		vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
105*4882a593Smuzhiyun 	}
106*4882a593Smuzhiyun 	/* If suspending put unused buffers onto pending queue */
107*4882a593Smuzhiyun 	while (!list_empty(&cap->active_buf_q)) {
108*4882a593Smuzhiyun 		buf = fimc_active_queue_pop(cap);
109*4882a593Smuzhiyun 		if (suspend)
110*4882a593Smuzhiyun 			fimc_pending_queue_add(cap, buf);
111*4882a593Smuzhiyun 		else
112*4882a593Smuzhiyun 			vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
113*4882a593Smuzhiyun 	}
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	fimc_hw_reset(fimc);
116*4882a593Smuzhiyun 	cap->buf_index = 0;
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	spin_unlock_irqrestore(&fimc->slock, flags);
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	if (streaming)
121*4882a593Smuzhiyun 		return fimc_pipeline_call(&cap->ve, set_stream, 0);
122*4882a593Smuzhiyun 	else
123*4882a593Smuzhiyun 		return 0;
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun 
fimc_stop_capture(struct fimc_dev * fimc,bool suspend)126*4882a593Smuzhiyun static int fimc_stop_capture(struct fimc_dev *fimc, bool suspend)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun 	unsigned long flags;
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	if (!fimc_capture_active(fimc))
131*4882a593Smuzhiyun 		return 0;
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	spin_lock_irqsave(&fimc->slock, flags);
134*4882a593Smuzhiyun 	set_bit(ST_CAPT_SHUT, &fimc->state);
135*4882a593Smuzhiyun 	fimc_deactivate_capture(fimc);
136*4882a593Smuzhiyun 	spin_unlock_irqrestore(&fimc->slock, flags);
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	wait_event_timeout(fimc->irq_queue,
139*4882a593Smuzhiyun 			   !test_bit(ST_CAPT_SHUT, &fimc->state),
140*4882a593Smuzhiyun 			   (2*HZ/10)); /* 200 ms */
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	return fimc_capture_state_cleanup(fimc, suspend);
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun /**
146*4882a593Smuzhiyun  * fimc_capture_config_update - apply the camera interface configuration
147*4882a593Smuzhiyun  * @ctx: FIMC capture context
148*4882a593Smuzhiyun  *
149*4882a593Smuzhiyun  * To be called from within the interrupt handler with fimc.slock
150*4882a593Smuzhiyun  * spinlock held. It updates the camera pixel crop, rotation and
151*4882a593Smuzhiyun  * image flip in H/W.
152*4882a593Smuzhiyun  */
fimc_capture_config_update(struct fimc_ctx * ctx)153*4882a593Smuzhiyun static int fimc_capture_config_update(struct fimc_ctx *ctx)
154*4882a593Smuzhiyun {
155*4882a593Smuzhiyun 	struct fimc_dev *fimc = ctx->fimc_dev;
156*4882a593Smuzhiyun 	int ret;
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	ret = fimc_set_scaler_info(ctx);
161*4882a593Smuzhiyun 	if (ret)
162*4882a593Smuzhiyun 		return ret;
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun 	fimc_hw_set_prescaler(ctx);
165*4882a593Smuzhiyun 	fimc_hw_set_mainscaler(ctx);
166*4882a593Smuzhiyun 	fimc_hw_set_target_format(ctx);
167*4882a593Smuzhiyun 	fimc_hw_set_rotation(ctx);
168*4882a593Smuzhiyun 	fimc_hw_set_effect(ctx);
169*4882a593Smuzhiyun 	fimc_prepare_dma_offset(ctx, &ctx->d_frame);
170*4882a593Smuzhiyun 	fimc_hw_set_out_dma(ctx);
171*4882a593Smuzhiyun 	if (fimc->drv_data->alpha_color)
172*4882a593Smuzhiyun 		fimc_hw_set_rgb_alpha(ctx);
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
175*4882a593Smuzhiyun 	return ret;
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun 
fimc_capture_irq_handler(struct fimc_dev * fimc,int deq_buf)178*4882a593Smuzhiyun void fimc_capture_irq_handler(struct fimc_dev *fimc, int deq_buf)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun 	struct fimc_vid_cap *cap = &fimc->vid_cap;
181*4882a593Smuzhiyun 	struct fimc_pipeline *p = to_fimc_pipeline(cap->ve.pipe);
182*4882a593Smuzhiyun 	struct v4l2_subdev *csis = p->subdevs[IDX_CSIS];
183*4882a593Smuzhiyun 	struct fimc_frame *f = &cap->ctx->d_frame;
184*4882a593Smuzhiyun 	struct fimc_vid_buffer *v_buf;
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	if (test_and_clear_bit(ST_CAPT_SHUT, &fimc->state)) {
187*4882a593Smuzhiyun 		wake_up(&fimc->irq_queue);
188*4882a593Smuzhiyun 		goto done;
189*4882a593Smuzhiyun 	}
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	if (!list_empty(&cap->active_buf_q) &&
192*4882a593Smuzhiyun 	    test_bit(ST_CAPT_RUN, &fimc->state) && deq_buf) {
193*4882a593Smuzhiyun 		v_buf = fimc_active_queue_pop(cap);
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 		v_buf->vb.vb2_buf.timestamp = ktime_get_ns();
196*4882a593Smuzhiyun 		v_buf->vb.sequence = cap->frame_count++;
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 		vb2_buffer_done(&v_buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
199*4882a593Smuzhiyun 	}
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	if (!list_empty(&cap->pending_buf_q)) {
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 		v_buf = fimc_pending_queue_pop(cap);
204*4882a593Smuzhiyun 		fimc_hw_set_output_addr(fimc, &v_buf->paddr, cap->buf_index);
205*4882a593Smuzhiyun 		v_buf->index = cap->buf_index;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 		/* Move the buffer to the capture active queue */
208*4882a593Smuzhiyun 		fimc_active_queue_add(cap, v_buf);
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 		dbg("next frame: %d, done frame: %d",
211*4882a593Smuzhiyun 		    fimc_hw_get_frame_index(fimc), v_buf->index);
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 		if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
214*4882a593Smuzhiyun 			cap->buf_index = 0;
215*4882a593Smuzhiyun 	}
216*4882a593Smuzhiyun 	/*
217*4882a593Smuzhiyun 	 * Set up a buffer at MIPI-CSIS if current image format
218*4882a593Smuzhiyun 	 * requires the frame embedded data capture.
219*4882a593Smuzhiyun 	 */
220*4882a593Smuzhiyun 	if (f->fmt->mdataplanes && !list_empty(&cap->active_buf_q)) {
221*4882a593Smuzhiyun 		unsigned int plane = ffs(f->fmt->mdataplanes) - 1;
222*4882a593Smuzhiyun 		unsigned int size = f->payload[plane];
223*4882a593Smuzhiyun 		s32 index = fimc_hw_get_frame_index(fimc);
224*4882a593Smuzhiyun 		void *vaddr;
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 		list_for_each_entry(v_buf, &cap->active_buf_q, list) {
227*4882a593Smuzhiyun 			if (v_buf->index != index)
228*4882a593Smuzhiyun 				continue;
229*4882a593Smuzhiyun 			vaddr = vb2_plane_vaddr(&v_buf->vb.vb2_buf, plane);
230*4882a593Smuzhiyun 			v4l2_subdev_call(csis, video, s_rx_buffer,
231*4882a593Smuzhiyun 					 vaddr, &size);
232*4882a593Smuzhiyun 			break;
233*4882a593Smuzhiyun 		}
234*4882a593Smuzhiyun 	}
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	if (cap->active_buf_cnt == 0) {
237*4882a593Smuzhiyun 		if (deq_buf)
238*4882a593Smuzhiyun 			clear_bit(ST_CAPT_RUN, &fimc->state);
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun 		if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
241*4882a593Smuzhiyun 			cap->buf_index = 0;
242*4882a593Smuzhiyun 	} else {
243*4882a593Smuzhiyun 		set_bit(ST_CAPT_RUN, &fimc->state);
244*4882a593Smuzhiyun 	}
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state))
247*4882a593Smuzhiyun 		fimc_capture_config_update(cap->ctx);
248*4882a593Smuzhiyun done:
249*4882a593Smuzhiyun 	if (cap->active_buf_cnt == 1) {
250*4882a593Smuzhiyun 		fimc_deactivate_capture(fimc);
251*4882a593Smuzhiyun 		clear_bit(ST_CAPT_STREAM, &fimc->state);
252*4882a593Smuzhiyun 	}
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	dbg("frame: %d, active_buf_cnt: %d",
255*4882a593Smuzhiyun 	    fimc_hw_get_frame_index(fimc), cap->active_buf_cnt);
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 
start_streaming(struct vb2_queue * q,unsigned int count)259*4882a593Smuzhiyun static int start_streaming(struct vb2_queue *q, unsigned int count)
260*4882a593Smuzhiyun {
261*4882a593Smuzhiyun 	struct fimc_ctx *ctx = q->drv_priv;
262*4882a593Smuzhiyun 	struct fimc_dev *fimc = ctx->fimc_dev;
263*4882a593Smuzhiyun 	struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
264*4882a593Smuzhiyun 	int min_bufs;
265*4882a593Smuzhiyun 	int ret;
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	vid_cap->frame_count = 0;
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	ret = fimc_capture_hw_init(fimc);
270*4882a593Smuzhiyun 	if (ret) {
271*4882a593Smuzhiyun 		fimc_capture_state_cleanup(fimc, false);
272*4882a593Smuzhiyun 		return ret;
273*4882a593Smuzhiyun 	}
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	set_bit(ST_CAPT_PEND, &fimc->state);
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	min_bufs = fimc->vid_cap.reqbufs_count > 1 ? 2 : 1;
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun 	if (vid_cap->active_buf_cnt >= min_bufs &&
280*4882a593Smuzhiyun 	    !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
281*4882a593Smuzhiyun 		fimc_activate_capture(ctx);
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 		if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
284*4882a593Smuzhiyun 			return fimc_pipeline_call(&vid_cap->ve, set_stream, 1);
285*4882a593Smuzhiyun 	}
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	return 0;
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun 
stop_streaming(struct vb2_queue * q)290*4882a593Smuzhiyun static void stop_streaming(struct vb2_queue *q)
291*4882a593Smuzhiyun {
292*4882a593Smuzhiyun 	struct fimc_ctx *ctx = q->drv_priv;
293*4882a593Smuzhiyun 	struct fimc_dev *fimc = ctx->fimc_dev;
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	if (!fimc_capture_active(fimc))
296*4882a593Smuzhiyun 		return;
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	fimc_stop_capture(fimc, false);
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun 
fimc_capture_suspend(struct fimc_dev * fimc)301*4882a593Smuzhiyun int fimc_capture_suspend(struct fimc_dev *fimc)
302*4882a593Smuzhiyun {
303*4882a593Smuzhiyun 	bool suspend = fimc_capture_busy(fimc);
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	int ret = fimc_stop_capture(fimc, suspend);
306*4882a593Smuzhiyun 	if (ret)
307*4882a593Smuzhiyun 		return ret;
308*4882a593Smuzhiyun 	return fimc_pipeline_call(&fimc->vid_cap.ve, close);
309*4882a593Smuzhiyun }
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun static void buffer_queue(struct vb2_buffer *vb);
312*4882a593Smuzhiyun 
fimc_capture_resume(struct fimc_dev * fimc)313*4882a593Smuzhiyun int fimc_capture_resume(struct fimc_dev *fimc)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun 	struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
316*4882a593Smuzhiyun 	struct exynos_video_entity *ve = &vid_cap->ve;
317*4882a593Smuzhiyun 	struct fimc_vid_buffer *buf;
318*4882a593Smuzhiyun 	int i;
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 	if (!test_and_clear_bit(ST_CAPT_SUSPENDED, &fimc->state))
321*4882a593Smuzhiyun 		return 0;
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	INIT_LIST_HEAD(&fimc->vid_cap.active_buf_q);
324*4882a593Smuzhiyun 	vid_cap->buf_index = 0;
325*4882a593Smuzhiyun 	fimc_pipeline_call(ve, open, &ve->vdev.entity, false);
326*4882a593Smuzhiyun 	fimc_capture_hw_init(fimc);
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 	for (i = 0; i < vid_cap->reqbufs_count; i++) {
331*4882a593Smuzhiyun 		if (list_empty(&vid_cap->pending_buf_q))
332*4882a593Smuzhiyun 			break;
333*4882a593Smuzhiyun 		buf = fimc_pending_queue_pop(vid_cap);
334*4882a593Smuzhiyun 		buffer_queue(&buf->vb.vb2_buf);
335*4882a593Smuzhiyun 	}
336*4882a593Smuzhiyun 	return 0;
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun 
queue_setup(struct vb2_queue * vq,unsigned int * num_buffers,unsigned int * num_planes,unsigned int sizes[],struct device * alloc_devs[])340*4882a593Smuzhiyun static int queue_setup(struct vb2_queue *vq,
341*4882a593Smuzhiyun 		       unsigned int *num_buffers, unsigned int *num_planes,
342*4882a593Smuzhiyun 		       unsigned int sizes[], struct device *alloc_devs[])
343*4882a593Smuzhiyun {
344*4882a593Smuzhiyun 	struct fimc_ctx *ctx = vq->drv_priv;
345*4882a593Smuzhiyun 	struct fimc_frame *frame = &ctx->d_frame;
346*4882a593Smuzhiyun 	struct fimc_fmt *fmt = frame->fmt;
347*4882a593Smuzhiyun 	unsigned long wh = frame->f_width * frame->f_height;
348*4882a593Smuzhiyun 	int i;
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun 	if (fmt == NULL)
351*4882a593Smuzhiyun 		return -EINVAL;
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun 	if (*num_planes) {
354*4882a593Smuzhiyun 		if (*num_planes != fmt->memplanes)
355*4882a593Smuzhiyun 			return -EINVAL;
356*4882a593Smuzhiyun 		for (i = 0; i < *num_planes; i++)
357*4882a593Smuzhiyun 			if (sizes[i] < (wh * fmt->depth[i]) / 8)
358*4882a593Smuzhiyun 				return -EINVAL;
359*4882a593Smuzhiyun 		return 0;
360*4882a593Smuzhiyun 	}
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun 	*num_planes = fmt->memplanes;
363*4882a593Smuzhiyun 
364*4882a593Smuzhiyun 	for (i = 0; i < fmt->memplanes; i++) {
365*4882a593Smuzhiyun 		unsigned int size = (wh * fmt->depth[i]) / 8;
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 		if (fimc_fmt_is_user_defined(fmt->color))
368*4882a593Smuzhiyun 			sizes[i] = frame->payload[i];
369*4882a593Smuzhiyun 		else
370*4882a593Smuzhiyun 			sizes[i] = max_t(u32, size, frame->payload[i]);
371*4882a593Smuzhiyun 	}
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun 	return 0;
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun 
buffer_prepare(struct vb2_buffer * vb)376*4882a593Smuzhiyun static int buffer_prepare(struct vb2_buffer *vb)
377*4882a593Smuzhiyun {
378*4882a593Smuzhiyun 	struct vb2_queue *vq = vb->vb2_queue;
379*4882a593Smuzhiyun 	struct fimc_ctx *ctx = vq->drv_priv;
380*4882a593Smuzhiyun 	int i;
381*4882a593Smuzhiyun 
382*4882a593Smuzhiyun 	if (ctx->d_frame.fmt == NULL)
383*4882a593Smuzhiyun 		return -EINVAL;
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun 	for (i = 0; i < ctx->d_frame.fmt->memplanes; i++) {
386*4882a593Smuzhiyun 		unsigned long size = ctx->d_frame.payload[i];
387*4882a593Smuzhiyun 
388*4882a593Smuzhiyun 		if (vb2_plane_size(vb, i) < size) {
389*4882a593Smuzhiyun 			v4l2_err(&ctx->fimc_dev->vid_cap.ve.vdev,
390*4882a593Smuzhiyun 				 "User buffer too small (%ld < %ld)\n",
391*4882a593Smuzhiyun 				 vb2_plane_size(vb, i), size);
392*4882a593Smuzhiyun 			return -EINVAL;
393*4882a593Smuzhiyun 		}
394*4882a593Smuzhiyun 		vb2_set_plane_payload(vb, i, size);
395*4882a593Smuzhiyun 	}
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 	return 0;
398*4882a593Smuzhiyun }
399*4882a593Smuzhiyun 
buffer_queue(struct vb2_buffer * vb)400*4882a593Smuzhiyun static void buffer_queue(struct vb2_buffer *vb)
401*4882a593Smuzhiyun {
402*4882a593Smuzhiyun 	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
403*4882a593Smuzhiyun 	struct fimc_vid_buffer *buf
404*4882a593Smuzhiyun 		= container_of(vbuf, struct fimc_vid_buffer, vb);
405*4882a593Smuzhiyun 	struct fimc_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
406*4882a593Smuzhiyun 	struct fimc_dev *fimc = ctx->fimc_dev;
407*4882a593Smuzhiyun 	struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
408*4882a593Smuzhiyun 	struct exynos_video_entity *ve = &vid_cap->ve;
409*4882a593Smuzhiyun 	unsigned long flags;
410*4882a593Smuzhiyun 	int min_bufs;
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun 	spin_lock_irqsave(&fimc->slock, flags);
413*4882a593Smuzhiyun 	fimc_prepare_addr(ctx, &buf->vb.vb2_buf, &ctx->d_frame, &buf->paddr);
414*4882a593Smuzhiyun 
415*4882a593Smuzhiyun 	if (!test_bit(ST_CAPT_SUSPENDED, &fimc->state) &&
416*4882a593Smuzhiyun 	    !test_bit(ST_CAPT_STREAM, &fimc->state) &&
417*4882a593Smuzhiyun 	    vid_cap->active_buf_cnt < FIMC_MAX_OUT_BUFS) {
418*4882a593Smuzhiyun 		/* Setup the buffer directly for processing. */
419*4882a593Smuzhiyun 		int buf_id = (vid_cap->reqbufs_count == 1) ? -1 :
420*4882a593Smuzhiyun 				vid_cap->buf_index;
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun 		fimc_hw_set_output_addr(fimc, &buf->paddr, buf_id);
423*4882a593Smuzhiyun 		buf->index = vid_cap->buf_index;
424*4882a593Smuzhiyun 		fimc_active_queue_add(vid_cap, buf);
425*4882a593Smuzhiyun 
426*4882a593Smuzhiyun 		if (++vid_cap->buf_index >= FIMC_MAX_OUT_BUFS)
427*4882a593Smuzhiyun 			vid_cap->buf_index = 0;
428*4882a593Smuzhiyun 	} else {
429*4882a593Smuzhiyun 		fimc_pending_queue_add(vid_cap, buf);
430*4882a593Smuzhiyun 	}
431*4882a593Smuzhiyun 
432*4882a593Smuzhiyun 	min_bufs = vid_cap->reqbufs_count > 1 ? 2 : 1;
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun 	if (vb2_is_streaming(&vid_cap->vbq) &&
436*4882a593Smuzhiyun 	    vid_cap->active_buf_cnt >= min_bufs &&
437*4882a593Smuzhiyun 	    !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
438*4882a593Smuzhiyun 		int ret;
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun 		fimc_activate_capture(ctx);
441*4882a593Smuzhiyun 		spin_unlock_irqrestore(&fimc->slock, flags);
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun 		if (test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
444*4882a593Smuzhiyun 			return;
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun 		ret = fimc_pipeline_call(ve, set_stream, 1);
447*4882a593Smuzhiyun 		if (ret < 0)
448*4882a593Smuzhiyun 			v4l2_err(&ve->vdev, "stream on failed: %d\n", ret);
449*4882a593Smuzhiyun 		return;
450*4882a593Smuzhiyun 	}
451*4882a593Smuzhiyun 	spin_unlock_irqrestore(&fimc->slock, flags);
452*4882a593Smuzhiyun }
453*4882a593Smuzhiyun 
454*4882a593Smuzhiyun static const struct vb2_ops fimc_capture_qops = {
455*4882a593Smuzhiyun 	.queue_setup		= queue_setup,
456*4882a593Smuzhiyun 	.buf_prepare		= buffer_prepare,
457*4882a593Smuzhiyun 	.buf_queue		= buffer_queue,
458*4882a593Smuzhiyun 	.wait_prepare		= vb2_ops_wait_prepare,
459*4882a593Smuzhiyun 	.wait_finish		= vb2_ops_wait_finish,
460*4882a593Smuzhiyun 	.start_streaming	= start_streaming,
461*4882a593Smuzhiyun 	.stop_streaming		= stop_streaming,
462*4882a593Smuzhiyun };
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun static int fimc_capture_set_default_format(struct fimc_dev *fimc);
465*4882a593Smuzhiyun 
fimc_capture_open(struct file * file)466*4882a593Smuzhiyun static int fimc_capture_open(struct file *file)
467*4882a593Smuzhiyun {
468*4882a593Smuzhiyun 	struct fimc_dev *fimc = video_drvdata(file);
469*4882a593Smuzhiyun 	struct fimc_vid_cap *vc = &fimc->vid_cap;
470*4882a593Smuzhiyun 	struct exynos_video_entity *ve = &vc->ve;
471*4882a593Smuzhiyun 	int ret = -EBUSY;
472*4882a593Smuzhiyun 
473*4882a593Smuzhiyun 	dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
474*4882a593Smuzhiyun 
475*4882a593Smuzhiyun 	mutex_lock(&fimc->lock);
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun 	if (fimc_m2m_active(fimc))
478*4882a593Smuzhiyun 		goto unlock;
479*4882a593Smuzhiyun 
480*4882a593Smuzhiyun 	set_bit(ST_CAPT_BUSY, &fimc->state);
481*4882a593Smuzhiyun 	ret = pm_runtime_resume_and_get(&fimc->pdev->dev);
482*4882a593Smuzhiyun 	if (ret < 0)
483*4882a593Smuzhiyun 		goto unlock;
484*4882a593Smuzhiyun 
485*4882a593Smuzhiyun 	ret = v4l2_fh_open(file);
486*4882a593Smuzhiyun 	if (ret) {
487*4882a593Smuzhiyun 		pm_runtime_put_sync(&fimc->pdev->dev);
488*4882a593Smuzhiyun 		goto unlock;
489*4882a593Smuzhiyun 	}
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun 	if (v4l2_fh_is_singular_file(file)) {
492*4882a593Smuzhiyun 		fimc_md_graph_lock(ve);
493*4882a593Smuzhiyun 
494*4882a593Smuzhiyun 		ret = fimc_pipeline_call(ve, open, &ve->vdev.entity, true);
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun 		if (ret == 0)
497*4882a593Smuzhiyun 			ve->vdev.entity.use_count++;
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun 		fimc_md_graph_unlock(ve);
500*4882a593Smuzhiyun 
501*4882a593Smuzhiyun 		if (ret == 0)
502*4882a593Smuzhiyun 			ret = fimc_capture_set_default_format(fimc);
503*4882a593Smuzhiyun 
504*4882a593Smuzhiyun 		if (ret < 0) {
505*4882a593Smuzhiyun 			clear_bit(ST_CAPT_BUSY, &fimc->state);
506*4882a593Smuzhiyun 			pm_runtime_put_sync(&fimc->pdev->dev);
507*4882a593Smuzhiyun 			v4l2_fh_release(file);
508*4882a593Smuzhiyun 		}
509*4882a593Smuzhiyun 	}
510*4882a593Smuzhiyun unlock:
511*4882a593Smuzhiyun 	mutex_unlock(&fimc->lock);
512*4882a593Smuzhiyun 	return ret;
513*4882a593Smuzhiyun }
514*4882a593Smuzhiyun 
fimc_capture_release(struct file * file)515*4882a593Smuzhiyun static int fimc_capture_release(struct file *file)
516*4882a593Smuzhiyun {
517*4882a593Smuzhiyun 	struct fimc_dev *fimc = video_drvdata(file);
518*4882a593Smuzhiyun 	struct fimc_vid_cap *vc = &fimc->vid_cap;
519*4882a593Smuzhiyun 	bool close = v4l2_fh_is_singular_file(file);
520*4882a593Smuzhiyun 	int ret;
521*4882a593Smuzhiyun 
522*4882a593Smuzhiyun 	dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun 	mutex_lock(&fimc->lock);
525*4882a593Smuzhiyun 
526*4882a593Smuzhiyun 	if (close && vc->streaming) {
527*4882a593Smuzhiyun 		media_pipeline_stop(&vc->ve.vdev.entity);
528*4882a593Smuzhiyun 		vc->streaming = false;
529*4882a593Smuzhiyun 	}
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun 	ret = _vb2_fop_release(file, NULL);
532*4882a593Smuzhiyun 
533*4882a593Smuzhiyun 	if (close) {
534*4882a593Smuzhiyun 		clear_bit(ST_CAPT_BUSY, &fimc->state);
535*4882a593Smuzhiyun 		fimc_pipeline_call(&vc->ve, close);
536*4882a593Smuzhiyun 		clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
537*4882a593Smuzhiyun 
538*4882a593Smuzhiyun 		fimc_md_graph_lock(&vc->ve);
539*4882a593Smuzhiyun 		vc->ve.vdev.entity.use_count--;
540*4882a593Smuzhiyun 		fimc_md_graph_unlock(&vc->ve);
541*4882a593Smuzhiyun 	}
542*4882a593Smuzhiyun 
543*4882a593Smuzhiyun 	pm_runtime_put_sync(&fimc->pdev->dev);
544*4882a593Smuzhiyun 	mutex_unlock(&fimc->lock);
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun 	return ret;
547*4882a593Smuzhiyun }
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun static const struct v4l2_file_operations fimc_capture_fops = {
550*4882a593Smuzhiyun 	.owner		= THIS_MODULE,
551*4882a593Smuzhiyun 	.open		= fimc_capture_open,
552*4882a593Smuzhiyun 	.release	= fimc_capture_release,
553*4882a593Smuzhiyun 	.poll		= vb2_fop_poll,
554*4882a593Smuzhiyun 	.unlocked_ioctl	= video_ioctl2,
555*4882a593Smuzhiyun 	.mmap		= vb2_fop_mmap,
556*4882a593Smuzhiyun };
557*4882a593Smuzhiyun 
558*4882a593Smuzhiyun /*
559*4882a593Smuzhiyun  * Format and crop negotiation helpers
560*4882a593Smuzhiyun  */
561*4882a593Smuzhiyun 
fimc_capture_try_format(struct fimc_ctx * ctx,u32 * width,u32 * height,u32 * code,u32 * fourcc,int pad)562*4882a593Smuzhiyun static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,
563*4882a593Smuzhiyun 						u32 *width, u32 *height,
564*4882a593Smuzhiyun 						u32 *code, u32 *fourcc, int pad)
565*4882a593Smuzhiyun {
566*4882a593Smuzhiyun 	bool rotation = ctx->rotation == 90 || ctx->rotation == 270;
567*4882a593Smuzhiyun 	struct fimc_dev *fimc = ctx->fimc_dev;
568*4882a593Smuzhiyun 	const struct fimc_variant *var = fimc->variant;
569*4882a593Smuzhiyun 	const struct fimc_pix_limit *pl = var->pix_limit;
570*4882a593Smuzhiyun 	struct fimc_frame *dst = &ctx->d_frame;
571*4882a593Smuzhiyun 	u32 depth, min_w, max_w, min_h, align_h = 3;
572*4882a593Smuzhiyun 	u32 mask = FMT_FLAGS_CAM;
573*4882a593Smuzhiyun 	struct fimc_fmt *ffmt;
574*4882a593Smuzhiyun 
575*4882a593Smuzhiyun 	/* Conversion from/to JPEG or User Defined format is not supported */
576*4882a593Smuzhiyun 	if (code && ctx->s_frame.fmt && pad == FIMC_SD_PAD_SOURCE &&
577*4882a593Smuzhiyun 	    fimc_fmt_is_user_defined(ctx->s_frame.fmt->color))
578*4882a593Smuzhiyun 		*code = ctx->s_frame.fmt->mbus_code;
579*4882a593Smuzhiyun 
580*4882a593Smuzhiyun 	if (fourcc && *fourcc != V4L2_PIX_FMT_JPEG && pad == FIMC_SD_PAD_SOURCE)
581*4882a593Smuzhiyun 		mask |= FMT_FLAGS_M2M;
582*4882a593Smuzhiyun 
583*4882a593Smuzhiyun 	if (pad == FIMC_SD_PAD_SINK_FIFO)
584*4882a593Smuzhiyun 		mask = FMT_FLAGS_WRITEBACK;
585*4882a593Smuzhiyun 
586*4882a593Smuzhiyun 	ffmt = fimc_find_format(fourcc, code, mask, 0);
587*4882a593Smuzhiyun 	if (WARN_ON(!ffmt))
588*4882a593Smuzhiyun 		return NULL;
589*4882a593Smuzhiyun 
590*4882a593Smuzhiyun 	if (code)
591*4882a593Smuzhiyun 		*code = ffmt->mbus_code;
592*4882a593Smuzhiyun 	if (fourcc)
593*4882a593Smuzhiyun 		*fourcc = ffmt->fourcc;
594*4882a593Smuzhiyun 
595*4882a593Smuzhiyun 	if (pad != FIMC_SD_PAD_SOURCE) {
596*4882a593Smuzhiyun 		max_w = fimc_fmt_is_user_defined(ffmt->color) ?
597*4882a593Smuzhiyun 			pl->scaler_dis_w : pl->scaler_en_w;
598*4882a593Smuzhiyun 		/* Apply the camera input interface pixel constraints */
599*4882a593Smuzhiyun 		v4l_bound_align_image(width, max_t(u32, *width, 32), max_w, 4,
600*4882a593Smuzhiyun 				      height, max_t(u32, *height, 32),
601*4882a593Smuzhiyun 				      FIMC_CAMIF_MAX_HEIGHT,
602*4882a593Smuzhiyun 				      fimc_fmt_is_user_defined(ffmt->color) ?
603*4882a593Smuzhiyun 				      3 : 1,
604*4882a593Smuzhiyun 				      0);
605*4882a593Smuzhiyun 		return ffmt;
606*4882a593Smuzhiyun 	}
607*4882a593Smuzhiyun 	/* Can't scale or crop in transparent (JPEG) transfer mode */
608*4882a593Smuzhiyun 	if (fimc_fmt_is_user_defined(ffmt->color)) {
609*4882a593Smuzhiyun 		*width  = ctx->s_frame.f_width;
610*4882a593Smuzhiyun 		*height = ctx->s_frame.f_height;
611*4882a593Smuzhiyun 		return ffmt;
612*4882a593Smuzhiyun 	}
613*4882a593Smuzhiyun 	/* Apply the scaler and the output DMA constraints */
614*4882a593Smuzhiyun 	max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w;
615*4882a593Smuzhiyun 	if (ctx->state & FIMC_COMPOSE) {
616*4882a593Smuzhiyun 		min_w = dst->offs_h + dst->width;
617*4882a593Smuzhiyun 		min_h = dst->offs_v + dst->height;
618*4882a593Smuzhiyun 	} else {
619*4882a593Smuzhiyun 		min_w = var->min_out_pixsize;
620*4882a593Smuzhiyun 		min_h = var->min_out_pixsize;
621*4882a593Smuzhiyun 	}
622*4882a593Smuzhiyun 	if (var->min_vsize_align == 1 && !rotation)
623*4882a593Smuzhiyun 		align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1;
624*4882a593Smuzhiyun 
625*4882a593Smuzhiyun 	depth = fimc_get_format_depth(ffmt);
626*4882a593Smuzhiyun 	v4l_bound_align_image(width, min_w, max_w,
627*4882a593Smuzhiyun 			      ffs(var->min_out_pixsize) - 1,
628*4882a593Smuzhiyun 			      height, min_h, FIMC_CAMIF_MAX_HEIGHT,
629*4882a593Smuzhiyun 			      align_h,
630*4882a593Smuzhiyun 			      64/(ALIGN(depth, 8)));
631*4882a593Smuzhiyun 
632*4882a593Smuzhiyun 	dbg("pad%d: code: 0x%x, %dx%d. dst fmt: %dx%d",
633*4882a593Smuzhiyun 	    pad, code ? *code : 0, *width, *height,
634*4882a593Smuzhiyun 	    dst->f_width, dst->f_height);
635*4882a593Smuzhiyun 
636*4882a593Smuzhiyun 	return ffmt;
637*4882a593Smuzhiyun }
638*4882a593Smuzhiyun 
fimc_capture_try_selection(struct fimc_ctx * ctx,struct v4l2_rect * r,int target)639*4882a593Smuzhiyun static void fimc_capture_try_selection(struct fimc_ctx *ctx,
640*4882a593Smuzhiyun 				       struct v4l2_rect *r,
641*4882a593Smuzhiyun 				       int target)
642*4882a593Smuzhiyun {
643*4882a593Smuzhiyun 	bool rotate = ctx->rotation == 90 || ctx->rotation == 270;
644*4882a593Smuzhiyun 	struct fimc_dev *fimc = ctx->fimc_dev;
645*4882a593Smuzhiyun 	const struct fimc_variant *var = fimc->variant;
646*4882a593Smuzhiyun 	const struct fimc_pix_limit *pl = var->pix_limit;
647*4882a593Smuzhiyun 	struct fimc_frame *sink = &ctx->s_frame;
648*4882a593Smuzhiyun 	u32 max_w, max_h, min_w = 0, min_h = 0, min_sz;
649*4882a593Smuzhiyun 	u32 align_sz = 0, align_h = 4;
650*4882a593Smuzhiyun 	u32 max_sc_h, max_sc_v;
651*4882a593Smuzhiyun 
652*4882a593Smuzhiyun 	/* In JPEG transparent transfer mode cropping is not supported */
653*4882a593Smuzhiyun 	if (fimc_fmt_is_user_defined(ctx->d_frame.fmt->color)) {
654*4882a593Smuzhiyun 		r->width  = sink->f_width;
655*4882a593Smuzhiyun 		r->height = sink->f_height;
656*4882a593Smuzhiyun 		r->left   = r->top = 0;
657*4882a593Smuzhiyun 		return;
658*4882a593Smuzhiyun 	}
659*4882a593Smuzhiyun 	if (target == V4L2_SEL_TGT_COMPOSE) {
660*4882a593Smuzhiyun 		u32 tmp_min_h = ffs(sink->width) - 3;
661*4882a593Smuzhiyun 		u32 tmp_min_v = ffs(sink->height) - 1;
662*4882a593Smuzhiyun 
663*4882a593Smuzhiyun 		if (ctx->rotation != 90 && ctx->rotation != 270)
664*4882a593Smuzhiyun 			align_h = 1;
665*4882a593Smuzhiyun 		max_sc_h = min(SCALER_MAX_HRATIO, 1 << tmp_min_h);
666*4882a593Smuzhiyun 		max_sc_v = min(SCALER_MAX_VRATIO, 1 << tmp_min_v);
667*4882a593Smuzhiyun 		min_sz = var->min_out_pixsize;
668*4882a593Smuzhiyun 	} else {
669*4882a593Smuzhiyun 		u32 depth = fimc_get_format_depth(sink->fmt);
670*4882a593Smuzhiyun 		align_sz = 64/ALIGN(depth, 8);
671*4882a593Smuzhiyun 		min_sz = var->min_inp_pixsize;
672*4882a593Smuzhiyun 		min_w = min_h = min_sz;
673*4882a593Smuzhiyun 		max_sc_h = max_sc_v = 1;
674*4882a593Smuzhiyun 	}
675*4882a593Smuzhiyun 	/*
676*4882a593Smuzhiyun 	 * For the compose rectangle the following constraints must be met:
677*4882a593Smuzhiyun 	 * - it must fit in the sink pad format rectangle (f_width/f_height);
678*4882a593Smuzhiyun 	 * - maximum downscaling ratio is 64;
679*4882a593Smuzhiyun 	 * - maximum crop size depends if the rotator is used or not;
680*4882a593Smuzhiyun 	 * - the sink pad format width/height must be 4 multiple of the
681*4882a593Smuzhiyun 	 *   prescaler ratios determined by sink pad size and source pad crop,
682*4882a593Smuzhiyun 	 *   the prescaler ratio is returned by fimc_get_scaler_factor().
683*4882a593Smuzhiyun 	 */
684*4882a593Smuzhiyun 	max_w = min_t(u32,
685*4882a593Smuzhiyun 		      rotate ? pl->out_rot_en_w : pl->out_rot_dis_w,
686*4882a593Smuzhiyun 		      rotate ? sink->f_height : sink->f_width);
687*4882a593Smuzhiyun 	max_h = min_t(u32, FIMC_CAMIF_MAX_HEIGHT, sink->f_height);
688*4882a593Smuzhiyun 
689*4882a593Smuzhiyun 	if (target == V4L2_SEL_TGT_COMPOSE) {
690*4882a593Smuzhiyun 		min_w = min_t(u32, max_w, sink->f_width / max_sc_h);
691*4882a593Smuzhiyun 		min_h = min_t(u32, max_h, sink->f_height / max_sc_v);
692*4882a593Smuzhiyun 		if (rotate) {
693*4882a593Smuzhiyun 			swap(max_sc_h, max_sc_v);
694*4882a593Smuzhiyun 			swap(min_w, min_h);
695*4882a593Smuzhiyun 		}
696*4882a593Smuzhiyun 	}
697*4882a593Smuzhiyun 	v4l_bound_align_image(&r->width, min_w, max_w, ffs(min_sz) - 1,
698*4882a593Smuzhiyun 			      &r->height, min_h, max_h, align_h,
699*4882a593Smuzhiyun 			      align_sz);
700*4882a593Smuzhiyun 	/* Adjust left/top if crop/compose rectangle is out of bounds */
701*4882a593Smuzhiyun 	r->left = clamp_t(u32, r->left, 0, sink->f_width - r->width);
702*4882a593Smuzhiyun 	r->top  = clamp_t(u32, r->top, 0, sink->f_height - r->height);
703*4882a593Smuzhiyun 	r->left = round_down(r->left, var->hor_offs_align);
704*4882a593Smuzhiyun 
705*4882a593Smuzhiyun 	dbg("target %#x: (%d,%d)/%dx%d, sink fmt: %dx%d",
706*4882a593Smuzhiyun 	    target, r->left, r->top, r->width, r->height,
707*4882a593Smuzhiyun 	    sink->f_width, sink->f_height);
708*4882a593Smuzhiyun }
709*4882a593Smuzhiyun 
710*4882a593Smuzhiyun /*
711*4882a593Smuzhiyun  * The video node ioctl operations
712*4882a593Smuzhiyun  */
fimc_cap_querycap(struct file * file,void * priv,struct v4l2_capability * cap)713*4882a593Smuzhiyun static int fimc_cap_querycap(struct file *file, void *priv,
714*4882a593Smuzhiyun 					struct v4l2_capability *cap)
715*4882a593Smuzhiyun {
716*4882a593Smuzhiyun 	struct fimc_dev *fimc = video_drvdata(file);
717*4882a593Smuzhiyun 
718*4882a593Smuzhiyun 	__fimc_vidioc_querycap(&fimc->pdev->dev, cap);
719*4882a593Smuzhiyun 	return 0;
720*4882a593Smuzhiyun }
721*4882a593Smuzhiyun 
fimc_cap_enum_fmt(struct file * file,void * priv,struct v4l2_fmtdesc * f)722*4882a593Smuzhiyun static int fimc_cap_enum_fmt(struct file *file, void *priv,
723*4882a593Smuzhiyun 			     struct v4l2_fmtdesc *f)
724*4882a593Smuzhiyun {
725*4882a593Smuzhiyun 	struct fimc_fmt *fmt;
726*4882a593Smuzhiyun 
727*4882a593Smuzhiyun 	fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM | FMT_FLAGS_M2M,
728*4882a593Smuzhiyun 			       f->index);
729*4882a593Smuzhiyun 	if (!fmt)
730*4882a593Smuzhiyun 		return -EINVAL;
731*4882a593Smuzhiyun 	f->pixelformat = fmt->fourcc;
732*4882a593Smuzhiyun 	return 0;
733*4882a593Smuzhiyun }
734*4882a593Smuzhiyun 
fimc_pipeline_get_head(struct media_entity * me)735*4882a593Smuzhiyun static struct media_entity *fimc_pipeline_get_head(struct media_entity *me)
736*4882a593Smuzhiyun {
737*4882a593Smuzhiyun 	struct media_pad *pad = &me->pads[0];
738*4882a593Smuzhiyun 
739*4882a593Smuzhiyun 	while (!(pad->flags & MEDIA_PAD_FL_SOURCE)) {
740*4882a593Smuzhiyun 		pad = media_entity_remote_pad(pad);
741*4882a593Smuzhiyun 		if (!pad)
742*4882a593Smuzhiyun 			break;
743*4882a593Smuzhiyun 		me = pad->entity;
744*4882a593Smuzhiyun 		pad = &me->pads[0];
745*4882a593Smuzhiyun 	}
746*4882a593Smuzhiyun 
747*4882a593Smuzhiyun 	return me;
748*4882a593Smuzhiyun }
749*4882a593Smuzhiyun 
750*4882a593Smuzhiyun /**
751*4882a593Smuzhiyun  * fimc_pipeline_try_format - negotiate and/or set formats at pipeline
752*4882a593Smuzhiyun  *                            elements
753*4882a593Smuzhiyun  * @ctx: FIMC capture context
754*4882a593Smuzhiyun  * @tfmt: media bus format to try/set on subdevs
755*4882a593Smuzhiyun  * @fmt_id: fimc pixel format id corresponding to returned @tfmt (output)
756*4882a593Smuzhiyun  * @set: true to set format on subdevs, false to try only
757*4882a593Smuzhiyun  */
fimc_pipeline_try_format(struct fimc_ctx * ctx,struct v4l2_mbus_framefmt * tfmt,struct fimc_fmt ** fmt_id,bool set)758*4882a593Smuzhiyun static int fimc_pipeline_try_format(struct fimc_ctx *ctx,
759*4882a593Smuzhiyun 				    struct v4l2_mbus_framefmt *tfmt,
760*4882a593Smuzhiyun 				    struct fimc_fmt **fmt_id,
761*4882a593Smuzhiyun 				    bool set)
762*4882a593Smuzhiyun {
763*4882a593Smuzhiyun 	struct fimc_dev *fimc = ctx->fimc_dev;
764*4882a593Smuzhiyun 	struct fimc_pipeline *p = to_fimc_pipeline(fimc->vid_cap.ve.pipe);
765*4882a593Smuzhiyun 	struct v4l2_subdev *sd = p->subdevs[IDX_SENSOR];
766*4882a593Smuzhiyun 	struct v4l2_subdev_format sfmt;
767*4882a593Smuzhiyun 	struct v4l2_mbus_framefmt *mf = &sfmt.format;
768*4882a593Smuzhiyun 	struct media_entity *me;
769*4882a593Smuzhiyun 	struct fimc_fmt *ffmt;
770*4882a593Smuzhiyun 	struct media_pad *pad;
771*4882a593Smuzhiyun 	int ret, i = 1;
772*4882a593Smuzhiyun 	u32 fcc;
773*4882a593Smuzhiyun 
774*4882a593Smuzhiyun 	if (WARN_ON(!sd || !tfmt))
775*4882a593Smuzhiyun 		return -EINVAL;
776*4882a593Smuzhiyun 
777*4882a593Smuzhiyun 	memset(&sfmt, 0, sizeof(sfmt));
778*4882a593Smuzhiyun 	sfmt.format = *tfmt;
779*4882a593Smuzhiyun 	sfmt.which = set ? V4L2_SUBDEV_FORMAT_ACTIVE : V4L2_SUBDEV_FORMAT_TRY;
780*4882a593Smuzhiyun 
781*4882a593Smuzhiyun 	me = fimc_pipeline_get_head(&sd->entity);
782*4882a593Smuzhiyun 
783*4882a593Smuzhiyun 	while (1) {
784*4882a593Smuzhiyun 		ffmt = fimc_find_format(NULL, mf->code != 0 ? &mf->code : NULL,
785*4882a593Smuzhiyun 					FMT_FLAGS_CAM, i++);
786*4882a593Smuzhiyun 		if (ffmt == NULL) {
787*4882a593Smuzhiyun 			/*
788*4882a593Smuzhiyun 			 * Notify user-space if common pixel code for
789*4882a593Smuzhiyun 			 * host and sensor does not exist.
790*4882a593Smuzhiyun 			 */
791*4882a593Smuzhiyun 			return -EINVAL;
792*4882a593Smuzhiyun 		}
793*4882a593Smuzhiyun 		mf->code = tfmt->code = ffmt->mbus_code;
794*4882a593Smuzhiyun 
795*4882a593Smuzhiyun 		/* set format on all pipeline subdevs */
796*4882a593Smuzhiyun 		while (me != &fimc->vid_cap.subdev.entity) {
797*4882a593Smuzhiyun 			sd = media_entity_to_v4l2_subdev(me);
798*4882a593Smuzhiyun 
799*4882a593Smuzhiyun 			sfmt.pad = 0;
800*4882a593Smuzhiyun 			ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sfmt);
801*4882a593Smuzhiyun 			if (ret)
802*4882a593Smuzhiyun 				return ret;
803*4882a593Smuzhiyun 
804*4882a593Smuzhiyun 			if (me->pads[0].flags & MEDIA_PAD_FL_SINK) {
805*4882a593Smuzhiyun 				sfmt.pad = me->num_pads - 1;
806*4882a593Smuzhiyun 				mf->code = tfmt->code;
807*4882a593Smuzhiyun 				ret = v4l2_subdev_call(sd, pad, set_fmt, NULL,
808*4882a593Smuzhiyun 									&sfmt);
809*4882a593Smuzhiyun 				if (ret)
810*4882a593Smuzhiyun 					return ret;
811*4882a593Smuzhiyun 			}
812*4882a593Smuzhiyun 
813*4882a593Smuzhiyun 			pad = media_entity_remote_pad(&me->pads[sfmt.pad]);
814*4882a593Smuzhiyun 			if (!pad)
815*4882a593Smuzhiyun 				return -EINVAL;
816*4882a593Smuzhiyun 			me = pad->entity;
817*4882a593Smuzhiyun 		}
818*4882a593Smuzhiyun 
819*4882a593Smuzhiyun 		if (mf->code != tfmt->code)
820*4882a593Smuzhiyun 			continue;
821*4882a593Smuzhiyun 
822*4882a593Smuzhiyun 		fcc = ffmt->fourcc;
823*4882a593Smuzhiyun 		tfmt->width  = mf->width;
824*4882a593Smuzhiyun 		tfmt->height = mf->height;
825*4882a593Smuzhiyun 		ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
826*4882a593Smuzhiyun 					NULL, &fcc, FIMC_SD_PAD_SINK_CAM);
827*4882a593Smuzhiyun 		ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
828*4882a593Smuzhiyun 					NULL, &fcc, FIMC_SD_PAD_SOURCE);
829*4882a593Smuzhiyun 		if (ffmt && ffmt->mbus_code)
830*4882a593Smuzhiyun 			mf->code = ffmt->mbus_code;
831*4882a593Smuzhiyun 		if (mf->width != tfmt->width || mf->height != tfmt->height)
832*4882a593Smuzhiyun 			continue;
833*4882a593Smuzhiyun 		tfmt->code = mf->code;
834*4882a593Smuzhiyun 		break;
835*4882a593Smuzhiyun 	}
836*4882a593Smuzhiyun 
837*4882a593Smuzhiyun 	if (fmt_id && ffmt)
838*4882a593Smuzhiyun 		*fmt_id = ffmt;
839*4882a593Smuzhiyun 	*tfmt = *mf;
840*4882a593Smuzhiyun 
841*4882a593Smuzhiyun 	return 0;
842*4882a593Smuzhiyun }
843*4882a593Smuzhiyun 
844*4882a593Smuzhiyun /**
845*4882a593Smuzhiyun  * fimc_get_sensor_frame_desc - query the sensor for media bus frame parameters
846*4882a593Smuzhiyun  * @sensor: pointer to the sensor subdev
847*4882a593Smuzhiyun  * @plane_fmt: provides plane sizes corresponding to the frame layout entries
848*4882a593Smuzhiyun  * @num_planes: number of planes
849*4882a593Smuzhiyun  * @try: true to set the frame parameters, false to query only
850*4882a593Smuzhiyun  *
851*4882a593Smuzhiyun  * This function is used by this driver only for compressed/blob data formats.
852*4882a593Smuzhiyun  */
fimc_get_sensor_frame_desc(struct v4l2_subdev * sensor,struct v4l2_plane_pix_format * plane_fmt,unsigned int num_planes,bool try)853*4882a593Smuzhiyun static int fimc_get_sensor_frame_desc(struct v4l2_subdev *sensor,
854*4882a593Smuzhiyun 				      struct v4l2_plane_pix_format *plane_fmt,
855*4882a593Smuzhiyun 				      unsigned int num_planes, bool try)
856*4882a593Smuzhiyun {
857*4882a593Smuzhiyun 	struct v4l2_mbus_frame_desc fd;
858*4882a593Smuzhiyun 	int i, ret;
859*4882a593Smuzhiyun 	int pad;
860*4882a593Smuzhiyun 
861*4882a593Smuzhiyun 	for (i = 0; i < num_planes; i++)
862*4882a593Smuzhiyun 		fd.entry[i].length = plane_fmt[i].sizeimage;
863*4882a593Smuzhiyun 
864*4882a593Smuzhiyun 	pad = sensor->entity.num_pads - 1;
865*4882a593Smuzhiyun 	if (try)
866*4882a593Smuzhiyun 		ret = v4l2_subdev_call(sensor, pad, set_frame_desc, pad, &fd);
867*4882a593Smuzhiyun 	else
868*4882a593Smuzhiyun 		ret = v4l2_subdev_call(sensor, pad, get_frame_desc, pad, &fd);
869*4882a593Smuzhiyun 
870*4882a593Smuzhiyun 	if (ret < 0)
871*4882a593Smuzhiyun 		return ret;
872*4882a593Smuzhiyun 
873*4882a593Smuzhiyun 	if (num_planes != fd.num_entries)
874*4882a593Smuzhiyun 		return -EINVAL;
875*4882a593Smuzhiyun 
876*4882a593Smuzhiyun 	for (i = 0; i < num_planes; i++)
877*4882a593Smuzhiyun 		plane_fmt[i].sizeimage = fd.entry[i].length;
878*4882a593Smuzhiyun 
879*4882a593Smuzhiyun 	if (fd.entry[0].length > FIMC_MAX_JPEG_BUF_SIZE) {
880*4882a593Smuzhiyun 		v4l2_err(sensor->v4l2_dev,  "Unsupported buffer size: %u\n",
881*4882a593Smuzhiyun 			 fd.entry[0].length);
882*4882a593Smuzhiyun 
883*4882a593Smuzhiyun 		return -EINVAL;
884*4882a593Smuzhiyun 	}
885*4882a593Smuzhiyun 
886*4882a593Smuzhiyun 	return 0;
887*4882a593Smuzhiyun }
888*4882a593Smuzhiyun 
fimc_cap_g_fmt_mplane(struct file * file,void * fh,struct v4l2_format * f)889*4882a593Smuzhiyun static int fimc_cap_g_fmt_mplane(struct file *file, void *fh,
890*4882a593Smuzhiyun 				 struct v4l2_format *f)
891*4882a593Smuzhiyun {
892*4882a593Smuzhiyun 	struct fimc_dev *fimc = video_drvdata(file);
893*4882a593Smuzhiyun 
894*4882a593Smuzhiyun 	__fimc_get_format(&fimc->vid_cap.ctx->d_frame, f);
895*4882a593Smuzhiyun 	return 0;
896*4882a593Smuzhiyun }
897*4882a593Smuzhiyun 
898*4882a593Smuzhiyun /*
899*4882a593Smuzhiyun  * Try or set format on the fimc.X.capture video node and additionally
900*4882a593Smuzhiyun  * on the whole pipeline if @try is false.
901*4882a593Smuzhiyun  * Locking: the caller must _not_ hold the graph mutex.
902*4882a593Smuzhiyun  */
__video_try_or_set_format(struct fimc_dev * fimc,struct v4l2_format * f,bool try,struct fimc_fmt ** inp_fmt,struct fimc_fmt ** out_fmt)903*4882a593Smuzhiyun static int __video_try_or_set_format(struct fimc_dev *fimc,
904*4882a593Smuzhiyun 				     struct v4l2_format *f, bool try,
905*4882a593Smuzhiyun 				     struct fimc_fmt **inp_fmt,
906*4882a593Smuzhiyun 				     struct fimc_fmt **out_fmt)
907*4882a593Smuzhiyun {
908*4882a593Smuzhiyun 	struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
909*4882a593Smuzhiyun 	struct fimc_vid_cap *vc = &fimc->vid_cap;
910*4882a593Smuzhiyun 	struct exynos_video_entity *ve = &vc->ve;
911*4882a593Smuzhiyun 	struct fimc_ctx *ctx = vc->ctx;
912*4882a593Smuzhiyun 	unsigned int width = 0, height = 0;
913*4882a593Smuzhiyun 	int ret = 0;
914*4882a593Smuzhiyun 
915*4882a593Smuzhiyun 	/* Pre-configure format at the camera input interface, for JPEG only */
916*4882a593Smuzhiyun 	if (fimc_jpeg_fourcc(pix->pixelformat)) {
917*4882a593Smuzhiyun 		fimc_capture_try_format(ctx, &pix->width, &pix->height,
918*4882a593Smuzhiyun 					NULL, &pix->pixelformat,
919*4882a593Smuzhiyun 					FIMC_SD_PAD_SINK_CAM);
920*4882a593Smuzhiyun 		if (try) {
921*4882a593Smuzhiyun 			width = pix->width;
922*4882a593Smuzhiyun 			height = pix->height;
923*4882a593Smuzhiyun 		} else {
924*4882a593Smuzhiyun 			ctx->s_frame.f_width = pix->width;
925*4882a593Smuzhiyun 			ctx->s_frame.f_height = pix->height;
926*4882a593Smuzhiyun 		}
927*4882a593Smuzhiyun 	}
928*4882a593Smuzhiyun 
929*4882a593Smuzhiyun 	/* Try the format at the scaler and the DMA output */
930*4882a593Smuzhiyun 	*out_fmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
931*4882a593Smuzhiyun 					  NULL, &pix->pixelformat,
932*4882a593Smuzhiyun 					  FIMC_SD_PAD_SOURCE);
933*4882a593Smuzhiyun 	if (*out_fmt == NULL)
934*4882a593Smuzhiyun 		return -EINVAL;
935*4882a593Smuzhiyun 
936*4882a593Smuzhiyun 	/* Restore image width/height for JPEG (no resizing supported). */
937*4882a593Smuzhiyun 	if (try && fimc_jpeg_fourcc(pix->pixelformat)) {
938*4882a593Smuzhiyun 		pix->width = width;
939*4882a593Smuzhiyun 		pix->height = height;
940*4882a593Smuzhiyun 	}
941*4882a593Smuzhiyun 
942*4882a593Smuzhiyun 	/* Try to match format at the host and the sensor */
943*4882a593Smuzhiyun 	if (!vc->user_subdev_api) {
944*4882a593Smuzhiyun 		struct v4l2_mbus_framefmt mbus_fmt;
945*4882a593Smuzhiyun 		struct v4l2_mbus_framefmt *mf;
946*4882a593Smuzhiyun 
947*4882a593Smuzhiyun 		mf = try ? &mbus_fmt : &fimc->vid_cap.ci_fmt;
948*4882a593Smuzhiyun 
949*4882a593Smuzhiyun 		mf->code = (*out_fmt)->mbus_code;
950*4882a593Smuzhiyun 		mf->width = pix->width;
951*4882a593Smuzhiyun 		mf->height = pix->height;
952*4882a593Smuzhiyun 
953*4882a593Smuzhiyun 		fimc_md_graph_lock(ve);
954*4882a593Smuzhiyun 		ret = fimc_pipeline_try_format(ctx, mf, inp_fmt, try);
955*4882a593Smuzhiyun 		fimc_md_graph_unlock(ve);
956*4882a593Smuzhiyun 
957*4882a593Smuzhiyun 		if (ret < 0)
958*4882a593Smuzhiyun 			return ret;
959*4882a593Smuzhiyun 
960*4882a593Smuzhiyun 		pix->width = mf->width;
961*4882a593Smuzhiyun 		pix->height = mf->height;
962*4882a593Smuzhiyun 	}
963*4882a593Smuzhiyun 
964*4882a593Smuzhiyun 	fimc_adjust_mplane_format(*out_fmt, pix->width, pix->height, pix);
965*4882a593Smuzhiyun 
966*4882a593Smuzhiyun 	if ((*out_fmt)->flags & FMT_FLAGS_COMPRESSED) {
967*4882a593Smuzhiyun 		struct v4l2_subdev *sensor;
968*4882a593Smuzhiyun 
969*4882a593Smuzhiyun 		fimc_md_graph_lock(ve);
970*4882a593Smuzhiyun 
971*4882a593Smuzhiyun 		sensor = __fimc_md_get_subdev(ve->pipe, IDX_SENSOR);
972*4882a593Smuzhiyun 		if (sensor)
973*4882a593Smuzhiyun 			fimc_get_sensor_frame_desc(sensor, pix->plane_fmt,
974*4882a593Smuzhiyun 						   (*out_fmt)->memplanes, try);
975*4882a593Smuzhiyun 		else
976*4882a593Smuzhiyun 			ret = -EPIPE;
977*4882a593Smuzhiyun 
978*4882a593Smuzhiyun 		fimc_md_graph_unlock(ve);
979*4882a593Smuzhiyun 	}
980*4882a593Smuzhiyun 
981*4882a593Smuzhiyun 	return ret;
982*4882a593Smuzhiyun }
983*4882a593Smuzhiyun 
fimc_cap_try_fmt_mplane(struct file * file,void * fh,struct v4l2_format * f)984*4882a593Smuzhiyun static int fimc_cap_try_fmt_mplane(struct file *file, void *fh,
985*4882a593Smuzhiyun 				   struct v4l2_format *f)
986*4882a593Smuzhiyun {
987*4882a593Smuzhiyun 	struct fimc_dev *fimc = video_drvdata(file);
988*4882a593Smuzhiyun 	struct fimc_fmt *out_fmt = NULL, *inp_fmt = NULL;
989*4882a593Smuzhiyun 
990*4882a593Smuzhiyun 	return __video_try_or_set_format(fimc, f, true, &inp_fmt, &out_fmt);
991*4882a593Smuzhiyun }
992*4882a593Smuzhiyun 
fimc_capture_mark_jpeg_xfer(struct fimc_ctx * ctx,enum fimc_color_fmt color)993*4882a593Smuzhiyun static void fimc_capture_mark_jpeg_xfer(struct fimc_ctx *ctx,
994*4882a593Smuzhiyun 					enum fimc_color_fmt color)
995*4882a593Smuzhiyun {
996*4882a593Smuzhiyun 	bool jpeg = fimc_fmt_is_user_defined(color);
997*4882a593Smuzhiyun 
998*4882a593Smuzhiyun 	ctx->scaler.enabled = !jpeg;
999*4882a593Smuzhiyun 	fimc_ctrls_activate(ctx, !jpeg);
1000*4882a593Smuzhiyun 
1001*4882a593Smuzhiyun 	if (jpeg)
1002*4882a593Smuzhiyun 		set_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
1003*4882a593Smuzhiyun 	else
1004*4882a593Smuzhiyun 		clear_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
1005*4882a593Smuzhiyun }
1006*4882a593Smuzhiyun 
__fimc_capture_set_format(struct fimc_dev * fimc,struct v4l2_format * f)1007*4882a593Smuzhiyun static int __fimc_capture_set_format(struct fimc_dev *fimc,
1008*4882a593Smuzhiyun 				     struct v4l2_format *f)
1009*4882a593Smuzhiyun {
1010*4882a593Smuzhiyun 	struct fimc_vid_cap *vc = &fimc->vid_cap;
1011*4882a593Smuzhiyun 	struct fimc_ctx *ctx = vc->ctx;
1012*4882a593Smuzhiyun 	struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
1013*4882a593Smuzhiyun 	struct fimc_frame *ff = &ctx->d_frame;
1014*4882a593Smuzhiyun 	struct fimc_fmt *inp_fmt = NULL;
1015*4882a593Smuzhiyun 	int ret, i;
1016*4882a593Smuzhiyun 
1017*4882a593Smuzhiyun 	if (vb2_is_busy(&fimc->vid_cap.vbq))
1018*4882a593Smuzhiyun 		return -EBUSY;
1019*4882a593Smuzhiyun 
1020*4882a593Smuzhiyun 	ret = __video_try_or_set_format(fimc, f, false, &inp_fmt, &ff->fmt);
1021*4882a593Smuzhiyun 	if (ret < 0)
1022*4882a593Smuzhiyun 		return ret;
1023*4882a593Smuzhiyun 
1024*4882a593Smuzhiyun 	/* Update RGB Alpha control state and value range */
1025*4882a593Smuzhiyun 	fimc_alpha_ctrl_update(ctx);
1026*4882a593Smuzhiyun 
1027*4882a593Smuzhiyun 	for (i = 0; i < ff->fmt->memplanes; i++) {
1028*4882a593Smuzhiyun 		ff->bytesperline[i] = pix->plane_fmt[i].bytesperline;
1029*4882a593Smuzhiyun 		ff->payload[i] = pix->plane_fmt[i].sizeimage;
1030*4882a593Smuzhiyun 	}
1031*4882a593Smuzhiyun 
1032*4882a593Smuzhiyun 	set_frame_bounds(ff, pix->width, pix->height);
1033*4882a593Smuzhiyun 	/* Reset the composition rectangle if not yet configured */
1034*4882a593Smuzhiyun 	if (!(ctx->state & FIMC_COMPOSE))
1035*4882a593Smuzhiyun 		set_frame_crop(ff, 0, 0, pix->width, pix->height);
1036*4882a593Smuzhiyun 
1037*4882a593Smuzhiyun 	fimc_capture_mark_jpeg_xfer(ctx, ff->fmt->color);
1038*4882a593Smuzhiyun 
1039*4882a593Smuzhiyun 	/* Reset cropping and set format at the camera interface input */
1040*4882a593Smuzhiyun 	if (!vc->user_subdev_api) {
1041*4882a593Smuzhiyun 		ctx->s_frame.fmt = inp_fmt;
1042*4882a593Smuzhiyun 		set_frame_bounds(&ctx->s_frame, pix->width, pix->height);
1043*4882a593Smuzhiyun 		set_frame_crop(&ctx->s_frame, 0, 0, pix->width, pix->height);
1044*4882a593Smuzhiyun 	}
1045*4882a593Smuzhiyun 
1046*4882a593Smuzhiyun 	return ret;
1047*4882a593Smuzhiyun }
1048*4882a593Smuzhiyun 
fimc_cap_s_fmt_mplane(struct file * file,void * priv,struct v4l2_format * f)1049*4882a593Smuzhiyun static int fimc_cap_s_fmt_mplane(struct file *file, void *priv,
1050*4882a593Smuzhiyun 				 struct v4l2_format *f)
1051*4882a593Smuzhiyun {
1052*4882a593Smuzhiyun 	struct fimc_dev *fimc = video_drvdata(file);
1053*4882a593Smuzhiyun 
1054*4882a593Smuzhiyun 	return __fimc_capture_set_format(fimc, f);
1055*4882a593Smuzhiyun }
1056*4882a593Smuzhiyun 
fimc_cap_enum_input(struct file * file,void * priv,struct v4l2_input * i)1057*4882a593Smuzhiyun static int fimc_cap_enum_input(struct file *file, void *priv,
1058*4882a593Smuzhiyun 			       struct v4l2_input *i)
1059*4882a593Smuzhiyun {
1060*4882a593Smuzhiyun 	struct fimc_dev *fimc = video_drvdata(file);
1061*4882a593Smuzhiyun 	struct exynos_video_entity *ve = &fimc->vid_cap.ve;
1062*4882a593Smuzhiyun 	struct v4l2_subdev *sd;
1063*4882a593Smuzhiyun 
1064*4882a593Smuzhiyun 	if (i->index != 0)
1065*4882a593Smuzhiyun 		return -EINVAL;
1066*4882a593Smuzhiyun 
1067*4882a593Smuzhiyun 	i->type = V4L2_INPUT_TYPE_CAMERA;
1068*4882a593Smuzhiyun 	fimc_md_graph_lock(ve);
1069*4882a593Smuzhiyun 	sd = __fimc_md_get_subdev(ve->pipe, IDX_SENSOR);
1070*4882a593Smuzhiyun 	fimc_md_graph_unlock(ve);
1071*4882a593Smuzhiyun 
1072*4882a593Smuzhiyun 	if (sd)
1073*4882a593Smuzhiyun 		strscpy(i->name, sd->name, sizeof(i->name));
1074*4882a593Smuzhiyun 
1075*4882a593Smuzhiyun 	return 0;
1076*4882a593Smuzhiyun }
1077*4882a593Smuzhiyun 
fimc_cap_s_input(struct file * file,void * priv,unsigned int i)1078*4882a593Smuzhiyun static int fimc_cap_s_input(struct file *file, void *priv, unsigned int i)
1079*4882a593Smuzhiyun {
1080*4882a593Smuzhiyun 	return i == 0 ? i : -EINVAL;
1081*4882a593Smuzhiyun }
1082*4882a593Smuzhiyun 
fimc_cap_g_input(struct file * file,void * priv,unsigned int * i)1083*4882a593Smuzhiyun static int fimc_cap_g_input(struct file *file, void *priv, unsigned int *i)
1084*4882a593Smuzhiyun {
1085*4882a593Smuzhiyun 	*i = 0;
1086*4882a593Smuzhiyun 	return 0;
1087*4882a593Smuzhiyun }
1088*4882a593Smuzhiyun 
1089*4882a593Smuzhiyun /**
1090*4882a593Smuzhiyun  * fimc_pipeline_validate - check for formats inconsistencies
1091*4882a593Smuzhiyun  *                          between source and sink pad of each link
1092*4882a593Smuzhiyun  * @fimc:	the FIMC device this context applies to
1093*4882a593Smuzhiyun  *
1094*4882a593Smuzhiyun  * Return 0 if all formats match or -EPIPE otherwise.
1095*4882a593Smuzhiyun  */
fimc_pipeline_validate(struct fimc_dev * fimc)1096*4882a593Smuzhiyun static int fimc_pipeline_validate(struct fimc_dev *fimc)
1097*4882a593Smuzhiyun {
1098*4882a593Smuzhiyun 	struct v4l2_subdev_format sink_fmt, src_fmt;
1099*4882a593Smuzhiyun 	struct fimc_vid_cap *vc = &fimc->vid_cap;
1100*4882a593Smuzhiyun 	struct v4l2_subdev *sd = &vc->subdev;
1101*4882a593Smuzhiyun 	struct fimc_pipeline *p = to_fimc_pipeline(vc->ve.pipe);
1102*4882a593Smuzhiyun 	struct media_pad *sink_pad, *src_pad;
1103*4882a593Smuzhiyun 	int i, ret;
1104*4882a593Smuzhiyun 
1105*4882a593Smuzhiyun 	while (1) {
1106*4882a593Smuzhiyun 		/*
1107*4882a593Smuzhiyun 		 * Find current entity sink pad and any remote sink pad linked
1108*4882a593Smuzhiyun 		 * to it. We stop if there is no sink pad in current entity or
1109*4882a593Smuzhiyun 		 * it is not linked to any other remote entity.
1110*4882a593Smuzhiyun 		 */
1111*4882a593Smuzhiyun 		src_pad = NULL;
1112*4882a593Smuzhiyun 
1113*4882a593Smuzhiyun 		for (i = 0; i < sd->entity.num_pads; i++) {
1114*4882a593Smuzhiyun 			struct media_pad *p = &sd->entity.pads[i];
1115*4882a593Smuzhiyun 
1116*4882a593Smuzhiyun 			if (p->flags & MEDIA_PAD_FL_SINK) {
1117*4882a593Smuzhiyun 				sink_pad = p;
1118*4882a593Smuzhiyun 				src_pad = media_entity_remote_pad(sink_pad);
1119*4882a593Smuzhiyun 				if (src_pad)
1120*4882a593Smuzhiyun 					break;
1121*4882a593Smuzhiyun 			}
1122*4882a593Smuzhiyun 		}
1123*4882a593Smuzhiyun 
1124*4882a593Smuzhiyun 		if (!src_pad || !is_media_entity_v4l2_subdev(src_pad->entity))
1125*4882a593Smuzhiyun 			break;
1126*4882a593Smuzhiyun 
1127*4882a593Smuzhiyun 		/* Don't call FIMC subdev operation to avoid nested locking */
1128*4882a593Smuzhiyun 		if (sd == &vc->subdev) {
1129*4882a593Smuzhiyun 			struct fimc_frame *ff = &vc->ctx->s_frame;
1130*4882a593Smuzhiyun 			sink_fmt.format.width = ff->f_width;
1131*4882a593Smuzhiyun 			sink_fmt.format.height = ff->f_height;
1132*4882a593Smuzhiyun 			sink_fmt.format.code = ff->fmt ? ff->fmt->mbus_code : 0;
1133*4882a593Smuzhiyun 		} else {
1134*4882a593Smuzhiyun 			sink_fmt.pad = sink_pad->index;
1135*4882a593Smuzhiyun 			sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1136*4882a593Smuzhiyun 			ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sink_fmt);
1137*4882a593Smuzhiyun 			if (ret < 0 && ret != -ENOIOCTLCMD)
1138*4882a593Smuzhiyun 				return -EPIPE;
1139*4882a593Smuzhiyun 		}
1140*4882a593Smuzhiyun 
1141*4882a593Smuzhiyun 		/* Retrieve format at the source pad */
1142*4882a593Smuzhiyun 		sd = media_entity_to_v4l2_subdev(src_pad->entity);
1143*4882a593Smuzhiyun 		src_fmt.pad = src_pad->index;
1144*4882a593Smuzhiyun 		src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1145*4882a593Smuzhiyun 		ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
1146*4882a593Smuzhiyun 		if (ret < 0 && ret != -ENOIOCTLCMD)
1147*4882a593Smuzhiyun 			return -EPIPE;
1148*4882a593Smuzhiyun 
1149*4882a593Smuzhiyun 		if (src_fmt.format.width != sink_fmt.format.width ||
1150*4882a593Smuzhiyun 		    src_fmt.format.height != sink_fmt.format.height ||
1151*4882a593Smuzhiyun 		    src_fmt.format.code != sink_fmt.format.code)
1152*4882a593Smuzhiyun 			return -EPIPE;
1153*4882a593Smuzhiyun 
1154*4882a593Smuzhiyun 		if (sd == p->subdevs[IDX_SENSOR] &&
1155*4882a593Smuzhiyun 		    fimc_user_defined_mbus_fmt(src_fmt.format.code)) {
1156*4882a593Smuzhiyun 			struct v4l2_plane_pix_format plane_fmt[FIMC_MAX_PLANES];
1157*4882a593Smuzhiyun 			struct fimc_frame *frame = &vc->ctx->d_frame;
1158*4882a593Smuzhiyun 			unsigned int i;
1159*4882a593Smuzhiyun 
1160*4882a593Smuzhiyun 			ret = fimc_get_sensor_frame_desc(sd, plane_fmt,
1161*4882a593Smuzhiyun 							 frame->fmt->memplanes,
1162*4882a593Smuzhiyun 							 false);
1163*4882a593Smuzhiyun 			if (ret < 0)
1164*4882a593Smuzhiyun 				return -EPIPE;
1165*4882a593Smuzhiyun 
1166*4882a593Smuzhiyun 			for (i = 0; i < frame->fmt->memplanes; i++)
1167*4882a593Smuzhiyun 				if (frame->payload[i] < plane_fmt[i].sizeimage)
1168*4882a593Smuzhiyun 					return -EPIPE;
1169*4882a593Smuzhiyun 		}
1170*4882a593Smuzhiyun 	}
1171*4882a593Smuzhiyun 	return 0;
1172*4882a593Smuzhiyun }
1173*4882a593Smuzhiyun 
fimc_cap_streamon(struct file * file,void * priv,enum v4l2_buf_type type)1174*4882a593Smuzhiyun static int fimc_cap_streamon(struct file *file, void *priv,
1175*4882a593Smuzhiyun 			     enum v4l2_buf_type type)
1176*4882a593Smuzhiyun {
1177*4882a593Smuzhiyun 	struct fimc_dev *fimc = video_drvdata(file);
1178*4882a593Smuzhiyun 	struct fimc_vid_cap *vc = &fimc->vid_cap;
1179*4882a593Smuzhiyun 	struct media_entity *entity = &vc->ve.vdev.entity;
1180*4882a593Smuzhiyun 	struct fimc_source_info *si = NULL;
1181*4882a593Smuzhiyun 	struct v4l2_subdev *sd;
1182*4882a593Smuzhiyun 	int ret;
1183*4882a593Smuzhiyun 
1184*4882a593Smuzhiyun 	if (fimc_capture_active(fimc))
1185*4882a593Smuzhiyun 		return -EBUSY;
1186*4882a593Smuzhiyun 
1187*4882a593Smuzhiyun 	ret = media_pipeline_start(entity, &vc->ve.pipe->mp);
1188*4882a593Smuzhiyun 	if (ret < 0)
1189*4882a593Smuzhiyun 		return ret;
1190*4882a593Smuzhiyun 
1191*4882a593Smuzhiyun 	sd = __fimc_md_get_subdev(vc->ve.pipe, IDX_SENSOR);
1192*4882a593Smuzhiyun 	if (sd)
1193*4882a593Smuzhiyun 		si = v4l2_get_subdev_hostdata(sd);
1194*4882a593Smuzhiyun 
1195*4882a593Smuzhiyun 	if (si == NULL) {
1196*4882a593Smuzhiyun 		ret = -EPIPE;
1197*4882a593Smuzhiyun 		goto err_p_stop;
1198*4882a593Smuzhiyun 	}
1199*4882a593Smuzhiyun 	/*
1200*4882a593Smuzhiyun 	 * Save configuration data related to currently attached image
1201*4882a593Smuzhiyun 	 * sensor or other data source, e.g. FIMC-IS.
1202*4882a593Smuzhiyun 	 */
1203*4882a593Smuzhiyun 	vc->source_config = *si;
1204*4882a593Smuzhiyun 
1205*4882a593Smuzhiyun 	if (vc->input == GRP_ID_FIMC_IS)
1206*4882a593Smuzhiyun 		vc->source_config.fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK;
1207*4882a593Smuzhiyun 
1208*4882a593Smuzhiyun 	if (vc->user_subdev_api) {
1209*4882a593Smuzhiyun 		ret = fimc_pipeline_validate(fimc);
1210*4882a593Smuzhiyun 		if (ret < 0)
1211*4882a593Smuzhiyun 			goto err_p_stop;
1212*4882a593Smuzhiyun 	}
1213*4882a593Smuzhiyun 
1214*4882a593Smuzhiyun 	ret = vb2_ioctl_streamon(file, priv, type);
1215*4882a593Smuzhiyun 	if (!ret) {
1216*4882a593Smuzhiyun 		vc->streaming = true;
1217*4882a593Smuzhiyun 		return ret;
1218*4882a593Smuzhiyun 	}
1219*4882a593Smuzhiyun 
1220*4882a593Smuzhiyun err_p_stop:
1221*4882a593Smuzhiyun 	media_pipeline_stop(entity);
1222*4882a593Smuzhiyun 	return ret;
1223*4882a593Smuzhiyun }
1224*4882a593Smuzhiyun 
fimc_cap_streamoff(struct file * file,void * priv,enum v4l2_buf_type type)1225*4882a593Smuzhiyun static int fimc_cap_streamoff(struct file *file, void *priv,
1226*4882a593Smuzhiyun 			    enum v4l2_buf_type type)
1227*4882a593Smuzhiyun {
1228*4882a593Smuzhiyun 	struct fimc_dev *fimc = video_drvdata(file);
1229*4882a593Smuzhiyun 	struct fimc_vid_cap *vc = &fimc->vid_cap;
1230*4882a593Smuzhiyun 	int ret;
1231*4882a593Smuzhiyun 
1232*4882a593Smuzhiyun 	ret = vb2_ioctl_streamoff(file, priv, type);
1233*4882a593Smuzhiyun 	if (ret < 0)
1234*4882a593Smuzhiyun 		return ret;
1235*4882a593Smuzhiyun 
1236*4882a593Smuzhiyun 	if (vc->streaming) {
1237*4882a593Smuzhiyun 		media_pipeline_stop(&vc->ve.vdev.entity);
1238*4882a593Smuzhiyun 		vc->streaming = false;
1239*4882a593Smuzhiyun 	}
1240*4882a593Smuzhiyun 
1241*4882a593Smuzhiyun 	return 0;
1242*4882a593Smuzhiyun }
1243*4882a593Smuzhiyun 
fimc_cap_reqbufs(struct file * file,void * priv,struct v4l2_requestbuffers * reqbufs)1244*4882a593Smuzhiyun static int fimc_cap_reqbufs(struct file *file, void *priv,
1245*4882a593Smuzhiyun 			    struct v4l2_requestbuffers *reqbufs)
1246*4882a593Smuzhiyun {
1247*4882a593Smuzhiyun 	struct fimc_dev *fimc = video_drvdata(file);
1248*4882a593Smuzhiyun 	int ret;
1249*4882a593Smuzhiyun 
1250*4882a593Smuzhiyun 	ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
1251*4882a593Smuzhiyun 
1252*4882a593Smuzhiyun 	if (!ret)
1253*4882a593Smuzhiyun 		fimc->vid_cap.reqbufs_count = reqbufs->count;
1254*4882a593Smuzhiyun 
1255*4882a593Smuzhiyun 	return ret;
1256*4882a593Smuzhiyun }
1257*4882a593Smuzhiyun 
fimc_cap_g_selection(struct file * file,void * fh,struct v4l2_selection * s)1258*4882a593Smuzhiyun static int fimc_cap_g_selection(struct file *file, void *fh,
1259*4882a593Smuzhiyun 				struct v4l2_selection *s)
1260*4882a593Smuzhiyun {
1261*4882a593Smuzhiyun 	struct fimc_dev *fimc = video_drvdata(file);
1262*4882a593Smuzhiyun 	struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1263*4882a593Smuzhiyun 	struct fimc_frame *f = &ctx->s_frame;
1264*4882a593Smuzhiyun 
1265*4882a593Smuzhiyun 	if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1266*4882a593Smuzhiyun 		return -EINVAL;
1267*4882a593Smuzhiyun 
1268*4882a593Smuzhiyun 	switch (s->target) {
1269*4882a593Smuzhiyun 	case V4L2_SEL_TGT_COMPOSE_DEFAULT:
1270*4882a593Smuzhiyun 	case V4L2_SEL_TGT_COMPOSE_BOUNDS:
1271*4882a593Smuzhiyun 		f = &ctx->d_frame;
1272*4882a593Smuzhiyun 		fallthrough;
1273*4882a593Smuzhiyun 	case V4L2_SEL_TGT_CROP_BOUNDS:
1274*4882a593Smuzhiyun 	case V4L2_SEL_TGT_CROP_DEFAULT:
1275*4882a593Smuzhiyun 		s->r.left = 0;
1276*4882a593Smuzhiyun 		s->r.top = 0;
1277*4882a593Smuzhiyun 		s->r.width = f->o_width;
1278*4882a593Smuzhiyun 		s->r.height = f->o_height;
1279*4882a593Smuzhiyun 		return 0;
1280*4882a593Smuzhiyun 
1281*4882a593Smuzhiyun 	case V4L2_SEL_TGT_COMPOSE:
1282*4882a593Smuzhiyun 		f = &ctx->d_frame;
1283*4882a593Smuzhiyun 		fallthrough;
1284*4882a593Smuzhiyun 	case V4L2_SEL_TGT_CROP:
1285*4882a593Smuzhiyun 		s->r.left = f->offs_h;
1286*4882a593Smuzhiyun 		s->r.top = f->offs_v;
1287*4882a593Smuzhiyun 		s->r.width = f->width;
1288*4882a593Smuzhiyun 		s->r.height = f->height;
1289*4882a593Smuzhiyun 		return 0;
1290*4882a593Smuzhiyun 	}
1291*4882a593Smuzhiyun 
1292*4882a593Smuzhiyun 	return -EINVAL;
1293*4882a593Smuzhiyun }
1294*4882a593Smuzhiyun 
fimc_cap_s_selection(struct file * file,void * fh,struct v4l2_selection * s)1295*4882a593Smuzhiyun static int fimc_cap_s_selection(struct file *file, void *fh,
1296*4882a593Smuzhiyun 				struct v4l2_selection *s)
1297*4882a593Smuzhiyun {
1298*4882a593Smuzhiyun 	struct fimc_dev *fimc = video_drvdata(file);
1299*4882a593Smuzhiyun 	struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1300*4882a593Smuzhiyun 	struct v4l2_rect rect = s->r;
1301*4882a593Smuzhiyun 	struct fimc_frame *f;
1302*4882a593Smuzhiyun 	unsigned long flags;
1303*4882a593Smuzhiyun 
1304*4882a593Smuzhiyun 	if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1305*4882a593Smuzhiyun 		return -EINVAL;
1306*4882a593Smuzhiyun 
1307*4882a593Smuzhiyun 	if (s->target == V4L2_SEL_TGT_COMPOSE)
1308*4882a593Smuzhiyun 		f = &ctx->d_frame;
1309*4882a593Smuzhiyun 	else if (s->target == V4L2_SEL_TGT_CROP)
1310*4882a593Smuzhiyun 		f = &ctx->s_frame;
1311*4882a593Smuzhiyun 	else
1312*4882a593Smuzhiyun 		return -EINVAL;
1313*4882a593Smuzhiyun 
1314*4882a593Smuzhiyun 	fimc_capture_try_selection(ctx, &rect, s->target);
1315*4882a593Smuzhiyun 
1316*4882a593Smuzhiyun 	if (s->flags & V4L2_SEL_FLAG_LE &&
1317*4882a593Smuzhiyun 	    !v4l2_rect_enclosed(&rect, &s->r))
1318*4882a593Smuzhiyun 		return -ERANGE;
1319*4882a593Smuzhiyun 
1320*4882a593Smuzhiyun 	if (s->flags & V4L2_SEL_FLAG_GE &&
1321*4882a593Smuzhiyun 	    !v4l2_rect_enclosed(&s->r, &rect))
1322*4882a593Smuzhiyun 		return -ERANGE;
1323*4882a593Smuzhiyun 
1324*4882a593Smuzhiyun 	s->r = rect;
1325*4882a593Smuzhiyun 	spin_lock_irqsave(&fimc->slock, flags);
1326*4882a593Smuzhiyun 	set_frame_crop(f, s->r.left, s->r.top, s->r.width,
1327*4882a593Smuzhiyun 		       s->r.height);
1328*4882a593Smuzhiyun 	spin_unlock_irqrestore(&fimc->slock, flags);
1329*4882a593Smuzhiyun 
1330*4882a593Smuzhiyun 	set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
1331*4882a593Smuzhiyun 	return 0;
1332*4882a593Smuzhiyun }
1333*4882a593Smuzhiyun 
1334*4882a593Smuzhiyun static const struct v4l2_ioctl_ops fimc_capture_ioctl_ops = {
1335*4882a593Smuzhiyun 	.vidioc_querycap		= fimc_cap_querycap,
1336*4882a593Smuzhiyun 
1337*4882a593Smuzhiyun 	.vidioc_enum_fmt_vid_cap	= fimc_cap_enum_fmt,
1338*4882a593Smuzhiyun 	.vidioc_try_fmt_vid_cap_mplane	= fimc_cap_try_fmt_mplane,
1339*4882a593Smuzhiyun 	.vidioc_s_fmt_vid_cap_mplane	= fimc_cap_s_fmt_mplane,
1340*4882a593Smuzhiyun 	.vidioc_g_fmt_vid_cap_mplane	= fimc_cap_g_fmt_mplane,
1341*4882a593Smuzhiyun 
1342*4882a593Smuzhiyun 	.vidioc_reqbufs			= fimc_cap_reqbufs,
1343*4882a593Smuzhiyun 	.vidioc_querybuf		= vb2_ioctl_querybuf,
1344*4882a593Smuzhiyun 	.vidioc_qbuf			= vb2_ioctl_qbuf,
1345*4882a593Smuzhiyun 	.vidioc_dqbuf			= vb2_ioctl_dqbuf,
1346*4882a593Smuzhiyun 	.vidioc_expbuf			= vb2_ioctl_expbuf,
1347*4882a593Smuzhiyun 	.vidioc_prepare_buf		= vb2_ioctl_prepare_buf,
1348*4882a593Smuzhiyun 	.vidioc_create_bufs		= vb2_ioctl_create_bufs,
1349*4882a593Smuzhiyun 
1350*4882a593Smuzhiyun 	.vidioc_streamon		= fimc_cap_streamon,
1351*4882a593Smuzhiyun 	.vidioc_streamoff		= fimc_cap_streamoff,
1352*4882a593Smuzhiyun 
1353*4882a593Smuzhiyun 	.vidioc_g_selection		= fimc_cap_g_selection,
1354*4882a593Smuzhiyun 	.vidioc_s_selection		= fimc_cap_s_selection,
1355*4882a593Smuzhiyun 
1356*4882a593Smuzhiyun 	.vidioc_enum_input		= fimc_cap_enum_input,
1357*4882a593Smuzhiyun 	.vidioc_s_input			= fimc_cap_s_input,
1358*4882a593Smuzhiyun 	.vidioc_g_input			= fimc_cap_g_input,
1359*4882a593Smuzhiyun };
1360*4882a593Smuzhiyun 
1361*4882a593Smuzhiyun /* Capture subdev media entity operations */
fimc_link_setup(struct media_entity * entity,const struct media_pad * local,const struct media_pad * remote,u32 flags)1362*4882a593Smuzhiyun static int fimc_link_setup(struct media_entity *entity,
1363*4882a593Smuzhiyun 			   const struct media_pad *local,
1364*4882a593Smuzhiyun 			   const struct media_pad *remote, u32 flags)
1365*4882a593Smuzhiyun {
1366*4882a593Smuzhiyun 	struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
1367*4882a593Smuzhiyun 	struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1368*4882a593Smuzhiyun 	struct fimc_vid_cap *vc = &fimc->vid_cap;
1369*4882a593Smuzhiyun 	struct v4l2_subdev *sensor;
1370*4882a593Smuzhiyun 
1371*4882a593Smuzhiyun 	if (!is_media_entity_v4l2_subdev(remote->entity))
1372*4882a593Smuzhiyun 		return -EINVAL;
1373*4882a593Smuzhiyun 
1374*4882a593Smuzhiyun 	if (WARN_ON(fimc == NULL))
1375*4882a593Smuzhiyun 		return 0;
1376*4882a593Smuzhiyun 
1377*4882a593Smuzhiyun 	dbg("%s --> %s, flags: 0x%x. input: 0x%x",
1378*4882a593Smuzhiyun 	    local->entity->name, remote->entity->name, flags,
1379*4882a593Smuzhiyun 	    fimc->vid_cap.input);
1380*4882a593Smuzhiyun 
1381*4882a593Smuzhiyun 	if (!(flags & MEDIA_LNK_FL_ENABLED)) {
1382*4882a593Smuzhiyun 		fimc->vid_cap.input = 0;
1383*4882a593Smuzhiyun 		return 0;
1384*4882a593Smuzhiyun 	}
1385*4882a593Smuzhiyun 
1386*4882a593Smuzhiyun 	if (vc->input != 0)
1387*4882a593Smuzhiyun 		return -EBUSY;
1388*4882a593Smuzhiyun 
1389*4882a593Smuzhiyun 	vc->input = sd->grp_id;
1390*4882a593Smuzhiyun 
1391*4882a593Smuzhiyun 	if (vc->user_subdev_api)
1392*4882a593Smuzhiyun 		return 0;
1393*4882a593Smuzhiyun 
1394*4882a593Smuzhiyun 	/* Inherit V4L2 controls from the image sensor subdev. */
1395*4882a593Smuzhiyun 	sensor = fimc_find_remote_sensor(&vc->subdev.entity);
1396*4882a593Smuzhiyun 	if (sensor == NULL)
1397*4882a593Smuzhiyun 		return 0;
1398*4882a593Smuzhiyun 
1399*4882a593Smuzhiyun 	return v4l2_ctrl_add_handler(&vc->ctx->ctrls.handler,
1400*4882a593Smuzhiyun 				     sensor->ctrl_handler, NULL, true);
1401*4882a593Smuzhiyun }
1402*4882a593Smuzhiyun 
1403*4882a593Smuzhiyun static const struct media_entity_operations fimc_sd_media_ops = {
1404*4882a593Smuzhiyun 	.link_setup = fimc_link_setup,
1405*4882a593Smuzhiyun };
1406*4882a593Smuzhiyun 
1407*4882a593Smuzhiyun /**
1408*4882a593Smuzhiyun  * fimc_sensor_notify - v4l2_device notification from a sensor subdev
1409*4882a593Smuzhiyun  * @sd: pointer to a subdev generating the notification
1410*4882a593Smuzhiyun  * @notification: the notification type, must be S5P_FIMC_TX_END_NOTIFY
1411*4882a593Smuzhiyun  * @arg: pointer to an u32 type integer that stores the frame payload value
1412*4882a593Smuzhiyun  *
1413*4882a593Smuzhiyun  * The End Of Frame notification sent by sensor subdev in its still capture
1414*4882a593Smuzhiyun  * mode. If there is only a single VSYNC generated by the sensor at the
1415*4882a593Smuzhiyun  * beginning of a frame transmission, FIMC does not issue the LastIrq
1416*4882a593Smuzhiyun  * (end of frame) interrupt. And this notification is used to complete the
1417*4882a593Smuzhiyun  * frame capture and returning a buffer to user-space. Subdev drivers should
1418*4882a593Smuzhiyun  * call this notification from their last 'End of frame capture' interrupt.
1419*4882a593Smuzhiyun  */
fimc_sensor_notify(struct v4l2_subdev * sd,unsigned int notification,void * arg)1420*4882a593Smuzhiyun void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification,
1421*4882a593Smuzhiyun 			void *arg)
1422*4882a593Smuzhiyun {
1423*4882a593Smuzhiyun 	struct fimc_source_info	*si;
1424*4882a593Smuzhiyun 	struct fimc_vid_buffer *buf;
1425*4882a593Smuzhiyun 	struct fimc_md *fmd;
1426*4882a593Smuzhiyun 	struct fimc_dev *fimc;
1427*4882a593Smuzhiyun 	unsigned long flags;
1428*4882a593Smuzhiyun 
1429*4882a593Smuzhiyun 	if (sd == NULL)
1430*4882a593Smuzhiyun 		return;
1431*4882a593Smuzhiyun 
1432*4882a593Smuzhiyun 	si = v4l2_get_subdev_hostdata(sd);
1433*4882a593Smuzhiyun 	fmd = entity_to_fimc_mdev(&sd->entity);
1434*4882a593Smuzhiyun 
1435*4882a593Smuzhiyun 	spin_lock_irqsave(&fmd->slock, flags);
1436*4882a593Smuzhiyun 
1437*4882a593Smuzhiyun 	fimc = si ? source_to_sensor_info(si)->host : NULL;
1438*4882a593Smuzhiyun 
1439*4882a593Smuzhiyun 	if (fimc && arg && notification == S5P_FIMC_TX_END_NOTIFY &&
1440*4882a593Smuzhiyun 	    test_bit(ST_CAPT_PEND, &fimc->state)) {
1441*4882a593Smuzhiyun 		unsigned long irq_flags;
1442*4882a593Smuzhiyun 		spin_lock_irqsave(&fimc->slock, irq_flags);
1443*4882a593Smuzhiyun 		if (!list_empty(&fimc->vid_cap.active_buf_q)) {
1444*4882a593Smuzhiyun 			buf = list_entry(fimc->vid_cap.active_buf_q.next,
1445*4882a593Smuzhiyun 					 struct fimc_vid_buffer, list);
1446*4882a593Smuzhiyun 			vb2_set_plane_payload(&buf->vb.vb2_buf, 0,
1447*4882a593Smuzhiyun 					      *((u32 *)arg));
1448*4882a593Smuzhiyun 		}
1449*4882a593Smuzhiyun 		fimc_capture_irq_handler(fimc, 1);
1450*4882a593Smuzhiyun 		fimc_deactivate_capture(fimc);
1451*4882a593Smuzhiyun 		spin_unlock_irqrestore(&fimc->slock, irq_flags);
1452*4882a593Smuzhiyun 	}
1453*4882a593Smuzhiyun 	spin_unlock_irqrestore(&fmd->slock, flags);
1454*4882a593Smuzhiyun }
1455*4882a593Smuzhiyun 
fimc_subdev_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)1456*4882a593Smuzhiyun static int fimc_subdev_enum_mbus_code(struct v4l2_subdev *sd,
1457*4882a593Smuzhiyun 				      struct v4l2_subdev_pad_config *cfg,
1458*4882a593Smuzhiyun 				      struct v4l2_subdev_mbus_code_enum *code)
1459*4882a593Smuzhiyun {
1460*4882a593Smuzhiyun 	struct fimc_fmt *fmt;
1461*4882a593Smuzhiyun 
1462*4882a593Smuzhiyun 	fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, code->index);
1463*4882a593Smuzhiyun 	if (!fmt)
1464*4882a593Smuzhiyun 		return -EINVAL;
1465*4882a593Smuzhiyun 	code->code = fmt->mbus_code;
1466*4882a593Smuzhiyun 	return 0;
1467*4882a593Smuzhiyun }
1468*4882a593Smuzhiyun 
fimc_subdev_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)1469*4882a593Smuzhiyun static int fimc_subdev_get_fmt(struct v4l2_subdev *sd,
1470*4882a593Smuzhiyun 			       struct v4l2_subdev_pad_config *cfg,
1471*4882a593Smuzhiyun 			       struct v4l2_subdev_format *fmt)
1472*4882a593Smuzhiyun {
1473*4882a593Smuzhiyun 	struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1474*4882a593Smuzhiyun 	struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1475*4882a593Smuzhiyun 	struct fimc_frame *ff = &ctx->s_frame;
1476*4882a593Smuzhiyun 	struct v4l2_mbus_framefmt *mf;
1477*4882a593Smuzhiyun 
1478*4882a593Smuzhiyun 	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1479*4882a593Smuzhiyun 		mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
1480*4882a593Smuzhiyun 		fmt->format = *mf;
1481*4882a593Smuzhiyun 		return 0;
1482*4882a593Smuzhiyun 	}
1483*4882a593Smuzhiyun 
1484*4882a593Smuzhiyun 	mf = &fmt->format;
1485*4882a593Smuzhiyun 	mutex_lock(&fimc->lock);
1486*4882a593Smuzhiyun 
1487*4882a593Smuzhiyun 	switch (fmt->pad) {
1488*4882a593Smuzhiyun 	case FIMC_SD_PAD_SOURCE:
1489*4882a593Smuzhiyun 		if (!WARN_ON(ff->fmt == NULL))
1490*4882a593Smuzhiyun 			mf->code = ff->fmt->mbus_code;
1491*4882a593Smuzhiyun 		/* Sink pads crop rectangle size */
1492*4882a593Smuzhiyun 		mf->width = ff->width;
1493*4882a593Smuzhiyun 		mf->height = ff->height;
1494*4882a593Smuzhiyun 		break;
1495*4882a593Smuzhiyun 	case FIMC_SD_PAD_SINK_FIFO:
1496*4882a593Smuzhiyun 		*mf = fimc->vid_cap.wb_fmt;
1497*4882a593Smuzhiyun 		break;
1498*4882a593Smuzhiyun 	case FIMC_SD_PAD_SINK_CAM:
1499*4882a593Smuzhiyun 	default:
1500*4882a593Smuzhiyun 		*mf = fimc->vid_cap.ci_fmt;
1501*4882a593Smuzhiyun 		break;
1502*4882a593Smuzhiyun 	}
1503*4882a593Smuzhiyun 
1504*4882a593Smuzhiyun 	mutex_unlock(&fimc->lock);
1505*4882a593Smuzhiyun 	mf->colorspace = V4L2_COLORSPACE_JPEG;
1506*4882a593Smuzhiyun 
1507*4882a593Smuzhiyun 	return 0;
1508*4882a593Smuzhiyun }
1509*4882a593Smuzhiyun 
fimc_subdev_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)1510*4882a593Smuzhiyun static int fimc_subdev_set_fmt(struct v4l2_subdev *sd,
1511*4882a593Smuzhiyun 			       struct v4l2_subdev_pad_config *cfg,
1512*4882a593Smuzhiyun 			       struct v4l2_subdev_format *fmt)
1513*4882a593Smuzhiyun {
1514*4882a593Smuzhiyun 	struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1515*4882a593Smuzhiyun 	struct v4l2_mbus_framefmt *mf = &fmt->format;
1516*4882a593Smuzhiyun 	struct fimc_vid_cap *vc = &fimc->vid_cap;
1517*4882a593Smuzhiyun 	struct fimc_ctx *ctx = vc->ctx;
1518*4882a593Smuzhiyun 	struct fimc_frame *ff;
1519*4882a593Smuzhiyun 	struct fimc_fmt *ffmt;
1520*4882a593Smuzhiyun 
1521*4882a593Smuzhiyun 	dbg("pad%d: code: 0x%x, %dx%d",
1522*4882a593Smuzhiyun 	    fmt->pad, mf->code, mf->width, mf->height);
1523*4882a593Smuzhiyun 
1524*4882a593Smuzhiyun 	if (fmt->pad == FIMC_SD_PAD_SOURCE && vb2_is_busy(&vc->vbq))
1525*4882a593Smuzhiyun 		return -EBUSY;
1526*4882a593Smuzhiyun 
1527*4882a593Smuzhiyun 	mutex_lock(&fimc->lock);
1528*4882a593Smuzhiyun 	ffmt = fimc_capture_try_format(ctx, &mf->width, &mf->height,
1529*4882a593Smuzhiyun 				       &mf->code, NULL, fmt->pad);
1530*4882a593Smuzhiyun 	mutex_unlock(&fimc->lock);
1531*4882a593Smuzhiyun 	mf->colorspace = V4L2_COLORSPACE_JPEG;
1532*4882a593Smuzhiyun 
1533*4882a593Smuzhiyun 	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1534*4882a593Smuzhiyun 		mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
1535*4882a593Smuzhiyun 		*mf = fmt->format;
1536*4882a593Smuzhiyun 		return 0;
1537*4882a593Smuzhiyun 	}
1538*4882a593Smuzhiyun 	/* There must be a bug in the driver if this happens */
1539*4882a593Smuzhiyun 	if (WARN_ON(ffmt == NULL))
1540*4882a593Smuzhiyun 		return -EINVAL;
1541*4882a593Smuzhiyun 
1542*4882a593Smuzhiyun 	/* Update RGB Alpha control state and value range */
1543*4882a593Smuzhiyun 	fimc_alpha_ctrl_update(ctx);
1544*4882a593Smuzhiyun 
1545*4882a593Smuzhiyun 	fimc_capture_mark_jpeg_xfer(ctx, ffmt->color);
1546*4882a593Smuzhiyun 	if (fmt->pad == FIMC_SD_PAD_SOURCE) {
1547*4882a593Smuzhiyun 		ff = &ctx->d_frame;
1548*4882a593Smuzhiyun 		/* Sink pads crop rectangle size */
1549*4882a593Smuzhiyun 		mf->width = ctx->s_frame.width;
1550*4882a593Smuzhiyun 		mf->height = ctx->s_frame.height;
1551*4882a593Smuzhiyun 	} else {
1552*4882a593Smuzhiyun 		ff = &ctx->s_frame;
1553*4882a593Smuzhiyun 	}
1554*4882a593Smuzhiyun 
1555*4882a593Smuzhiyun 	mutex_lock(&fimc->lock);
1556*4882a593Smuzhiyun 	set_frame_bounds(ff, mf->width, mf->height);
1557*4882a593Smuzhiyun 
1558*4882a593Smuzhiyun 	if (fmt->pad == FIMC_SD_PAD_SINK_FIFO)
1559*4882a593Smuzhiyun 		vc->wb_fmt = *mf;
1560*4882a593Smuzhiyun 	else if (fmt->pad == FIMC_SD_PAD_SINK_CAM)
1561*4882a593Smuzhiyun 		vc->ci_fmt = *mf;
1562*4882a593Smuzhiyun 
1563*4882a593Smuzhiyun 	ff->fmt = ffmt;
1564*4882a593Smuzhiyun 
1565*4882a593Smuzhiyun 	/* Reset the crop rectangle if required. */
1566*4882a593Smuzhiyun 	if (!(fmt->pad == FIMC_SD_PAD_SOURCE && (ctx->state & FIMC_COMPOSE)))
1567*4882a593Smuzhiyun 		set_frame_crop(ff, 0, 0, mf->width, mf->height);
1568*4882a593Smuzhiyun 
1569*4882a593Smuzhiyun 	if (fmt->pad != FIMC_SD_PAD_SOURCE)
1570*4882a593Smuzhiyun 		ctx->state &= ~FIMC_COMPOSE;
1571*4882a593Smuzhiyun 
1572*4882a593Smuzhiyun 	mutex_unlock(&fimc->lock);
1573*4882a593Smuzhiyun 	return 0;
1574*4882a593Smuzhiyun }
1575*4882a593Smuzhiyun 
fimc_subdev_get_selection(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_selection * sel)1576*4882a593Smuzhiyun static int fimc_subdev_get_selection(struct v4l2_subdev *sd,
1577*4882a593Smuzhiyun 				     struct v4l2_subdev_pad_config *cfg,
1578*4882a593Smuzhiyun 				     struct v4l2_subdev_selection *sel)
1579*4882a593Smuzhiyun {
1580*4882a593Smuzhiyun 	struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1581*4882a593Smuzhiyun 	struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1582*4882a593Smuzhiyun 	struct fimc_frame *f = &ctx->s_frame;
1583*4882a593Smuzhiyun 	struct v4l2_rect *r = &sel->r;
1584*4882a593Smuzhiyun 	struct v4l2_rect *try_sel;
1585*4882a593Smuzhiyun 
1586*4882a593Smuzhiyun 	if (sel->pad == FIMC_SD_PAD_SOURCE)
1587*4882a593Smuzhiyun 		return -EINVAL;
1588*4882a593Smuzhiyun 
1589*4882a593Smuzhiyun 	mutex_lock(&fimc->lock);
1590*4882a593Smuzhiyun 
1591*4882a593Smuzhiyun 	switch (sel->target) {
1592*4882a593Smuzhiyun 	case V4L2_SEL_TGT_COMPOSE_BOUNDS:
1593*4882a593Smuzhiyun 		f = &ctx->d_frame;
1594*4882a593Smuzhiyun 		fallthrough;
1595*4882a593Smuzhiyun 	case V4L2_SEL_TGT_CROP_BOUNDS:
1596*4882a593Smuzhiyun 		r->width = f->o_width;
1597*4882a593Smuzhiyun 		r->height = f->o_height;
1598*4882a593Smuzhiyun 		r->left = 0;
1599*4882a593Smuzhiyun 		r->top = 0;
1600*4882a593Smuzhiyun 		mutex_unlock(&fimc->lock);
1601*4882a593Smuzhiyun 		return 0;
1602*4882a593Smuzhiyun 
1603*4882a593Smuzhiyun 	case V4L2_SEL_TGT_CROP:
1604*4882a593Smuzhiyun 		try_sel = v4l2_subdev_get_try_crop(sd, cfg, sel->pad);
1605*4882a593Smuzhiyun 		break;
1606*4882a593Smuzhiyun 	case V4L2_SEL_TGT_COMPOSE:
1607*4882a593Smuzhiyun 		try_sel = v4l2_subdev_get_try_compose(sd, cfg, sel->pad);
1608*4882a593Smuzhiyun 		f = &ctx->d_frame;
1609*4882a593Smuzhiyun 		break;
1610*4882a593Smuzhiyun 	default:
1611*4882a593Smuzhiyun 		mutex_unlock(&fimc->lock);
1612*4882a593Smuzhiyun 		return -EINVAL;
1613*4882a593Smuzhiyun 	}
1614*4882a593Smuzhiyun 
1615*4882a593Smuzhiyun 	if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1616*4882a593Smuzhiyun 		sel->r = *try_sel;
1617*4882a593Smuzhiyun 	} else {
1618*4882a593Smuzhiyun 		r->left = f->offs_h;
1619*4882a593Smuzhiyun 		r->top = f->offs_v;
1620*4882a593Smuzhiyun 		r->width = f->width;
1621*4882a593Smuzhiyun 		r->height = f->height;
1622*4882a593Smuzhiyun 	}
1623*4882a593Smuzhiyun 
1624*4882a593Smuzhiyun 	dbg("target %#x: l:%d, t:%d, %dx%d, f_w: %d, f_h: %d",
1625*4882a593Smuzhiyun 	    sel->pad, r->left, r->top, r->width, r->height,
1626*4882a593Smuzhiyun 	    f->f_width, f->f_height);
1627*4882a593Smuzhiyun 
1628*4882a593Smuzhiyun 	mutex_unlock(&fimc->lock);
1629*4882a593Smuzhiyun 	return 0;
1630*4882a593Smuzhiyun }
1631*4882a593Smuzhiyun 
fimc_subdev_set_selection(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_selection * sel)1632*4882a593Smuzhiyun static int fimc_subdev_set_selection(struct v4l2_subdev *sd,
1633*4882a593Smuzhiyun 				     struct v4l2_subdev_pad_config *cfg,
1634*4882a593Smuzhiyun 				     struct v4l2_subdev_selection *sel)
1635*4882a593Smuzhiyun {
1636*4882a593Smuzhiyun 	struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1637*4882a593Smuzhiyun 	struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1638*4882a593Smuzhiyun 	struct fimc_frame *f = &ctx->s_frame;
1639*4882a593Smuzhiyun 	struct v4l2_rect *r = &sel->r;
1640*4882a593Smuzhiyun 	struct v4l2_rect *try_sel;
1641*4882a593Smuzhiyun 	unsigned long flags;
1642*4882a593Smuzhiyun 
1643*4882a593Smuzhiyun 	if (sel->pad == FIMC_SD_PAD_SOURCE)
1644*4882a593Smuzhiyun 		return -EINVAL;
1645*4882a593Smuzhiyun 
1646*4882a593Smuzhiyun 	mutex_lock(&fimc->lock);
1647*4882a593Smuzhiyun 	fimc_capture_try_selection(ctx, r, V4L2_SEL_TGT_CROP);
1648*4882a593Smuzhiyun 
1649*4882a593Smuzhiyun 	switch (sel->target) {
1650*4882a593Smuzhiyun 	case V4L2_SEL_TGT_CROP:
1651*4882a593Smuzhiyun 		try_sel = v4l2_subdev_get_try_crop(sd, cfg, sel->pad);
1652*4882a593Smuzhiyun 		break;
1653*4882a593Smuzhiyun 	case V4L2_SEL_TGT_COMPOSE:
1654*4882a593Smuzhiyun 		try_sel = v4l2_subdev_get_try_compose(sd, cfg, sel->pad);
1655*4882a593Smuzhiyun 		f = &ctx->d_frame;
1656*4882a593Smuzhiyun 		break;
1657*4882a593Smuzhiyun 	default:
1658*4882a593Smuzhiyun 		mutex_unlock(&fimc->lock);
1659*4882a593Smuzhiyun 		return -EINVAL;
1660*4882a593Smuzhiyun 	}
1661*4882a593Smuzhiyun 
1662*4882a593Smuzhiyun 	if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1663*4882a593Smuzhiyun 		*try_sel = sel->r;
1664*4882a593Smuzhiyun 	} else {
1665*4882a593Smuzhiyun 		spin_lock_irqsave(&fimc->slock, flags);
1666*4882a593Smuzhiyun 		set_frame_crop(f, r->left, r->top, r->width, r->height);
1667*4882a593Smuzhiyun 		set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
1668*4882a593Smuzhiyun 		if (sel->target == V4L2_SEL_TGT_COMPOSE)
1669*4882a593Smuzhiyun 			ctx->state |= FIMC_COMPOSE;
1670*4882a593Smuzhiyun 		spin_unlock_irqrestore(&fimc->slock, flags);
1671*4882a593Smuzhiyun 	}
1672*4882a593Smuzhiyun 
1673*4882a593Smuzhiyun 	dbg("target %#x: (%d,%d)/%dx%d", sel->target, r->left, r->top,
1674*4882a593Smuzhiyun 	    r->width, r->height);
1675*4882a593Smuzhiyun 
1676*4882a593Smuzhiyun 	mutex_unlock(&fimc->lock);
1677*4882a593Smuzhiyun 	return 0;
1678*4882a593Smuzhiyun }
1679*4882a593Smuzhiyun 
1680*4882a593Smuzhiyun static const struct v4l2_subdev_pad_ops fimc_subdev_pad_ops = {
1681*4882a593Smuzhiyun 	.enum_mbus_code = fimc_subdev_enum_mbus_code,
1682*4882a593Smuzhiyun 	.get_selection = fimc_subdev_get_selection,
1683*4882a593Smuzhiyun 	.set_selection = fimc_subdev_set_selection,
1684*4882a593Smuzhiyun 	.get_fmt = fimc_subdev_get_fmt,
1685*4882a593Smuzhiyun 	.set_fmt = fimc_subdev_set_fmt,
1686*4882a593Smuzhiyun };
1687*4882a593Smuzhiyun 
1688*4882a593Smuzhiyun static const struct v4l2_subdev_ops fimc_subdev_ops = {
1689*4882a593Smuzhiyun 	.pad = &fimc_subdev_pad_ops,
1690*4882a593Smuzhiyun };
1691*4882a593Smuzhiyun 
1692*4882a593Smuzhiyun /* Set default format at the sensor and host interface */
fimc_capture_set_default_format(struct fimc_dev * fimc)1693*4882a593Smuzhiyun static int fimc_capture_set_default_format(struct fimc_dev *fimc)
1694*4882a593Smuzhiyun {
1695*4882a593Smuzhiyun 	struct v4l2_format fmt = {
1696*4882a593Smuzhiyun 		.type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
1697*4882a593Smuzhiyun 		.fmt.pix_mp = {
1698*4882a593Smuzhiyun 			.width		= FIMC_DEFAULT_WIDTH,
1699*4882a593Smuzhiyun 			.height		= FIMC_DEFAULT_HEIGHT,
1700*4882a593Smuzhiyun 			.pixelformat	= V4L2_PIX_FMT_YUYV,
1701*4882a593Smuzhiyun 			.field		= V4L2_FIELD_NONE,
1702*4882a593Smuzhiyun 			.colorspace	= V4L2_COLORSPACE_JPEG,
1703*4882a593Smuzhiyun 		},
1704*4882a593Smuzhiyun 	};
1705*4882a593Smuzhiyun 
1706*4882a593Smuzhiyun 	return __fimc_capture_set_format(fimc, &fmt);
1707*4882a593Smuzhiyun }
1708*4882a593Smuzhiyun 
1709*4882a593Smuzhiyun /* fimc->lock must be already initialized */
fimc_register_capture_device(struct fimc_dev * fimc,struct v4l2_device * v4l2_dev)1710*4882a593Smuzhiyun static int fimc_register_capture_device(struct fimc_dev *fimc,
1711*4882a593Smuzhiyun 				 struct v4l2_device *v4l2_dev)
1712*4882a593Smuzhiyun {
1713*4882a593Smuzhiyun 	struct video_device *vfd = &fimc->vid_cap.ve.vdev;
1714*4882a593Smuzhiyun 	struct vb2_queue *q = &fimc->vid_cap.vbq;
1715*4882a593Smuzhiyun 	struct fimc_ctx *ctx;
1716*4882a593Smuzhiyun 	struct fimc_vid_cap *vid_cap;
1717*4882a593Smuzhiyun 	struct fimc_fmt *fmt;
1718*4882a593Smuzhiyun 	int ret = -ENOMEM;
1719*4882a593Smuzhiyun 
1720*4882a593Smuzhiyun 	ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
1721*4882a593Smuzhiyun 	if (!ctx)
1722*4882a593Smuzhiyun 		return -ENOMEM;
1723*4882a593Smuzhiyun 
1724*4882a593Smuzhiyun 	ctx->fimc_dev	 = fimc;
1725*4882a593Smuzhiyun 	ctx->in_path	 = FIMC_IO_CAMERA;
1726*4882a593Smuzhiyun 	ctx->out_path	 = FIMC_IO_DMA;
1727*4882a593Smuzhiyun 	ctx->state	 = FIMC_CTX_CAP;
1728*4882a593Smuzhiyun 	ctx->s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
1729*4882a593Smuzhiyun 	ctx->d_frame.fmt = ctx->s_frame.fmt;
1730*4882a593Smuzhiyun 
1731*4882a593Smuzhiyun 	memset(vfd, 0, sizeof(*vfd));
1732*4882a593Smuzhiyun 	snprintf(vfd->name, sizeof(vfd->name), "fimc.%d.capture", fimc->id);
1733*4882a593Smuzhiyun 
1734*4882a593Smuzhiyun 	vfd->fops	= &fimc_capture_fops;
1735*4882a593Smuzhiyun 	vfd->ioctl_ops	= &fimc_capture_ioctl_ops;
1736*4882a593Smuzhiyun 	vfd->v4l2_dev	= v4l2_dev;
1737*4882a593Smuzhiyun 	vfd->minor	= -1;
1738*4882a593Smuzhiyun 	vfd->release	= video_device_release_empty;
1739*4882a593Smuzhiyun 	vfd->queue	= q;
1740*4882a593Smuzhiyun 	vfd->lock	= &fimc->lock;
1741*4882a593Smuzhiyun 	vfd->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE_MPLANE;
1742*4882a593Smuzhiyun 
1743*4882a593Smuzhiyun 	video_set_drvdata(vfd, fimc);
1744*4882a593Smuzhiyun 	vid_cap = &fimc->vid_cap;
1745*4882a593Smuzhiyun 	vid_cap->active_buf_cnt = 0;
1746*4882a593Smuzhiyun 	vid_cap->reqbufs_count = 0;
1747*4882a593Smuzhiyun 	vid_cap->ctx = ctx;
1748*4882a593Smuzhiyun 
1749*4882a593Smuzhiyun 	INIT_LIST_HEAD(&vid_cap->pending_buf_q);
1750*4882a593Smuzhiyun 	INIT_LIST_HEAD(&vid_cap->active_buf_q);
1751*4882a593Smuzhiyun 
1752*4882a593Smuzhiyun 	memset(q, 0, sizeof(*q));
1753*4882a593Smuzhiyun 	q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
1754*4882a593Smuzhiyun 	q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
1755*4882a593Smuzhiyun 	q->drv_priv = ctx;
1756*4882a593Smuzhiyun 	q->ops = &fimc_capture_qops;
1757*4882a593Smuzhiyun 	q->mem_ops = &vb2_dma_contig_memops;
1758*4882a593Smuzhiyun 	q->buf_struct_size = sizeof(struct fimc_vid_buffer);
1759*4882a593Smuzhiyun 	q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1760*4882a593Smuzhiyun 	q->lock = &fimc->lock;
1761*4882a593Smuzhiyun 	q->dev = &fimc->pdev->dev;
1762*4882a593Smuzhiyun 
1763*4882a593Smuzhiyun 	ret = vb2_queue_init(q);
1764*4882a593Smuzhiyun 	if (ret)
1765*4882a593Smuzhiyun 		goto err_free_ctx;
1766*4882a593Smuzhiyun 
1767*4882a593Smuzhiyun 	/* Default format configuration */
1768*4882a593Smuzhiyun 	fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
1769*4882a593Smuzhiyun 	vid_cap->ci_fmt.width = FIMC_DEFAULT_WIDTH;
1770*4882a593Smuzhiyun 	vid_cap->ci_fmt.height = FIMC_DEFAULT_HEIGHT;
1771*4882a593Smuzhiyun 	vid_cap->ci_fmt.code = fmt->mbus_code;
1772*4882a593Smuzhiyun 
1773*4882a593Smuzhiyun 	ctx->s_frame.width = FIMC_DEFAULT_WIDTH;
1774*4882a593Smuzhiyun 	ctx->s_frame.height = FIMC_DEFAULT_HEIGHT;
1775*4882a593Smuzhiyun 	ctx->s_frame.fmt = fmt;
1776*4882a593Smuzhiyun 
1777*4882a593Smuzhiyun 	fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_WRITEBACK, 0);
1778*4882a593Smuzhiyun 	vid_cap->wb_fmt = vid_cap->ci_fmt;
1779*4882a593Smuzhiyun 	vid_cap->wb_fmt.code = fmt->mbus_code;
1780*4882a593Smuzhiyun 
1781*4882a593Smuzhiyun 	vid_cap->vd_pad.flags = MEDIA_PAD_FL_SINK;
1782*4882a593Smuzhiyun 	vfd->entity.function = MEDIA_ENT_F_PROC_VIDEO_SCALER;
1783*4882a593Smuzhiyun 	ret = media_entity_pads_init(&vfd->entity, 1, &vid_cap->vd_pad);
1784*4882a593Smuzhiyun 	if (ret)
1785*4882a593Smuzhiyun 		goto err_free_ctx;
1786*4882a593Smuzhiyun 
1787*4882a593Smuzhiyun 	ret = fimc_ctrls_create(ctx);
1788*4882a593Smuzhiyun 	if (ret)
1789*4882a593Smuzhiyun 		goto err_me_cleanup;
1790*4882a593Smuzhiyun 
1791*4882a593Smuzhiyun 	ret = video_register_device(vfd, VFL_TYPE_VIDEO, -1);
1792*4882a593Smuzhiyun 	if (ret)
1793*4882a593Smuzhiyun 		goto err_ctrl_free;
1794*4882a593Smuzhiyun 
1795*4882a593Smuzhiyun 	v4l2_info(v4l2_dev, "Registered %s as /dev/%s\n",
1796*4882a593Smuzhiyun 		  vfd->name, video_device_node_name(vfd));
1797*4882a593Smuzhiyun 
1798*4882a593Smuzhiyun 	vfd->ctrl_handler = &ctx->ctrls.handler;
1799*4882a593Smuzhiyun 	return 0;
1800*4882a593Smuzhiyun 
1801*4882a593Smuzhiyun err_ctrl_free:
1802*4882a593Smuzhiyun 	fimc_ctrls_delete(ctx);
1803*4882a593Smuzhiyun err_me_cleanup:
1804*4882a593Smuzhiyun 	media_entity_cleanup(&vfd->entity);
1805*4882a593Smuzhiyun err_free_ctx:
1806*4882a593Smuzhiyun 	kfree(ctx);
1807*4882a593Smuzhiyun 	return ret;
1808*4882a593Smuzhiyun }
1809*4882a593Smuzhiyun 
fimc_capture_subdev_registered(struct v4l2_subdev * sd)1810*4882a593Smuzhiyun static int fimc_capture_subdev_registered(struct v4l2_subdev *sd)
1811*4882a593Smuzhiyun {
1812*4882a593Smuzhiyun 	struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1813*4882a593Smuzhiyun 	int ret;
1814*4882a593Smuzhiyun 
1815*4882a593Smuzhiyun 	if (fimc == NULL)
1816*4882a593Smuzhiyun 		return -ENXIO;
1817*4882a593Smuzhiyun 
1818*4882a593Smuzhiyun 	ret = fimc_register_m2m_device(fimc, sd->v4l2_dev);
1819*4882a593Smuzhiyun 	if (ret)
1820*4882a593Smuzhiyun 		return ret;
1821*4882a593Smuzhiyun 
1822*4882a593Smuzhiyun 	fimc->vid_cap.ve.pipe = v4l2_get_subdev_hostdata(sd);
1823*4882a593Smuzhiyun 
1824*4882a593Smuzhiyun 	ret = fimc_register_capture_device(fimc, sd->v4l2_dev);
1825*4882a593Smuzhiyun 	if (ret) {
1826*4882a593Smuzhiyun 		fimc_unregister_m2m_device(fimc);
1827*4882a593Smuzhiyun 		fimc->vid_cap.ve.pipe = NULL;
1828*4882a593Smuzhiyun 	}
1829*4882a593Smuzhiyun 
1830*4882a593Smuzhiyun 	return ret;
1831*4882a593Smuzhiyun }
1832*4882a593Smuzhiyun 
fimc_capture_subdev_unregistered(struct v4l2_subdev * sd)1833*4882a593Smuzhiyun static void fimc_capture_subdev_unregistered(struct v4l2_subdev *sd)
1834*4882a593Smuzhiyun {
1835*4882a593Smuzhiyun 	struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1836*4882a593Smuzhiyun 	struct video_device *vdev;
1837*4882a593Smuzhiyun 
1838*4882a593Smuzhiyun 	if (fimc == NULL)
1839*4882a593Smuzhiyun 		return;
1840*4882a593Smuzhiyun 
1841*4882a593Smuzhiyun 	mutex_lock(&fimc->lock);
1842*4882a593Smuzhiyun 
1843*4882a593Smuzhiyun 	fimc_unregister_m2m_device(fimc);
1844*4882a593Smuzhiyun 	vdev = &fimc->vid_cap.ve.vdev;
1845*4882a593Smuzhiyun 
1846*4882a593Smuzhiyun 	if (video_is_registered(vdev)) {
1847*4882a593Smuzhiyun 		video_unregister_device(vdev);
1848*4882a593Smuzhiyun 		media_entity_cleanup(&vdev->entity);
1849*4882a593Smuzhiyun 		fimc_ctrls_delete(fimc->vid_cap.ctx);
1850*4882a593Smuzhiyun 		fimc->vid_cap.ve.pipe = NULL;
1851*4882a593Smuzhiyun 	}
1852*4882a593Smuzhiyun 	kfree(fimc->vid_cap.ctx);
1853*4882a593Smuzhiyun 	fimc->vid_cap.ctx = NULL;
1854*4882a593Smuzhiyun 
1855*4882a593Smuzhiyun 	mutex_unlock(&fimc->lock);
1856*4882a593Smuzhiyun }
1857*4882a593Smuzhiyun 
1858*4882a593Smuzhiyun static const struct v4l2_subdev_internal_ops fimc_capture_sd_internal_ops = {
1859*4882a593Smuzhiyun 	.registered = fimc_capture_subdev_registered,
1860*4882a593Smuzhiyun 	.unregistered = fimc_capture_subdev_unregistered,
1861*4882a593Smuzhiyun };
1862*4882a593Smuzhiyun 
fimc_initialize_capture_subdev(struct fimc_dev * fimc)1863*4882a593Smuzhiyun int fimc_initialize_capture_subdev(struct fimc_dev *fimc)
1864*4882a593Smuzhiyun {
1865*4882a593Smuzhiyun 	struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
1866*4882a593Smuzhiyun 	int ret;
1867*4882a593Smuzhiyun 
1868*4882a593Smuzhiyun 	v4l2_subdev_init(sd, &fimc_subdev_ops);
1869*4882a593Smuzhiyun 	sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1870*4882a593Smuzhiyun 	snprintf(sd->name, sizeof(sd->name), "FIMC.%d", fimc->id);
1871*4882a593Smuzhiyun 
1872*4882a593Smuzhiyun 	fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_CAM].flags = MEDIA_PAD_FL_SINK;
1873*4882a593Smuzhiyun 	fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_FIFO].flags = MEDIA_PAD_FL_SINK;
1874*4882a593Smuzhiyun 	fimc->vid_cap.sd_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
1875*4882a593Smuzhiyun 	ret = media_entity_pads_init(&sd->entity, FIMC_SD_PADS_NUM,
1876*4882a593Smuzhiyun 				fimc->vid_cap.sd_pads);
1877*4882a593Smuzhiyun 	if (ret)
1878*4882a593Smuzhiyun 		return ret;
1879*4882a593Smuzhiyun 
1880*4882a593Smuzhiyun 	sd->entity.ops = &fimc_sd_media_ops;
1881*4882a593Smuzhiyun 	sd->entity.function = MEDIA_ENT_F_PROC_VIDEO_SCALER;
1882*4882a593Smuzhiyun 	sd->internal_ops = &fimc_capture_sd_internal_ops;
1883*4882a593Smuzhiyun 	v4l2_set_subdevdata(sd, fimc);
1884*4882a593Smuzhiyun 	return 0;
1885*4882a593Smuzhiyun }
1886*4882a593Smuzhiyun 
fimc_unregister_capture_subdev(struct fimc_dev * fimc)1887*4882a593Smuzhiyun void fimc_unregister_capture_subdev(struct fimc_dev *fimc)
1888*4882a593Smuzhiyun {
1889*4882a593Smuzhiyun 	struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
1890*4882a593Smuzhiyun 
1891*4882a593Smuzhiyun 	v4l2_device_unregister_subdev(sd);
1892*4882a593Smuzhiyun 	media_entity_cleanup(&sd->entity);
1893*4882a593Smuzhiyun 	v4l2_set_subdevdata(sd, NULL);
1894*4882a593Smuzhiyun }
1895