1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Coda multi-standard codec IP
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2014 Philipp Zabel, Pengutronix
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/bitops.h>
9*4882a593Smuzhiyun #include "coda.h"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #define XY2_INVERT BIT(7)
12*4882a593Smuzhiyun #define XY2_ZERO BIT(6)
13*4882a593Smuzhiyun #define XY2_TB_XOR BIT(5)
14*4882a593Smuzhiyun #define XY2_XYSEL BIT(4)
15*4882a593Smuzhiyun #define XY2_Y (1 << 4)
16*4882a593Smuzhiyun #define XY2_X (0 << 4)
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #define XY2(luma_sel, luma_bit, chroma_sel, chroma_bit) \
19*4882a593Smuzhiyun (((XY2_##luma_sel) | (luma_bit)) << 8 | \
20*4882a593Smuzhiyun (XY2_##chroma_sel) | (chroma_bit))
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun static const u16 xy2ca_zero_map[16] = {
23*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
24*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
25*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
26*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
27*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
28*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
29*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
30*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
31*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
32*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
33*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
34*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
35*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
36*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
37*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
38*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
39*4882a593Smuzhiyun };
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun static const u16 xy2ca_tiled_map[16] = {
42*4882a593Smuzhiyun XY2(Y, 0, Y, 0),
43*4882a593Smuzhiyun XY2(Y, 1, Y, 1),
44*4882a593Smuzhiyun XY2(Y, 2, Y, 2),
45*4882a593Smuzhiyun XY2(Y, 3, X, 3),
46*4882a593Smuzhiyun XY2(X, 3, ZERO, 0),
47*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
48*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
49*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
50*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
51*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
52*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
53*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
54*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
55*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
56*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
57*4882a593Smuzhiyun XY2(ZERO, 0, ZERO, 0),
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun /*
61*4882a593Smuzhiyun * RA[15:0], CA[15:8] are hardwired to contain the 24-bit macroblock
62*4882a593Smuzhiyun * start offset (macroblock size is 16x16 for luma, 16x8 for chroma).
63*4882a593Smuzhiyun * Bits CA[4:0] are set using XY2CA above. BA[3:0] seems to be unused.
64*4882a593Smuzhiyun */
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun #define RBC_CA (0 << 4)
67*4882a593Smuzhiyun #define RBC_BA (1 << 4)
68*4882a593Smuzhiyun #define RBC_RA (2 << 4)
69*4882a593Smuzhiyun #define RBC_ZERO (3 << 4)
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun #define RBC(luma_sel, luma_bit, chroma_sel, chroma_bit) \
72*4882a593Smuzhiyun (((RBC_##luma_sel) | (luma_bit)) << 6 | \
73*4882a593Smuzhiyun (RBC_##chroma_sel) | (chroma_bit))
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun static const u16 rbc2axi_tiled_map[32] = {
76*4882a593Smuzhiyun RBC(ZERO, 0, ZERO, 0),
77*4882a593Smuzhiyun RBC(ZERO, 0, ZERO, 0),
78*4882a593Smuzhiyun RBC(ZERO, 0, ZERO, 0),
79*4882a593Smuzhiyun RBC(CA, 0, CA, 0),
80*4882a593Smuzhiyun RBC(CA, 1, CA, 1),
81*4882a593Smuzhiyun RBC(CA, 2, CA, 2),
82*4882a593Smuzhiyun RBC(CA, 3, CA, 3),
83*4882a593Smuzhiyun RBC(CA, 4, CA, 8),
84*4882a593Smuzhiyun RBC(CA, 8, CA, 9),
85*4882a593Smuzhiyun RBC(CA, 9, CA, 10),
86*4882a593Smuzhiyun RBC(CA, 10, CA, 11),
87*4882a593Smuzhiyun RBC(CA, 11, CA, 12),
88*4882a593Smuzhiyun RBC(CA, 12, CA, 13),
89*4882a593Smuzhiyun RBC(CA, 13, CA, 14),
90*4882a593Smuzhiyun RBC(CA, 14, CA, 15),
91*4882a593Smuzhiyun RBC(CA, 15, RA, 0),
92*4882a593Smuzhiyun RBC(RA, 0, RA, 1),
93*4882a593Smuzhiyun RBC(RA, 1, RA, 2),
94*4882a593Smuzhiyun RBC(RA, 2, RA, 3),
95*4882a593Smuzhiyun RBC(RA, 3, RA, 4),
96*4882a593Smuzhiyun RBC(RA, 4, RA, 5),
97*4882a593Smuzhiyun RBC(RA, 5, RA, 6),
98*4882a593Smuzhiyun RBC(RA, 6, RA, 7),
99*4882a593Smuzhiyun RBC(RA, 7, RA, 8),
100*4882a593Smuzhiyun RBC(RA, 8, RA, 9),
101*4882a593Smuzhiyun RBC(RA, 9, RA, 10),
102*4882a593Smuzhiyun RBC(RA, 10, RA, 11),
103*4882a593Smuzhiyun RBC(RA, 11, RA, 12),
104*4882a593Smuzhiyun RBC(RA, 12, RA, 13),
105*4882a593Smuzhiyun RBC(RA, 13, RA, 14),
106*4882a593Smuzhiyun RBC(RA, 14, RA, 15),
107*4882a593Smuzhiyun RBC(RA, 15, ZERO, 0),
108*4882a593Smuzhiyun };
109*4882a593Smuzhiyun
coda_set_gdi_regs(struct coda_ctx * ctx)110*4882a593Smuzhiyun void coda_set_gdi_regs(struct coda_ctx *ctx)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun struct coda_dev *dev = ctx->dev;
113*4882a593Smuzhiyun const u16 *xy2ca_map;
114*4882a593Smuzhiyun u32 xy2rbc_config;
115*4882a593Smuzhiyun int i;
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun switch (ctx->tiled_map_type) {
118*4882a593Smuzhiyun case GDI_LINEAR_FRAME_MAP:
119*4882a593Smuzhiyun default:
120*4882a593Smuzhiyun xy2ca_map = xy2ca_zero_map;
121*4882a593Smuzhiyun xy2rbc_config = 0;
122*4882a593Smuzhiyun break;
123*4882a593Smuzhiyun case GDI_TILED_FRAME_MB_RASTER_MAP:
124*4882a593Smuzhiyun xy2ca_map = xy2ca_tiled_map;
125*4882a593Smuzhiyun xy2rbc_config = CODA9_XY2RBC_TILED_MAP |
126*4882a593Smuzhiyun CODA9_XY2RBC_CA_INC_HOR |
127*4882a593Smuzhiyun (16 - 1) << 12 | (8 - 1) << 4;
128*4882a593Smuzhiyun break;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun for (i = 0; i < 16; i++)
132*4882a593Smuzhiyun coda_write(dev, xy2ca_map[i],
133*4882a593Smuzhiyun CODA9_GDI_XY2_CAS_0 + 4 * i);
134*4882a593Smuzhiyun for (i = 0; i < 4; i++)
135*4882a593Smuzhiyun coda_write(dev, XY2(ZERO, 0, ZERO, 0),
136*4882a593Smuzhiyun CODA9_GDI_XY2_BA_0 + 4 * i);
137*4882a593Smuzhiyun for (i = 0; i < 16; i++)
138*4882a593Smuzhiyun coda_write(dev, XY2(ZERO, 0, ZERO, 0),
139*4882a593Smuzhiyun CODA9_GDI_XY2_RAS_0 + 4 * i);
140*4882a593Smuzhiyun coda_write(dev, xy2rbc_config, CODA9_GDI_XY2_RBC_CONFIG);
141*4882a593Smuzhiyun if (xy2rbc_config) {
142*4882a593Smuzhiyun for (i = 0; i < 32; i++)
143*4882a593Smuzhiyun coda_write(dev, rbc2axi_tiled_map[i],
144*4882a593Smuzhiyun CODA9_GDI_RBC2_AXI_0 + 4 * i);
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun }
147